Subversion Repositories Code-Repo

EESchema-LIBRARY Version 2.3  Date: mer 13 feb 2013 00:03:15 CET
#encoding utf-8
#
# ATMEGA164_324_644_1284P-DIP
#
DEF ATMEGA164_324_644_1284P-DIP U 0 40 Y Y 1 F N
F0 "U" 150 1100 60 H V C CNN
F1 "ATMEGA164_324_644_1284P-DIP" 850 1000 60 H V C CNN
DRAW
S -950 950 950 -950 0 1 0 N
X PB0_(PCINT8/XCK0/T0) 1 -1050 -200 100 R 39 39 1 1 P
X PB1_(PCINT9/CLKO/T1) 2 -1050 -300 100 R 39 39 1 1 P
X PB2_(PCINT10/INT2/AIN0) 3 -1050 -400 100 R 39 39 1 1 P
X PB3_(PCINT11/OC0A/AIN1) 4 -1050 -500 100 R 39 39 1 1 P
X PB4_(PCINT12/OC0B/~SS~) 5 -1050 -600 100 R 39 39 1 1 P
X PB5_(PCINT13/ICP3/MOSI) 6 -1050 -700 100 R 39 39 1 1 P
X PB6_(PCINT14/OC3A/MISO) 7 -1050 -800 100 R 39 39 1 1 P
X PB7_(PCINT15/OC3B/SCK) 8 -1050 -900 100 R 39 39 1 1 P
X ~RESET 9 1050 0 100 L 39 39 1 1 P
X VDD 10 -50 1050 100 D 39 39 1 1 P
X (PCINT30/OC2B/ICP)_PD6 20 1050 800 100 L 39 39 1 1 P
X AVCC 30 -150 1050 100 D 39 39 1 1 P
X PA0_(ADC0/PCINT0) 40 -1050 900 100 R 39 39 1 1 P
X VSS 11 0 -1050 100 U 39 39 1 1 P
X (OC2A/PCINT31)_PD7 21 1050 900 100 L 39 39 1 1 P
X VSS 31 100 -1050 100 U 39 39 1 1 P
X XTAL2 12 -1050 50 100 R 39 39 1 1 P
X (SCL/PCINT16)_PC0 22 1050 -900 100 L 39 39 1 1 P
X AREF 32 50 1050 100 D 39 39 1 1 P
X XTAL1 13 -1050 -50 100 R 39 39 1 1 P
X (SDA/PCINT17)_PC1 23 1050 -800 100 L 39 39 1 1 P
X PA7_(ADC7/PCINT7) 33 -1050 200 100 R 39 39 1 1 P
X (PCINT24/RXD0/T3)_PD0 14 1050 200 100 L 39 39 1 1 P
X (TCK/PCINT18)_PC2 24 1050 -700 100 L 39 39 1 1 P
X PA6_(ADC6/PCINT6) 34 -1050 300 100 R 39 39 1 1 P
X (TXD/PCINT17)_PD1 15 1050 300 100 L 39 39 1 1 P
X (TMS/PCINT19)_PC3 25 1050 -600 100 L 39 39 1 1 P
X PA5_(ADC5/PCINT5) 35 -1050 400 100 R 39 39 1 1 P
X (TDO/PCINT20)_PC4 26 1050 -500 100 L 39 39 1 1 P
X PA4_(ADC4/PCINT4) 36 -1050 500 100 R 39 39 1 1 P
X (PCINT27/TXD1/INT1)_PD3 17 1050 500 100 L 39 39 1 1 P
X (TDI/PCINT21)_PC5 27 1050 -400 100 L 39 39 1 1 P
X PA3_(ADC3/PCINT3) 37 -1050 600 100 R 39 39 1 1 P
X (T0/XCK/PCINT20)_PD4 18 1050 600 100 L 39 39 1 1 P
X (TOSC1/PCINT22)_PC6 28 1050 -300 100 L 39 39 1 1 P
X PA2_(ADC2/PCINT2) 38 -1050 700 100 R 39 39 1 1 P
X (PCINT29/OC1A)_PD5 19 1050 700 100 L 39 39 1 1 P
X (TOSC2/PCINT23)_PC7 29 1050 -200 100 L 39 39 1 1 P
X PA1_(ADC1/PCINT1) 39 -1050 800 100 R 39 39 1 1 P
X (PCINT26/RXD1/INT0)_PD2 16. 1050 400 100 L 39 39 1 1 P
ENDDRAW
ENDDEF
#
# ATMEGA164_324_644_1284P-DRQFN
#
DEF ATMEGA164_324_644_1284P-DRQFN U 0 40 Y Y 1 F N
F0 "U" 250 1100 60 H V C CNN
F1 "ATMEGA164_324_644_1284P-DRQFN" 1000 1000 60 H V C CNN
DRAW
S -1000 950 1000 -950 0 1 0 N
X PB5_(PCINT13/ICP3/MOSI) A1 -1100 -700 100 R 39 39 1 1 P
X PB6_(PCINT14/OC3A/MISO) B1 -1100 -800 100 R 39 39 1 1 P
X PB7_(PCINT15/OC3B/SCK) A2 -1100 -900 100 R 39 39 1 1 P
X ~RESET B2 1100 0 100 L 39 39 1 1 P
X VDD A3 -200 1050 100 D 39 39 1 1 P
X VSS B3 -50 -1050 100 U 39 39 1 1 P
X XTAL2 A4 -1100 50 100 R 39 39 1 1 P
X XTAL1 B4 -1100 -50 100 R 39 39 1 1 P
X (PCINT24/RXD0/T3)_PD0 A5 1100 200 100 L 39 39 1 1 P
X (TXD/PCINT17)_PD1 B5 1100 300 100 L 39 39 1 1 P
X (PCINT26/RXD1/INT0)_PD2 A6 1100 400 100 L 39 39 1 1 P
X (T0/XCK/PCINT20)_PD4 B6 1100 600 100 L 39 39 1 1 P
X (PCINT27/TXD1/INT1)_PD3 A7 1100 500 100 L 39 39 1 1 P
X (PCINT30/OC2B/ICP)_PD6 B7 1100 800 100 L 39 39 1 1 P
X (PCINT29/OC1A)_PD5 A8 1100 700 100 L 39 39 1 1 P
X VDD B8 -100 1050 100 D 39 39 1 1 P
X (OC2A/PCINT31)_PD7 A9 1100 900 100 L 39 39 1 1 P
X (SCL/PCINT16)_PC0 B9 1100 -900 100 L 39 39 1 1 P
X VSS A10 50 -1050 100 U 39 39 1 1 P
X (TCK/PCINT18)_PC2 B10 1100 -700 100 L 39 39 1 1 P
X PA1_(ADC1/PCINT1) A20 -1100 800 100 R 39 39 1 1 P
X PB3_(PCINT11/OC0A/AIN1) B20 -1100 -500 100 R 39 39 1 1 P
X (SDA/PCINT17)_PC1 A11 1100 -800 100 L 39 39 1 1 P
X (TDI/PCINT21)_PC5 B11 1100 -400 100 L 39 39 1 1 P
X VDD A21 0 1050 100 D 39 39 1 1 P
X (TMS/PCINT19)_PC3 A12 1100 -600 100 L 39 39 1 1 P
X (TOSC2/PCINT23)_PC7 B12 1100 -200 100 L 39 39 1 1 P
X PB0_(PCINT8/XCK0/T0) A22 -1100 -200 100 R 39 39 1 1 P
X (TDO/PCINT20)_PC4 A13 1100 -500 100 L 39 39 1 1 P
X VSS B13 150 -1050 100 U 39 39 1 1 P
X PB2_(PCINT10/INT2/AIN0) A23 -1100 -400 100 R 39 39 1 1 P
X (TOSC1/PCINT22)_PC6 A14 1100 -300 100 L 39 39 1 1 P
X PA7_(ADC7/PCINT7) B14 -1100 200 100 R 39 39 1 1 P
X PB4_(PCINT12/OC0B/~SS~) A24 -1100 -600 100 R 39 39 1 1 P
X AVCC A15 -300 1050 100 D 39 39 1 1 P
X PA5_(ADC5/PCINT5) B15 -1100 400 100 R 39 39 1 1 P
X AREF A16 100 1050 100 D 39 39 1 1 P
X PA2_(ADC2/PCINT2) B16 -1100 700 100 R 39 39 1 1 P
X PA6_(ADC6/PCINT6) A17 -1100 300 100 R 39 39 1 1 P
X PA0_(ADC0/PCINT0) B17 -1100 900 100 R 39 39 1 1 P
X PA4_(ADC4/PCINT4) A18 -1100 500 100 R 39 39 1 1 P
X VSS B18 250 -1050 100 U 39 39 1 1 P
X PA3_(ADC3/PCINT3) A19 -1100 600 100 R 39 39 1 1 P
X PB1_(PCINT9/CLKO/T1) B19 -1100 -300 100 R 39 39 1 1 P
ENDDRAW
ENDDEF
#
# ATMEGA164_324_644_1284P-QFP/QFN/MLF
#
DEF ATMEGA164_324_644_1284P-QFP/QFN/MLF U 0 40 Y Y 1 F N
F0 "U" 250 1100 60 H V C CNN
F1 "ATMEGA164_324_644_1284P-QFP/QFN/MLF" 1200 1000 60 H V C CNN
DRAW
S -1000 950 1000 -950 0 1 0 N
X PB5_(PCINT13/ICP3/MOSI) 1 -1100 -700 100 R 39 39 1 1 P
X PB6_(PCINT14/OC3A/MISO) 2 -1100 -800 100 R 39 39 1 1 P
X PB7_(PCINT15/OC3B/SCK) 3 -1100 -900 100 R 39 39 1 1 P
X ~RESET 4 1100 0 100 L 39 39 1 1 P
X VDD 5 -100 1050 100 D 39 39 1 1 P
X VSS 6 -50 -1050 100 U 39 39 1 1 P
X XTAL2 7 -1100 50 100 R 39 39 1 1 P
X XTAL1 8 -1100 -50 100 R 39 39 1 1 P
X (PCINT24/RXD0/T3)_PD0 9 1100 200 100 L 39 39 1 1 P
X (TXD/PCINT17)_PD1 10 1100 300 100 L 39 39 1 1 P
X (SDA/PCINT17)_PC1 20 1100 -800 100 L 39 39 1 1 P
X PA7_(ADC7/PCINT7) 30 -1100 200 100 R 39 39 1 1 P
X PB0_(PCINT8/XCK0/T0) 40 -1100 -200 100 R 39 39 1 1 P
X (PCINT26/RXD1/INT0)_PD2 11 1100 400 100 L 39 39 1 1 P
X (TCK/PCINT18)_PC2 21 1100 -700 100 L 39 39 1 1 P
X PA6_(ADC6/PCINT6) 31 -1100 300 100 R 39 39 1 1 P
X PB1_(PCINT9/CLKO/T1) 41 -1100 -300 100 R 39 39 1 1 P
X (PCINT27/TXD1/INT1)_PD3 12 1100 500 100 L 39 39 1 1 P
X (TMS/PCINT19)_PC3 22 1100 -600 100 L 39 39 1 1 P
X PA5_(ADC5/PCINT5) 32 -1100 400 100 R 39 39 1 1 P
X PB2_(PCINT10/INT2/AIN0) 42 -1100 -400 100 R 39 39 1 1 P
X (T0/XCK/PCINT20)_PD4 13 1100 600 100 L 39 39 1 1 P
X (TDO/PCINT20)_PC4 23 1100 -500 100 L 39 39 1 1 P
X PA4_(ADC4/PCINT4) 33 -1100 500 100 R 39 39 1 1 P
X PB3_(PCINT11/OC0A/AIN1) 43 -1100 -500 100 R 39 39 1 1 P
X (PCINT29/OC1A)_PD5 14 1100 700 100 L 39 39 1 1 P
X (TDI/PCINT21)_PC5 24 1100 -400 100 L 39 39 1 1 P
X PA3_(ADC3/PCINT3) 34 -1100 600 100 R 39 39 1 1 P
X PB4_(PCINT12/OC0B/~SS~) 44 -1100 -600 100 R 39 39 1 1 P
X (PCINT30/OC2B/ICP)_PD6 15 1100 800 100 L 39 39 1 1 P
X (TOSC1/PCINT22)_PC6 25 1100 -300 100 L 39 39 1 1 P
X PA2_(ADC2/PCINT2) 35 -1100 700 100 R 39 39 1 1 P
X (OC2A/PCINT31)_PD7 16 1100 900 100 L 39 39 1 1 P
X (TOSC2/PCINT23)_PC7 26 1100 -200 100 L 39 39 1 1 P
X PA1_(ADC1/PCINT1) 36 -1100 800 100 R 39 39 1 1 P
X VDD 17 -200 1050 100 D 39 39 1 1 P
X AVCC 27 -300 1050 100 D 39 39 1 1 P
X PA0_(ADC0/PCINT0) 37 -1100 900 100 R 39 39 1 1 P
X VSS 18 50 -1050 100 U 39 39 1 1 P
X VSS 28 150 -1050 100 U 39 39 1 1 P
X VDD 38 0 1050 100 D 39 39 1 1 P
X (SCL/PCINT16)_PC0 19 1100 -900 100 L 39 39 1 1 P
X AREF 29 100 1050 100 D 39 39 1 1 P
X VSS 39 250 -1050 100 U 39 39 1 1 P
ENDDRAW
ENDDEF
#
# ATMEGA164_324_644_1284P-VFBGA
#
DEF ATMEGA164_324_644_1284P-VFBGA U 0 40 Y Y 1 F N
F0 "U" 250 1200 60 H V C CNN
F1 "ATMEGA164_324_644_1284P-VFBGA" 1000 1100 60 H V C CNN
DRAW
S -1000 1050 1000 -1050 0 1 0 N
X VSS A1 -400 -1150 100 U 39 39 1 1 P
X PB6_(PCINT14/OC3A/MISO) B1 -1100 -700 100 R 39 39 1 1 P
X VDD C1 -100 1150 100 D 39 39 1 1 P
X VSS D1 -100 -1150 100 U 39 39 1 1 P
X XTAL1 E1 -1100 50 100 R 39 39 1 1 P
X (PCINT26/RXD1/INT0)_PD2 F1 1100 500 100 L 39 39 1 1 P
X VSS G1 200 -1150 100 U 39 39 1 1 P
X PB4_(PCINT12/OC0B/~SS~) A2 -1100 -500 100 R 39 39 1 1 P
X PB5_(PCINT13/ICP3/MOSI) B2 -1100 -600 100 R 39 39 1 1 P
X ~RESET C2 1100 100 100 L 39 39 1 1 P
X XTAL2 D2 -1100 150 100 R 39 39 1 1 P
X (TXD/PCINT17)_PD1 E2 1100 400 100 L 39 39 1 1 P
X (PCINT27/TXD1/INT1)_PD3 F2 1100 600 100 L 39 39 1 1 P
X (T0/XCK/PCINT20)_PD4 G2 1100 700 100 L 39 39 1 1 P
X PB2_(PCINT10/INT2/AIN0) A3 -1100 -300 100 R 39 39 1 1 P
X PB3_(PCINT11/OC0A/AIN1) B3 -1100 -400 100 R 39 39 1 1 P
X PB7_(PCINT15/OC3B/SCK) C3 -1100 -800 100 R 39 39 1 1 P
X (PCINT24/RXD0/T3)_PD0 D3 1100 300 100 L 39 39 1 1 P
X (PCINT29/OC1A)_PD5 E3 1100 800 100 L 39 39 1 1 P
X (PCINT30/OC2B/ICP)_PD6 F3 1100 900 100 L 39 39 1 1 P
X VDD G3 0 1150 100 D 39 39 1 1 P
X VSS A4 -300 -1150 100 U 39 39 1 1 P
X PB0_(PCINT8/XCK0/T0) B4 -1100 -100 100 R 39 39 1 1 P
X PB1_(PCINT9/CLKO/T1) C4 -1100 -200 100 R 39 39 1 1 P
X VSS D4 0 -1150 100 U 39 39 1 1 P
X (OC2A/PCINT31)_PD7 E4 1100 1000 100 L 39 39 1 1 P
X (SCL/PCINT16)_PC0 F4 1100 -800 100 L 39 39 1 1 P
X VSS G4 300 -1150 100 U 39 39 1 1 P
X VDD A5 -200 1150 100 D 39 39 1 1 P
X PA0_(ADC0/PCINT0) B5 -1100 1000 100 R 39 39 1 1 P
X PA1_(ADC1/PCINT1) C5 -1100 900 100 R 39 39 1 1 P
X PA4_(ADC4/PCINT4) D5 -1100 600 100 R 39 39 1 1 P
X (TDI/PCINT21)_PC5 E5 1100 -300 100 L 39 39 1 1 P
X (TCK/PCINT18)_PC2 F5 1100 -600 100 L 39 39 1 1 P
X (SDA/PCINT17)_PC1 G5 1100 -700 100 L 39 39 1 1 P
X PA2_(ADC2/PCINT2) A6 -1100 800 100 R 39 39 1 1 P
X PA3_(ADC3/PCINT3) B6 -1100 700 100 R 39 39 1 1 P
X PA6_(ADC6/PCINT6) C6 -1100 400 100 R 39 39 1 1 P
X PA7_(ADC7/PCINT7) D6 -1100 300 100 R 39 39 1 1 P
X (TOSC2/PCINT23)_PC7 E6 1100 -100 100 L 39 39 1 1 P
X (TDO/PCINT20)_PC4 F6 1100 -400 100 L 39 39 1 1 P
X (TMS/PCINT19)_PC3 G6 1100 -500 100 L 39 39 1 1 P
X VSS A7 -200 -1150 100 U 39 39 1 1 P
X PA5_(ADC5/PCINT5) B7 -1100 500 100 R 39 39 1 1 P
X AREF C7 100 1150 100 D 39 39 1 1 P
X VSS D7 100 -1150 100 U 39 39 1 1 P
X AVCC E7 -300 1150 100 D 39 39 1 1 P
X (TOSC1/PCINT22)_PC6 F7 1100 -200 100 L 39 39 1 1 P
X VSS G7 400 -1150 100 U 39 39 1 1 P
ENDDRAW
ENDDEF
#
# ATMEGA48_88_168_328P-28SMD
#
DEF ATMEGA48_88_168_328P-28SMD U 0 40 Y Y 1 F N
F0 "U" 150 950 60 H V C CNN
F1 "ATMEGA48_88_168_328P-28SMD" 800 850 60 H V C CNN
DRAW
S -900 800 900 -800 0 1 0 N
X PD3_(INT1/OC2B/PCINT19) 1 1000 350 100 L 39 39 1 1 P
X PD4_(T0/XCK/PCINT20) 2 1000 450 100 L 39 39 1 1 P
X VDD 3 0 900 100 D 39 39 1 1 P
X VSS 4 -50 -900 100 U 39 39 1 1 P
X PB6_(TOSC1/XTAL1/PCINT6) 5 -1000 -50 100 R 39 39 1 1 P
X PB7_(TOSC2/XTAL2/PCINT7) 6 -1000 -150 100 R 39 39 1 1 P
X PD5_(T1/OC0B/PCINT21) 7 1000 550 100 L 39 39 1 1 P
X PD6_(AIN0/OC0A/PCINT22) 8 1000 650 100 L 39 39 1 1 P
X PD7_(AIN1/PCINT23) 9 1000 750 100 L 39 39 1 1 P
X PB0_(ICP1/CLKO/PCINT0) 10 -1000 550 100 R 39 39 1 1 P
X PC1_(ADC1/PCINT9) 20 1000 -650 100 L 39 39 1 1 P
X PB1_(OC1A/PCINT1) 11 -1000 450 100 R 39 39 1 1 P
X PC2_(ADC2/PCINT10) 21 1000 -550 100 L 39 39 1 1 P
X PB2_(SS/OC1B/PCINT2) 12 -1000 350 100 R 39 39 1 1 P
X PC3_(ADC3/PCINT11) 22 1000 -450 100 L 39 39 1 1 P
X PB3_(MOSI/OC2A/PCINT3) 13 -1000 250 100 R 39 39 1 1 P
X PC4_(ADC4/SDA/PCINT12) 23 1000 -350 100 L 39 39 1 1 P
X PB4_(MISO/PCINT4) 14 -1000 150 100 R 39 39 1 1 P
X PC5_(ADC5/SCL/PCINT13) 24 1000 -250 100 L 39 39 1 1 P
X PB5_(SCK/PCINT5) 15 -1000 50 100 R 39 39 1 1 P
X PC6_(RESET/PCINT14) 25 1000 -150 100 L 39 39 1 1 P
X AVCC 16 -1000 -450 100 R 39 39 1 1 P
X PD0_(RXD/PCINT16) 26 1000 50 100 L 39 39 1 1 P
X AREF 17 -1000 -650 100 R 39 39 1 1 P
X PD1_(TXD/PCINT17) 27 1000 150 100 L 39 39 1 1 P
X VSS 18 50 -900 100 U 39 39 1 1 P
X PD2_(INT0/PCINT18) 28 1000 250 100 L 39 39 1 1 P
X PC0_(ADC0/PCINT8) 19 1000 -750 100 L 39 39 1 1 P
ENDDRAW
ENDDEF
#
# ATMEGA48_88_168_328P-32SMD
#
DEF ATMEGA48_88_168_328P-32SMD U 0 40 Y Y 1 F N
F0 "U" 150 950 60 H V C CNN
F1 "ATMEGA48_88_168_328P-32SMD" 800 850 60 H V C CNN
DRAW
S -900 800 900 -800 0 1 0 N
X PD3_(INT1/OC2B/PCINT19) 1 1000 350 100 L 39 39 1 1 P
X PD4_(T0/XCK/PCINT20) 2 1000 450 100 L 39 39 1 1 P
X VSS 3 -100 -900 100 U 39 39 1 1 P
X VDD 4 0 900 100 D 39 39 1 1 P
X VSS 5 0 -900 100 U 39 39 1 1 P
X VDD 6 -100 900 100 D 39 39 1 1 P
X PB6_(TOSC1/XTAL1/PCINT6) 7 -1000 0 100 R 39 39 1 1 P
X PB7_(TOSC2/XTAL2/PCINT7) 8 -1000 -100 100 R 39 39 1 1 P
X PD5_(T1/OC0B/PCINT21) 9 1000 550 100 L 39 39 1 1 P
X PD6_(AIN0/OC0A/PCINT22) 10 1000 650 100 L 39 39 1 1 P
X AREF 20 -1000 -700 100 R 39 39 1 1 P
X PD0_(RXD/PCINT16) 30 1000 50 100 L 39 39 1 1 P
X PD7_(AIN1/PCINT23) 11 1000 750 100 L 39 39 1 1 P
X VSS 21 100 -900 100 U 39 39 1 1 P
X PD1_(TXD/PCINT17) 31 1000 150 100 L 39 39 1 1 P
X PB0_(ICP1/CLKO/PCINT0) 12 -1000 600 100 R 39 39 1 1 P
X ADC7 22 -1000 -350 100 R 39 39 1 1 P
X PD2_(INT0/PCINT18) 32 1000 250 100 L 39 39 1 1 P
X PB1_(OC1A/PCINT1) 13 -1000 500 100 R 39 39 1 1 P
X PC0_(ADC0/PCINT8) 23 1000 -750 100 L 39 39 1 1 P
X PB2_(SS/OC1B/PCINT2) 14 -1000 400 100 R 39 39 1 1 P
X PC1_(ADC1/PCINT9) 24 1000 -650 100 L 39 39 1 1 P
X PB3_(MOSI/OC2A/PCINT3) 15 -1000 300 100 R 39 39 1 1 P
X PC2_(ADC2/PCINT10) 25 1000 -550 100 L 39 39 1 1 P
X PB4_(MISO/PCINT4) 16 -1000 200 100 R 39 39 1 1 P
X PC3_(ADC3/PCINT11) 26 1000 -450 100 L 39 39 1 1 P
X PB5_(SCK/PCINT5) 17 -1000 100 100 R 39 39 1 1 P
X PC4_(ADC4/SDA/PCINT12) 27 1000 -350 100 L 39 39 1 1 P
X AVCC 18 -1000 -550 100 R 39 39 1 1 P
X PC5_(ADC5/SCL/PCINT13) 28 1000 -250 100 L 39 39 1 1 P
X ADC6 19 -1000 -250 100 R 39 39 1 1 P
X PC6_(RESET/PCINT14) 29 1000 -150 100 L 39 39 1 1 P
ENDDRAW
ENDDEF
#
# ATMEGA48_88_168_328P-DIP
#
DEF ATMEGA48_88_168_328P-DIP U 0 40 Y Y 1 F N
F0 "U" 150 950 60 H V C CNN
F1 "ATMEGA48_88_168_328P-DIP" 750 850 60 H V C CNN
DRAW
S -900 800 900 -800 0 1 0 N
X PC6_(RESET/PCINT14) 1 1000 -150 100 L 39 39 1 1 P
X PD0_(RXD/PCINT16) 2 1000 50 100 L 39 39 1 1 P
X PD1_(TXD/PCINT17) 3 1000 150 100 L 39 39 1 1 P
X PD2_(INT0/PCINT18) 4 1000 250 100 L 39 39 1 1 P
X PD3_(INT1/OC2B/PCINT19) 5 1000 350 100 L 39 39 1 1 P
X PD4_(T0/XCK/PCINT20) 6 1000 450 100 L 39 39 1 1 P
X VDD 7 0 900 100 D 39 39 1 1 P
X VSS 8 -50 -900 100 U 39 39 1 1 P
X PB6_(TOSC1/XTAL1/PCINT6) 9 -1000 -50 100 R 39 39 1 1 P
X PB7_(TOSC2/XTAL2/PCINT7) 10 -1000 -150 100 R 39 39 1 1 P
X AVCC 20 -1000 -450 100 R 39 39 1 1 P
X PD5_(T1/OC0B/PCINT21) 11 1000 550 100 L 39 39 1 1 P
X AREF 21 -1000 -650 100 R 39 39 1 1 P
X PD6_(AIN0/OC0A/PCINT22) 12 1000 650 100 L 39 39 1 1 P
X VSS 22 50 -900 100 U 39 39 1 1 P
X PD7_(AIN1/PCINT23) 13 1000 750 100 L 39 39 1 1 P
X PC0_(ADC0/PCINT8) 23 1000 -750 100 L 39 39 1 1 P
X PB0_(ICP1/CLKO/PCINT0) 14 -1000 550 100 R 39 39 1 1 P
X PC1_(ADC1/PCINT9) 24 1000 -650 100 L 39 39 1 1 P
X PB1_(OC1A/PCINT1) 15 -1000 450 100 R 39 39 1 1 P
X PC2_(ADC2/PCINT10) 25 1000 -550 100 L 39 39 1 1 P
X PB2_(SS/OC1B/PCINT2) 16 -1000 350 100 R 39 39 1 1 P
X PC3_(ADC3/PCINT11) 26 1000 -450 100 L 39 39 1 1 P
X PB3_(MOSI/OC2A/PCINT3) 17 -1000 250 100 R 39 39 1 1 P
X PC4_(ADC4/SDA/PCINT12) 27 1000 -350 100 L 39 39 1 1 P
X PB4_(MISO/PCINT4) 18 -1000 150 100 R 39 39 1 1 P
X PC5_(ADC5/SCL/PCINT13) 28 1000 -250 100 L 39 39 1 1 P
X PB5_(SCK/PCINT5) 19 -1000 50 100 R 39 39 1 1 P
ENDDRAW
ENDDEF
#
# ATSAM4SxB-LQFP
#
DEF ATSAM4SxB-LQFP U 0 40 Y Y 1 F N
F0 "U" 800 1750 60 H V C CNN
F1 "ATSAM4SxB-LQFP" 1100 1650 60 H V C CNN
$FPLIST
 lqfp64
$ENDFPLIST
DRAW
S -1000 1600 1000 -1600 0 1 0 N
X ADVREF 1 1100 -1250 100 L 39 39 1 1 P
X VSS 2 150 -1700 100 U 39 39 1 1 P
X AD4/PB0 3 1100 1150 100 L 39 39 1 1 P
X AD5/PB1 4 1100 1050 100 L 39 39 1 1 P
X AD6/PB2 5 1100 950 100 L 39 39 1 1 P
X AD7/PB3 6 1100 850 100 L 39 39 1 1 P
X VDDIN 7 500 1700 100 D 39 39 1 1 P
X VDDOUT 8 350 1700 100 D 39 39 1 1 P
X PA17/PGMD5/AD0 9 -1100 -150 100 R 39 39 1 1 P
X PA18/PGMD6/AD1 10 -1100 -250 100 R 39 39 1 1 P
X PA15/PGMD3 20 -1100 50 100 R 39 39 1 1 P
X PA9/PGMM1 30 -1100 650 100 R 39 39 1 1 P
X TST 40 1100 -1050 100 L 39 39 1 1 P
X JTAGSEL 50 1100 -650 100 L 39 39 1 1 P
X VSS 60 -150 -1700 100 U 39 39 1 1 P
X PA21/PGMD9/AD8 11 -1100 -550 100 R 39 39 1 1 P
X PA14/PGMD2 21 -1100 150 100 R 39 39 1 1 P
X PA8/XOUT32/PGMM0 31 -1100 750 100 R 39 39 1 1 P
X PA29 41 -1100 -1350 100 R 39 39 1 1 P
X TMS/SWDIO/PB6 51 1100 550 100 L 39 39 1 1 P
X XOUT/PB8 61 1100 350 100 L 39 39 1 1 P
X VDDCORE 12 150 1700 100 D 39 39 1 1 P
X PA13/PGMD1 22 -1100 250 100 R 39 39 1 1 P
X PA7/XIN32/PGMNVALID 32 -1100 850 100 R 39 39 1 1 P
X PA30 42 -1100 -1450 100 R 39 39 1 1 P
X PA31 52 -1100 -1550 100 R 39 39 1 1 P
X XIN/PGMCK/PB9 62 1100 250 100 L 39 39 1 1 P
X PA19/PGMD7/AD2 13 -1100 -350 100 R 39 39 1 1 P
X PA24/PGMD12 23 -1100 -850 100 R 39 39 1 1 P
X TDI/PB4 33 1100 750 100 L 39 39 1 1 P
X PA3 43 -1100 1250 100 R 39 39 1 1 P
X TCK/SWCLK/PB7 53 1100 450 100 L 39 39 1 1 P
X DAC1/PB14 63 1100 -250 100 L 39 39 1 1 P
X PA22/PGMD10/AD9 14 -1100 -650 100 R 39 39 1 1 P
X VDDCORE 24 50 1700 100 D 39 39 1 1 P
X PA6/PGMNOE 34 -1100 950 100 R 39 39 1 1 P
X PA2/PGMEN2 44 -1100 1350 100 R 39 39 1 1 P
X VDDCORE 54 -50 1700 100 D 39 39 1 1 P
X VDDPLL 64 700 1700 100 D 39 39 1 1 P
X PA23/PGMD11 15 -1100 -750 100 R 39 39 1 1 P
X PA25/PGMD13 25 -1100 -950 100 R 39 39 1 1 P
X PA5/PGMRDY 35 -1100 1050 100 R 39 39 1 1 P
X VDDIO 45 -300 1700 100 D 39 39 1 1 P
X ERASE/PB12 55 1100 -50 100 L 39 39 1 1 P
X PA20/PGMD8/AD3 16 -1100 -450 100 R 39 39 1 1 P
X PA26/PGMD14 26 -1100 -1050 100 R 39 39 1 1 P
X PA4/PGMNCMD 36 -1100 1150 100 R 39 39 1 1 P
X VSS 46 -50 -1700 100 U 39 39 1 1 P
X DDM/PB10 56 1100 150 100 L 39 39 1 1 P
X VSS 17 50 -1700 100 U 39 39 1 1 P
X PA12/PGMD0 27 -1100 350 100 R 39 39 1 1 P
X PA27/PGMD15 37 -1100 -1150 100 R 39 39 1 1 P
X PA1/PGMEN1 47 -1100 1450 100 R 39 39 1 1 P
X DDP/PB11 57 1100 50 100 L 39 39 1 1 P
X VDDIO 18 -200 1700 100 D 39 39 1 1 P
X PA11/PGMM3 28 -1100 450 100 R 39 39 1 1 P
X PA28 38 -1100 -1250 100 R 39 39 1 1 P
X PA0/PGMEN0 48 -1100 1550 100 R 39 39 1 1 P
X VDDIO 58 -400 1700 100 D 39 39 1 1 P
X PA16/PGMD4 19 -1100 -50 100 R 39 39 1 1 P
X PA10/PGMM2 29 -1100 550 100 R 39 39 1 1 P
X NRST 39 1100 -850 100 L 39 39 1 1 P
X TDO/TRACESWO/PB5 49 1100 650 100 L 39 39 1 1 P
X DAC0/PB13 59 1100 -150 100 L 39 39 1 1 P
ENDDRAW
ENDDEF
#
# ATSAM4SxB-QFN
#
DEF ATSAM4SxB-QFN U 0 40 Y Y 1 F N
F0 "U" 800 1750 60 H V C CNN
F1 "ATSAM4SxB-QFN" 1100 1650 60 H V C CNN
$FPLIST
 qfn-64
$ENDFPLIST
DRAW
S -1000 1600 1000 -1600 0 1 0 N
X ADVREF 1 1100 -1250 100 L 39 39 1 1 P
X VSS 2 200 -1700 100 U 39 39 1 1 P
X AD4/PB0 3 1100 1150 100 L 39 39 1 1 P
X AD5/PB1 4 1100 1050 100 L 39 39 1 1 P
X AD6/PB2 5 1100 950 100 L 39 39 1 1 P
X AD7/PB3 6 1100 850 100 L 39 39 1 1 P
X VDDIN 7 500 1700 100 D 39 39 1 1 P
X VDDOUT 8 350 1700 100 D 39 39 1 1 P
X PA17/PGMD5/AD0 9 -1100 -150 100 R 39 39 1 1 P
X PA18/PGMD6/AD1 10 -1100 -250 100 R 39 39 1 1 P
X PA15/PGMD3 20 -1100 50 100 R 39 39 1 1 P
X PA9/PGMM1 30 -1100 650 100 R 39 39 1 1 P
X TST 40 1100 -1050 100 L 39 39 1 1 P
X JTAGSEL 50 1100 -650 100 L 39 39 1 1 P
X VSS 60 -100 -1700 100 U 39 39 1 1 P
X PA21/PGMD9/AD8 11 -1100 -550 100 R 39 39 1 1 P
X PA14/PGMD2 21 -1100 150 100 R 39 39 1 1 P
X PA8/XOUT32/PGMM0 31 -1100 750 100 R 39 39 1 1 P
X PA29 41 -1100 -1350 100 R 39 39 1 1 P
X TMS/SWDIO/PB6 51 1100 550 100 L 39 39 1 1 P
X XOUT/PB8 61 1100 350 100 L 39 39 1 1 P
X VDDCORE 12 150 1700 100 D 39 39 1 1 P
X PA13/PGMD1 22 -1100 250 100 R 39 39 1 1 P
X PA7/XIN32/PGMNVALID 32 -1100 850 100 R 39 39 1 1 P
X PA30 42 -1100 -1450 100 R 39 39 1 1 P
X PA31 52 -1100 -1550 100 R 39 39 1 1 P
X XIN/PGMCK/PB9 62 1100 250 100 L 39 39 1 1 P
X PA19/PGMD7/AD2 13 -1100 -350 100 R 39 39 1 1 P
X PA24/PGMD12 23 -1100 -850 100 R 39 39 1 1 P
X TDI/PB4 33 1100 750 100 L 39 39 1 1 P
X PA3 43 -1100 1250 100 R 39 39 1 1 P
X TCK/SWCLK/PB7 53 1100 450 100 L 39 39 1 1 P
X DAC1/PB14 63 1100 -250 100 L 39 39 1 1 P
X PA22/PGMD10/AD9 14 -1100 -650 100 R 39 39 1 1 P
X VDDCORE 24 50 1700 100 D 39 39 1 1 P
X PA6/PGMNOE 34 -1100 950 100 R 39 39 1 1 P
X PA2/PGMEN2 44 -1100 1350 100 R 39 39 1 1 P
X VDDCORE 54 -50 1700 100 D 39 39 1 1 P
X VDDPLL 64 700 1700 100 D 39 39 1 1 P
X PA23/PGMD11 15 -1100 -750 100 R 39 39 1 1 P
X PA25/PGMD13 25 -1100 -950 100 R 39 39 1 1 P
X PA5/PGMRDY 35 -1100 1050 100 R 39 39 1 1 P
X VDDIO 45 -300 1700 100 D 39 39 1 1 P
X ERASE/PB12 55 1100 -50 100 L 39 39 1 1 P
X VSS 65 -200 -1700 100 U 39 39 1 1 P
X PA20/PGMD8/AD3 16 -1100 -450 100 R 39 39 1 1 P
X PA26/PGMD14 26 -1100 -1050 100 R 39 39 1 1 P
X PA4/PGMNCMD 36 -1100 1150 100 R 39 39 1 1 P
X VSS 46 0 -1700 100 U 39 39 1 1 P
X DDM/PB10 56 1100 150 100 L 39 39 1 1 P
X VSS 17 100 -1700 100 U 39 39 1 1 P
X PA12/PGMD0 27 -1100 350 100 R 39 39 1 1 P
X PA27/PGMD15 37 -1100 -1150 100 R 39 39 1 1 P
X PA1/PGMEN1 47 -1100 1450 100 R 39 39 1 1 P
X DDP/PB11 57 1100 50 100 L 39 39 1 1 P
X VDDIO 18 -200 1700 100 D 39 39 1 1 P
X PA11/PGMM3 28 -1100 450 100 R 39 39 1 1 P
X PA28 38 -1100 -1250 100 R 39 39 1 1 P
X PA0/PGMEN0 48 -1100 1550 100 R 39 39 1 1 P
X VDDIO 58 -400 1700 100 D 39 39 1 1 P
X PA16/PGMD4 19 -1100 -50 100 R 39 39 1 1 P
X PA10/PGMM2 29 -1100 550 100 R 39 39 1 1 P
X NRST 39 1100 -850 100 L 39 39 1 1 P
X TDO/TRACESWO/PB5 49 1100 650 100 L 39 39 1 1 P
X DAC0/PB13 59 1100 -150 100 L 39 39 1 1 P
ENDDRAW
ENDDEF
#
# ATSAM4SxC-BGA
#
DEF ATSAM4SxC-BGA U 0 40 Y Y 1 F N
F0 "U" 800 2250 60 H V C CNN
F1 "ATSAM4SxC-BGA" 1100 2150 60 H V C CNN
$FPLIST
 tfbga-100
$ENDFPLIST
DRAW
S -1000 2100 1000 -2100 0 1 0 N
X PB1/AD5 A1 -1100 -1450 100 R 39 39 1 1 P
X PC29 B1 1100 -850 100 L 39 39 1 1 P
X VDDIO C1 -150 2200 100 D 39 39 1 1 P
X XIN/PGMCK/PB9 D1 1100 -1550 100 L 39 39 1 1 P
X XOUT/PB8 E1 1100 -1450 100 L 39 39 1 1 P
X DAC0/PB13 F1 1100 -1950 100 L 39 39 1 1 P
X DDP/PB11 G1 1100 -1750 100 L 39 39 1 1 P
X DDM/PB10 H1 1100 -1650 100 L 39 39 1 1 P
X PB6/TMS/SWDIO J1 -1100 -1950 100 R 39 39 1 1 P
X JTAGSEL K1 -1100 -1200 100 R 39 39 1 1 P
X PC30 A2 1100 -950 100 L 39 39 1 1 P
X ADVREF B2 550 2200 100 D 39 39 1 1 P
X GNDANA C2 300 -2200 100 U 39 39 1 1 P
X DAC1/PB14 D2 1100 -2050 100 L 39 39 1 1 P
X PC21 E2 1100 -50 100 L 39 39 1 1 P
X PC20 F2 1100 50 100 L 39 39 1 1 P
X PA31 G2 -1100 -1050 100 R 39 39 1 1 P
X PC19 H2 1100 150 100 L 39 39 1 1 P
X PC18 J2 1100 250 100 L 39 39 1 1 P
X PB5/TDO/TRACESWO K2 -1100 -1850 100 R 39 39 1 1 P
X PB2/AD6 A3 -1100 -1550 100 R 39 39 1 1 P
X VDDPLL B3 650 2200 100 D 39 39 1 1 P
X PC25 C3 1100 -450 100 L 39 39 1 1 P
X PC23 D3 1100 -250 100 L 39 39 1 1 P
X ERASE/PB12 E3 1100 -1850 100 L 39 39 1 1 P
X PB7/TCK/SWCLK F3 -1100 -2050 100 R 39 39 1 1 P
X PC16 G3 1100 450 100 L 39 39 1 1 P
X PA1/PGMEN1 H3 -1100 1950 100 R 39 39 1 1 P
X PC17 J3 1100 350 100 L 39 39 1 1 P
X PA0/PGMEN0 K3 -1100 2050 100 R 39 39 1 1 P
X PB3/AD7 A4 -1100 -1650 100 R 39 39 1 1 P
X PB0/AD4 B4 -1100 -1350 100 R 39 39 1 1 P
X PC24 C4 1100 -350 100 L 39 39 1 1 P
X PC22 D4 1100 -150 100 L 39 39 1 1 P
X VSS E4 200 -2200 100 U 39 39 1 1 P
X VSS F4 100 -2200 100 U 39 39 1 1 P
X VDDCORE G4 250 2200 100 D 39 39 1 1 P
X PA2/PGMEN2 H4 -1100 1850 100 R 39 39 1 1 P
X PC11 J4 1100 950 100 L 39 39 1 1 P
X PC14 K4 1100 650 100 L 39 39 1 1 P
X PA17/PGMD5/AD0 A5 -1100 350 100 R 39 39 1 1 P
X PC31 B5 1100 -1050 100 L 39 39 1 1 P
X VDDIN C5 450 2200 100 D 39 39 1 1 P
X VSS D5 0 -2200 100 U 39 39 1 1 P
X VSS E5 -100 -2200 100 U 39 39 1 1 P
X NRST F5 1100 -1200 100 L 39 39 1 1 P
X PA29/AD13 G5 -1100 -850 100 R 39 39 1 1 P
X PA30/AD14 H5 -1100 -950 100 R 39 39 1 1 P
X PC10 J5 1100 1050 100 L 39 39 1 1 P
X PA3 K5 -1100 1750 100 R 39 39 1 1 P
X PA18/PGMD6/AD1 A6 -1100 250 100 R 39 39 1 1 P
X PC26 B6 1100 -550 100 L 39 39 1 1 P
X VDDOUT C6 350 2200 100 D 39 39 1 1 P
X VSS D6 -200 -2200 100 U 39 39 1 1 P
X VDDIO E6 -250 2200 100 D 39 39 1 1 P
X PA27/PGMD15 F6 -1100 -650 100 R 39 39 1 1 P
X PC8 G6 1100 1250 100 L 39 39 1 1 P
X PA28 H6 -1100 -750 100 R 39 39 1 1 P
X TST J6 1100 -1300 100 L 39 39 1 1 P
X PC9 K6 1100 1150 100 L 39 39 1 1 P
X PA21/PGMD9/AD8 A7 -1100 -50 100 R 39 39 1 1 P
X PC27 B7 1100 -650 100 L 39 39 1 1 P
X PA15/PGMD3 C7 -1100 550 100 R 39 39 1 1 P
X VDDCORE D7 150 2200 100 D 39 39 1 1 P
X VDDCORE E7 50 2200 100 D 39 39 1 1 P
X PA26/PGMD14 F7 -1100 -550 100 R 39 39 1 1 P
X PA12/PGMD0 G7 -1100 850 100 R 39 39 1 1 P
X PC28 H7 1100 -750 100 L 39 39 1 1 P
X PA4/PGMNCMD J7 -1100 1650 100 R 39 39 1 1 P
X PA5/PGMRDY K7 -1100 1550 100 R 39 39 1 1 P
X PA19/PGMD7/AD2 A8 -1100 150 100 R 39 39 1 1 P
X PA23/PGMD11 B8 -1100 -250 100 R 39 39 1 1 P
X PC7 C8 1100 1350 100 L 39 39 1 1 P
X PA14/PGMD2 D8 -1100 650 100 R 39 39 1 1 P
X PA13/PGMD1 E8 -1100 750 100 R 39 39 1 1 P
X PC4 F8 1100 1650 100 L 39 39 1 1 P
X PA11/PGMM3 G8 -1100 950 100 R 39 39 1 1 P
X PC1 H8 1100 1950 100 L 39 39 1 1 P
X PA6/PGMNOE J8 -1100 1450 100 R 39 39 1 1 P
X PB4/TDI K8 -1100 -1750 100 R 39 39 1 1 P
X AD11/PC15 A9 1100 550 100 L 39 39 1 1 P
X PC0 B9 1100 2050 100 L 39 39 1 1 P
X PA16/PGMD4 C9 -1100 450 100 R 39 39 1 1 P
X PC6 D9 1100 1450 100 L 39 39 1 1 P
X PA24/PGMD12 E9 -1100 -350 100 R 39 39 1 1 P
X PA25/PGMD13 F9 -1100 -450 100 R 39 39 1 1 P
X PA10/PGMM2 G9 -1100 1050 100 R 39 39 1 1 P
X VSS H9 -300 -2200 100 U 39 39 1 1 P
X VDDCORE J9 -50 2200 100 D 39 39 1 1 P
X VDDIO K9 -350 2200 100 D 39 39 1 1 P
X PA22/PGMD10/AD9 A10 -1100 -150 100 R 39 39 1 1 P
X AD10/PC13 B10 1100 750 100 L 39 39 1 1 P
X AD12/PC12 C10 1100 850 100 L 39 39 1 1 P
X PA20/PGMD8/AD3 D10 -1100 50 100 R 39 39 1 1 P
X PC5 E10 1100 1550 100 L 39 39 1 1 P
X PC3 F10 1100 1750 100 L 39 39 1 1 P
X PC2 G10 1100 1850 100 L 39 39 1 1 P
X PA9/PGMM1 H10 -1100 1150 100 R 39 39 1 1 P
X PA8/XOUT32/PGMM0 J10 -1100 1250 100 R 39 39 1 1 P
X PA7/XIN32/PGMNVALID K10 -1100 1350 100 R 39 39 1 1 P
ENDDRAW
ENDDEF
#
# ATSAM4SxC-LQFP
#
DEF ATSAM4SxC-LQFP U 0 40 Y Y 1 F N
F0 "U" 800 2250 60 H V C CNN
F1 "ATSAM4SxC-LQFP" 1150 2150 60 H V C CNN
$FPLIST
 tqfp-100
$ENDFPLIST
DRAW
S -1000 2100 1000 -2100 0 1 0 N
X ADVREF 1 600 2200 100 D 39 39 1 1 P
X VSS 2 200 -2200 100 U 39 39 1 1 P
X PB0/AD4 3 -1100 -1350 100 R 39 39 1 1 P
X AD13/PC29 4 1100 -850 100 L 39 39 1 1 P
X PB1/AD5 5 -1100 -1450 100 R 39 39 1 1 P
X AD14/PC30 6 1100 -950 100 L 39 39 1 1 P
X PB2/AD6 7 -1100 -1550 100 R 39 39 1 1 P
X PC31 8 1100 -1050 100 L 39 39 1 1 P
X PB3/AD7 9 -1100 -1650 100 R 39 39 1 1 P
X VDDIN 10 500 2200 100 D 39 39 1 1 P
X PA22/PGMD10/AD9 20 -1100 -150 100 R 39 39 1 1 P
X PA15/PGMD3 30 -1100 550 100 R 39 39 1 1 P
X PC3 40 1100 1750 100 L 39 39 1 1 P
X VDDIO 50 -200 2200 100 D 39 39 1 1 P
X NRST 60 1100 -1200 100 L 39 39 1 1 P
X VSS 70 -100 -2200 100 U 39 39 1 1 P
X PC19 80 1100 150 100 L 39 39 1 1 P
X PC23 90 1100 -250 100 L 39 39 1 1 P
X VDDOUT 11 400 2200 100 D 39 39 1 1 P
X AD10/PC13 21 1100 750 100 L 39 39 1 1 P
X PA14/PGMD2 31 -1100 650 100 R 39 39 1 1 P
X PA12/PGMD0 41 -1100 850 100 R 39 39 1 1 P
X PB4/TDI 51 -1100 -1750 100 R 39 39 1 1 P
X TST 61 1100 -1300 100 L 39 39 1 1 P
X PC14 71 1100 650 100 L 39 39 1 1 P
X PA31 81 -1100 -1050 100 R 39 39 1 1 P
X VDDIO 91 -400 2200 100 D 39 39 1 1 P
X PA17/PGMD5/AD0 12 -1100 350 100 R 39 39 1 1 P
X PA23/PGMD11 22 -1100 -250 100 R 39 39 1 1 P
X PC6 32 1100 1450 100 L 39 39 1 1 P
X PA11/PGMM3 42 -1100 950 100 R 39 39 1 1 P
X PA6/PGMNOE 52 -1100 1450 100 R 39 39 1 1 P
X PC9 62 1100 1150 100 L 39 39 1 1 P
X PA1/PGMEN1 72 -1100 1950 100 R 39 39 1 1 P
X PC20 82 1100 50 100 L 39 39 1 1 P
X PC24 92 1100 -350 100 L 39 39 1 1 P
X PC26 13 1100 -550 100 L 39 39 1 1 P
X AD12/PC12 23 1100 850 100 L 39 39 1 1 P
X PA13/PGMD1 33 -1100 750 100 R 39 39 1 1 P
X PC2 43 1100 1850 100 L 39 39 1 1 P
X PA5/PGMRDY 53 -1100 1550 100 R 39 39 1 1 P
X PA29 63 -1100 -850 100 R 39 39 1 1 P
X PC16 73 1100 450 100 L 39 39 1 1 P
X PB7/TCK/SWCLK 83 -1100 -2050 100 R 39 39 1 1 P
X DAC0/PB13 93 1100 -1950 100 L 39 39 1 1 P
X PA18/PGMD6/AD1 14 -1100 250 100 R 39 39 1 1 P
X PA20/PGMD8/AD3 24 -1100 50 100 R 39 39 1 1 P
X PA24/PGMD12 34 -1100 -350 100 R 39 39 1 1 P
X PA10/PGMM2 44 -1100 1050 100 R 39 39 1 1 P
X PC28 54 1100 -750 100 L 39 39 1 1 P
X PA30 64 -1100 -950 100 R 39 39 1 1 P
X PA0/PGMEN0 74 -1100 2050 100 R 39 39 1 1 P
X PC21 84 1100 -50 100 L 39 39 1 1 P
X PC25 94 1100 -450 100 L 39 39 1 1 P
X PA21/PGMD9/AD8 15 -1100 -50 100 R 39 39 1 1 P
X PC0 25 1100 2050 100 L 39 39 1 1 P
X PC5 35 1100 1550 100 L 39 39 1 1 P
X VSS 45 100 -2200 100 U 39 39 1 1 P
X PA4/PGMNCMD 55 -1100 1650 100 R 39 39 1 1 P
X PC10 65 1100 1050 100 L 39 39 1 1 P
X PC17 75 1100 350 100 L 39 39 1 1 P
X VDDCORE 85 0 2200 100 D 39 39 1 1 P
X VSS 95 -200 -2200 100 U 39 39 1 1 P
X VDDCORE 16 300 2200 100 D 39 39 1 1 P
X VSS 26 0 -2200 100 U 39 39 1 1 P
X VDDCORE 36 200 2200 100 D 39 39 1 1 P
X PA9/PGMM1 46 -1100 1150 100 R 39 39 1 1 P
X VDDCORE 56 100 2200 100 D 39 39 1 1 P
X PA3 66 -1100 1750 100 R 39 39 1 1 P
X PB5/TDO/TRACESWO 76 -1100 -1850 100 R 39 39 1 1 P
X PC22 86 1100 -150 100 L 39 39 1 1 P
X XOUT/PB8 96 1100 -1450 100 L 39 39 1 1 P
X PC27 17 1100 -650 100 L 39 39 1 1 P
X VDDIO 27 -100 2200 100 D 39 39 1 1 P
X PC4 37 1100 1650 100 L 39 39 1 1 P
X PC1 47 1100 1950 100 L 39 39 1 1 P
X PA27/PGMD15 57 -1100 -650 100 R 39 39 1 1 P
X PA2/PGMEN2 67 -1100 1850 100 R 39 39 1 1 P
X JTAGSEL 77 -1100 -1200 100 R 39 39 1 1 P
X ERASE/PB12 87 1100 -1850 100 L 39 39 1 1 P
X XIN/PGMCK/PB9 97 1100 -1550 100 L 39 39 1 1 P
X PA19/PGMD7/AD2 18 -1100 150 100 R 39 39 1 1 P
X PA16/PGMD4 28 -1100 450 100 R 39 39 1 1 P
X PA25/PGMD13 38 -1100 -450 100 R 39 39 1 1 P
X PA8/XOUT32/PGMM0 48 -1100 1250 100 R 39 39 1 1 P
X PC8 58 1100 1250 100 L 39 39 1 1 P
X PC11 68 1100 950 100 L 39 39 1 1 P
X PC18 78 1100 250 100 L 39 39 1 1 P
X DDM/PB10 88 1100 -1650 100 L 39 39 1 1 P
X VDDIO 98 -500 2200 100 D 39 39 1 1 P
X AD11/PC15 19 1100 550 100 L 39 39 1 1 P
X PC7 29 1100 1350 100 L 39 39 1 1 P
X PA26/PGMD14 39 -1100 -550 100 R 39 39 1 1 P
X PA7/XIN32/PGMNVALID 49 -1100 1350 100 R 39 39 1 1 P
X PA28 59 -1100 -750 100 R 39 39 1 1 P
X VDDIO 69 -300 2200 100 D 39 39 1 1 P
X PB6/TMS/SWDIO 79 -1100 -1950 100 R 39 39 1 1 P
X DDP/PB11 89 1100 -1750 100 L 39 39 1 1 P
X DAC1/PB14 99 1100 -2050 100 L 39 39 1 1 P
X VDDPLL 100 700 2200 100 D 39 39 1 1 P
ENDDRAW
ENDDEF
#
# ATTINY13-10QFN
#
DEF ATTINY13-10QFN U 0 40 Y Y 1 F N
F0 "U" 150 650 60 H V C CNN
F1 "ATTINY13-10QFN" 450 550 60 H V C CNN
DRAW
S -600 500 600 -500 0 1 0 N
X (dW/ADC0/~RESET~/PCINT5)_PB5 1 700 -250 100 L 39 39 1 1 P
X (ADC3/CLKI/PCINT3)_PB3 2 700 -50 100 L 39 39 1 1 P
X (ADC2/PCINT4)_PB4 4 700 -150 100 L 39 39 1 1 P
X VSS 5 -100 -600 100 U 39 39 1 1 P
X (MOSI/AIN0/OC0A/PCINT0)_PB0 6 700 250 100 L 39 39 1 1 P
X (MISO/AIN1/OC0B/INT0/PCINT1)_PB1 7 700 150 100 L 39 39 1 1 P
X (SCK/ADC1/T0/PCINT2)_PB2 9 700 50 100 L 39 39 1 1 P
X VDD 10 0 600 100 D 39 39 1 1 P
X VSS 11 100 -600 100 U 39 39 1 1 P
ENDDRAW
ENDDEF
#
# ATTINY13-20QFN
#
DEF ATTINY13-20QFN U 0 40 Y Y 1 F N
F0 "U" 150 650 60 H V C CNN
F1 "ATTINY13-20QFN" 450 550 60 H V C CNN
DRAW
S -600 500 600 -500 0 1 0 N
X (dW/ADC0/~RESET~/PCINT5)_PB5 1 700 -250 100 L 39 39 1 1 P
X (ADC3/CLKI/PCINT3)_PB3 2 700 -50 100 L 39 39 1 1 P
X (ADC2/PCINT4)_PB4 5 700 -150 100 L 39 39 1 1 P
X VSS 8 -100 -600 100 U 39 39 1 1 P
X (MOSI/AIN0/OC0A/PCINT0)_PB0 11 700 250 100 L 39 39 1 1 P
X VSS 21 100 -600 100 U 39 39 1 1 P
X (MISO/AIN1/OC0B/INT0/PCINT1)_PB1 12 700 150 100 L 39 39 1 1 P
X (SCK/ADC1/T0/PCINT2)_PB2 14 700 50 100 L 39 39 1 1 P
X VDD 15 0 600 100 D 39 39 1 1 P
ENDDRAW
ENDDEF
#
# ATTINY13-DIP
#
DEF ATTINY13-DIP U 0 40 Y Y 1 F N
F0 "U" 150 650 60 H V C CNN
F1 "ATTINY13-DIP" 400 550 60 H V C CNN
DRAW
S -600 500 600 -500 0 1 0 N
X (dW/ADC0/~RESET~/PCINT5)_PB5 1 700 -250 100 L 39 39 1 1 P
X (ADC3/CLKI/PCINT3)_PB3 2 700 -50 100 L 39 39 1 1 P
X (ADC2/PCINT4)_PB4 3 700 -150 100 L 39 39 1 1 P
X VSS 4 0 -600 100 U 39 39 1 1 P
X (MOSI/AIN0/OC0A/PCINT0)_PB0 5 700 250 100 L 39 39 1 1 P
X (MISO/AIN1/OC0B/INT0/PCINT1)_PB1 6 700 150 100 L 39 39 1 1 P
X (SCK/ADC1/T0/PCINT2)_PB2 7 700 50 100 L 39 39 1 1 P
X VDD 8 0 600 100 D 39 39 1 1 P
ENDDRAW
ENDDEF
#
# CC2530F
#
DEF CC2530F U 0 40 Y Y 1 F N
F0 "U" 600 1000 60 H V C CNN
F1 "CC2530F" 700 900 60 H V C CNN
$FPLIST
 pvqfn-n40
$ENDFPLIST
DRAW
S -750 850 750 -850 0 1 0 N
X GND 1 -200 -950 100 U 39 39 1 1 P
X GND 2 -100 -950 100 U 39 39 1 1 P
X GND 3 0 -950 100 U 39 39 1 1 P
X GND 4 100 -950 100 U 39 39 1 1 P
X P1_5 5 850 600 100 L 39 39 1 1 P
X P1_4 6 850 500 100 L 39 39 1 1 P
X P1_3 7 850 400 100 L 39 39 1 1 P
X P1_2 8 850 300 100 L 39 39 1 1 P
X P1_1 9 850 200 100 L 39 39 1 1 P
X DVDD2 10 -350 950 100 D 39 39 1 1 P
X ~RESET 20 -850 750 100 R 39 39 1 1 P
X RBIAS 30 -850 -750 100 R 39 39 1 1 P
X DCOUPL 40 -200 950 100 D 39 39 1 1 P
X P1_0 11 850 100 100 L 39 39 1 1 P
X AVDD5 21 -50 950 100 D 39 39 1 1 P
X AVDD6 31 450 950 100 D 39 39 1 1 P
X GND 41 200 -950 100 U 39 39 1 1 P
X P0_7 12 850 -100 100 L 39 39 1 1 P
X XOSC_Q1 22 -850 -150 100 R 39 39 1 1 P
X P2_4/XOSC32K_Q1 32 -850 150 100 R 39 39 1 1 P
X P0_6 13 850 -200 100 L 39 39 1 1 P
X XOSC_Q2 23 -850 -250 100 R 39 39 1 1 P
X P2_3/XOSC32K_Q2 33 -850 250 100 R 39 39 1 1 P
X P0_5 14 850 -300 100 L 39 39 1 1 P
X AVDD3 24 50 950 100 D 39 39 1 1 P
X P2_2 34 -850 350 100 R 39 39 1 1 P
X P0_4 15 850 -400 100 L 39 39 1 1 P
X RF_P 25 -850 -550 100 R 39 39 1 1 P
X P2_1 35 -850 450 100 R 39 39 1 1 P
X P0_3 16 850 -500 100 L 39 39 1 1 P
X RF_N 26 -850 -450 100 R 39 39 1 1 P
X P2_0 36 -850 550 100 R 39 39 1 1 P
X P0_2 17 850 -600 100 L 39 39 1 1 P
X AVDD2 27 150 950 100 D 39 39 1 1 P
X P1_7 37 850 800 100 L 39 39 1 1 P
X P0_1 18 850 -700 100 L 39 39 1 1 P
X AVDD1 28 250 950 100 D 39 39 1 1 P
X P1_6 38 850 700 100 L 39 39 1 1 P
X P0_0 19 850 -800 100 L 39 39 1 1 P
X AVDD4 29 350 950 100 D 39 39 1 1 P
X DVDD1 39 -450 950 100 D 39 39 1 1 P
ENDDRAW
ENDDEF
#
# CY8C21234
#
DEF CY8C21234 U 0 40 Y Y 1 F N
F0 "U" 100 600 60 H V C CNN
F1 "CY8C21234" 300 500 60 H V C CNN
DRAW
S -500 450 500 -450 0 1 0 N
X P0[7] 1 600 -350 100 L 39 39 1 1 B
X P0[5] 2 600 -150 100 L 39 39 1 1 B
X P0[3] 3 600 50 100 L 39 39 1 1 B
X P0[1] 4 600 250 100 L 39 39 1 1 B
X SMP 5 -600 -350 100 R 39 39 1 1 O
X VSS 6 -100 -550 100 U 39 39 1 1 I
X P1[1]/SCL 7 -600 250 100 R 39 39 1 1 B
X VSS 8 100 -550 100 U 39 39 1 1 P
X P1[0]/SDA 9 -600 350 100 R 39 39 1 1 B
X P1[2] 10 -600 150 100 R 39 39 1 1 B
X P1[4]/EXTCLK 11 -600 -50 100 R 39 39 1 1 B
X P0[0] 12 600 350 100 L 39 39 1 1 B
X P0[2] 13 600 150 100 L 39 39 1 1 B
X P0[4] 14 600 -50 100 L 39 39 1 1 B
X P0[6] 15 600 -250 100 L 39 39 1 1 B
X VDD 16 0 550 100 D 39 39 1 1 P
ENDDRAW
ENDDEF
#
# LPC122xxx48
#
DEF LPC122xxx48 U 0 40 Y Y 1 F N
F0 "U" 450 1350 60 H V C CNN
F1 "LPC122xxx48" 700 1250 60 H V C CNN
$FPLIST
 LQFP48
$ENDFPLIST
DRAW
S 1150 -1200 -1150 1200 0 1 0 N
X XTALIN 1 1250 850 100 L 39 27 1 1 P
X XTALOUT 2 1250 750 100 L 39 27 1 1 P
X VREF_CMP 3 1250 550 100 L 39 27 1 1 P
X PIO0_19/ACMP0_I0/CT32B0_CAP1/CT32B0_MAT1 4 -1250 -750 100 R 39 27 1 1 P
X PIO0_20/ACMP0_I1/CT32B0_CAP2/CT32B0_MAT2 5 -1250 -850 100 R 39 27 1 1 P
X PIO0_21/ACMP0_I2/CT32B0_CAP3/CT32B0_MAT3 6 -1250 -950 100 R 39 27 1 1 P
X PIO0_22/ACMP0_I3 7 -1250 -1050 100 R 39 27 1 1 P
X PIO0_23/ACMP1_I0/CT32B1_CAP0/CT32B1_MAT0 8 -1250 -1150 100 R 39 27 1 1 P
X ACMP1_I1/CT32B1_CAP1/CT32B1_MAT1/PIO0_24 9 1250 -450 100 L 39 27 1 1 P
X SWDIO/ACMP1_I2/CT32B1_CAP2/CT32B1_MAT2/PIO0_25 10 1250 -550 100 L 39 27 1 1 P
X PIO0_5/~DCD0~ 20 -1250 650 100 R 39 27 1 1 P
X PIO0_15/SSEL/CT16B1_CAP0/CT16B1_MAT0 30 -1250 -350 100 R 39 27 1 1 P
X AD6/PIO1_4 40 1250 -50 100 L 39 27 1 1 P
X SWCLK/ACMP1_I3/CT32B1_CAP3/CT32B1_MAT3/PIO0_26 11 1250 -650 100 L 39 27 1 1 P
X PIO0_6/~RI0~/CT32B1_CAP0/CT32B1_MAT0 21 -1250 550 100 R 39 27 1 1 P
X PIO0_16/MISO/CT16B1_CAP1/CT16B1_MAT1 31 -1250 -450 100 R 39 27 1 1 P
X AD7/CT16B1_CAP0/CT16B1_MAT0/PIO1_5 41 1250 -150 100 L 39 27 1 1 P
X ACMP0_O/PIO0_27 12 1250 -750 100 L 39 27 1 1 P
X PIO0_7/~CTS0~/CT32B1_CAP1/CT32B1_MAT1 22 -1250 450 100 R 39 27 1 1 P
X PIO0_17/MOSI 32 -1250 -550 100 R 39 27 1 1 P
X CT16B1_CAP1/CT16B1_MAT1/PIO1_6 42 1250 -250 100 L 39 27 1 1 P
X ACMP1_O/CT16B0_CAP0/CT16B0_MAT0/PIO0_28 13 1250 -850 100 L 39 27 1 1 P
X PIO0_8/RXD1/CT32B1_CAP2/CT32B1_MAT2 23 -1250 350 100 R 39 27 1 1 P
X PIO0_18/SWCLK/CT32B0_CAP0/CT32B0_MAT0 33 -1250 -650 100 R 39 27 1 1 P
X VSS 43 200 -1300 100 U 39 39 1 1 P
X ROSC/CT16B0_CAP1/CT16B0_MAT1/PIO0_29 14 1250 -950 100 L 39 27 1 1 P
X PIO0_9/TXD1/CT32B1_CAP3/CT32B1_MAT3 24 -1250 250 100 R 39 27 1 1 P
X R/AD0/PIO0_30 34 1250 -1050 100 L 39 27 1 1 P
X VDD(3V3) 44 -100 1300 100 D 39 39 1 1 P
X PIO0_0/~RTS0~ 15 -1250 1150 100 R 39 27 1 1 P
X PIO0_10/SCL 25 -1250 150 100 R 39 27 1 1 P
X R/AD1/PIO0_31 35 1250 -1150 100 L 39 27 1 1 P
X RTCXOUT 45 1250 1050 100 L 39 27 1 1 P
X PIO0_1/RXD0/CT32B0_CAP0/CT32B0_MAT0 16 -1250 1050 100 R 39 27 1 1 P
X PIO0_11/SDA/CT16B0_CAP0/CT16B0_MAT0 26 -1250 50 100 R 39 27 1 1 P
X R/AD2/PIO1_0 36 1250 350 100 L 39 27 1 1 P
X RTCXIN 46 1250 1150 100 L 39 27 1 1 P
X PIO0_2/TXD0/CT32B0_CAP1/CT32B0_MAT1 17 -1250 950 100 R 39 27 1 1 P
X PIO0_12/CLKOUT/CT16B0_CAP1/CT16B0_MAT1 27 -1250 -50 100 R 39 27 1 1 P
X R/AD3/PIO1_1 37 1250 250 100 L 39 27 1 1 P
X VDD(IO) 47 100 1300 100 D 39 39 1 1 P
X PIO0_3/~DTR0~/CT32B0_CAP2/CT32B0_MAT2 18 -1250 850 100 R 39 27 1 1 P
X PIO0_13/~RESET~ 28 -1250 -150 100 R 39 27 1 1 P
X SWDIO/AD4/PIO1_2 38 1250 150 100 L 39 27 1 1 P
X VSSIO 48 0 -1300 100 U 39 39 1 1 P
X PIO0_4/~DSR0~/CT32B0_CAP3/CT32B0_MAT3 19 -1250 750 100 R 39 27 1 1 P
X PIO0_14/SCK 29 -1250 -250 100 R 39 27 1 1 P
X WAKEUP/AD5/PIO1_3 39 1250 50 100 L 39 27 1 1 P
ENDDRAW
ENDDEF
#
# LPC122xxx64
#
DEF LPC122xxx64 U 0 40 Y Y 1 F N
F0 "U" 450 1750 60 H V C CNN
F1 "LPC122xxx64" 700 1650 60 H V C CNN
$FPLIST
 LQFP64
$ENDFPLIST
DRAW
S -1150 1600 1150 -1600 0 1 0 N
X XTALIN 1 1250 1250 100 L 39 27 1 1 P
X XTALOUT 2 1250 1150 100 L 39 27 1 1 P
X VREF_CMP 3 1250 950 100 L 39 27 1 1 P
X PIO0_19/ACMP0_I0/CT32B0_CAP1/CT32B0_MAT1 4 -1250 -350 100 R 39 27 1 1 P
X PIO0_20/ACMP0_I1/CT32B0_CAP2/CT32B0_MAT2 5 -1250 -450 100 R 39 27 1 1 P
X PIO0_21/ACMP0_I2/CT32B0_CAP3/CT32B0_MAT3 6 -1250 -550 100 R 39 27 1 1 P
X PIO0_22/ACMP0_I3 7 -1250 -650 100 R 39 27 1 1 P
X PIO0_23/ACMP1_I0/CT32B1_CAP0/CT32B1_MAT0 8 -1250 -750 100 R 39 27 1 1 P
X PIO0_24/ACMP1_I1/CT32B1_CAP1/CT32B1_MAT1 9 -1250 -850 100 R 39 27 1 1 P
X PIO0_25/SWDIO/ACMP1_I2/CT32B1_CAP2/CT32B1_MAT2 10 -1250 -950 100 R 39 27 1 1 P
X PIO0_1/RXD0/CT32B0_CAP0/CT32B0_MAT0 20 -1250 1450 100 R 39 27 1 1 P
X RXD0/CT16B0_CAP1/CT16B0_MAT1/PIO2_1 30 1250 -150 100 L 39 27 1 1 P
X PIO0_13/~RESET~ 40 -1250 250 100 R 39 27 1 1 P
X SWDIO/AD4/PIO1_2 50 1250 550 100 L 39 27 1 1 P
X CT32B1_CAP1/CT32B1_MAT1/PIO2_9 60 1250 -950 100 L 39 27 1 1 P
X PIO0_26/SWCLK/ACMP1_I3/CT32B1_CAP3/CT32B1_MAT3 11 -1250 -1050 100 R 39 27 1 1 P
X PIO0_2/TXD0/CT32B0_CAP1/CT32B0_MAT1 21 -1250 1350 100 R 39 27 1 1 P
X TXD0/CT16B1_CAP0/CT16B1_MAT0/PIO2_2 31 1250 -250 100 L 39 27 1 1 P
X PIO0_14/SCK 41 -1250 150 100 R 39 27 1 1 P
X WAKEUP/AD5/PIO1_3 51 1250 450 100 L 39 27 1 1 P
X TXD1/CT32B1_CAP2/CT32B1_MAT2/PIO2_10 61 1250 -1050 100 L 39 27 1 1 P
X PIO0_27/ACMP0_O 12 -1250 -1150 100 R 39 27 1 1 P
X PIO0_3/~DTR0~/CT32B0_CAP2/CT32B0_MAT2 22 -1250 1250 100 R 39 27 1 1 P
X ~DTR0~/CT16B1_CAP1/CT16B1_MAT1/PIO2_3 32 1250 -350 100 L 39 27 1 1 P
X PIO0_15/SSEL/CT16B1_CAP0/CT16B1_MAT0 42 -1250 50 100 R 39 27 1 1 P
X AD6/PIO1_4 52 1250 350 100 L 39 27 1 1 P
X RXD1/CT32B1_CAP3/CT32B1_MAT3/PIO2_11 62 1250 -1150 100 L 39 27 1 1 P
X RXD1/PIO2_12 13 1250 -1250 100 L 39 27 1 1 P
X PIO0_4/~DSR0~/CT32B0_CAP3/CT32B0_MAT3 23 -1250 1150 100 R 39 27 1 1 P
X ~CTS0~/CT32B0_CAP0/CT32B0_MAT0/PIO2_4 33 1250 -450 100 L 39 27 1 1 P
X PIO0_16/MISO/CT16B1_CAP1/CT16B1_MAT1 43 -1250 -50 100 R 39 27 1 1 P
X AD7/CT16B1_CAP0/CT16B1_MAT0/PIO1_5 53 1250 250 100 L 39 27 1 1 P
X VDD(IO) 63 100 1700 100 D 39 39 1 1 P
X TXD1/PIO2_13 14 1250 -1350 100 L 39 27 1 1 P
X PIO0_5/~DCD0~ 24 -1250 1050 100 R 39 27 1 1 P
X ~RI0~/CT32B0_CAP1/CT32B0_MAT1/PIO2_5 34 1250 -550 100 L 39 27 1 1 P
X PIO0_17/MOSI 44 -1250 -150 100 R 39 27 1 1 P
X CT16B1_CAP1/CT16B1_MAT1/PIO1_6 54 1250 150 100 L 39 27 1 1 P
X VSSIO 64 -100 -1700 100 U 39 39 1 1 P
X PIO2_14 15 1250 -1450 100 L 39 27 1 1 P
X PIO0_6/~RI0~/CT32B1_CAP0/CT32B1_MAT0 25 -1250 950 100 R 39 27 1 1 P
X ~DCD0~/CT32B0_CAP2/CT32B0_MAT2/PIO2_6 35 1250 -650 100 L 39 27 1 1 P
X PIO0_18/SWCLK/CT32B0_CAP0/CT32B0_MAT0 45 -1250 -250 100 R 39 27 1 1 P
X VSS 55 100 -1700 100 U 39 39 1 1 P
X PIO2_15 16 1250 -1550 100 L 39 27 1 1 P
X PIO0_7/~CTS0~/CT32B1_CAP1/CT32B1_MAT1 26 -1250 850 100 R 39 27 1 1 P
X ~DSR0~/CT32B0_CAP3/CT32B0_MAT3/PIO2_7 36 1250 -750 100 L 39 27 1 1 P
X R/PIO0_30/AD0 46 -1250 -1450 100 R 39 27 1 1 P
X VDD(3V3) 56 -100 1700 100 D 39 39 1 1 P
X PIO0_28/ACMP1_O/CT16B0_CAP0/CT16B0_MAT0 17 -1250 -1250 100 R 39 27 1 1 P
X PIO0_8/RXD1/CT32B1_CAP2/CT32B1_MAT2 27 -1250 750 100 R 39 27 1 1 P
X PIO0_10/SCL 37 -1250 550 100 R 39 27 1 1 P
X R/PIO0_31/AD1 47 -1250 -1550 100 R 39 27 1 1 P
X RTCXOUT 57 1250 1450 100 L 39 27 1 1 P
X PIO0_29/ROSC/CT16B0_CAP1/CT16B0_MAT1 18 -1250 -1350 100 R 39 27 1 1 P
X PIO0_9/TXD1/CT32B1_CAP3/CT32B1_MAT3 28 -1250 650 100 R 39 27 1 1 P
X PIO0_11/SDA/CT16B0_CAP0/CT16B0_MAT0 38 -1250 450 100 R 39 27 1 1 P
X R/AD2/PIO1_0 48 1250 750 100 L 39 27 1 1 P
X RTCXIN 58 1250 1550 100 L 39 27 1 1 P
X PIO0_0/~RTS0~ 19 -1250 1550 100 R 39 27 1 1 P
X ~RTS0~/CT16B0_CAP0/CT16B0_MAT0/PIO2_0 29 1250 -50 100 L 39 27 1 1 P
X PIO0_12/CLKOUT/CT16B0_CAP1/CT16B0_MAT1 39 -1250 350 100 R 39 27 1 1 P
X R/AD3/PIO1_1 49 1250 650 100 L 39 27 1 1 P
X CT32B1_CAP0/CT32B1_MAT0/PIO2_8 59 1250 -850 100 L 39 27 1 1 P
ENDDRAW
ENDDEF
#
# LPC1769-BGA
#
DEF LPC1769-BGA U 0 40 Y Y 1 F N
F0 "U" 850 2300 60 H V C CNN
F1 "LPC1769-BGA" 1150 2200 60 H V C CNN
$FPLIST
 tfbga100
$ENDFPLIST
DRAW
S 1150 -2150 -1150 2150 0 1 0 N
X TDO/SWO A1 1250 -1000 100 L 39 27 1 1 P
X P0[3]/RXD0/AD0[6] B1 -1250 1800 100 R 39 27 1 1 P
X VDD(3V3) C1 -250 2250 100 D 39 39 1 1 P
X ENET_TX_EN/P1[4] D1 1250 1900 100 L 39 27 1 1 P
X ENET_RXD1/P1[10] E1 1250 1600 100 L 39 27 1 1 P
X ENET_MDC/P1[16] F1 1250 1300 100 L 39 27 1 1 P
X VDD(REG)(3V3) G1 0 2250 100 D 39 39 1 1 P
X P0[4]/I2SRX_CLK/RD2/CAP2[0] H1 -1250 1700 100 R 39 27 1 1 P
X P0[7]/I2STX_CLK/SCK1/MAT2[1] J1 -1250 1400 100 R 39 27 1 1 P
X P0[9]/I2STX_SDA/MOSI1/MAT2[3] K1 -1250 1200 100 R 39 27 1 1 P
X TMS/SWDIO A2 1250 -1200 100 L 39 27 1 1 P
X RTCK B2 1250 -1400 100 L 39 27 1 1 P
X VSS C2 350 -2250 100 U 39 39 1 1 P
X ENET_TXD1/P1[1] D2 1250 2000 100 L 39 27 1 1 P
X ENET_RXD0/P1[9] E2 1250 1700 100 L 39 27 1 1 P
X ENET_MDIO/P1[17] F2 1250 1200 100 L 39 27 1 1 P
X VSS G2 250 -2250 100 U 39 39 1 1 P
X P0[6]/I2SRX_SDA/SSEL1/MAT2[0] H2 -1250 1500 100 R 39 27 1 1 P
X P2[0]/PWM1[1]/TXD1 J2 -1250 -800 100 R 39 27 1 1 P
X P2[1]/PWM1[2]/RXD1 K2 -1250 -900 100 R 39 27 1 1 P
X TCK/SWDCLK A3 1250 -1300 100 L 39 27 1 1 P
X ~TRST~ B3 1250 -1500 100 L 39 27 1 1 P
X TDI C3 1250 -1100 100 L 39 27 1 1 P
X P0[2]/TXD0/AD0[7] D3 -1250 1900 100 R 39 27 1 1 P
X ENET_CRS/P1[8] E3 1250 1800 100 L 39 27 1 1 P
X ENET_REF_CLK/P1[15] F3 1250 1400 100 L 39 27 1 1 P
X RX_MCLK/MAT2[0]/TXD3/P4[28] G3 1250 -700 100 L 39 27 1 1 P
X P0[8]/I2STX_WS/MISO1/MAT2[2] H3 -1250 1300 100 R 39 27 1 1 P
X VSS J3 150 -2250 100 U 39 39 1 1 P
X VDD(3V3) K3 -350 2250 100 D 39 39 1 1 P
X P0[24]/AD0[1]/I2SRX_WS/CAP3[1] A4 -1250 0 100 R 39 27 1 1 P
X P0[25]/AD0[2]/I2SRX_SDA/TXD3 B4 -1250 -100 100 R 39 27 1 1 P
X P0[26]/AD0[3]/AOUT/RXD3 C4 -1250 -200 100 R 39 27 1 1 P
X ENET_TXD0/P1[0] E4 1250 2100 100 L 39 27 1 1 P
X ENET_RX_ER/P1[14] F4 1250 1500 100 L 39 27 1 1 P
X P0[5]/I2SRX_WS/TD2/CAP2[1] G4 -1250 1600 100 R 39 27 1 1 P
X P2[2]/PWM1[3]/CTS1/TRACEDATA[3] H4 -1250 -1000 100 R 39 27 1 1 P
X P2[4]/PWM1[5]/DSR1/TRACEDATA[1] J4 -1250 -1200 100 R 39 27 1 1 P
X P2[5]/PWM1[6]/DTR1/TRACEDATA[0] K4 -1250 -1300 100 R 39 27 1 1 P
X VSSA A5 -350 -2250 100 U 39 39 1 1 P
X VDDA B5 200 2250 100 D 39 39 1 1 P
X VREFP C5 550 2250 100 D 39 27 1 1 P
X P0[23]/AD0[0]/I2SRX_CLK/CAP3[0] E5 -1250 100 100 R 39 27 1 1 P
X TX_MCLK/MAT2[1]/RXD3/P4[29] F5 1250 -800 100 L 39 27 1 1 P
X P2[3]/PWM1[4]/DCD1/TRACEDATA[2] G5 -1250 -1100 100 R 39 27 1 1 P
X P2[6]/PCAP1[0]/RI1/TRACECLK H5 -1250 -1400 100 R 39 27 1 1 P
X P2[7]/RD2/RTS1 J5 -1250 -1500 100 R 39 27 1 1 P
X P2[8]/TD2/TXD2 K5 -1250 -1600 100 R 39 27 1 1 P
X VREFN A6 650 2250 100 D 39 27 1 1 P
X RTCX1 B6 1250 -2000 100 L 39 27 1 1 P
X ~RESET~ C6 1250 -1700 100 L 39 27 1 1 P
X SCK1/AD0[5]/P1[31] D6 1250 -200 100 L 39 27 1 1 P
X ~MCABORT~/PWM1[3]/SSEL0/P1[21] E6 1250 800 100 L 39 27 1 1 P
X P0[18]/DCD1/MOSI0/MOSI F6 -1250 600 100 R 39 27 1 1 P
X P2[9]/USB_CONNECT/RXD2 G6 -1250 -1700 100 R 39 27 1 1 P
X P0[16]/RXD1/SSEL0/SSEL H6 -1250 800 100 R 39 27 1 1 P
X P0[17]/CTS1/MISO0/MISO J6 -1250 700 100 R 39 27 1 1 P
X P0[15]/TXD1/SCK0/SCK K6 -1250 900 100 R 39 27 1 1 P
X RTCX2 A7 1250 -2100 100 L 39 27 1 1 P
X VBAT B7 400 2250 100 D 39 27 1 1 P
X XTAL2 C7 1250 -1900 100 L 39 27 1 1 P
X P0[30]/USB_D- D7 -1250 -600 100 R 39 27 1 1 P
X MCOA1/MAT1[1]/P1[25] E7 1250 400 100 L 39 27 1 1 P
X MCOB2/PCAP1[1]/MAT0[1]/P1[29] F7 1250 0 100 L 39 27 1 1 P
X VSS G7 50 -2250 100 U 39 39 1 1 P
X P0[21]/RI1/RD1 H7 -1250 300 100 R 39 27 1 1 P
X P0[20]/DTR1/SCL1 J7 -1250 400 100 R 39 27 1 1 P
X P0[19]/DSR1/SDA1 K7 -1250 500 100 R 39 27 1 1 P
X VBUS/AD0[4]/P1[30] A8 1250 -100 100 L 39 27 1 1 P
X XTAL1 B8 1250 -1800 100 L 39 27 1 1 P
X MAT0[0]/PWM1[2]/P3[25] C8 1250 -400 100 L 39 27 1 1 P
X USB_UP_LED/PWM1[1]/CAP1[0]/P1[18] D8 1250 1100 100 L 39 27 1 1 P
X MCI2/PWM1[5]/MOSI0/P1[24] E8 1250 500 100 L 39 27 1 1 P
X VDD(REG)(3V3) F8 -100 2250 100 D 39 39 1 1 P
X P0[10]/TXD2/SDA2/MAT3[0] G8 -1250 1100 100 R 39 27 1 1 P
X P2[11]/~EINT1~/I2STX_CLK H8 -1250 -1900 100 R 39 27 1 1 P
X VDD(3V3) J8 -450 2250 100 D 39 39 1 1 P
X P0[22]/RTS1/TD1 K8 -1250 200 100 R 39 27 1 1 P
X P0[28]/SCL0/USB_SCL A9 -1250 -400 100 R 39 27 1 1 P
X P0[27]/SDA0/USB_SDA B9 -1250 -300 100 R 39 27 1 1 P
X P0[29]/USB_D+ C9 -1250 -500 100 R 39 27 1 1 P
X MCOA0/~USB_PPWR~/CAP1[1]/P1[19] D9 1250 1000 100 L 39 27 1 1 P
X MCOB0/USB_PWRD/MAT1[0]/P1[22] E9 1250 700 100 L 39 27 1 1 P
X VSS F9 -50 -2250 100 U 39 39 1 1 P
X MCOA2/PCAP1[0]/MAT0[0]/P1[28] G9 1250 100 100 L 39 27 1 1 P
X P0[1]/TD1/RXD3/SCL1 H9 -1250 2000 100 R 39 27 1 1 P
X P2[13]/~EINT3~/I2STX_SDA J9 -1250 -2100 100 R 39 27 1 1 P
X P2[10]/~EINT0~/NMI K9 -1250 -1800 100 R 39 27 1 1 P
X STCLK/MAT0[1]/PWM1[3]/P3[26] A10 1250 -500 100 L 39 27 1 1 P
X VDD(3V3) B10 -550 2250 100 D 39 39 1 1 P
X VSS C10 -150 -2250 100 U 39 39 1 1 P
X MCI0/PWM1[2]/SCK0/P1[20] D10 1250 900 100 L 39 27 1 1 P
X MCI1/PWM1[4]/MISO0/P1[23] E10 1250 600 100 L 39 27 1 1 P
X MCOB1/PWM1[6]/CAP0[0]/P1[26] F10 1250 300 100 L 39 27 1 1 P
X CLKOUT/~USB_OVRCR~/CAP0[1]/P1[27] G10 1250 200 100 L 39 27 1 1 P
X P0[0]/RD1/TXD3/SDA1 H10 -1250 2100 100 R 39 27 1 1 P
X P0[11]/RXD2/SCL2/MAT3[1] J10 -1250 1000 100 R 39 27 1 1 P
X P2[12]/~EINT2~/I2STX_WS K10 -1250 -2000 100 R 39 27 1 1 P
ENDDRAW
ENDDEF
#
# LPC1769-LQFP
#
DEF LPC1769-LQFP U 0 40 Y Y 1 F N
F0 "U" 850 2300 60 H V C CNN
F1 "LPC1769-LQFP" 1150 2200 60 H V C CNN
$FPLIST
 tqfp-100
$ENDFPLIST
DRAW
S 1150 -2150 -1150 2150 0 1 0 N
X TDO/SWO 1 1250 -1000 100 L 39 27 1 1 P
X TDI 2 1250 -1100 100 L 39 27 1 1 P
X TMS/SWDIO 3 1250 -1200 100 L 39 27 1 1 P
X ~TRST~ 4 1250 -1500 100 L 39 27 1 1 P
X TCK/SWDCLK 5 1250 -1300 100 L 39 27 1 1 P
X P0[26]/AD0[3]/AOUT/RXD3 6 -1250 -200 100 R 39 27 1 1 P
X P0[25]/AD0[2]/I2SRX_SDA/TXD3 7 -1250 -100 100 R 39 27 1 1 P
X P0[24]/AD0[1]/I2SRX_WS/CAP3[1] 8 -1250 0 100 R 39 27 1 1 P
X P0[23]/AD0[0]/I2SRX_CLK/CAP3[0] 9 -1250 100 100 R 39 27 1 1 P
X VDDA 10 200 2250 100 D 39 39 1 1 P
X SCK1/AD0[5]/P1[31] 20 1250 -200 100 L 39 27 1 1 P
X P0[30]/USB_D- 30 -1250 -600 100 R 39 27 1 1 P
X MCOB1/PWM1[6]/CAP0[0]/P1[26] 40 1250 300 100 L 39 27 1 1 P
X P2[13]/~EINT3~/I2STX_SDA 50 -1250 -2100 100 R 39 27 1 1 P
X P0[18]/DCD1/MOSI0/MOSI 60 -1250 600 100 R 39 27 1 1 P
X P2[3]/PWM1[4]/DCD1/TRACEDATA[2] 70 -1250 -1100 100 R 39 27 1 1 P
X P0[5]/I2SRX_WS/TD2/CAP2[1] 80 -1250 1600 100 R 39 27 1 1 P
X ENET_RXD1/P1[10] 90 1250 1600 100 L 39 27 1 1 P
X VSSA 11 -350 -2250 100 U 39 39 1 1 P
X VBUS/AD0[4]/P1[30] 21 1250 -100 100 L 39 27 1 1 P
X VSS 31 350 -2250 100 U 39 39 1 1 P
X VSS 41 250 -2250 100 U 39 39 1 1 P
X P2[12]/~EINT2~/I2STX_WS 51 -1250 -2000 100 R 39 27 1 1 P
X P0[17]/CTS1/MISO0/MISO 61 -1250 700 100 R 39 27 1 1 P
X VDD(3V3) 71 -450 2250 100 D 39 39 1 1 P
X P0[4]/I2SRX_CLK/RD2/CAP2[0] 81 -1250 1700 100 R 39 27 1 1 P
X ENET_RXD0/P1[9] 91 1250 1700 100 L 39 27 1 1 P
X VREFP 12 550 2250 100 D 39 27 1 1 P
X XTAL1 22 1250 -1800 100 L 39 27 1 1 P
X USB_UP_LED/PWM1[1]/CAP1[0]/P1[18] 32 1250 1100 100 L 39 27 1 1 P
X VDD(REG)(3V3) 42 0 2250 100 D 39 39 1 1 P
X P2[11]/~EINT1~/I2STX_CLK 52 -1250 -1900 100 R 39 27 1 1 P
X P0[15]/TXD1/SCK0/SCK 62 -1250 900 100 R 39 27 1 1 P
X VSS 72 50 -2250 100 U 39 39 1 1 P
X RX_MCLK/MAT2[0]/TXD3/P4[28] 82 1250 -700 100 L 39 27 1 1 P
X ENET_CRS/P1[8] 92 1250 1800 100 L 39 27 1 1 P
X XTAL2 23 1250 -1900 100 L 39 27 1 1 P
X MCOA0/~USB_PPWR~/CAP1[1]/P1[19] 33 1250 1000 100 L 39 27 1 1 P
X CLKOUT/~USB_OVRCR~/CAP0[1]/P1[27] 43 1250 200 100 L 39 27 1 1 P
X P2[10]/~EINT0~/NMI 53 -1250 -1800 100 R 39 27 1 1 P
X P0[16]/RXD1/SSEL0/SSEL 63 -1250 800 100 R 39 27 1 1 P
X P2[2]/PWM1[3]/CTS1/TRACEDATA[3] 73 -1250 -1000 100 R 39 27 1 1 P
X VSS 83 -50 -2250 100 U 39 39 1 1 P
X ENET_TX_EN/P1[4] 93 1250 1900 100 L 39 27 1 1 P
X ~RSTOUT~ 14 1250 -1600 100 L 39 27 1 1 P
X P0[28]/SCL0/USB_SCL 24 -1250 -400 100 R 39 27 1 1 P
X MCI0/PWM1[2]/SCK0/P1[20] 34 1250 900 100 L 39 27 1 1 P
X MCOA2/PCAP1[0]/MAT0[0]/P1[28] 44 1250 100 100 L 39 27 1 1 P
X VDD(3V3) 54 -350 2250 100 D 39 39 1 1 P
X P2[9]/USB_CONNECT/RXD2 64 -1250 -1700 100 R 39 27 1 1 P
X P2[1]/PWM1[2]/RXD1 74 -1250 -900 100 R 39 27 1 1 P
X VDD(REG)(3V3) 84 -100 2250 100 D 39 39 1 1 P
X ENET_TXD1/P1[1] 94 1250 2000 100 L 39 27 1 1 P
X VREFN 15 650 2250 100 D 39 27 1 1 P
X P0[27]/SDA0/USB_SDA 25 -1250 -300 100 R 39 27 1 1 P
X ~MCABORT~/PWM1[3]/SSEL0/P1[21] 35 1250 800 100 L 39 27 1 1 P
X MCOB2/PCAP1[1]/MAT0[1]/P1[29] 45 1250 0 100 L 39 27 1 1 P
X VSS 55 150 -2250 100 U 39 39 1 1 P
X P2[8]/TD2/TXD2 65 -1250 -1600 100 R 39 27 1 1 P
X P2[0]/PWM1[1]/TXD1 75 -1250 -800 100 R 39 27 1 1 P
X TX_MCLK/MAT2[1]/RXD3/P4[29] 85 1250 -800 100 L 39 27 1 1 P
X ENET_TXD0/P1[0] 95 1250 2100 100 L 39 27 1 1 P
X RTCX1 16 1250 -2000 100 L 39 27 1 1 P
X STCLK/MAT0[1]/PWM1[3]/P3[26] 26 1250 -500 100 L 39 27 1 1 P
X MCOB0/USB_PWRD/MAT1[0]/P1[22] 36 1250 700 100 L 39 27 1 1 P
X P0[0]/RD1/TXD3/SDA1 46 -1250 2100 100 R 39 27 1 1 P
X P0[22]/RTS1/TD1 56 -1250 200 100 R 39 27 1 1 P
X P2[7]/RD2/RTS1 66 -1250 -1500 100 R 39 27 1 1 P
X P0[9]/I2STX_SDA/MOSI1/MAT2[3] 76 -1250 1200 100 R 39 27 1 1 P
X ENET_MDIO/P1[17] 86 1250 1200 100 L 39 27 1 1 P
X VDD(3V3) 96 -550 2250 100 D 39 39 1 1 P
X ~RESET~ 17 1250 -1700 100 L 39 27 1 1 P
X MAT0[0]/PWM1[2]/P3[25] 27 1250 -400 100 L 39 27 1 1 P
X MCI1/PWM1[4]/MISO0/P1[23] 37 1250 600 100 L 39 27 1 1 P
X P0[1]/TD1/RXD3/SCL1 47 -1250 2000 100 R 39 27 1 1 P
X P0[21]/RI1/RD1 57 -1250 300 100 R 39 27 1 1 P
X P2[6]/PCAP1[0]/RI1/TRACECLK 67 -1250 -1400 100 R 39 27 1 1 P
X P0[8]/I2STX_WS/MISO1/MAT2[2] 77 -1250 1300 100 R 39 27 1 1 P
X ENET_MDC/P1[16] 87 1250 1300 100 L 39 27 1 1 P
X VSS 97 -150 -2250 100 U 39 39 1 1 P
X RTCX2 18 1250 -2100 100 L 39 27 1 1 P
X VDD(3V3) 28 -250 2250 100 D 39 39 1 1 P
X MCI2/PWM1[5]/MOSI0/P1[24] 38 1250 500 100 L 39 27 1 1 P
X P0[10]/TXD2/SDA2/MAT3[0] 48 -1250 1100 100 R 39 27 1 1 P
X P0[20]/DTR1/SCL1 58 -1250 400 100 R 39 27 1 1 P
X P2[5]/PWM1[6]/DTR1/TRACEDATA[0] 68 -1250 -1300 100 R 39 27 1 1 P
X P0[7]/I2STX_CLK/SCK1/MAT2[1] 78 -1250 1400 100 R 39 27 1 1 P
X ENET_REF_CLK/P1[15] 88 1250 1400 100 L 39 27 1 1 P
X P0[2]/TXD0/AD0[7] 98 -1250 1900 100 R 39 27 1 1 P
X VBAT 19 400 2250 100 D 39 27 1 1 P
X P0[29]/USB_D+ 29 -1250 -500 100 R 39 27 1 1 P
X MCOA1/MAT1[1]/P1[25] 39 1250 400 100 L 39 27 1 1 P
X P0[11]/RXD2/SCL2/MAT3[1] 49 -1250 1000 100 R 39 27 1 1 P
X P0[19]/DSR1/SDA1 59 -1250 500 100 R 39 27 1 1 P
X P2[4]/PWM1[5]/DSR1/TRACEDATA[1] 69 -1250 -1200 100 R 39 27 1 1 P
X P0[6]/I2SRX_SDA/SSEL1/MAT2[0] 79 -1250 1500 100 R 39 27 1 1 P
X ENET_RX_ER/P1[14] 89 1250 1500 100 L 39 27 1 1 P
X P0[3]/RXD0/AD0[6] 99 -1250 1800 100 R 39 27 1 1 P
X RTCK 100 1250 -1400 100 L 39 27 1 1 P
ENDDRAW
ENDDEF
#
# MCP130-TT
#
DEF MCP130-TT U 0 40 Y Y 1 F N
F0 "U" 50 350 60 H V C CNN
F1 "MCP130-TT" 250 250 60 H V C CNN
$FPLIST
 sot-23
$ENDFPLIST
DRAW
S -150 200 150 -200 0 1 0 N
X ~RST 1 300 0 150 L 39 39 1 1 P
X VSS 2 -50 -300 100 U 39 39 1 1 P
X VDD 3 -50 300 100 D 39 39 1 1 B
ENDDRAW
ENDDEF
#
# MK20DXxVLK7
#
DEF MK20DXxVLK7 U 0 40 Y Y 1 F N
F0 "U" 550 2200 60 H V C CNN
F1 "MK20DXxVLK7" 800 2100 60 H V C CNN
DRAW
S 1850 -2050 -1850 2050 0 1 0 N
X PTE0/ADC1_SE4a/SPI1_PCS1/UART1_TX/I2C1_SDA/RTC_CLKOUT 1 -1950 2000 100 R 39 27 1 1 I
X PTE1/LLWU_P0/ADC1_SE5a/SPI1_SOUT/UART1_RX/I2C1_SCL/SPI1_SIN 2 -1950 1900 100 R 39 27 1 1 I
X PTE2/LLWU_P1/ADC1_SE6a/SPI1_SCK/UART1_CTS_b 3 -1950 1800 100 R 39 27 1 1 I
X PTE3/ADC1_SE7a/SPI1_SIN/UART1_RTS_b/SPI1_SOUT 4 -1950 1700 100 R 39 27 1 1 I
X PTE4/LLWU_P2/SPI1_PCS0/UART3_TX 5 -1950 1600 100 R 39 27 1 1 I
X PTE5/SPI1_PCS2/UART3_RX 6 -1950 1500 100 R 39 27 1 1 I
X VDD 7 300 2150 100 D 39 39 1 1 I
X VSS 8 300 -2150 100 U 39 39 1 1 I
X USB0_DP 9 1950 0 100 L 39 27 1 1 I
X USB0_DM 10 1950 -100 100 L 39 27 1 1 I
X VSSA 20 -300 -2150 100 U 39 39 1 1 I
X PTA4/LLWU_P3/NMI_b/EZP_CS_b/TSI0_CH5/FTM0_CH1 30 -1950 900 100 R 39 27 1 1 I
X PTA18/EXTAL0/FTM0_FLT2/FTM_CLKIN0 40 -1950 100 100 R 39 27 1 1 I
X VDD 50 100 2150 100 D 39 39 1 1 I
X VDD 60 0 2150 100 D 39 39 1 1 I
X VDD 70 -100 2150 100 D 39 39 1 1 I
X CMT_IRO/UART0_TX/FTM0_CH7/FTM0_FLT1/PTD7 80 1950 1300 100 L 39 27 1 1 I
X VOUT33 11 1950 -1400 100 L 39 27 1 1 I
X CMP1_IN5/CMP0_IN5/ADC1_SE18/VREF_OUT 21 1950 -1800 100 L 39 27 1 1 I
X PTA5/USB_CLKIN/FTM0_CH2/CMP2_OUT/I2S0_TX_BCLK/JTAG_TRST_b 31 -1950 800 100 R 39 27 1 1 I
X PTA19/XTAL0/FTM1_FLT0/FTM_CLKIN1/LPTMR0_ALT1 41 -1950 0 100 R 39 27 1 1 I
X TSI0_CH9/SPI1_SOUT/UART0_RX/FB_AD17/EWM_IN/PTB16 51 1950 500 100 L 39 27 1 1 I
X PTC4/LLWU_P8/SPI0_PCS0/UART1_TX/FTM0_CH3/FB_AD11/CMP1_OUT 61 -1950 -600 100 R 39 27 1 1 I
X PTC16/UART3_RX/FB_CS5_b/FB_TSIZ1/FB_BE23_16_b 71 -1950 -1400 100 R 39 27 1 1 I
X VREGIN 12 1950 -1600 100 L 39 27 1 1 I
X CMP1_IN3/ADC0_SE23/DAC0_OUT 22 1950 -2000 100 L 39 27 1 1 I
X PTA12/CMP2_IN0/CAN0_TX/FTM1_CH0/I2S0_TXD0/FTM1_QD_PHA 32 -1950 700 100 R 39 27 1 1 I
X RESET_B 42 -1950 -2000 100 R 39 27 1 1 I
X TSI0_CH10/SPI1_SIN/UART0_TX/FB_AD16/EWM_OUT_b/PTB17 52 1950 400 100 L 39 27 1 1 I
X PTC5/LLWU_P9/SPI0_SCK/LPTMR0_ALT2/I2S0_RXD0/FB_AD10/CMP0_OUT 62 -1950 -700 100 R 39 27 1 1 I
X PTC17/UART3_TX/FB_CS4_b/FB_TSIZ0/FB_BE31_24_b 72 -1950 -1500 100 R 39 27 1 1 I
X ADC0_DP0/ADC1_DP3/PGA0_DP 13 1950 -300 100 L 39 27 1 1 I
X XTAL32 23 -1950 -1700 100 R 39 27 1 1 I
X PTA13/LLWU_P4/CMP2_IN1/CAN0_RX/FTM1_CH1/I2S0_TX_FS/FTM1_QD_PHB 33 -1950 600 100 R 39 27 1 1 I
X LLWU_P5/ADC0_SE8/ADC1_SE8/TSI0_CH0/I2C0_SCL/FTM1_CH0/FTM1_QD_PHA/PTB0 43 1950 1100 100 L 39 27 1 1 I
X TSI0_CH11/CAN0_TX/FTM2_CH0/I2S0_TX_BCLK/FB_AD15/FTM2_QD_PHA/PTB18 53 1950 300 100 L 39 27 1 1 I
X PTC6/LLWU_P10/CMP0_IN0/SPI0_SOUT/PDB0_EXTRG/I2S0_RX_BCLK/FB_AD9/I2S0_MCLK 63 -1950 -800 100 R 39 27 1 1 I
X LLWU_P12/SPI0_PCS0/UART2_RTS_b/FB_ALE/FB_CS1_b/FB_TS_b/PTD0 73 1950 2000 100 L 39 27 1 1 I
X ADC0_DM0/ADC1_DM3/PGA0_DM 14 1950 -400 100 L 39 27 1 1 I
X EXTAL32 24 -1950 -1800 100 R 39 27 1 1 I
X PTA14/SPI0_PCS0/UART0_TX/I2S0_RX_BCLK/I2S0_TXD1 34 -1950 500 100 R 39 27 1 1 I
X ADC0_SE9/ADC1_SE9/TSI0_CH6/I2C0_SDA/FTM1_CH1/FTM1_QD_PHB/PTB1 44 1950 1000 100 L 39 27 1 1 I
X TSI0_CH12/CAN0_RX/FTM2_CH1/I2S0_TX_FS/FB_OE_b/FTM2_QD_PHB/PTB19 54 1950 200 100 L 39 27 1 1 I
X PTC7/CMP0_IN1/SPI0_SIN/USB_SOF_OUT/I2S0_RX_FS/FB_AD8 64 -1950 -900 100 R 39 27 1 1 I
X ADC0_SE5b/SPI0_SCK/UART2_CTS_b/FB_CS0_b/PTD1 74 1950 1900 100 L 39 27 1 1 I
X ADC1_DP0/ADC0_DP3/PGA1_DP 15 1950 -600 100 L 39 27 1 1 I
X VBAT 25 1950 -900 100 L 39 27 1 1 I
X PTA15/SPI0_SCK/UART0_RX/I2S0_RXD0 35 -1950 400 100 R 39 27 1 1 I
X ADC0_SE12/TSI0_CH7/I2C0_SCL/UART0_RTS_b/FTM0_FLT3/PTB2 45 1950 900 100 L 39 27 1 1 I
X PTC0/ADC0_SE14/TSI0_CH13/SPI0_PCS4/PDB0_EXTRG/FB_AD14/I2S0_TXD1 55 -1950 -200 100 R 39 27 1 1 I
X PTC8/ADC1_SE4b/CMP0_IN2/I2S0_MCLK/FB_AD7 65 -1950 -1000 100 R 39 27 1 1 I
X LLWU_P13/SPI0_SOUT/UART2_RX/FB_AD4/PTD2 75 1950 1800 100 L 39 27 1 1 I
X ADC1_DM0/ADC0_DM3/PGA1_DM 16 1950 -700 100 L 39 27 1 1 I
X PTA0/JTAG_TCLK/SWD_CLK/EZP_CLK/TSI0_CH1/UART0_CTS_b/UART0_COL_b/FTM0_CH5 26 -1950 1300 100 R 39 27 1 1 I
X PTA16/SPI0_SOUT/UART0_CTS_b/UART0_COL_b/I2S0_RX_FS/I2S0_RXD1 36 -1950 300 100 R 39 27 1 1 I
X ADC0_SE13/TSI0_CH8/I2C0_SDA/UART0_CTS_b/UART0_COL_b/FTM0_FLT0/PTB3 46 1950 800 100 L 39 27 1 1 I
X PTC1/LLWU_P6/ADC0_SE15/TSI0_CH14/SPI0_PCS3/UART1_RTS_b/FTM0_CH0/FB_AD13/I2S0_TXD0 56 -1950 -300 100 R 39 27 1 1 I
X PTC9/ADC1_SE5b/CMP0_IN3/I2S0_RX_BCLK/FB_AD6/FTM2_FLT0 66 -1950 -1100 100 R 39 27 1 1 I
X SPI0_SIN/UART2_TX/FB_AD3/PTD3 76 1950 1700 100 L 39 27 1 1 I
X VDDA 17 -300 2150 100 D 39 39 1 1 I
X PTA1/JTAG_TDI/EZP_DI/TSI0_CH2/UART0_RX/FTM0_CH6 27 -1950 1200 100 R 39 27 1 1 I
X PTA17/ADC1_SE17/SPI0_SIN/UART0_RTS_b/I2S0_MCLK 37 -1950 200 100 R 39 27 1 1 I
X ADC1_SE14/SPI1_PCS0/UART3_RX/FB_AD19/FTM0_FLT1/PTB10 47 1950 700 100 L 39 27 1 1 I
X PTC2/ADC0_SE4b/CMP1_IN0/TSI0_CH15/SPI0_PCS2/UART1_CTS_b/FTM0_CH1/FB_AD12/I2S0_TX_FS 57 -1950 -400 100 R 39 27 1 1 I
X PTC10/ADC1_SE6b/I2C1_SCL/I2S0_RX_FS/FB_AD5 67 -1950 -1200 100 R 39 27 1 1 I
X LLWU_P14/SPI0_PCS1/UART0_RTS_b/FTM0_CH4/FB_AD2/EWM_IN/PTD4 77 1950 1600 100 L 39 27 1 1 I
X VREFH 18 1950 -1100 100 L 39 27 1 1 I
X PTA2/JTAG_TDO/TRACE_SWO/EZP_DO/TSI0_CH3/UART0_TX/FTM0_CH7 28 -1950 1100 100 R 39 27 1 1 I
X VDD 38 200 2150 100 D 39 39 1 1 I
X ADC1_SE15/SPI1_SCK/UART3_TX/FB_AD18/FTM0_FLT2/PTB11 48 1950 600 100 L 39 27 1 1 I
X PTC3/LLWU_P7/CMP1_IN/SPI0_PCS1/UART1_RX/FTM0_CH2/CLKOUT/I2S0_TX_BCLK 58 -1950 -500 100 R 39 27 1 1 I
X PTC11/LLWU_P11/ADC1_SE7b/I2C1_SDA/I2S0_RXD1/FB_RW_b 68 -1950 -1300 100 R 39 27 1 1 I
X ADC0_SE6b/SPI0_PCS2/UART0_CTS__b/UART0_COL_b/FTM0_CH5/FB_AD1/EWM_OUT_b/PTD5 78 1950 1500 100 L 39 27 1 1 I
X VREFL 19 1950 -1200 100 L 39 27 1 1 I
X PTA3/JTAG_TMS/SWD_DIO/TSI0_CH4/UART0_RTS_b/FTM0_CH0 29 -1950 1000 100 R 39 27 1 1 I
X VSS 39 200 -2150 100 U 39 39 1 1 I
X VSS 49 100 -2150 100 U 39 39 1 1 I
X VSS 59 0 -2150 100 U 39 39 1 1 I
X VSS 69 -100 -2150 100 U 39 39 1 1 I
X LLWU_P15/ADC0_SE7b/SPI0_PCS3/UART0_RX/FTM0_CH6/FB_AD0/FTM0_FLT0/PTD6 79 1950 1400 100 L 39 27 1 1 I
ENDDRAW
ENDDEF
#
# P8X32A-DIP
#
DEF P8X32A-DIP U 0 40 Y Y 1 F N
F0 "U" 200 1150 60 H V C CNN
F1 "P8X32A-DIP" 400 1050 60 H V C CNN
DRAW
S -350 1000 350 -1000 0 1 0 N
X P0 1 -450 950 100 R 39 39 1 1 P
X P1 2 -450 850 100 R 39 39 1 1 P
X P2 3 -450 750 100 R 39 39 1 1 P
X P3 4 -450 650 100 R 39 39 1 1 P
X P4 5 -450 550 100 R 39 39 1 1 P
X P5 6 -450 450 100 R 39 39 1 1 P
X P6 7 -450 350 100 R 39 39 1 1 P
X P7 8 -450 250 100 R 39 39 1 1 P
X VSS 9 -50 -1100 100 U 39 39 1 1 P
X BOE 10 -450 -850 100 R 39 39 1 1 P I
X P15 20 -450 -650 100 R 39 39 1 1 P
X XI 30 450 -850 100 L 39 39 1 1 P
X P31 40 450 950 100 L 39 39 1 1 P
X RES 11 -450 -950 100 R 39 39 1 1 P I
X P16 21 450 -650 100 L 39 39 1 1 P
X XO 31 450 -950 100 L 39 39 1 1 P
X VDD 12 -50 1100 100 D 39 39 1 1 P
X P17 22 450 -550 100 L 39 39 1 1 P
X VDD 32 50 1100 100 D 39 39 1 1 P
X P8 13 -450 50 100 R 39 39 1 1 P
X P18 23 450 -450 100 L 39 39 1 1 P
X P24 33 450 250 100 L 39 39 1 1 P
X P9 14 -450 -50 100 R 39 39 1 1 P
X P19 24 450 -350 100 L 39 39 1 1 P
X P25 34 450 350 100 L 39 39 1 1 P
X P10 15 -450 -150 100 R 39 39 1 1 P
X P20 25 450 -250 100 L 39 39 1 1 P
X P26 35 450 450 100 L 39 39 1 1 P
X P11 16 -450 -250 100 R 39 39 1 1 P
X P21 26 450 -150 100 L 39 39 1 1 P
X P27 36 450 550 100 L 39 39 1 1 P
X P12 17 -450 -350 100 R 39 39 1 1 P
X P22 27 450 -50 100 L 39 39 1 1 P
X P28 37 450 650 100 L 39 39 1 1 P
X P13 18 -450 -450 100 R 39 39 1 1 P
X P23 28 450 50 100 L 39 39 1 1 P
X P29 38 450 750 100 L 39 39 1 1 P
X P14 19 -450 -550 100 R 39 39 1 1 P
X VSS 29 50 -1100 100 U 39 39 1 1 P
X P30 39 450 850 100 L 39 39 1 1 P
ENDDRAW
ENDDEF
#
# P8X32A-SMD
#
DEF P8X32A-SMD U 0 40 Y Y 1 F N
F0 "U" 300 1150 60 H V C CNN
F1 "P8X32A-SMD" 500 1050 60 H V C CNN
DRAW
S -400 1000 400 -1000 0 1 0 N
X P4 1 -500 550 100 R 39 39 1 1 P
X P5 2 -500 450 100 R 39 39 1 1 P
X P6 3 -500 350 100 R 39 39 1 1 P
X P7 4 -500 250 100 R 39 39 1 1 P
X VSS 5 -150 -1100 100 U 39 39 1 1 P
X BOE 6 -500 -850 100 R 39 39 1 1 P I
X RES 7 -500 -950 100 R 39 39 1 1 P I
X VDD 8 -150 1100 100 D 39 39 1 1 P
X P8 9 -500 50 100 R 39 39 1 1 P
X P9 10 -500 -50 100 R 39 39 1 1 P
X P17 20 500 -550 100 L 39 39 1 1 P
X VDD 30 50 1100 100 D 39 39 1 1 P
X VDD 40 150 1100 100 D 39 39 1 1 P
X P10 11 -500 -150 100 R 39 39 1 1 P
X P18 21 500 -450 100 L 39 39 1 1 P
X P24 31 500 250 100 L 39 39 1 1 P
X P0 41 -500 950 100 R 39 39 1 1 P
X P11 12 -500 -250 100 R 39 39 1 1 P
X P19 22 500 -350 100 L 39 39 1 1 P
X P25 32 500 350 100 L 39 39 1 1 P
X P1 42 -500 850 100 R 39 39 1 1 P
X P12 13 -500 -350 100 R 39 39 1 1 P
X P20 23 500 -250 100 L 39 39 1 1 P
X P26 33 500 450 100 L 39 39 1 1 P
X P2 43 -500 750 100 R 39 39 1 1 P
X P13 14 -500 -450 100 R 39 39 1 1 P
X P21 24 500 -150 100 L 39 39 1 1 P
X P27 34 500 550 100 L 39 39 1 1 P
X P3 44 -500 650 100 R 39 39 1 1 P
X P14 15 -500 -550 100 R 39 39 1 1 P
X P22 25 500 -50 100 L 39 39 1 1 P
X P28 35 500 650 100 L 39 39 1 1 P
X P15 16 -500 -650 100 R 39 39 1 1 P
X P23 26 500 50 100 L 39 39 1 1 P
X P29 36 500 750 100 L 39 39 1 1 P
X VSS 17 -50 -1100 100 U 39 39 1 1 P
X VSS 27 50 -1100 100 U 39 39 1 1 P
X P30 37 500 850 100 L 39 39 1 1 P
X VDD 18 -50 1100 100 D 39 39 1 1 P
X XI 28 500 -850 100 L 39 39 1 1 P
X P31 38 500 950 100 L 39 39 1 1 P
X P16 19 500 -650 100 L 39 39 1 1 P
X XO 29 500 -950 100 L 39 39 1 1 P
X VSS 39 150 -1100 100 U 39 39 1 1 P
ENDDRAW
ENDDEF
#
# PIC12F609
#
DEF PIC12F609 U 0 40 Y Y 1 F N
F0 "U" 0 550 60 H V C CNN
F1 "PIC12F609" 0 400 60 H V C CNN
DRAW
S 550 300 -500 -300 0 1 0 N
X VDD 1 -600 250 100 R 39 39 1 1 P
X GP5/T1CKI/OSC1/CLKIN 2 650 -250 100 L 39 39 1 1 B
X GP4/CIN1-/~T1G~/OSC2/CLKOUT 3 650 -150 100 L 39 39 1 1 B
X GP3/~MCLR~/VPP 4 650 -50 100 L 39 39 1 1 B
X GP2/T0CKI/INT/COUT 5 650 50 100 L 39 39 1 1 B
X GP1/CIN0-/ICSPCLK 6 650 150 100 L 39 39 1 1 B
X GP0/C1IN+/ICSPDAT 7 650 250 100 L 39 39 1 1 B
X VSS 8 -600 -250 100 R 39 39 1 1 P
ENDDRAW
ENDDEF
#
# PIC12F615
#
DEF PIC12F615 U 0 40 Y Y 1 F N
F0 "U" 0 550 60 H V C CNN
F1 "PIC12F615" 0 400 60 H V C CNN
DRAW
S -700 300 750 -300 0 1 0 N
X VDD 1 -800 250 100 R 39 39 1 1 P
X GP5/T1CKI/P1A*/OSC1/CLKIN 2 850 -250 100 L 39 39 1 1 B
X GP4/AN3/CIN1-/~T1G~/P1B*/OSC2/CLKOUT 3 850 -150 100 L 39 39 1 1 B
X GP3/~T1G*~/~MCLR~/VPP 4 850 -50 100 L 39 39 1 1 B
X GP2/AN2/T0CKI/INT/COUT/CCP1/P1A 5 850 50 100 L 39 39 1 1 B
X GP1/AN1/CIN0-/Vref/ICSPCLK 6 850 150 100 L 39 39 1 1 B
X GP0/AN0/C1IN+/P1B/ICSPDAT 7 850 250 100 L 39 39 1 1 B
X VSS 8 -800 -250 100 R 39 39 1 1 P
ENDDRAW
ENDDEF
#
# PIC12F617
#
DEF PIC12F617 U 0 40 Y Y 1 F N
F0 "U" 0 550 60 H V C CNN
F1 "PIC12F617" 0 400 60 H V C CNN
DRAW
S -700 300 750 -300 0 1 0 N
X VDD 1 -800 250 100 R 39 39 1 1 P
X GP5/T1CKI/P1A*/OSC1/CLKIN 2 850 -250 100 L 39 39 1 1 B
X GP4/AN3/CIN1-/~T1G~/P1B*/OSC2/CLKOUT 3 850 -150 100 L 39 39 1 1 B
X GP3/~T1G*~/~MCLR~/VPP 4 850 -50 100 L 39 39 1 1 B
X GP2/AN2/T0CKI/INT/COUT/CCP1/P1A 5 850 50 100 L 39 39 1 1 B
X GP1/AN1/CIN0-/Vref/ICSPCLK 6 850 150 100 L 39 39 1 1 B
X GP0/AN0/C1IN+/P1B/ICSPDAT 7 850 250 100 L 39 39 1 1 B
X VSS 8 -800 -250 100 R 39 39 1 1 P
ENDDRAW
ENDDEF
#
# PIC12F683
#
DEF PIC12F683 U 0 40 Y Y 1 F N
F0 "U" 0 550 60 H V C CNN
F1 "PIC12F683" 0 400 60 H V C CNN
DRAW
S 650 300 -600 -300 0 1 0 N
X VDD 1 -700 250 100 R 39 39 1 1 P
X GP5/T1CKI/OSC1/CLKIN 2 750 -250 100 L 39 39 1 1 B
X GP4/AN3/~T1G~/OSC2/CLKOUT 3 750 -150 100 L 39 39 1 1 B
X GP3/~MCLR~/VPP 4 750 -50 100 L 39 39 1 1 B
X GP2/AN2/T0CKI/INT/COUT/CCP1 5 750 50 100 L 39 39 1 1 B
X GP1/AN1/CIN-/Vref/ICSPCLK 6 750 150 100 L 39 39 1 1 B
X GP0/AN0/C1IN+/ICSPDAT/ULPWU 7 750 250 100 L 39 39 1 1 B
X VSS 8 -700 -250 100 R 39 39 1 1 P
ENDDRAW
ENDDEF
#
# PIC16F628A
#
DEF PIC16F628A U 0 40 Y Y 1 F N
F0 "U" 100 850 60 H V C CNN
F1 "PIC16F628A" 150 750 60 H V C CNN
DRAW
S 650 700 -400 -700 0 1 0 N
X RA2/AN2/VREF 1 750 -450 100 L 39 39 1 1 B
X RA3/AN3/CMP1 2 750 -350 100 L 39 39 1 1 B
X RA4/TOCKI/CMP2 3 750 -250 100 L 39 39 1 1 B
X ~MCLR~/RA5 4 -500 -200 100 R 39 39 1 1 I
X VSS 5 -500 -650 100 R 39 39 1 1 P
X RB0/INT 6 750 -50 100 L 39 39 1 1 B
X RB1/RX/DT 7 750 50 100 L 39 39 1 1 B
X RB2/TX/CK 8 750 150 100 L 39 39 1 1 B
X RB3/CCP1 9 750 250 100 L 39 39 1 1 B
X RB4/PGM 10 750 350 100 L 39 39 1 1 B
X RB5 11 750 450 100 L 39 39 1 1 B
X RB6/T1OSC0/T1CKI/PGC 12 750 550 100 L 39 39 1 1 B
X RB7/T1OSI/PGD 13 750 650 100 L 39 39 1 1 B
X VDD 14 -500 650 100 R 39 39 1 1 P
X OSC2/RA6 15 -500 150 100 R 39 39 1 1 O
X OSC1/RA7 16 -500 450 100 R 39 39 1 1 I
X RA0/AN0 17 750 -650 100 L 39 39 1 1 B
X RA1/AN1 18 750 -550 100 L 39 39 1 1 B
ENDDRAW
ENDDEF
#
# PIC16F874A-DIP
#
DEF PIC16F874A-DIP U 0 40 Y Y 1 F N
F0 "U" 150 1150 60 H V C CNN
F1 "PIC16F874A-DIP" 450 1050 60 H V C CNN
DRAW
S -650 1000 650 -1000 0 1 0 N
X ~MCLR~/VPP 1 -750 950 100 R 39 39 1 1 P
X RA0/AN0 2 -750 850 100 R 39 39 1 1 P
X RA1/AN1 3 -750 750 100 R 39 39 1 1 P
X RA2/AN2/VREF-/CVREF 4 -750 650 100 R 39 39 1 1 P
X RA3/AN3/VREF+ 5 -750 550 100 R 39 39 1 1 P
X RA4/T0CKI/C1OUT 6 -750 450 100 R 39 39 1 1 P
X RA5/AN4/~SS~/C2OUT 7 -750 350 100 R 39 39 1 1 P
X RE0/~RD~/AN5 8 -750 250 100 R 39 39 1 1 P
X RE1/~WR~/AN6 9 -750 150 100 R 39 39 1 1 P
X RE2/~CS~/AN7 10 -750 50 100 R 39 39 1 1 P
X RD1/PSP1 20 -750 -950 100 R 39 39 1 1 P
X RD7/PSP7 30 750 -50 100 L 39 39 1 1 P
X RB7/PGD 40 750 950 100 L 39 39 1 1 P
X VDD 11 -50 1100 100 D 39 39 1 1 P
X RD2/PSP2 21 750 -950 100 L 39 39 1 1 P
X VSS 31 50 -1100 100 U 39 39 1 1 P
X VSS 12 -50 -1100 100 U 39 39 1 1 P
X RD3/PSP3 22 750 -850 100 L 39 39 1 1 P
X VDD 32 50 1100 100 D 39 39 1 1 P
X OSC1/CLKI 13 -750 -250 100 R 39 39 1 1 P
X RC4/SDI/SDA 23 750 -750 100 L 39 39 1 1 P
X RB0/INT 33 750 250 100 L 39 39 1 1 P
X OSC2/CLKO 14 -750 -350 100 R 39 39 1 1 P
X RC5/SDO 24 750 -650 100 L 39 39 1 1 P
X RB1 34 750 350 100 L 39 39 1 1 P
X RC0/T1OS0/T1CKI 15 -750 -450 100 R 39 39 1 1 P
X RC6/TX/CK 25 750 -550 100 L 39 39 1 1 P
X RB2 35 750 450 100 L 39 39 1 1 P
X RC1/T1OSI/CCP2 16 -750 -550 100 R 39 39 1 1 P
X RC7/RX/DT 26 750 -450 100 L 39 39 1 1 P
X RB3/PGM 36 750 550 100 L 39 39 1 1 P
X RC2/CCP1 17 -750 -650 100 R 39 39 1 1 P
X RD4/PSP4 27 750 -350 100 L 39 39 1 1 P
X RB4 37 750 650 100 L 39 39 1 1 P
X RC3/SCK/SCL 18 -750 -750 100 R 39 39 1 1 P
X RD5/PSP5 28 750 -250 100 L 39 39 1 1 P
X RB5 38 750 750 100 L 39 39 1 1 P
X RD0/PSP0 19 -750 -850 100 R 39 39 1 1 P
X RD6/PSP6 29 750 -150 100 L 39 39 1 1 P
X RB6/PGC 39 750 850 100 L 39 39 1 1 P
ENDDRAW
ENDDEF
#
# PIC16F876A
#
DEF PIC16F876A U 0 40 Y Y 1 F N
F0 "U" 150 850 60 H V C CNN
F1 "PIC16F876A" 450 750 60 H V C CNN
DRAW
S -650 700 650 -700 0 1 0 N
X ~MCLR~/VPP 1 -750 650 100 R 39 39 1 1 P
X RA0/AN0 2 -750 550 100 R 39 39 1 1 P
X RA1/AN1 3 -750 450 100 R 39 39 1 1 P
X RA2/AN2/VREF-/CVREF 4 -750 350 100 R 39 39 1 1 P
X RA3/AN3/VREF+ 5 -750 250 100 R 39 39 1 1 P
X RA4/T0CKI/C1OUT 6 -750 150 100 R 39 39 1 1 P
X RA5/AN4/~SS~/C2OUT 7 -750 50 100 R 39 39 1 1 P
X VSS 8 50 -800 100 U 39 39 1 1 P
X OSC1/CLKI 9 -750 -150 100 R 39 39 1 1 P
X OSC2/CLKO 10 -750 -250 100 R 39 39 1 1 P
X VDD 20 0 800 100 D 39 39 1 1 P
X RC0/T1OS0/T1CKI 11 -750 -350 100 R 39 39 1 1 P
X RB0/INT 21 750 -50 100 L 39 39 1 1 P
X RC1/T1OSI/CCP2 12 -750 -450 100 R 39 39 1 1 P
X RB1 22 750 50 100 L 39 39 1 1 P
X RC2/CCP1 13 -750 -550 100 R 39 39 1 1 P
X RB2 23 750 150 100 L 39 39 1 1 P
X RC3/SCK/SCL 14 -750 -650 100 R 39 39 1 1 P
X RB3/PGM 24 750 250 100 L 39 39 1 1 P
X RC4/SDI/SDA 15 750 -650 100 L 39 39 1 1 P
X RB4 25 750 350 100 L 39 39 1 1 P
X RC5/SDO 16 750 -550 100 L 39 39 1 1 P
X RB5 26 750 450 100 L 39 39 1 1 P
X RC6/TX/CK 17 750 -450 100 L 39 39 1 1 P
X RB6/PGC 27 750 550 100 L 39 39 1 1 P
X RC7/RX/DT 18 750 -350 100 L 39 39 1 1 P
X RB7/PGD 28 750 650 100 L 39 39 1 1 P
X VSS 19 -50 -800 100 U 39 39 1 1 P
ENDDRAW
ENDDEF
#
# PIC16F877A
#
DEF PIC16F877A U 0 40 Y Y 1 F N
F0 "U" 150 1150 60 H V C CNN
F1 "PIC16F877A" 450 1050 60 H V C CNN
DRAW
S -650 1000 650 -1000 0 1 0 N
X ~MCLR~/VPP 1 -750 950 100 R 39 39 1 1 P
X RA0/AN0 2 -750 850 100 R 39 39 1 1 P
X RA1/AN1 3 -750 750 100 R 39 39 1 1 P
X RA2/AN2/VREF-/CVREF 4 -750 650 100 R 39 39 1 1 P
X RA3/AN3/VREF+ 5 -750 550 100 R 39 39 1 1 P
X RA4/T0CKI/C1OUT 6 -750 450 100 R 39 39 1 1 P
X RA5/AN4/~SS~/C2OUT 7 -750 350 100 R 39 39 1 1 P
X RE0/~RD~/AN5 8 -750 250 100 R 39 39 1 1 P
X RE1/~WR~/AN6 9 -750 150 100 R 39 39 1 1 P
X RE2/~CS~/AN7 10 -750 50 100 R 39 39 1 1 P
X RD1/PSP1 20 -750 -950 100 R 39 39 1 1 P
X RD7/PSP7 30 750 -50 100 L 39 39 1 1 P
X RB7/PGD 40 750 950 100 L 39 39 1 1 P
X VDD 11 -50 1100 100 D 39 39 1 1 P
X RD2/PSP2 21 750 -950 100 L 39 39 1 1 P
X VSS 31 50 -1100 100 U 39 39 1 1 P
X VSS 12 -50 -1100 100 U 39 39 1 1 P
X RD3/PSP3 22 750 -850 100 L 39 39 1 1 P
X VDD 32 50 1100 100 D 39 39 1 1 P
X OSC1/CLKI 13 -750 -250 100 R 39 39 1 1 P
X RC4/SDI/SDA 23 750 -750 100 L 39 39 1 1 P
X RB0/INT 33 750 250 100 L 39 39 1 1 P
X OSC2/CLKO 14 -750 -350 100 R 39 39 1 1 P
X RC5/SDO 24 750 -650 100 L 39 39 1 1 P
X RB1 34 750 350 100 L 39 39 1 1 P
X RC0/T1OS0/T1CKI 15 -750 -450 100 R 39 39 1 1 P
X RC6/TX/CK 25 750 -550 100 L 39 39 1 1 P
X RB2 35 750 450 100 L 39 39 1 1 P
X RC1/T1OSI/CCP2 16 -750 -550 100 R 39 39 1 1 P
X RC7/RX/DT 26 750 -450 100 L 39 39 1 1 P
X RB3/PGM 36 750 550 100 L 39 39 1 1 P
X RC2/CCP1 17 -750 -650 100 R 39 39 1 1 P
X RD4/PSP4 27 750 -350 100 L 39 39 1 1 P
X RB4 37 750 650 100 L 39 39 1 1 P
X RC3/SCK/SCL 18 -750 -750 100 R 39 39 1 1 P
X RD5/PSP5 28 750 -250 100 L 39 39 1 1 P
X RB5 38 750 750 100 L 39 39 1 1 P
X RD0/PSP0 19 -750 -850 100 R 39 39 1 1 P
X RD6/PSP6 29 750 -150 100 L 39 39 1 1 P
X RB6/PGC 39 750 850 100 L 39 39 1 1 P
ENDDRAW
ENDDEF
#
# PIC16F877A-DIP
#
DEF PIC16F877A-DIP U 0 40 Y Y 1 F N
F0 "U" 150 1150 60 H V C CNN
F1 "PIC16F877A-DIP" 450 1050 60 H V C CNN
DRAW
S -650 1000 650 -1000 0 1 0 N
X ~MCLR~/VPP 1 -750 950 100 R 39 39 1 1 P
X RA0/AN0 2 -750 850 100 R 39 39 1 1 P
X RA1/AN1 3 -750 750 100 R 39 39 1 1 P
X RA2/AN2/VREF-/CVREF 4 -750 650 100 R 39 39 1 1 P
X RA3/AN3/VREF+ 5 -750 550 100 R 39 39 1 1 P
X RA4/T0CKI/C1OUT 6 -750 450 100 R 39 39 1 1 P
X RA5/AN4/~SS~/C2OUT 7 -750 350 100 R 39 39 1 1 P
X RE0/~RD~/AN5 8 -750 250 100 R 39 39 1 1 P
X RE1/~WR~/AN6 9 -750 150 100 R 39 39 1 1 P
X RE2/~CS~/AN7 10 -750 50 100 R 39 39 1 1 P
X RD1/PSP1 20 -750 -950 100 R 39 39 1 1 P
X RD7/PSP7 30 750 -50 100 L 39 39 1 1 P
X RB7/PGD 40 750 950 100 L 39 39 1 1 P
X VDD 11 -50 1100 100 D 39 39 1 1 P
X RD2/PSP2 21 750 -950 100 L 39 39 1 1 P
X VSS 31 50 -1100 100 U 39 39 1 1 P
X VSS 12 -50 -1100 100 U 39 39 1 1 P
X RD3/PSP3 22 750 -850 100 L 39 39 1 1 P
X VDD 32 50 1100 100 D 39 39 1 1 P
X OSC1/CLKI 13 -750 -250 100 R 39 39 1 1 P
X RC4/SDI/SDA 23 750 -750 100 L 39 39 1 1 P
X RB0/INT 33 750 250 100 L 39 39 1 1 P
X OSC2/CLKO 14 -750 -350 100 R 39 39 1 1 P
X RC5/SDO 24 750 -650 100 L 39 39 1 1 P
X RB1 34 750 350 100 L 39 39 1 1 P
X RC0/T1OS0/T1CKI 15 -750 -450 100 R 39 39 1 1 P
X RC6/TX/CK 25 750 -550 100 L 39 39 1 1 P
X RB2 35 750 450 100 L 39 39 1 1 P
X RC1/T1OSI/CCP2 16 -750 -550 100 R 39 39 1 1 P
X RC7/RX/DT 26 750 -450 100 L 39 39 1 1 P
X RB3/PGM 36 750 550 100 L 39 39 1 1 P
X RC2/CCP1 17 -750 -650 100 R 39 39 1 1 P
X RD4/PSP4 27 750 -350 100 L 39 39 1 1 P
X RB4 37 750 650 100 L 39 39 1 1 P
X RC3/SCK/SCL 18 -750 -750 100 R 39 39 1 1 P
X RD5/PSP5 28 750 -250 100 L 39 39 1 1 P
X RB5 38 750 750 100 L 39 39 1 1 P
X RD0/PSP0 19 -750 -850 100 R 39 39 1 1 P
X RD6/PSP6 29 750 -150 100 L 39 39 1 1 P
X RB6/PGC 39 750 850 100 L 39 39 1 1 P
ENDDRAW
ENDDEF
#
# PIC16F88-DIP
#
DEF PIC16F88-DIP U 0 40 Y Y 1 F N
F0 "U" -50 850 60 H V C CNN
F1 "PIC16F88-DIP" 0 750 60 H V C CNN
DRAW
S 500 700 -500 -700 0 1 0 N
X RA2/AN2/CVREF/VREF- 1 600 -450 100 L 39 31 1 1 B
X RA3/AN3/VREF+/C1OUT 2 600 -350 100 L 39 31 1 1 B
X RA4/AN4/TOCKI/C2OUT 3 600 -250 100 L 39 31 1 1 B
X ~MCLR~/RA5/VPP 4 -600 -200 100 R 39 30 1 1 I
X VSS 5 -600 -650 100 R 39 39 1 1 P
X RB0/INT/CCP1 6 600 -50 100 L 39 31 1 1 B
X RB1/SDI/SDA 7 600 50 100 L 39 31 1 1 B
X RB2/SDO/RX/DT 8 600 150 100 L 39 31 1 1 B
X RB3/PGM/CCP1 9 600 250 100 L 39 31 1 1 B
X RB4/SCK/SCL 10 600 350 100 L 39 31 1 1 B
X RB5/~SS~/TX/CK 11 600 450 100 L 39 30 1 1 B
X RB6/AN5/PGC/T1OSO/T1CKI 12 600 550 100 L 39 31 1 1 B
X RB7/AN6/PGD/T1OSI 13 600 650 100 L 39 31 1 1 B
X VDD 14 -600 650 100 R 39 39 1 1 P
X RA6/OSC2/CLKO 15 -600 150 100 R 39 31 1 1 O
X RA7/OSC1/CLKO 16 -600 450 100 R 39 31 1 1 I
X RA0/AN0 17 600 -650 100 L 39 31 1 1 B
X RA1/AN1 18 600 -550 100 L 39 31 1 1 B
ENDDRAW
ENDDEF
#
# PIC16F88-SSOP
#
DEF PIC16F88-SSOP U 0 40 Y Y 1 F N
F0 "U" -50 850 60 H V C CNN
F1 "PIC16F88-SSOP" 0 750 60 H V C CNN
DRAW
S 500 700 -500 -700 0 1 0 N
X RA2/AN2/CVREF/VREF- 1 600 -450 100 L 39 31 1 1 B
X RA3/AN3/VREF+/C1OUT 2 600 -350 100 L 39 31 1 1 B
X RA4/AN4/TOCKI/C2OUT 3 600 -250 100 L 39 31 1 1 B
X ~MCLR~/RA5/VPP 4 -600 -200 100 R 39 30 1 1 I
X VSS 5 -600 -550 100 R 39 39 1 1 P
X AVSS 6 -600 -650 100 R 39 39 1 1 B
X RB0/INT/CCP1 7 600 -50 100 L 39 31 1 1 B
X RB1/SDI/SDA 8 600 50 100 L 39 31 1 1 B
X RB2/SDO/RX/DT 9 600 150 100 L 39 31 1 1 B
X RB3/PGM/CCP1 10 600 250 100 L 39 31 1 1 B
X RA1/AN1 20 600 -550 100 L 39 31 1 1 B
X RB4/SCK/SCL 11 600 350 100 L 39 31 1 1 B
X RB5/~SS~/TX/CK 12 600 450 100 L 39 30 1 1 B
X RB6/AN5/PGC/T1OSO/T1CKI 13 600 550 100 L 39 31 1 1 B
X RB7/AN6/PGD/T1OSI 14 600 650 100 L 39 31 1 1 B
X AVDD 15 -600 550 100 R 39 39 1 1 P
X VDD 16 -600 650 100 R 39 39 1 1 P
X RA6/OSC2/CLKO 17 -600 150 100 R 39 31 1 1 O
X RA7/OSC1/CLKO 18 -600 450 100 R 39 31 1 1 I
X RA0/AN0 19 600 -650 100 L 39 31 1 1 B
ENDDRAW
ENDDEF
#
# PIC16F884-DIP
#
DEF PIC16F884-DIP U 0 40 Y Y 1 F N
F0 "U" 150 1150 60 H V C CNN
F1 "PIC16F884-DIP" 450 1050 60 H V C CNN
DRAW
S -850 1000 850 -1000 0 1 0 N
X RE3/~MCLR~/VPP 1 -950 950 100 R 39 39 1 1 P
X RA0/AN0/ULPWU/C12IN0- 2 -950 850 100 R 39 39 1 1 P
X RA1/AN1/C12IN1- 3 -950 750 100 R 39 39 1 1 P
X RA2/AN2/VREF-/CVREF/C2IN+ 4 -950 650 100 R 39 39 1 1 P
X RA3/AN3/VREF+/C1IN+ 5 -950 550 100 R 39 39 1 1 P
X RA4/T0CKI/C1OUT 6 -950 450 100 R 39 39 1 1 P
X RA5/AN4/~SS~/C2OUT 7 -950 350 100 R 39 39 1 1 P
X RE0/AN5 8 -950 250 100 R 39 39 1 1 P
X RE1/AN6 9 -950 150 100 R 39 39 1 1 P
X RE2/AN7 10 -950 50 100 R 39 39 1 1 P
X RD1 20 -950 -950 100 R 39 39 1 1 P
X RD7/P1D 30 950 -50 100 L 39 39 1 1 P
X RB7/ICSPDAT 40 950 950 100 L 39 39 1 1 P
X VDD 11 -50 1100 100 D 39 39 1 1 P
X RD2 21 950 -950 100 L 39 39 1 1 P
X VSS 31 50 -1100 100 U 39 39 1 1 P
X VSS 12 -50 -1100 100 U 39 39 1 1 P
X RD3 22 950 -850 100 L 39 39 1 1 P
X VDD 32 50 1100 100 D 39 39 1 1 P
X RA7/OSC1/CLKIN 13 -950 -250 100 R 39 39 1 1 P
X RC4/SDI/SDA 23 950 -750 100 L 39 39 1 1 P
X RB0/AN12/INT 33 950 250 100 L 39 39 1 1 P
X RA6/OSC2/CLKOUT 14 -950 -350 100 R 39 39 1 1 P
X RC5/SDO 24 950 -650 100 L 39 39 1 1 P
X RB1/AN10/C12IN3- 34 950 350 100 L 39 39 1 1 P
X RC0/T1OS0/T1CKI 15 -950 -450 100 R 39 39 1 1 P
X RC6/TX/CK 25 950 -550 100 L 39 39 1 1 P
X RB2/AN8 35 950 450 100 L 39 39 1 1 P
X RC1/T1OSI/CCP2 16 -950 -550 100 R 39 39 1 1 P
X RC7/RX/DT 26 950 -450 100 L 39 39 1 1 P
X RB3/AN9/PGM/C12IN2- 36 950 550 100 L 39 39 1 1 P
X RC2/P1A/CCP1 17 -950 -650 100 R 39 39 1 1 P
X RD4 27 950 -350 100 L 39 39 1 1 P
X RB4/AN11 37 950 650 100 L 39 39 1 1 P
X RC3/SCK/SCL 18 -950 -750 100 R 39 39 1 1 P
X RD5/P1B 28 950 -250 100 L 39 39 1 1 P
X RB5/AN13/~T1G 38 950 750 100 L 39 39 1 1 P
X RD0 19 -950 -850 100 R 39 39 1 1 P
X RD6/P1C 29 950 -150 100 L 39 39 1 1 P
X RB6/ICSPCLK 39 950 850 100 L 39 39 1 1 P
ENDDRAW
ENDDEF
#
# PIC16F887-DIP
#
DEF PIC16F887-DIP U 0 40 Y Y 1 F N
F0 "U" 150 1150 60 H V C CNN
F1 "PIC16F887-DIP" 450 1050 60 H V C CNN
DRAW
S -850 1000 850 -1000 0 1 0 N
X RE3/~MCLR~/VPP 1 -950 950 100 R 39 39 1 1 P
X RA0/AN0/ULPWU/C12IN0- 2 -950 850 100 R 39 39 1 1 P
X RA1/AN1/C12IN1- 3 -950 750 100 R 39 39 1 1 P
X RA2/AN2/VREF-/CVREF/C2IN+ 4 -950 650 100 R 39 39 1 1 P
X RA3/AN3/VREF+/C1IN+ 5 -950 550 100 R 39 39 1 1 P
X RA4/T0CKI/C1OUT 6 -950 450 100 R 39 39 1 1 P
X RA5/AN4/~SS~/C2OUT 7 -950 350 100 R 39 39 1 1 P
X RE0/AN5 8 -950 250 100 R 39 39 1 1 P
X RE1/AN6 9 -950 150 100 R 39 39 1 1 P
X RE2/AN7 10 -950 50 100 R 39 39 1 1 P
X RD1 20 -950 -950 100 R 39 39 1 1 P
X RD7/P1D 30 950 -50 100 L 39 39 1 1 P
X RB7/ICSPDAT 40 950 950 100 L 39 39 1 1 P
X VDD 11 -50 1100 100 D 39 39 1 1 P
X RD2 21 950 -950 100 L 39 39 1 1 P
X VSS 31 50 -1100 100 U 39 39 1 1 P
X VSS 12 -50 -1100 100 U 39 39 1 1 P
X RD3 22 950 -850 100 L 39 39 1 1 P
X VDD 32 50 1100 100 D 39 39 1 1 P
X RA7/OSC1/CLKIN 13 -950 -250 100 R 39 39 1 1 P
X RC4/SDI/SDA 23 950 -750 100 L 39 39 1 1 P
X RB0/AN12/INT 33 950 250 100 L 39 39 1 1 P
X RA6/OSC2/CLKOUT 14 -950 -350 100 R 39 39 1 1 P
X RC5/SDO 24 950 -650 100 L 39 39 1 1 P
X RB1/AN10/C12IN3- 34 950 350 100 L 39 39 1 1 P
X RC0/T1OS0/T1CKI 15 -950 -450 100 R 39 39 1 1 P
X RC6/TX/CK 25 950 -550 100 L 39 39 1 1 P
X RB2/AN8 35 950 450 100 L 39 39 1 1 P
X RC1/T1OSI/CCP2 16 -950 -550 100 R 39 39 1 1 P
X RC7/RX/DT 26 950 -450 100 L 39 39 1 1 P
X RB3/AN9/PGM/C12IN2- 36 950 550 100 L 39 39 1 1 P
X RC2/P1A/CCP1 17 -950 -650 100 R 39 39 1 1 P
X RD4 27 950 -350 100 L 39 39 1 1 P
X RB4/AN11 37 950 650 100 L 39 39 1 1 P
X RC3/SCK/SCL 18 -950 -750 100 R 39 39 1 1 P
X RD5/P1B 28 950 -250 100 L 39 39 1 1 P
X RB5/AN13/~T1G 38 950 750 100 L 39 39 1 1 P
X RD0 19 -950 -850 100 R 39 39 1 1 P
X RD6/P1C 29 950 -150 100 L 39 39 1 1 P
X RB6/ICSPCLK 39 950 850 100 L 39 39 1 1 P
ENDDRAW
ENDDEF
#
# PIC18F242
#
DEF PIC18F242 U 0 40 Y Y 1 F N
F0 "U" 150 850 60 H V C CNN
F1 "PIC18F242" 450 750 60 H V C CNN
DRAW
S -650 700 650 -600 0 1 0 N
X ~MCLR~/VPP 1 -750 650 100 R 39 39 1 1 P
X RA0/AN0 2 -750 550 100 R 39 39 1 1 P
X RA1/AN1 3 -750 450 100 R 39 39 1 1 P
X RA2/AN2/VREF- 4 -750 350 100 R 39 39 1 1 P
X RA3/AN3/VREF+ 5 -750 250 100 R 39 39 1 1 P
X RA4/T0CKI 6 -750 150 100 R 39 39 1 1 P
X RA5/AN4/~SS~/LVDIN 7 -750 50 100 R 39 39 1 1 P
X VSS 8 50 -700 100 U 39 39 1 1 P
X OSC1/CLKI 9 -750 -50 100 R 39 39 1 1 P
X OSC2/CLKO/RA6 10 -750 -150 100 R 39 39 1 1 P
X VDD 20 0 800 100 D 39 39 1 1 P
X RC0/T1OS0/T1CKI 11 -750 -250 100 R 39 39 1 1 P
X RB0/INT0 21 750 -150 100 L 39 39 1 1 P
X RC1/T1OSI/CCP2* 12 -750 -350 100 R 39 39 1 1 P
X RB1/INT1 22 750 -50 100 L 39 39 1 1 P
X RC2/CCP1 13 -750 -450 100 R 39 39 1 1 P
X RB2/INT2 23 750 150 100 L 39 39 1 1 P
X RC3/SCK/SCL 14 -750 -550 100 R 39 39 1 1 P
X RB3/CCP2* 24 750 250 100 L 39 39 1 1 P
X RC4/SDI/SDA 15 750 -550 100 L 39 39 1 1 P
X RB4 25 750 350 100 L 39 39 1 1 P
X RC5/SDO 16 750 -450 100 L 39 39 1 1 P
X RB5/PGM 26 750 450 100 L 39 39 1 1 P
X RC6/TX/CK 17 750 -350 100 L 39 39 1 1 P
X RB6/PGC 27 750 550 100 L 39 39 1 1 P
X RC7/RX/DT 18 750 -250 100 L 39 39 1 1 P
X RB7/PGD 28 750 650 100 L 39 39 1 1 P
X VSS 19 -50 -700 100 U 39 39 1 1 P
ENDDRAW
ENDDEF
#
# PIC18F2480
#
DEF PIC18F2480 U 0 40 Y Y 1 F N
F0 "U" 150 850 60 H V C CNN
F1 "PIC18F2480" 450 750 60 H V C CNN
DRAW
S -650 700 650 -600 0 1 0 N
X ~MCLR~/VPP/RE3 1 -750 650 100 R 39 39 1 1 P
X RA0/AN0 2 -750 550 100 R 39 39 1 1 P
X RA1/AN1 3 -750 450 100 R 39 39 1 1 P
X RA2/AN2/VREF- 4 -750 350 100 R 39 39 1 1 P
X RA3/AN3/VREF+ 5 -750 250 100 R 39 39 1 1 P
X RA4/T0CKI 6 -750 150 100 R 39 39 1 1 P
X RA5/AN4/~SS~/HLVDIN 7 -750 50 100 R 39 39 1 1 P
X VSS 8 50 -700 100 U 39 39 1 1 P
X OSC1/CLKI/RA7 9 -750 -50 100 R 39 39 1 1 P
X OSC2/CLKO/RA6 10 -750 -150 100 R 39 39 1 1 P
X VDD 20 0 800 100 D 39 39 1 1 P
X RC0/T1OS0/T13CKI 11 -750 -250 100 R 39 39 1 1 P
X RB0/INT0/AN10 21 750 -150 100 L 39 39 1 1 P
X RC1/T1OSI 12 -750 -350 100 R 39 39 1 1 P
X RB1/INT1/AN8 22 750 -50 100 L 39 39 1 1 P
X RC2/CCP1 13 -750 -450 100 R 39 39 1 1 P
X RB2/INT2/CANTX 23 750 150 100 L 39 39 1 1 P
X RC3/SCK/SCL 14 -750 -550 100 R 39 39 1 1 P
X RB3/CANRX 24 750 250 100 L 39 39 1 1 P
X RC4/SDI/SDA 15 750 -550 100 L 39 39 1 1 P
X RB4/KBI0/AN9 25 750 350 100 L 39 39 1 1 P
X RC5/SDO 16 750 -450 100 L 39 39 1 1 P
X RB5/KBI1/PGM 26 750 450 100 L 39 39 1 1 P
X RC6/TX/CK 17 750 -350 100 L 39 39 1 1 P
X RB6/KBI2/PGC 27 750 550 100 L 39 39 1 1 P
X RC7/RX/DT 18 750 -250 100 L 39 39 1 1 P
X RB7/KBI3/PGD 28 750 650 100 L 39 39 1 1 P
X VSS 19 -50 -700 100 U 39 39 1 1 P
ENDDRAW
ENDDEF
#
# PIC18F252
#
DEF PIC18F252 U 0 40 Y Y 1 F N
F0 "U" 150 850 60 H V C CNN
F1 "PIC18F252" 450 750 60 H V C CNN
DRAW
S -650 700 650 -600 0 1 0 N
X ~MCLR~/VPP 1 -750 650 100 R 39 39 1 1 P
X RA0/AN0 2 -750 550 100 R 39 39 1 1 P
X RA1/AN1 3 -750 450 100 R 39 39 1 1 P
X RA2/AN2/VREF- 4 -750 350 100 R 39 39 1 1 P
X RA3/AN3/VREF+ 5 -750 250 100 R 39 39 1 1 P
X RA4/T0CKI 6 -750 150 100 R 39 39 1 1 P
X RA5/AN4/~SS~/LVDIN 7 -750 50 100 R 39 39 1 1 P
X VSS 8 50 -700 100 U 39 39 1 1 P
X OSC1/CLKI 9 -750 -50 100 R 39 39 1 1 P
X OSC2/CLKO/RA6 10 -750 -150 100 R 39 39 1 1 P
X VDD 20 0 800 100 D 39 39 1 1 P
X RC0/T1OS0/T1CKI 11 -750 -250 100 R 39 39 1 1 P
X RB0/INT0 21 750 -150 100 L 39 39 1 1 P
X RC1/T1OSI/CCP2* 12 -750 -350 100 R 39 39 1 1 P
X RB1/INT1 22 750 -50 100 L 39 39 1 1 P
X RC2/CCP1 13 -750 -450 100 R 39 39 1 1 P
X RB2/INT2 23 750 150 100 L 39 39 1 1 P
X RC3/SCK/SCL 14 -750 -550 100 R 39 39 1 1 P
X RB3/CCP2* 24 750 250 100 L 39 39 1 1 P
X RC4/SDI/SDA 15 750 -550 100 L 39 39 1 1 P
X RB4 25 750 350 100 L 39 39 1 1 P
X RC5/SDO 16 750 -450 100 L 39 39 1 1 P
X RB5/PGM 26 750 450 100 L 39 39 1 1 P
X RC6/TX/CK 17 750 -350 100 L 39 39 1 1 P
X RB6/PGC 27 750 550 100 L 39 39 1 1 P
X RC7/RX/DT 18 750 -250 100 L 39 39 1 1 P
X RB7/PGD 28 750 650 100 L 39 39 1 1 P
X VSS 19 -50 -700 100 U 39 39 1 1 P
ENDDRAW
ENDDEF
#
# PIC18F4585-DIP
#
DEF PIC18F4585-DIP U 0 40 Y Y 1 F N
F0 "U" 150 1150 60 H V C CNN
F1 "PIC18F4585-DIP" 450 1050 60 H V C CNN
DRAW
S -650 1000 650 -1000 0 1 0 N
X ~MCLR~/VPP/RE3 1 -750 950 100 R 39 39 1 1 P
X RA0/AN0/CVREF 2 -750 850 100 R 39 39 1 1 P
X RA1/AN1 3 -750 750 100 R 39 39 1 1 P
X RA2/AN2/VREF- 4 -750 650 100 R 39 39 1 1 P
X RA3/AN3/VREF+ 5 -750 550 100 R 39 39 1 1 P
X RA4/T0CKI 6 -750 450 100 R 39 39 1 1 P
X RA5/AN4/~SS~/HLVDIN 7 -750 350 100 R 39 39 1 1 P
X RE0/~RD~/AN5 8 -750 250 100 R 39 39 1 1 P
X RE1/~WR~/AN6/C1OUT 9 -750 150 100 R 39 39 1 1 P
X RE2/~CS~/AN7/C2OUT 10 -750 50 100 R 39 39 1 1 P
X RD1/PSP1/C1IN- 20 -750 -950 100 R 39 39 1 1 P
X RD7/PSP7/P1D 30 750 -50 100 L 39 39 1 1 P
X RB7/KBI3/PGD 40 750 950 100 L 39 39 1 1 P
X VDD 11 -50 1100 100 D 39 39 1 1 P
X RD2/PSP2/C2IN+ 21 750 -950 100 L 39 39 1 1 P
X VSS 31 50 -1100 100 U 39 39 1 1 P
X VSS 12 -50 -1100 100 U 39 39 1 1 P
X RD3/PSP3/C2IN- 22 750 -850 100 L 39 39 1 1 P
X VDD 32 50 1100 100 D 39 39 1 1 P
X OSC1/CLKI/RA7 13 -750 -250 100 R 39 39 1 1 P
X RC4/SDI/SDA 23 750 -750 100 L 39 39 1 1 P
X RB0/INT0/FLT0/AN10 33 750 250 100 L 39 39 1 1 P
X OSC2/CLKO/RA6 14 -750 -350 100 R 39 39 1 1 P
X RC5/SDO 24 750 -650 100 L 39 39 1 1 P
X RB1/INT1/AN8 34 750 350 100 L 39 39 1 1 P
X RC0/T1OS0/T13CKI 15 -750 -450 100 R 39 39 1 1 P
X RC6/TX/CK 25 750 -550 100 L 39 39 1 1 P
X RB2/INT2/CANTX 35 750 450 100 L 39 39 1 1 P
X RC1/T1OSI 16 -750 -550 100 R 39 39 1 1 P
X RC7/RX/DT 26 750 -450 100 L 39 39 1 1 P
X RB3/CANRX 36 750 550 100 L 39 39 1 1 P
X RC2/CCP1 17 -750 -650 100 R 39 39 1 1 P
X RD4/PSP4/ECCP1/P1A 27 750 -350 100 L 39 39 1 1 P
X RB4/KBI0/AN9 37 750 650 100 L 39 39 1 1 P
X RC3/SCK/SCL 18 -750 -750 100 R 39 39 1 1 P
X RD5/PSP5/P1B 28 750 -250 100 L 39 39 1 1 P
X RB5/KBI1/PGM 38 750 750 100 L 39 39 1 1 P
X RD0/PSP0/C1IN+ 19 -750 -850 100 R 39 39 1 1 P
X RD6/PSP6/P1C 29 750 -150 100 L 39 39 1 1 P
X RB6/KBI2/PGC 39 750 850 100 L 39 39 1 1 P
ENDDRAW
ENDDEF
#
# PIC18F4620
#
DEF PIC18F4620 U 0 40 Y Y 1 F N
F0 "U" 150 1150 60 H V C CNN
F1 "PIC18F4620" 450 1050 60 H V C CNN
DRAW
S -650 1000 650 -1000 0 1 0 N
X ~MCLR~/VPP/RE3 1 -750 950 100 R 39 27 1 1 P
X RA0/AN0 2 -750 850 100 R 39 28 1 1 P
X RA1/AN1 3 -750 750 100 R 39 28 1 1 P
X RA2/AN2/VREF-/CVREF 4 -750 650 100 R 39 28 1 1 P
X RA3/AN3/VREF+ 5 -750 550 100 R 39 28 1 1 P
X RA4/T0CKI/C1OUT 6 -750 450 100 R 39 28 1 1 P
X RA5/AN4/~SS~/HLVDIN/C2OUT 7 -750 350 100 R 39 27 1 1 P
X RE0/~RD~/AN5 8 -750 250 100 R 39 27 1 1 P
X RE1/~WR~/AN6 9 -750 150 100 R 39 27 1 1 P
X RE2/~CS~/AN7 10 -750 50 100 R 39 27 1 1 P
X RD1/PSP1 20 -750 -950 100 R 39 28 1 1 P
X RD7/PSP7/P1D 30 750 -50 100 L 39 28 1 1 P
X RB7/KBI3/PGD 40 750 950 100 L 39 28 1 1 P
X VDD 11 -50 1100 100 D 39 39 1 1 P
X RD2/PSP2 21 750 -950 100 L 39 28 1 1 P
X VSS 31 50 -1100 100 U 39 39 1 1 P
X VSS 12 -50 -1100 100 U 39 39 1 1 P
X RD3/PSP3 22 750 -850 100 L 39 28 1 1 P
X VDD 32 50 1100 100 D 39 39 1 1 P
X OSC1/CLKI/RA7 13 -750 -250 100 R 39 28 1 1 P
X RC4/SDI/SDA 23 750 -750 100 L 39 28 1 1 P
X RB0/INT0/FLT0/AN12 33 750 250 100 L 39 28 1 1 P
X OSC2/CLKO/RA6 14 -750 -350 100 R 39 28 1 1 P
X RC5/SDO 24 750 -650 100 L 39 28 1 1 P
X RB1/INT1/AN10 34 750 350 100 L 39 28 1 1 P
X RC0/T1OS0/T13CKI 15 -750 -450 100 R 39 28 1 1 P
X RC6/TX/CK 25 750 -550 100 L 39 28 1 1 P
X RB2/INT2/AN8 35 750 450 100 L 39 28 1 1 P
X RC1/T1OSI/CCP2 16 -750 -550 100 R 39 28 1 1 P
X RC7/RX/DT 26 750 -450 100 L 39 28 1 1 P
X RB3/AN9/CCP2 36 750 550 100 L 39 28 1 1 P
X RC2/CCP1/P1A 17 -750 -650 100 R 39 28 1 1 P
X RD4/PSP4 27 750 -350 100 L 39 28 1 1 P
X RB4/KBI0/AN11 37 750 650 100 L 39 28 1 1 P
X RC3/SCK/SCL 18 -750 -750 100 R 39 28 1 1 P
X RD5/PSP5/P1B 28 750 -250 100 L 39 28 1 1 P
X RB5/KBI1/PGM 38 750 750 100 L 39 28 1 1 P
X RD0/PSP0 19 -750 -850 100 R 39 28 1 1 P
X RD6/PSP6/P1C 29 750 -150 100 L 39 28 1 1 P
X RB6/KBI2/PGC 39 750 850 100 L 39 28 1 1 P
ENDDRAW
ENDDEF
#
# PIC18F4680-DIP
#
DEF PIC18F4680-DIP U 0 40 Y Y 1 F N
F0 "U" 150 1150 60 H V C CNN
F1 "PIC18F4680-DIP" 450 1050 60 H V C CNN
DRAW
S -650 1000 650 -1000 0 1 0 N
X ~MCLR~/VPP/RE3 1 -750 950 100 R 39 39 1 1 P
X RA0/AN0/CVREF 2 -750 850 100 R 39 39 1 1 P
X RA1/AN1 3 -750 750 100 R 39 39 1 1 P
X RA2/AN2/VREF- 4 -750 650 100 R 39 39 1 1 P
X RA3/AN3/VREF+ 5 -750 550 100 R 39 39 1 1 P
X RA4/T0CKI 6 -750 450 100 R 39 39 1 1 P
X RA5/AN4/~SS~/HLVDIN 7 -750 350 100 R 39 39 1 1 P
X RE0/~RD~/AN5 8 -750 250 100 R 39 39 1 1 P
X RE1/~WR~/AN6/C1OUT 9 -750 150 100 R 39 39 1 1 P
X RE2/~CS~/AN7/C2OUT 10 -750 50 100 R 39 39 1 1 P
X RD1/PSP1/C1IN- 20 -750 -950 100 R 39 39 1 1 P
X RD7/PSP7/P1D 30 750 -50 100 L 39 39 1 1 P
X RB7/KBI3/PGD 40 750 950 100 L 39 39 1 1 P
X VDD 11 -50 1100 100 D 39 39 1 1 P
X RD2/PSP2/C2IN+ 21 750 -950 100 L 39 39 1 1 P
X VSS 31 50 -1100 100 U 39 39 1 1 P
X VSS 12 -50 -1100 100 U 39 39 1 1 P
X RD3/PSP3/C2IN- 22 750 -850 100 L 39 39 1 1 P
X VDD 32 50 1100 100 D 39 39 1 1 P
X OSC1/CLKI/RA7 13 -750 -250 100 R 39 39 1 1 P
X RC4/SDI/SDA 23 750 -750 100 L 39 39 1 1 P
X RB0/INT0/FLT0/AN10 33 750 250 100 L 39 39 1 1 P
X OSC2/CLKO/RA6 14 -750 -350 100 R 39 39 1 1 P
X RC5/SDO 24 750 -650 100 L 39 39 1 1 P
X RB1/INT1/AN8 34 750 350 100 L 39 39 1 1 P
X RC0/T1OS0/T13CKI 15 -750 -450 100 R 39 39 1 1 P
X RC6/TX/CK 25 750 -550 100 L 39 39 1 1 P
X RB2/INT2/CANTX 35 750 450 100 L 39 39 1 1 P
X RC1/T1OSI 16 -750 -550 100 R 39 39 1 1 P
X RC7/RX/DT 26 750 -450 100 L 39 39 1 1 P
X RB3/CANRX 36 750 550 100 L 39 39 1 1 P
X RC2/CCP1 17 -750 -650 100 R 39 39 1 1 P
X RD4/PSP4/ECCP1/P1A 27 750 -350 100 L 39 39 1 1 P
X RB4/KBI0/AN9 37 750 650 100 L 39 39 1 1 P
X RC3/SCK/SCL 18 -750 -750 100 R 39 39 1 1 P
X RD5/PSP5/P1B 28 750 -250 100 L 39 39 1 1 P
X RB5/KBI1/PGM 38 750 750 100 L 39 39 1 1 P
X RD0/PSP0/C1IN+ 19 -750 -850 100 R 39 39 1 1 P
X RD6/PSP6/P1C 29 750 -150 100 L 39 39 1 1 P
X RB6/KBI2/PGC 39 750 850 100 L 39 39 1 1 P
ENDDRAW
ENDDEF
#
# PIC18F66J60
#
DEF PIC18F66J60 U 0 40 Y Y 1 F N
F0 "U" 0 50 60 H V C CNN
F1 "PIC18F66J60" 0 -50 60 H V C CNN
$FPLIST
 LQFP-64
$ENDFPLIST
DRAW
P 9 0 1 0  -1150 850  -1150 -850  -850 -1150  850 -1150  1150 -850  1150 850  850 1150  -850 1150  -1150 850 N
X RE1/P2C 1 -1250 750 100 R 39 28 1 1 P
X RE0/P2D 2 -1250 650 100 R 39 28 1 1 P
X RB0/INT0/FLT0 3 -1250 550 100 R 39 28 1 1 P
X RB1/INT1 4 -1250 450 100 R 39 28 1 1 P
X RB2/INT2 5 -1250 350 100 R 39 28 1 1 P
X RB3/INT3 6 -1250 250 100 R 39 28 1 1 P
X ~MCLR~ 7 -1250 150 100 R 39 27 1 1 P
X RG4/CCP5/P1D 8 -1250 50 100 R 39 28 1 1 P
X VSS 9 -1250 -50 100 R 39 39 1 1 P
X VDDCORE/VCAP 10 -1250 -150 100 R 39 39 1 1 P
X AVSS 20 -450 -1250 100 U 39 39 1 1 P
X RC0/T1OSO/T13CKI 30 550 -1250 100 U 39 28 1 1 P
X OSC2/CLKO 40 1250 -50 100 L 39 28 1 1 P
X TPOUT- 50 650 1250 100 D 39 28 1 1 P
X RD0/P1B 60 -350 1250 100 D 39 28 1 1 P
X RF7/~SS1 11 -1250 -250 100 R 39 27 1 1 P
X RA3/AN3/VREF+ 21 -350 -1250 100 U 39 28 1 1 P
X RC6/TX1/CK1 31 650 -1250 100 U 39 28 1 1 P
X VSS 41 1250 50 100 L 39 39 1 1 P
X TPOUT+ 51 550 1250 100 D 39 28 1 1 P
X RE5/P1C 61 -450 1250 100 D 39 28 1 1 P
X RF6/AN11 12 -1250 -350 100 R 39 28 1 1 P
X RA2/AN2/VREF- 22 -250 -1250 100 U 39 28 1 1 P
X RC7/RX1/DT1 32 750 -1250 100 U 39 28 1 1 P
X RB6/KBI2/PGC 42 1250 150 100 L 39 28 1 1 P
X VSSTX 52 450 1250 100 D 39 39 1 1 P
X RE4/P3B 62 -550 1250 100 D 39 28 1 1 P
X RF5/AN10/CVREF 13 -1250 -450 100 R 39 28 1 1 P
X RA1/LEDB/AN1 23 -150 -1250 100 U 39 28 1 1 P
X RC2/ECCP1/P1A 33 1250 -750 100 L 39 28 1 1 P
X RB5/KBI1 43 1250 250 100 L 39 28 1 1 P
X RBIAS 53 350 1250 100 D 39 28 1 1 P
X RE3/P3C 63 -650 1250 100 D 39 28 1 1 P
X RF4/AN9 14 -1250 -550 100 R 39 28 1 1 P
X RA0/LEDA/AN0 24 -50 -1250 100 U 39 28 1 1 P
X RC3/SCK1/SCL1 34 1250 -650 100 L 39 28 1 1 P
X RB4/KBI0 44 1250 350 100 L 39 28 1 1 P
X VDDPLL 54 250 1250 100 D 39 39 1 1 P
X RE2/P2B 64 -750 1250 100 D 39 28 1 1 P
X RF3/AN8 15 -1250 -650 100 R 39 28 1 1 P
X VSS 25 50 -1250 100 U 39 39 1 1 P
X RC4/SDI1/SDA1 35 1250 -550 100 L 39 28 1 1 P
X VSSRX 45 1250 450 100 L 39 39 1 1 P
X VSSPLL 55 150 1250 100 D 39 39 1 1 P
X RF2/AN7/C1OUT 16 -1250 -750 100 R 39 28 1 1 P
X VDD 26 150 -1250 100 U 39 39 1 1 P
X RC5/SDO1 36 1250 -450 100 L 39 28 1 1 P
X TPIN- 46 1250 550 100 L 39 28 1 1 P
X VSS 56 50 1250 100 D 39 39 1 1 P
X RF1/AN6/C2OUT 17 -750 -1250 100 U 39 28 1 1 P
X RA5/AN4 27 250 -1250 100 U 39 28 1 1 P
X RB7/KBI3/PGD 37 1250 -350 100 L 39 28 1 1 P
X TPIN+ 47 1250 650 100 L 39 28 1 1 P
X VDD 57 -50 1250 100 D 39 39 1 1 P
X ENVREG 18 -650 -1250 100 U 39 28 1 1 P
X RA4/T0CKI 28 350 -1250 100 U 39 28 1 1 P
X VDD 38 1250 -250 100 L 39 39 1 1 P
X VDDRX 48 1250 750 100 L 39 39 1 1 P
X RD2/CCP4/P3D 58 -150 1250 100 D 39 28 1 1 P
X AVDD 19 -550 -1250 100 U 39 39 1 1 P
X RC1/T1OSI/ECCP2/P2A 29 450 -1250 100 U 39 28 1 1 P
X OSC1/CLKI 39 1250 -150 100 L 39 28 1 1 P
X VDDTX 49 750 1250 100 D 39 39 1 1 P
X RD1/ECCP3/P3A 59 -250 1250 100 D 39 28 1 1 P
ENDDRAW
ENDDEF
#
# STM32F405Ox
#
DEF STM32F405Ox U 0 40 Y Y 1 F N
F0 "U" 1000 1500 60 H V C CNN
F1 "STM32F405Ox" 1250 1400 60 H V C CNN
$FPLIST
 wlcsp90
$ENDFPLIST
DRAW
S -1500 1350 1500 -1350 0 1 0 N
X VDD A1 -350 1450 100 D 30 27 1 1 P
X VCAP_2 B1 1600 -200 100 L 30 27 1 1 P
X PA11/TIM1_CH4/USART1_CTS/CAN1_RX/OTG_FS_DM C1 -1600 600 100 R 30 27 1 1 P
X PA8/MCO1/TIM1_CH1/I2C3_SCL/USART1_CK/OTG_FS_SOF D1 -1600 750 100 R 30 27 1 1 P
X PC7/TIM3_CH2/TIM8_CH2/I2S3_MCK/USART6_RX/SDIO_D7/DCMI_D1 E1 -1600 -850 100 R 30 27 1 1 P
X TIM4_CH4/FSMC_D1/PD15 F1 1600 100 100 L 30 27 1 1 P
X USART3_CTS/FSMC_A16/PD11 G1 1600 250 100 L 30 27 1 1 P
X PB15/RTC_50HZ/TIM1_CH3N/TIM8_CH3N/SPI2_MOSI/I2S2_SD/TIM12_CH2/OTG_HS_DP H1 -1600 -500 100 R 30 27 1 1 P
X PB13/TIM1_CH1N/SPI2_SCK/I2S2_CK/USART3_CTS/CAN2_TX/OTG_HS_ULPI_D6/ETH_MII_TXD1/ETH_RMII_TXD1/OTG_HS_VBUS J1 -1600 -400 100 R 30 27 1 1 P
X PA14/JTCK-SWCLK A2 -1600 450 100 R 30 27 1 1 P
X SPI2_SCK/I2S2_CK/DCMI_D8/PI1 B2 1600 -1250 100 L 30 27 1 1 P
X PA12/TIM1_ETR/USART1_RTS/CAN1_TX/OTG_FS_DP C2 -1600 550 100 R 30 27 1 1 P
X PA9/TIM1_CH2/I2C3_SMBA/USART1_TX/DCMI_D0/OTG_FS_VBUS D2 -1600 700 100 R 30 27 1 1 P
X PC8/TIM3_CH3/TIM8_CH3/USART6_CK/SDIO_D0/DCMI_D2 E2 -1600 -900 100 R 30 27 1 1 P
X TIM4_CH3/FSMC_D0/PD14 F2 1600 150 100 L 30 27 1 1 P
X TIM4_CH1/USART3_RTS/FSMC_A17/PD12 G2 1600 200 100 L 30 27 1 1 P
X USART3_TX/FSMC_D13/PD8 H2 1600 400 100 L 30 27 1 1 P
X PB14/TIM1_CH2N/TIM8_CH2N/SPI2_MISO/I2S2EXT_SD/USART3_RTS/TIM12_CH1/OTG_HS_DM J2 -1600 -450 100 R 30 27 1 1 P
X PC12/SPI3_MOSI/I2S3_SD/USART3_CK/UART5_TX/SDIO_CK/DCMI_D9 A3 -1600 -1100 100 R 30 27 1 1 P
X PA15/JTDI/TIM2_CH1/TIM2_ETR/SPI1_NSS/SPI3_NSS/I2S3S_WS B3 -1600 400 100 R 30 27 1 1 P
X TIM5_CH4/SPI2_NSS/I2S2_WS/DCMI_D13/PI0 C3 1600 -1200 100 L 30 27 1 1 P
X PA10/TIM1_CH3/USART1_RX/OTG_FS_ID/DCMI_D1 D3 -1600 650 100 R 30 27 1 1 P
X PC9/MCO2/TIM3_CH4/TIM8_CH4/I2C3_SDA/I2S_CKIN/SDIO_D1/DCMI_D3 E3 -1600 -950 100 R 30 27 1 1 P
X PC6/TIM3_CH1/TIM8_CH1/I2S2_MCK/USART6_TX/SDIO_D6/DCMI_D0 F3 -1600 -800 100 R 30 27 1 1 P
X USART3_CK/FSMC_D15/PD10 G3 1600 300 100 L 30 27 1 1 P
X USART3_RX/FSMC_D14/PD9 H3 1600 350 100 L 30 27 1 1 P
X PB12/TIM1_BKIN/I2C2_SMBA/SPI2_NSS/I2S2_WS/USART3_CK/CAN2_RX/OTG_HS_ULPI_D5/ETH_MII_TXD0/ETH_RMII_TXD0 J3 -1600 -350 100 R 30 27 1 1 P
X FSMC_NOE/USART2_RTS/PD4 A4 1600 600 100 L 30 27 1 1 P
X TIM3_ETR/UART5_RX/SDIO_CMD/DCMI_D11/PD2 B4 1600 650 100 L 30 27 1 1 P
X PC11/I2S3EXT_SD/SPI3_MISO/USART3_RX/UART4_RX/SDIO_D3/DCMI_D4 C4 -1600 -1050 100 R 30 27 1 1 P
X VDD E4 -50 1450 100 D 30 27 1 1 P
X VCAP_1 F4 1600 -100 100 L 30 27 1 1 P
X TIM1_BKIN/FSMC_D12/PE15 G4 1600 -1050 100 L 30 27 1 1 P
X PB10/TIM2_CH3/I2C2_SCL/SPI2_SCK/I2S2_CK/USART3_TX/OTG_HS_ULPI_D3/ETH_MII_RX_ER H4 -1600 -250 100 R 30 27 1 1 P
X PB11/TIM2_CH4/I2C2_SDA/USART3_RX/OTG_HS_ULPI_D4/ETH_MII_TX_EN/ETH_RMII_TX_EN J4 -1600 -300 100 R 30 27 1 1 P
X USART2_CK/FSMC_NE1/FSMC_NCE2/PD7 A5 1600 450 100 L 30 27 1 1 P
X FSMC_NWAIT/USART2_RX/PD6 B5 1600 500 100 L 30 27 1 1 P
X CAN1_TX/FSMC_D3/PD1 C5 1600 700 100 L 30 27 1 1 P
X PC10/SPI3_SCK/I2S3S_CK/USART3_TX/UART4_TX/SDIO_D2/DCMI_D8 D5 -1600 -1000 100 R 30 27 1 1 P
X VSS E5 -50 -1450 100 U 30 27 1 1 P
X TIM1_CH4/FSMC_D11/PE14 F5 1600 -1000 100 L 30 27 1 1 P
X TIM1_CH3/FSMC_D10/PE13 G5 1600 -950 100 L 30 27 1 1 P
X TIM1_CH3N/FSMC_D9/PE12 H5 1600 -900 100 L 30 27 1 1 P
X TIM1_CH2/FSMC_D8/PE11 J5 1600 -850 100 L 30 27 1 1 P
X PB4/NJTRST/TIM3_CH1/SPI1_MISO/SPI3_MISO/I2S3EXT_SD A6 -1600 50 100 R 30 27 1 1 P
X PB3/JTDO/TRACESWO/SPI3_SCK/SPI1_SCK/TIM2_CH2/I2S3_CK B6 -1600 100 100 R 30 27 1 1 P
X USART2_TX/FSMC_NWE/PD5 C6 1600 550 100 L 30 27 1 1 P
X CAN1_RX/FSMC_D2/PD0 D6 1600 750 100 L 30 27 1 1 P
X VDD E6 -150 1450 100 D 30 27 1 1 P
X TIM1_CH2N/FSMC_D7/PE10 F6 1600 -800 100 L 30 27 1 1 P
X TIM1_ETR/FSMC_D4/PE7 G6 1600 -650 100 L 30 27 1 1 P
X TIM1_CH1N/FSMC_D5/PE8 H6 1600 -700 100 L 30 27 1 1 P
X TIM1_CH1/FSMC_D6/PE9 J6 1600 -750 100 L 30 27 1 1 P
X VPP/BOOT0 A7 1600 -350 100 L 30 27 1 1 P
X PB7/TIM4_CH2/I2C1_SDA/USART1_RX/FSMC_NL/DCMI_VSYNC B7 -1600 -100 100 R 30 27 1 1 P
X PB6/TIM4_CH1/I2C1_SCL/USART1_TX/CAN2_TX/DCMI_D5 C7 -1600 -50 100 R 30 27 1 1 P
X PB5/TIM3_CH2/I2C1_SMBA/SPI1_MOSI/SPI3_MOSI/I2S3_SD/CAN2_RX/OTG_HS_ULPI_D7/ETH_PPS_OUT/DCMI_D10 D7 -1600 0 100 R 30 27 1 1 P
X VSS E7 -150 -1450 100 U 30 27 1 1 P
X VDD F7 -250 1450 100 D 30 27 1 1 P
X PB0/TIM1_CH2N/TIM3_CH3/TIM8_CH2N/OTG_HS_ULPI_D1/ETH_MII_RXD2/ADC12_IN8 G7 -1600 250 100 R 30 27 1 1 P
X PB1/TIM1_CH3N/TIM3_CH4/TIM8_CH3N/OTG_HS_ULPI_D2/ETH__MII_RXD3/ADC12_IN9 H7 -1600 200 100 R 30 27 1 1 P
X PB2/BOOT1 J7 -1600 150 100 R 30 27 1 1 P
X PDR_ON A8 1600 -500 100 L 30 27 1 1 P
X VDD B8 50 1450 100 D 30 27 1 1 P
X PB9/TIM4_CH4/TIM11_CH1/I2C1_SDA/SPI2_NSS/I2S2_WS/CAN1_TX/SDIO_D5/DCMI_D7 C8 -1600 -200 100 R 30 27 1 1 P
X PB8/TIM4_CH3/TIM10_CH1/I2C1_SCL/CAN1_RX/ETH_MII_TXD3/SDIO_D4/DCMI_D6 D8 -1600 -150 100 R 30 27 1 1 P
X VSS E8 -250 -1450 100 U 30 27 1 1 P
X PA1/ETH_MII__RX_CLK/TIM2_CH2/TIM5_CH2/USART2_RTS/UART4_RX/ETH_RMII_REF_CLK/ADC123_IN1 F8 -1600 1100 100 R 30 27 1 1 P
X PA13/JTMS-SWDIO F8 -1600 500 100 R 30 27 1 1 P
X PA5/TIM2_CH1/TIM2_ETR/TIM8_CH1N/SPI1_SCK/OTG_HS_ULPI_CK/ADC12_IN5/DAC2_OUT G8 -1600 900 100 R 30 27 1 1 P
X PA6/TIM1_BKIN/TIM3_CH1/TIM8_BKIN/SPI1_MISO/TIM13_CH1/DCMI_PIXCK/ADC12_IN6 H8 -1600 850 100 R 30 27 1 1 P
X PA7/TIM1_CH1N/TIM3_CH2/TIM8_CH1N/SPI1_MOSI/TIM14_CH1/ETH_MII_RX_DV/ETH_RMII_CRS_DV/ADC12_IN7 J8 -1600 800 100 R 30 27 1 1 P
X PC13/RTC_AF1 A9 -1600 -1150 100 R 30 27 1 1 P
X PC15/OSC32_OUT B9 -1600 -1250 100 R 30 27 1 1 P
X VSS C9 50 -1450 100 U 30 27 1 1 P
X BYPASS_REG D9 1600 1100 100 L 30 27 1 1 P
X PC3/SPI2_MOSI/I2S2_SD/OTG_HS_ULPI_NXT/ETH_MII_TX_CLK/ADC123_IN13 E9 -1600 -750 100 R 30 27 1 1 P
X OSC_OUT/PH1 F9 1600 1250 100 L 30 27 1 1 P
X VDDA G9 250 1450 100 D 30 27 1 1 P
X PA3/TIM2_CH4/TIM5_CH4/TIM9_CH2/USART2_RX/OTG_HS_ULPI_D0/ETH_MII_COL/ADC123_IN3 H9 -1600 1000 100 R 30 27 1 1 P
X PA4/SPI3_NSS/SPI1_NSS/SPI3_NSS/I2S3_WS/USART2_CK/OTG_HS_SOF/DCMI_HSYNC/ADC12_IN4/DAC1_OUT J9 -1600 950 100 R 30 27 1 1 P
X VBAT A10 1600 1000 100 L 30 27 1 1 P
X PC14/OSC32_IN B10 -1600 -1200 100 R 30 27 1 1 P
X PA0/TIM2_CH1/TIM2_ETR/TIM_5_CH1/TIM8_ETR/USART2_CTS/UART4_TX/ETH_MII_CRS/ADC123_IN0/WKUP C10 -1600 1150 100 R 30 27 1 1 P
X PC2/SPI2_MISO/I2S2EXT_SD/OTG_HS_ULPI_DIR/ETH_MII_TXD2/ADC123_IN12 D10 -1600 -700 100 R 30 27 1 1 P
X PC0/OTG_HS_ULPI_STP/ADC123_IN10 E10 -1600 -650 100 R 30 27 1 1 P
X OSC_IN/PH0 F10 1600 1300 100 L 30 27 1 1 P
X NRST G10 1600 900 100 L 30 27 1 1 P
X VSSA H10 250 -1450 100 U 30 27 1 1 P
X PA2/TIM2_CH3/TIM5_CH3/TIM9_CH1/USART2_TX/ETH_MDIO/ADC123_IN2 J10 -1600 1050 100 R 30 27 1 1 P
ENDDRAW
ENDDEF
#
# STM32F405RG
#
DEF STM32F405RG U 0 40 Y Y 1 F N
F0 "U" 1000 1500 60 H V C CNN
F1 "STM32F405RG" 1250 1400 60 H V C CNN
$FPLIST
 lqfp64
$ENDFPLIST
DRAW
S -1500 1350 1500 -1350 0 1 0 N
X VBAT 1 1600 700 100 L 30 27 1 1 P
X PC13/RTC_AF1 2 -1600 -1200 100 R 30 27 1 1 P
X PC14/OSC32_IN 3 -1600 -1250 100 R 30 27 1 1 P
X PC15/OSC32_OUT 4 -1600 -1300 100 R 30 27 1 1 P
X OSC_IN/PH0 5 1600 1000 100 L 30 27 1 1 P
X OSC_OUT/PH1 6 1600 950 100 L 30 27 1 1 P
X NRST 7 1600 450 100 L 30 27 1 1 P
X PC0/OTG_HS_ULPI_STP/ADC123_IN10 8 -1600 -550 100 R 30 27 1 1 P
X PC1/ETH_MDC/ADC123_IN11 9 -1600 -600 100 R 30 27 1 1 P
X PC2/SPI2_MISO/I2S2EXT_SD/OTG_HS_ULPI_DIR/ETH_MII_TXD2/ADC123_IN12 10 -1600 -650 100 R 30 27 1 1 P
X PA4/SPI3_NSS/SPI1_NSS/SPI3_NSS/I2S3_WS/USART2_CK/OTG_HS_SOF/DCMI_HSYNC/ADC12_IN4/DAC1_OUT 20 -1600 950 100 R 30 27 1 1 P
X PB11/TIM2_CH4/I2C2_SDA/USART3_RX/OTG_HS_ULPI_D4/ETH_MII_TX_EN/ETH_RMII_TX_EN 30 -1600 -250 100 R 30 27 1 1 P
X PC9/MCO2/TIM3_CH4/TIM8_CH4/I2C3_SDA/I2S_CKIN/SDIO_D1/DCMI_D3 40 -1600 -1000 100 R 30 27 1 1 P
X PA15/JTDI/TIM2_CH1/TIM2_ETR/SPI1_NSS/SPI3_NSS/I2S3S_WS 50 -1600 400 100 R 30 27 1 1 P
X VPP/BOOT0 60 1600 -200 100 L 30 27 1 1 P
X PC3/SPI2_MOSI/I2S2_SD/OTG_HS_ULPI_NXT/ETH_MII_TX_CLK/ADC123_IN13 11 -1600 -700 100 R 30 27 1 1 P
X PA5/TIM2_CH1/TIM2_ETR/TIM8_CH1N/SPI1_SCK/OTG_HS_ULPI_CK/ADC12_IN5/DAC2_OUT 21 -1600 900 100 R 30 27 1 1 P
X VCAP_1 31 1600 -600 100 L 30 27 1 1 P
X PA8/MCO1/TIM1_CH1/I2C3_SCL/USART1_CK/OTG_FS_SOF 41 -1600 750 100 R 30 27 1 1 P
X PC10/SPI3_SCK/I2S3S_CK/USART3_TX/UART4_TX/SDIO_D2/DCMI_D8 51 -1600 -1050 100 R 30 27 1 1 P
X PB8/TIM4_CH3/TIM10_CH1/I2C1_SCL/CAN1_RX/ETH_MII_TXD3/SDIO_D4/DCMI_D6 61 -1600 -100 100 R 30 27 1 1 P
X VSSA 12 150 -1450 100 U 30 27 1 1 P
X PA6/TIM1_BKIN/TIM3_CH1/TIM8_BKIN/SPI1_MISO/TIM13_CH1/DCMI_PIXCK/ADC12_IN6 22 -1600 850 100 R 30 27 1 1 P
X VDD 32 -50 1450 100 D 30 27 1 1 P
X PA9/TIM1_CH2/I2C3_SMBA/USART1_TX/DCMI_D0/OTG_FS_VBUS 42 -1600 700 100 R 30 27 1 1 P
X PC11/I2S3EXT_SD/SPI3_MISO/USART3_RX/UART4_RX/SDIO_D3/DCMI_D4 52 -1600 -1100 100 R 30 27 1 1 P
X PB9/TIM4_CH4/TIM11_CH1/I2C1_SDA/SPI2_NSS/I2S2_WS/CAN1_TX/SDIO_D5/DCMI_D7 62 -1600 -150 100 R 30 27 1 1 P
X VDDA 13 250 1450 100 D 30 27 1 1 P
X PA7/TIM1_CH1N/TIM3_CH2/TIM8_CH1N/SPI1_MOSI/TIM14_CH1/ETH_MII_RX_DV/ETH_RMII_CRS_DV/ADC12_IN7 23 -1600 800 100 R 30 27 1 1 P
X PB12/TIM1_BKIN/I2C2_SMBA/SPI2_NSS/I2S2_WS/USART3_CK/CAN2_RX/OTG_HS_ULPI_D5/ETH_MII_TXD0/ETH_RMII_TXD0 33 -1600 -300 100 R 30 27 1 1 P
X PA10/TIM1_CH3/USART1_RX/OTG_FS_ID/DCMI_D1 43 -1600 650 100 R 30 27 1 1 P
X PC12/SPI3_MOSI/I2S3_SD/USART3_CK/UART5_TX/SDIO_CK/DCMI_D9 53 -1600 -1150 100 R 30 27 1 1 P
X VSS 63 -150 -1450 100 U 30 27 1 1 P
X PA0/TIM2_CH1/TIM2_ETR/TIM_5_CH1/TIM8_ETR/USART2_CTS/UART4_TX/ETH_MII_CRS/ADC123_IN0/WKUP 14 -1600 1150 100 R 30 27 1 1 P
X PC4/ETH_MII_RXD0/ETH_RMII_RXD0/ADC12_IN14 24 -1600 -750 100 R 30 27 1 1 P
X PB13/TIM1_CH1N/SPI2_SCK/I2S2_CK/USART3_CTS/CAN2_TX/OTG_HS_ULPI_D6/ETH_MII_TXD1/ETH_RMII_TXD1/OTG_HS_VBUS 34 -1600 -350 100 R 30 27 1 1 P
X PA11/TIM1_CH4/USART1_CTS/CAN1_RX/OTG_FS_DM 44 -1600 600 100 R 30 27 1 1 P
X TIM3_ETR/UART5_RX/SDIO_CMD/DCMI_D11/PD2 54 1600 200 100 L 30 27 1 1 P
X VDD 64 -250 1450 100 D 30 27 1 1 P
X PA1/ETH_MII__RX_CLK/TIM2_CH2/TIM5_CH2/USART2_RTS/UART4_RX/ETH_RMII_REF_CLK/ADC123_IN1 15 -1600 1100 100 R 30 27 1 1 P
X PC5/ETH_MII_RXD1/ETH_RMII_RXD1/ADC12_IN15 25 -1600 -800 100 R 30 27 1 1 P
X PB14/TIM1_CH2N/TIM8_CH2N/SPI2_MISO/I2S2EXT_SD/USART3_RTS/TIM12_CH1/OTG_HS_DM 35 -1600 -400 100 R 30 27 1 1 P
X PA12/TIM1_ETR/USART1_RTS/CAN1_TX/OTG_FS_DP 45 -1600 550 100 R 30 27 1 1 P
X PB3/JTDO/TRACESWO/SPI3_SCK/SPI1_SCK/TIM2_CH2/I2S3_CK 55 -1600 150 100 R 30 27 1 1 P
X PA2/TIM2_CH3/TIM5_CH3/TIM9_CH1/USART2_TX/ETH_MDIO/ADC123_IN2 16 -1600 1050 100 R 30 27 1 1 P
X PB0/TIM1_CH2N/TIM3_CH3/TIM8_CH2N/OTG_HS_ULPI_D1/ETH_MII_RXD2/ADC12_IN8 26 -1600 300 100 R 30 27 1 1 P
X PB15/RTC_50HZ/TIM1_CH3N/TIM8_CH3N/SPI2_MOSI/I2S2_SD/TIM12_CH2/OTG_HS_DP 36 -1600 -450 100 R 30 27 1 1 P
X PA13/JTMS-SWDIO 46 -1600 500 100 R 30 27 1 1 P
X PB4/NJTRST/TIM3_CH1/SPI1_MISO/SPI3_MISO/I2S3EXT_SD 56 -1600 100 100 R 30 27 1 1 P
X PA3/TIM2_CH4/TIM5_CH4/TIM9_CH2/USART2_RX/OTG_HS_ULPI_D0/ETH_MII_COL/ADC123_IN3 17 -1600 1000 100 R 30 27 1 1 P
X PB1/TIM1_CH3N/TIM3_CH4/TIM8_CH3N/OTG_HS_ULPI_D2/ETH__MII_RXD3/ADC12_IN9 27 -1600 250 100 R 30 27 1 1 P
X PC6/TIM3_CH1/TIM8_CH1/I2S2_MCK/USART6_TX/SDIO_D6/DCMI_D0 37 -1600 -850 100 R 30 27 1 1 P
X VCAP_2 47 1600 -700 100 L 30 27 1 1 P
X PB5/TIM3_CH2/I2C1_SMBA/SPI1_MOSI/SPI3_MOSI/I2S3_SD/CAN2_RX/OTG_HS_ULPI_D7/ETH_PPS_OUT/DCMI_D10 57 -1600 50 100 R 30 27 1 1 P
X VSS 18 -50 -1450 100 U 30 27 1 1 P
X PB2/BOOT1 28 -1600 200 100 R 30 27 1 1 P
X PC7/TIM3_CH2/TIM8_CH2/I2S3_MCK/USART6_RX/SDIO_D7/DCMI_D1 38 -1600 -900 100 R 30 27 1 1 P
X VDD 48 -150 1450 100 D 30 27 1 1 P
X PB6/TIM4_CH1/I2C1_SCL/USART1_TX/CAN2_TX/DCMI_D5 58 -1600 0 100 R 30 27 1 1 P
X VDD 19 50 1450 100 D 30 27 1 1 P
X PB10/TIM2_CH3/I2C2_SCL/SPI2_SCK/I2S2_CK/USART3_TX/OTG_HS_ULPI_D3/ETH_MII_RX_ER 29 -1600 -200 100 R 30 27 1 1 P
X PC8/TIM3_CH3/TIM8_CH3/USART6_CK/SDIO_D0/DCMI_D2 39 -1600 -950 100 R 30 27 1 1 P
X PA14/JTCK-SWCLK 49 -1600 450 100 R 30 27 1 1 P
X PB7/TIM4_CH2/I2C1_SDA/USART1_RX/FSMC_NL/DCMI_VSYNC 59 -1600 -50 100 R 30 27 1 1 P
ENDDRAW
ENDDEF
#
# STM32F407Ix-LQFP
#
DEF STM32F407Ix-LQFP U 0 40 Y Y 1 F N
F0 "U" 1000 2350 60 H V C CNN
F1 "STM32F407Ix-LQFP" 1350 2250 60 H V C CNN
$FPLIST
 lqfp-176
$ENDFPLIST
DRAW
S 1500 -2200 -1500 2200 0 1 0 N
X PE2/TRACECLK/ETH_MII_TXD3/FSMC_A23 1 -1600 -1500 100 R 30 27 1 1 P
X PE3/TRACED0/FSMC_A19 2 -1600 -1550 100 R 30 27 1 1 P
X PE4/TRACED1/FSMC_A20 3 -1600 -1600 100 R 30 27 1 1 P
X PE5/TRACED2/TIM9_CH1/FSMC_A21/DCMI_D6 4 -1600 -1650 100 R 30 27 1 1 P
X PE6/TRACED3/TIM9_CH2/FSMC_A22/DCMI_D7 5 -1600 -1700 100 R 30 27 1 1 P
X VBAT 6 1600 -1450 100 L 30 27 1 1 P
X RTC_AF2/PI8 7 1600 -1000 100 L 30 27 1 1 P
X PC13/RTC_AF1 8 -1600 -350 100 R 30 27 1 1 P
X PC14/OSC32_IN 9 -1600 -400 100 R 30 27 1 1 P
X PC15/OSC32_OUT 10 -1600 -450 100 R 30 27 1 1 P
X ADC3_IN14/FSMC_A4/PF4 20 1600 900 100 L 30 27 1 1 P
X OSC_OUT/PH1 30 1600 200 100 L 30 27 1 1 P
X PA0/TIM2_CH1/TIM2_ETR/TIM_5_CH1/TIM8_ETR/USART2_CTS/UART4_TX/ETH_MII_CRS/ADC123_IN0/WKUP 40 -1600 2000 100 R 30 27 1 1 P
X PA4/SPI3_NSS/SPI1_NSS/SPI3_NSS/I2S3_WS/USART2_CK/OTG_HS_SOF/DCMI_HSYNC/ADC12_IN4/DAC1_OUT 50 -1600 1800 100 R 30 27 1 1 P
X FSMC_A6/PF12 60 1600 500 100 L 30 27 1 1 P
X PE9/TIM1_CH1/FSMC_D6 70 -1600 -1850 100 R 30 27 1 1 P
X PB11/TIM2_CH4/I2C2_SDA/USART3_RX/OTG_HS_ULPI_D4/ETH_MII_TX_EN/ETH_RMII_TX_EN 80 -1600 600 100 R 30 27 1 1 P
X VSS 90 0 -2300 100 U 30 27 1 1 P
X CAN1_RX/PI9 11 1600 -1050 100 L 30 27 1 1 P
X ADC3_IN15/FSMC_A5/PF5 21 1600 850 100 L 30 27 1 1 P
X NRST 31 1600 -2150 100 L 30 27 1 1 P
X PA1/ETH_MII__RX_CLK/TIM2_CH2/TIM5_CH2/USART2_RTS/UART4_RX/ETH_RMII_REF_CLK/ADC123_IN1 41 -1600 1950 100 R 30 27 1 1 P
X PA5/TIM2_CH1/TIM2_ETR/TIM8_CH1N/SPI1_SCK/OTG_HS_ULPI_CK/ADC12_IN5/DAC2_OUT 51 -1600 1750 100 R 30 27 1 1 P
X VSS 61 200 -2300 100 U 30 27 1 1 P
X VSS 71 100 -2300 100 U 30 27 1 1 P
X VCAP_1 81 1600 -1600 100 L 30 27 1 1 P
X VDD 91 -50 2300 100 D 30 27 1 1 P
X ETH_MII_RX_ER/PI10 12 1600 -1100 100 L 30 27 1 1 P
X VSS 22 400 -2300 100 U 30 27 1 1 P
X PC0/OTG_HS_ULPI_STP/ADC123_IN10 32 -1600 300 100 R 30 27 1 1 P
X PA2/TIM2_CH3/TIM5_CH3/TIM9_CH1/USART2_TX/ETH_MDIO/ADC123_IN2 42 -1600 1900 100 R 30 27 1 1 P
X PA6/TIM1_BKIN/TIM3_CH1/TIM8_BKIN/SPI1_MISO/TIM13_CH1/DCMI_PIXCK/ADC12_IN6 52 -1600 1700 100 R 30 27 1 1 P
X VDD 62 250 2300 100 D 30 27 1 1 P
X VDD 72 150 2300 100 D 30 27 1 1 P
X VDD 82 50 2300 100 D 30 27 1 1 P
X PB12/TIM1_BKIN/I2C2_SMBA/SPI2_NSS/I2S2_WS/USART3_CK/CAN2_RX/OTG_HS_ULPI_D5/ETH_MII_TXD0/ETH_RMII_TXD0 92 -1600 550 100 R 30 27 1 1 P
X OTG_HS_ULPI_DIR/PI11 13 1600 -1150 100 L 30 27 1 1 P
X VDD 23 450 2300 100 D 30 27 1 1 P
X PC1/ETH_MDC/ADC123_IN11 33 -1600 250 100 R 30 27 1 1 P
X ETH_MII_CRS/PH2 43 1600 150 100 L 30 27 1 1 P
X PA7/TIM1_CH1N/TIM3_CH2/TIM8_CH1N/SPI1_MOSI/TIM14_CH1/ETH_MII_RX_DV/ETH_RMII_CRS_DV/ADC12_IN7 53 -1600 1650 100 R 30 27 1 1 P
X FSMC_A7/PF13 63 1600 450 100 L 30 27 1 1 P
X PE10/TIM1_CH2N/FSMC_D7 73 -1600 -1900 100 R 30 27 1 1 P
X I2C2_SMBA/TIM12_CH1/ETH_MII_RXD2/PH6 83 1600 -50 100 L 30 27 1 1 P
X PB13/TIM1_CH1N/SPI2_SCK/I2S2_CK/USART3_CTS/CAN2_TX/OTG_HS_ULPI_D6/ETH_MII_TXD1/ETH_RMII_TXD1/OTG_HS_VBUS 93 -1600 500 100 R 30 27 1 1 P
X VSS 14 500 -2300 100 U 30 27 1 1 P
X ADC3_IN4/TIM10_CH1/FSMC_NIORD/PF6 24 1600 800 100 L 30 27 1 1 P
X PC2/SPI2_MISO/I2S2EXT_SD/OTG_HS_ULPI_DIR/ETH_MII_TXD2/ADC123_IN12 34 -1600 200 100 R 30 27 1 1 P
X ETH_MII_COL/PH3 44 1600 100 100 L 30 27 1 1 P
X PC4/ETH_MII_RXD0/ETH_RMII_RXD0/ADC12_IN14 54 -1600 100 100 R 30 27 1 1 P
X FSMC_A8/PF14 64 1600 400 100 L 30 27 1 1 P
X PE11/TIM1_CH2/FSMC_D8 74 -1600 -1950 100 R 30 27 1 1 P
X I2C3_SCL/ETH_MII_RXD3/PH7 84 1600 -100 100 L 30 27 1 1 P
X PB14/TIM1_CH2N/TIM8_CH2N/SPI2_MISO/I2S2EXT_SD/USART3_RTS/TIM12_CH1/OTG_HS_DM 94 -1600 450 100 R 30 27 1 1 P
X VDD 15 550 2300 100 D 30 27 1 1 P
X ADC3_IN5/TIM11_CH1/FSMC_NREG/PF7 25 1600 750 100 L 30 27 1 1 P
X PC3/SPI2_MOSI/I2S2_SD/OTG_HS_ULPI_NXT/ETH_MII_TX_CLK/ADC123_IN13 35 -1600 150 100 R 30 27 1 1 P
X I2C2_SCL/OTG_HS_ULPI_NXT/PH4 45 1600 50 100 L 30 27 1 1 P
X PC5/ETH_MII_RXD1/ETH_RMII_RXD1/ADC12_IN15 55 -1600 50 100 R 30 27 1 1 P
X FSMC_A9/PF15 65 1600 350 100 L 30 27 1 1 P
X PE12/TIM1_CH3N/FSMC_D9 75 -1600 -2000 100 R 30 27 1 1 P
X I2C3_SDA/DCMI_HSYNC/PH8 85 1600 -150 100 L 30 27 1 1 P
X PB15/RTC_50HZ/TIM1_CH3N/TIM8_CH3N/SPI2_MOSI/I2S2_SD/TIM12_CH2/OTG_HS_DP 95 -1600 400 100 R 30 27 1 1 P
X I2C2_SDA/FSMC_A0/PF0 16 1600 1100 100 L 30 27 1 1 P
X ADC3_IN6/TIM13_CH1/FSMC_NIOWR/PF8 26 1600 700 100 L 30 27 1 1 P
X VDDA 36 850 2300 100 D 30 27 1 1 P
X I2C2_SDA/PH5 46 1600 0 100 L 30 27 1 1 P
X PB0/TIM1_CH2N/TIM3_CH3/TIM8_CH2N/OTG_HS_ULPI_D1/ETH_MII_RXD2/ADC12_IN8 56 -1600 1150 100 R 30 27 1 1 P
X FSMC_A10/PG0 66 1600 1950 100 L 30 27 1 1 P
X PE13/TIM1_CH3/FSMC_D10 76 -1600 -2050 100 R 30 27 1 1 P
X I2C3_SMBA/TIM12_CH2/DCMI_D0/PH9 86 1600 -200 100 L 30 27 1 1 P
X PD8/USART3_TX/FSMC_D13 96 -1600 -950 100 R 30 27 1 1 P
X I2C2_SCL/FSMC_A1/PF1 17 1600 1050 100 L 30 27 1 1 P
X ADC3_IN7/TIM14_CH1/FSMC_CD/PF9 27 1600 650 100 L 30 27 1 1 P
X VSSA 37 700 -2300 100 U 30 27 1 1 P
X PA3/TIM2_CH4/TIM5_CH4/TIM9_CH2/USART2_RX/OTG_HS_ULPI_D0/ETH_MII_COL/ADC123_IN3 47 -1600 1850 100 R 30 27 1 1 P
X PB1/TIM1_CH3N/TIM3_CH4/TIM8_CH3N/OTG_HS_ULPI_D2/ETH__MII_RXD3/ADC12_IN9 57 -1600 1100 100 R 30 27 1 1 P
X FSMC_A11/PG1 67 1600 1900 100 L 30 27 1 1 P
X PE14/TIM1_CH4/FSMC_D11 77 -1600 -2100 100 R 30 27 1 1 P
X TIM5_CH1/DCMI_D1/PH10 87 1600 -250 100 L 30 27 1 1 P
X PD9/USART3_RX/FSMC_D14 97 -1600 -1000 100 R 30 27 1 1 P
X I2C2_SMBA/FSMC_A2/PF2 18 1600 1000 100 L 30 27 1 1 P
X ADC3_IN8/FSMC_INTR/PF10 28 1600 600 100 L 30 27 1 1 P
X VREF+ 38 1600 -1300 100 L 30 27 1 1 P
X VSS 48 300 -2300 100 U 30 27 1 1 P
X PB2 58 -1600 1050 100 R 30 27 1 1 P
X PE7/TIM1_ETR/FSMC_D4 68 -1600 -1750 100 R 30 27 1 1 P
X PE15/TIM1_BKIN/FSMC_D12 78 -1600 -2150 100 R 30 27 1 1 P
X TIM5_CH2/DCMI_D2/PH11 88 1600 -300 100 L 30 27 1 1 P
X PD10/USART3_CK/FSMC_D15 98 -1600 -1050 100 R 30 27 1 1 P
X ADC3_IN9/FSMC_A3/PF3 19 1600 950 100 L 30 27 1 1 P
X OSC_IN/PH0 29 1600 250 100 L 30 27 1 1 P
X VDDA 39 750 2300 100 D 30 27 1 1 P
X VDD 49 350 2300 100 D 30 27 1 1 P
X DCMI_D12/PF11 59 1600 550 100 L 30 27 1 1 P
X PE8/TIM1_CH1N/FSMC_D5 69 -1600 -1800 100 R 30 27 1 1 P
X PB10/TIM2_CH3/I2C2_SCL/SPI2_SCK/I2S2_CK/USART3_TX/OTG_HS_ULPI_D3/ETH_MII_RX_ER 79 -1600 650 100 R 30 27 1 1 P
X TIM5_CH3/DCMI_D3/PH12 89 1600 -350 100 L 30 27 1 1 P
X PD11/USART3_CTS/FSMC_A16 99 -1600 -1100 100 R 30 27 1 1 P
X PD12/TIM4_CH1/USART3_RTS/FSMC_A17 100 -1600 -1150 100 R 30 27 1 1 P
X FSMC_INT2/PG6 110 1600 1650 100 L 30 27 1 1 P
X PA9/TIM1_CH2/I2C3_SMBA/USART1_TX/DCMI_D0/OTG_FS_VBUS 120 -1600 1550 100 R 30 27 1 1 P
X TIM8_CH3N/DCMI_D11/PH15 130 1600 -500 100 L 30 27 1 1 P
X PC11/I2S3EXT_SD/SPI3_MISO/USART3_RX/UART4_RX/SDIO_D3/DCMI_D4 140 -1600 -250 100 R 30 27 1 1 P
X PD6/FSMC_NWAIT/USART2_RX 150 -1600 -850 100 R 30 27 1 1 P
X USART6_CTS/DCMI_D13/PG15 160 1600 1200 100 L 30 27 1 1 P
X PE1/FSMC_BLN1/DCMI_D3 170 -1600 -1450 100 R 30 27 1 1 P
X PD13/TIM4_CH2/FSMC_A18 101 -1600 -1200 100 R 30 27 1 1 P
X USART6_CK/FSMC_INT3/PG7 111 1600 1600 100 L 30 27 1 1 P
X PA10/TIM1_CH3/USART1_RX/OTG_FS_ID/DCMI_D1 121 -1600 1500 100 R 30 27 1 1 P
X TIM5_CH4/SPI2_NSS/I2S2_WS/DCMI_D13/PI0 131 1600 -600 100 L 30 27 1 1 P
X PC12/SPI3_MOSI/I2S3_SD/USART3_CK/UART5_TX/SDIO_CK/DCMI_D9 141 -1600 -300 100 R 30 27 1 1 P
X PD7/USART2_CK/FSMC_NE1/FSMC_NCE2 151 -1600 -900 100 R 30 27 1 1 P
X PB3/JTDO/TRACESWO/SPI3_SCK/SPI1_SCK/TIM2_CH2/I2S3_CK 161 -1600 1000 100 R 30 27 1 1 P
X PDR_ON 171 1600 -2000 100 L 30 27 1 1 P
X VSS 102 -100 -2300 100 U 30 27 1 1 P
X USART6_RTS/ETH_PPS_OUT/PG8 112 1600 1550 100 L 30 27 1 1 P
X PA11/TIM1_CH4/USART1_CTS/CAN1_RX/OTG_FS_DM 122 -1600 1450 100 R 30 27 1 1 P
X SPI2_SCK/I2S2_CK/DCMI_D8/PI1 132 1600 -650 100 L 30 27 1 1 P
X PD0/CAN1_RX/FSMC_D2 142 -1600 -550 100 R 30 27 1 1 P
X USART6_RX/FSMC_NE2/FSMC_NCE3/PG9 152 1600 1500 100 L 30 27 1 1 P
X PB4/NJTRST/TIM3_CH1/SPI1_MISO/SPI3_MISO/I2S3EXT_SD 162 -1600 950 100 R 30 27 1 1 P
X VDD 172 -750 2300 100 D 30 27 1 1 P
X VDD 103 -150 2300 100 D 30 27 1 1 P
X VSS 113 -200 -2300 100 U 30 27 1 1 P
X PA12/TIM1_ETR/USART1_RTS/CAN1_TX/OTG_FS_DP 123 -1600 1400 100 R 30 27 1 1 P
X TIM8_CH4/SPI2_MISO/I2S2EXT_SD/DCMI_D9/PI2 133 1600 -700 100 L 30 27 1 1 P
X PD1/CAN1_TX/FSMC_D3 143 -1600 -600 100 R 30 27 1 1 P
X FSMC_NCE4_1/FSMC_NE3/PG10 153 1600 1450 100 L 30 27 1 1 P
X PB5/TIM3_CH2/I2C1_SMBA/SPI1_MOSI/SPI3_MOSI/I2S3_SD/CAN2_RX/OTG_HS_ULPI_D7/ETH_PPS_OUT/DCMI_D10 163 -1600 900 100 R 30 27 1 1 P
X TIM8_BKIN/DCMI_D5/PI4 173 1600 -800 100 L 30 27 1 1 P
X PD14/TIM4_CH3/FSMC_D0 104 -1600 -1250 100 R 30 27 1 1 P
X VDD 114 -250 2300 100 D 30 27 1 1 P
X PA13/JTMS-SWDIO 124 -1600 1350 100 R 30 27 1 1 P
X TIM8_ETR/SPI2_MOSI/I2S2_SD/DCMI_D10/PI3 134 1600 -750 100 L 30 27 1 1 P
X PD2/TIM3_ETR/UART5_RX/SDIO_CMD/DCMI_D11 144 -1600 -650 100 R 30 27 1 1 P
X ETH_MII_TX_EN/ETH_RMII_TX_EN/FSMC_NCE4_2/PG11 154 1600 1400 100 L 30 27 1 1 P
X PB6/TIM4_CH1/I2C1_SCL/USART1_TX/CAN2_TX/DCMI_D5 164 -1600 850 100 R 30 27 1 1 P
X TIM8_CH1/DCMI_VSYNC/PI5 174 1600 -850 100 L 30 27 1 1 P
X PD15/TIM4_CH4/FSMC_D1 105 -1600 -1300 100 R 30 27 1 1 P
X PC6/TIM3_CH1/TIM8_CH1/I2S2_MCK/USART6_TX/SDIO_D6/DCMI_D0 115 -1600 0 100 R 30 27 1 1 P
X VCAP_2 125 1600 -1700 100 L 30 27 1 1 P
X VSS 135 -400 -2300 100 U 30 27 1 1 P
X PD3/USART2_CTS/FSMC_CLK 145 -1600 -700 100 R 30 27 1 1 P
X USART6_RTS/FSMC_NE4/PG12 155 1600 1350 100 L 30 27 1 1 P
X PB7/TIM4_CH2/I2C1_SDA/USART1_RX/FSMC_NL/DCMI_VSYNC 165 -1600 800 100 R 30 27 1 1 P
X TIM8_CH2/DCMI_D6/PI6 175 1600 -900 100 L 30 27 1 1 P
X FSMC_A12/PG2 106 1600 1850 100 L 30 27 1 1 P
X PC7/TIM3_CH2/TIM8_CH2/I2S3_MCK/USART6_RX/SDIO_D7/DCMI_D1 116 -1600 -50 100 R 30 27 1 1 P
X VSS 126 -300 -2300 100 U 30 27 1 1 P
X VDD 136 -450 2300 100 D 30 27 1 1 P
X PD4/FSMC_NOE/USART2_RTS 146 -1600 -750 100 R 30 27 1 1 P
X UART6_CTS/ETH_MII_TXD0/ETH_RMII_TXD0/FSMC_A24/PG13 156 1600 1300 100 L 30 27 1 1 P
X VPP/BOOT0 166 1600 -1850 100 L 30 27 1 1 P
X TIM8_CH3/DCMI_D7/PI7 176 1600 -950 100 L 30 27 1 1 P
X FSMC_A13/PG3 107 1600 1800 100 L 30 27 1 1 P
X PC8/TIM3_CH3/TIM8_CH3/USART6_CK/SDIO_D0/DCMI_D2 117 -1600 -100 100 R 30 27 1 1 P
X VDD 127 -350 2300 100 D 30 27 1 1 P
X PA14/JTCK-SWCLK 137 -1600 1300 100 R 30 27 1 1 P
X PD5/USART2_TX/FSMC_NWE 147 -1600 -800 100 R 30 27 1 1 P
X USART6_TX/ETH_MII_TXD1/ETH_RMII_TXD1/FSMC_A25/PG14 157 1600 1250 100 L 30 27 1 1 P
X PB8/TIM4_CH3/TIM10_CH1/I2C1_SCL/CAN1_RX/ETH_MII_TXD3/SDIO_D4/DCMI_D6 167 -1600 750 100 R 30 27 1 1 P
X FSMC_A14/PG4 108 1600 1750 100 L 30 27 1 1 P
X PC9/MCO2/TIM3_CH4/TIM8_CH4/I2C3_SDA/I2S_CKIN/SDIO_D1/DCMI_D3 118 -1600 -150 100 R 30 27 1 1 P
X TIM8_CH1N/CAN1_TX/PH13 128 1600 -400 100 L 30 27 1 1 P
X PA15/JTDI/TIM2_CH1/TIM2_ETR/SPI1_NSS/SPI3_NSS/I2S3S_WS 138 -1600 1250 100 R 30 27 1 1 P
X VSS 148 -500 -2300 100 U 30 27 1 1 P
X VSS 158 -600 -2300 100 U 30 27 1 1 P
X PB9/TIM4_CH4/TIM11_CH1/I2C1_SDA/SPI2_NSS/I2S2_WS/CAN1_TX/SDIO_D5/DCMI_D7 168 -1600 700 100 R 30 27 1 1 P
X FSMC_A15/PG5 109 1600 1700 100 L 30 27 1 1 P
X PA8/MCO1/TIM1_CH1/I2C3_SCL/USART1_CK/OTG_FS_SOF 119 -1600 1600 100 R 30 27 1 1 P
X TIM8_CH2N/DCMI_D4/PH14 129 1600 -450 100 L 30 27 1 1 P
X PC10/SPI3_SCK/I2S3S_CK/USART3_TX/UART4_TX/SDIO_D2/DCMI_D8 139 -1600 -200 100 R 30 27 1 1 P
X VDD 149 -550 2300 100 D 30 27 1 1 P
X VDD 159 -650 2300 100 D 30 27 1 1 P
X PE0/TIM4_ETR/FSMC_NBL0/DCMI_D2 169 -1600 -1400 100 R 30 27 1 1 P
ENDDRAW
ENDDEF
#
# STM32F407Ix-UFBGA
#
DEF STM32F407Ix-UFBGA U 0 40 Y Y 1 F N
F0 "U" 1000 2350 60 H V C CNN
F1 "STM32F407Ix-UFBGA" 1350 2250 60 H V C CNN
$FPLIST
 ufbga201
$ENDFPLIST
DRAW
S 1500 -2200 -1500 2200 0 1 0 N
X PE3/TRACED0/FSMC_A19 A1 -1600 -1500 100 R 30 27 1 1 P
X PE4/TRACED1/FSMC_A20 B1 -1600 -1550 100 R 30 27 1 1 P
X VBAT C1 1600 -1450 100 L 30 27 1 1 P
X PC13/RTC_AF1 D1 -1600 -300 100 R 30 27 1 1 P
X PC14/OSC32_IN E1 -1600 -350 100 R 30 27 1 1 P
X PC15/OSC32_OUT F1 -1600 -400 100 R 30 27 1 1 P
X OSC_IN/PH0 G1 1600 350 100 L 30 27 1 1 P
X OSC_OUT/PH1 H1 1600 300 100 L 30 27 1 1 P
X NRST J1 1600 -2150 100 L 30 27 1 1 P
X TIM11_CH1/FSMC_NREG/ADC3_IN5/PF7 K1 1600 850 100 L 30 27 1 1 P
X FSMC_INTR/ADC3_IN8/PF10 L1 1600 700 100 L 30 27 1 1 P
X VSSA M1 1200 -2300 100 U 30 27 1 1 P
X VREF- N1 1600 -1300 100 L 30 27 1 1 P
X VREF+ P1 1600 -1200 100 L 30 27 1 1 P
X VDDA R1 800 2300 100 D 30 27 1 1 P
X PE2/TRACECLK/ETH_MII_TXD3/FSMC_A23 A2 -1600 -1450 100 R 30 27 1 1 P
X PE5/TRACED2/TIM9_CH1/FSMC_A21/DCMI_D6 B2 -1600 -1600 100 R 30 27 1 1 P
X TIM8_CH3/DCMI_D7/PI7 C2 1600 -850 100 L 30 27 1 1 P
X RTC_AF2/PI8 D2 1600 -900 100 L 30 27 1 1 P
X I2C2_SDA/FSMC_A0/PF0 E2 1600 1200 100 L 30 27 1 1 P
X VSS F2 1000 -2300 100 U 30 27 1 1 P
X VSS G2 950 -2300 100 U 30 27 1 1 P
X I2C2_SMBA/FSMC_A2/PF2 H2 1600 1100 100 L 30 27 1 1 P
X FSMC_A3/ADC3_IN9/PF3 J2 1600 1050 100 L 30 27 1 1 P
X TIM10_CH1/FSMC_NIORD/ADC3_IN4/PF6 K2 1600 900 100 L 30 27 1 1 P
X TIM14_CH1/FSMC_CD/ADC3_IN7/PF9 L2 1600 750 100 L 30 27 1 1 P
X PC0/OTG_HS_ULPI_STP/ADC123_IN10 M2 -1600 350 100 R 30 27 1 1 P
X PA1/ETH_MII__RX_CLK/TIM2_CH2/TIM5_CH2/USART2_RTS/UART4_RX/ETH_RMII_REF_CLK/ADC123_IN1 N2 -1600 2000 100 R 30 27 1 1 P
X PA2/TIM2_CH3/TIM5_CH3/TIM9_CH1/USART2_TX/ETH_MDIO/ADC123_IN2 P2 -1600 1950 100 R 30 27 1 1 P
X PA3/TIM2_CH4/TIM5_CH4/TIM9_CH2/USART2_RX/OTG_HS_ULPI_D0/ETH_MII_COL/ADC123_IN3 R2 -1600 1900 100 R 30 27 1 1 P
X PE1/FSMC_BLN1/DCMI_D3 A3 -1600 -1400 100 R 30 27 1 1 P
X PE6/TRACED3/TIM9_CH2/FSMC_A22/DCMI_D7 B3 -1600 -1650 100 R 30 27 1 1 P
X TIM8_CH2/DCMI_D6/PI6 C3 1600 -800 100 L 30 27 1 1 P
X CAN1_RX/PI9 D3 1600 -950 100 L 30 27 1 1 P
X ETH_MII_RX_ER/PI10 E3 1600 -1000 100 L 30 27 1 1 P
X VDD F3 600 2300 100 D 30 27 1 1 P
X VDD G3 500 2300 100 D 30 27 1 1 P
X I2C2_SCL/FSMC_A1/PF1 H3 1600 1150 100 L 30 27 1 1 P
X FSMC_A4/ADC3_IN14/PF4 J3 1600 1000 100 L 30 27 1 1 P
X FSMC_A5/ADC3_IN15/PF5 K3 1600 950 100 L 30 27 1 1 P
X TIM13_CH1/FSMC_NIOWR/ADC3_IN6/PF8 L3 1600 800 100 L 30 27 1 1 P
X PC1/ETH_MDC/ADC123_IN11 M3 -1600 300 100 R 30 27 1 1 P
X PA0/TIM2_CH1/TIM2_ETR/TIM_5_CH1/TIM8_ETR/USART2_CTS/UART4_TX/ETH_MII_CRS/ADC123_IN0/WKUP N3 -1600 2050 100 R 30 27 1 1 P
X PA6/TIM1_BKIN/TIM3_CH1/TIM8_BKIN/SPI1_MISO/TIM13_CH1/DCMI_PIXCK/ADC12_IN6 P3 -1600 1750 100 R 30 27 1 1 P
X PA7/TIM1_CH1N/TIM3_CH2/TIM8_CH1N/SPI1_MOSI/TIM14_CH1/ETH_MII_RX_DV/ETH_RMII_CRS_DV/ADC12_IN7 R3 -1600 1700 100 R 30 27 1 1 P
X PE0/TIM4_ETR/FSMC_NBL0/DCMI_D2 A4 -1600 -1350 100 R 30 27 1 1 P
X PB9/TIM4_CH4/TIM11_CH1/I2C1_SDA/SPI2_NSS/I2S2_WS/CAN1_TX/SDIO_D5/DCMI_D7 B4 -1600 750 100 R 30 27 1 1 P
X TIM8_CH1/DCMI_VSYNC/PI5 C4 1600 -750 100 L 30 27 1 1 P
X TIM8_BKIN/DCMI_D5/PI4 D4 1600 -700 100 L 30 27 1 1 P
X OTG_HS_ULPI_DIR/PI11 E4 1600 -1050 100 L 30 27 1 1 P
X ETH_MII_CRS/PH2 F4 1600 250 100 L 30 27 1 1 P
X ETH_MII_COL/PH3 G4 1600 200 100 L 30 27 1 1 P
X I2C2_SCL/OTG_HS_ULPI_NXT/PH4 H4 1600 150 100 L 30 27 1 1 P
X I2C2_SDA/PH5 J4 1600 100 100 L 30 27 1 1 P
X VDD K4 400 2300 100 D 30 27 1 1 P
X BYPASS_REG L4 1600 -1850 100 L 30 27 1 1 P
X PC2/SPI2_MISO/I2S2EXT_SD/OTG_HS_ULPI_DIR/ETH_MII_TXD2/ADC123_IN12 M4 -1600 250 100 R 30 27 1 1 P
X PA4/SPI3_NSS/SPI1_NSS/SPI3_NSS/I2S3_WS/USART2_CK/OTG_HS_SOF/DCMI_HSYNC/ADC12_IN4/DAC1_OUT N4 -1600 1850 100 R 30 27 1 1 P
X PA5/TIM2_CH1/TIM2_ETR/TIM8_CH1N/SPI1_SCK/OTG_HS_ULPI_CK/ADC12_IN5/DAC2_OUT P4 -1600 1800 100 R 30 27 1 1 P
X PB1/TIM1_CH3N/TIM3_CH4/TIM8_CH3N/OTG_HS_ULPI_D2/ETH__MII_RXD3/ADC12_IN9 R4 -1600 1150 100 R 30 27 1 1 P
X PB8/TIM4_CH3/TIM10_CH1/I2C1_SCL/CAN1_RX/ETH_MII_TXD3/SDIO_D4/DCMI_D6 A5 -1600 800 100 R 30 27 1 1 P
X PB7/TIM4_CH2/I2C1_SDA/USART1_RX/FSMC_NL/DCMI_VSYNC B5 -1600 850 100 R 30 27 1 1 P
X VDD C5 -700 2300 100 D 30 27 1 1 P
X VSS D5 500 -2300 100 U 30 27 1 1 P
X PC3/SPI2_MOSI/I2S2_SD/OTG_HS_ULPI_NXT/ETH_MII_TX_CLK/ADC123_IN13 M5 -1600 200 100 R 30 27 1 1 P
X PC4/ETH_MII_RXD0/ETH_RMII_RXD0/ADC12_IN14 N5 -1600 150 100 R 30 27 1 1 P
X PC5/ETH_MII_RXD1/ETH_RMII_RXD1/ADC12_IN15 P5 -1600 100 100 R 30 27 1 1 P
X PB0/TIM1_CH2N/TIM3_CH3/TIM8_CH2N/OTG_HS_ULPI_D1/ETH_MII_RXD2/ADC12_IN8 R5 -1600 1200 100 R 30 27 1 1 P
X PB5/TIM3_CH2/I2C1_SMBA/SPI1_MOSI/SPI3_MOSI/I2S3_SD/CAN2_RX/OTG_HS_ULPI_D7/ETH_PPS_OUT/DCMI_D10 A6 -1600 950 100 R 30 27 1 1 P
X PB6/TIM4_CH1/I2C1_SCL/USART1_TX/CAN2_TX/DCMI_D5 B6 -1600 900 100 R 30 27 1 1 P
X PDR_ON C6 1600 -2050 100 L 30 27 1 1 P
X VPP/BOOT0 D6 1600 -1950 100 L 30 27 1 1 P
X VSS F6 400 -2300 100 U 30 27 1 1 P
X VSS G6 150 -2300 100 U 30 27 1 1 P
X VSS H6 -100 -2300 100 U 30 27 1 1 P
X VSS J6 -350 -2300 100 U 30 27 1 1 P
X VSS K6 -600 -2300 100 U 30 27 1 1 P
X PB2/BOOT1 M6 -1600 1100 100 R 30 27 1 1 P
X FSMC_A7/PF13 N6 1600 550 100 L 30 27 1 1 P
X FSMC_A6/PF12 P6 1600 600 100 L 30 27 1 1 P
X DCMI_D12/PF11 R6 1600 650 100 L 30 27 1 1 P
X USART6_TX/ETH_MII_TXD1/ETH_RMII_TXD1/FSMC_A25/PG14 A7 1600 1350 100 L 30 27 1 1 P
X USART6_CTS/DCMI_D13/PG15 B7 1600 1300 100 L 30 27 1 1 P
X VDD C7 -600 2300 100 D 30 27 1 1 P
X VSS D7 550 -2300 100 U 30 27 1 1 P
X VSS F7 350 -2300 100 U 30 27 1 1 P
X VSS G7 100 -2300 100 U 30 27 1 1 P
X VSS H7 -150 -2300 100 U 30 27 1 1 P
X VSS J7 -400 -2300 100 U 30 27 1 1 P
X VSS K7 -650 -2300 100 U 30 27 1 1 P
X FSMC_A11/PG1 M7 1600 2000 100 L 30 27 1 1 P
X FSMC_A10/PG0 N7 1600 2050 100 L 30 27 1 1 P
X FSMC_A9/PF15 P7 1600 450 100 L 30 27 1 1 P
X FSMC_A8/PF14 R7 1600 500 100 L 30 27 1 1 P
X UART6_CTS/ETH_MII_TXD0/ETH_RMII_TXD0/FSMC_A24/PG13 A8 1600 1400 100 L 30 27 1 1 P
X USART6_RTS/FSMC_NE4/PG12 B8 1600 1450 100 L 30 27 1 1 P
X VDD C8 -500 2300 100 D 30 27 1 1 P
X VSS D8 600 -2300 100 U 30 27 1 1 P
X VSS F8 300 -2300 100 U 30 27 1 1 P
X VSS G8 50 -2300 100 U 30 27 1 1 P
X VSS H8 -200 -2300 100 U 30 27 1 1 P
X VSS J8 -450 -2300 100 U 30 27 1 1 P
X VSS K8 -700 -2300 100 U 30 27 1 1 P
X VSS M8 900 -2300 100 U 30 27 1 1 P
X VDD N8 300 2300 100 D 30 27 1 1 P
X PE8/TIM1_CH1N/FSMC_D5 P8 -1600 -1750 100 R 30 27 1 1 P
X PE7/TIM1_ETR/FSMC_D4 R8 -1600 -1700 100 R 30 27 1 1 P
X PB4/NJTRST/TIM3_CH1/SPI1_MISO/SPI3_MISO/I2S3EXT_SD A9 -1600 1000 100 R 30 27 1 1 P
X ETH_MII_TX_EN/ETH_RMII_TX_EN/FSMC_NCE4_2/PG11 B9 1600 1500 100 L 30 27 1 1 P
X VDD C9 -400 2300 100 D 30 27 1 1 P
X VSS D9 650 -2300 100 U 30 27 1 1 P
X VSS F9 250 -2300 100 U 30 27 1 1 P
X VSS G9 0 -2300 100 U 30 27 1 1 P
X VSS H9 -250 -2300 100 U 30 27 1 1 P
X VSS J9 -500 -2300 100 U 30 27 1 1 P
X VSS K9 -750 -2300 100 U 30 27 1 1 P
X VSS M9 850 -2300 100 U 30 27 1 1 P
X VDD N9 200 2300 100 D 30 27 1 1 P
X PE9/TIM1_CH1/FSMC_D6 P9 -1600 -1800 100 R 30 27 1 1 P
X PE10/TIM1_CH2N/FSMC_D7 R9 -1600 -1850 100 R 30 27 1 1 P
X PB3/JTDO/TRACESWO/SPI3_SCK/SPI1_SCK/TIM2_CH2/I2S3_CK A10 -1600 1050 100 R 30 27 1 1 P
X FSMC_NCE4_1/FSMC_NE3/PG10 B10 1600 1550 100 L 30 27 1 1 P
X USART6_RX/FSMC_NE2/FSMC_NCE3/PG9 C10 1600 1600 100 L 30 27 1 1 P
X PD4/FSMC_NOE/USART2_RTS D10 -1600 -700 100 R 30 27 1 1 P
X VSS F10 200 -2300 100 U 30 27 1 1 P
X VSS G10 -50 -2300 100 U 30 27 1 1 P
X VSS H10 -300 -2300 100 U 30 27 1 1 P
X VSS J10 -550 -2300 100 U 30 27 1 1 P
X VSS K10 -800 -2300 100 U 30 27 1 1 P
X VCAP_1 M10 1600 -1600 100 L 30 27 1 1 P
X VDD N10 100 2300 100 D 30 27 1 1 P
X PE11/TIM1_CH2/FSMC_D8 P10 -1600 -1900 100 R 30 27 1 1 P
X PE12/TIM1_CH3N/FSMC_D9 R10 -1600 -1950 100 R 30 27 1 1 P
X PD7/USART2_CK/FSMC_NE1/FSMC_NCE2 A11 -1600 -850 100 R 30 27 1 1 P
X PD6/FSMC_NWAIT/USART2_RX B11 -1600 -800 100 R 30 27 1 1 P
X PD5/USART2_TX/FSMC_NWE C11 -1600 -750 100 R 30 27 1 1 P
X PD3/USART2_CTS/FSMC_CLK D11 -1600 -650 100 R 30 27 1 1 P
X I2C2_SMBA/TIM12_CH1/ETH_MII_RXD2/PH6 M11 1600 50 100 L 30 27 1 1 P
X PE13/TIM1_CH3/FSMC_D10 N11 -1600 -2000 100 R 30 27 1 1 P
X PE14/TIM1_CH4/FSMC_D11 P11 -1600 -2050 100 R 30 27 1 1 P
X PE15/TIM1_BKIN/FSMC_D12 R11 -1600 -2100 100 R 30 27 1 1 P
X PC12/SPI3_MOSI/I2S3_SD/USART3_CK/UART5_TX/SDIO_CK/DCMI_D9 A12 -1600 -250 100 R 30 27 1 1 P
X PD0/CAN1_RX/FSMC_D2 B12 -1600 -500 100 R 30 27 1 1 P
X PD1/CAN1_TX/FSMC_D3 C12 -1600 -550 100 R 30 27 1 1 P
X PD2/TIM3_ETR/UART5_RX/SDIO_CMD/DCMI_D11 D12 -1600 -600 100 R 30 27 1 1 P
X TIM8_CH1N/CAN1_TX/PH13 E12 1600 -300 100 L 30 27 1 1 P
X VSS F12 700 -2300 100 U 30 27 1 1 P
X VSS G12 750 -2300 100 U 30 27 1 1 P
X VSS H12 800 -2300 100 U 30 27 1 1 P
X VDD J12 0 2300 100 D 30 27 1 1 P
X TIM5_CH3/DCMI_D3/PH12 K12 1600 -250 100 L 30 27 1 1 P
X TIM5_CH2/DCMI_D2/PH11 L12 1600 -200 100 L 30 27 1 1 P
X I2C3_SDA/DCMI_HSYNC/PH8 M12 1600 -50 100 L 30 27 1 1 P
X I2C3_SCL/ETH_MII_RXD3/PH7 N12 1600 0 100 L 30 27 1 1 P
X PB12/TIM1_BKIN/I2C2_SMBA/SPI2_NSS/I2S2_WS/USART3_CK/CAN2_RX/OTG_HS_ULPI_D5/ETH_MII_TXD0/ETH_RMII_TXD0 P12 -1600 600 100 R 30 27 1 1 P
X PB10/TIM2_CH3/I2C2_SCL/SPI2_SCK/I2S2_CK/USART3_TX/OTG_HS_ULPI_D3/ETH_MII_RX_ER R12 -1600 700 100 R 30 27 1 1 P
X PA15/JTDI/TIM2_CH1/TIM2_ETR/SPI1_NSS/SPI3_NSS/I2S3S_WS A13 -1600 1300 100 R 30 27 1 1 P
X PC11/I2S3EXT_SD/SPI3_MISO/USART3_RX/UART4_RX/SDIO_D3/DCMI_D4 B13 -1600 -200 100 R 30 27 1 1 P
X TIM8_ETR/SPI2_MOSI/I2S2_SD/DCMI_D10/PI3 C13 1600 -650 100 L 30 27 1 1 P
X TIM8_CH3N/DCMI_D11/PH15 D13 1600 -400 100 L 30 27 1 1 P
X TIM8_CH2N/DCMI_D4/PH14 E13 1600 -350 100 L 30 27 1 1 P
X VCAP_2 F13 1600 -1700 100 L 30 27 1 1 P
X VDD G13 -300 2300 100 D 30 27 1 1 P
X VDD H13 -200 2300 100 D 30 27 1 1 P
X VDD J13 -100 2300 100 D 30 27 1 1 P
X FSMC_A15/PG5 K13 1600 1800 100 L 30 27 1 1 P
X TIM5_CH1/DCMI_D1/PH10 L13 1600 -150 100 L 30 27 1 1 P
X I2C3_SMBA/TIM12_CH2/DCMI_D0/PH9 M13 1600 -100 100 L 30 27 1 1 P
X PD12/TIM4_CH1/USART3_RTS/FSMC_A17 N13 -1600 -1100 100 R 30 27 1 1 P
X PB13/TIM1_CH1N/SPI2_SCK/I2S2_CK/USART3_CTS/CAN2_TX/OTG_HS_ULPI_D6/ETH_MII_TXD1/ETH_RMII_TXD1/OTG_HS_VBUS P13 -1600 550 100 R 30 27 1 1 P
X PB11/TIM2_CH4/I2C2_SDA/USART3_RX/OTG_HS_ULPI_D4/ETH_MII_TX_EN/ETH_RMII_TX_EN R13 -1600 650 100 R 30 27 1 1 P
X PA14/JTCK-SWCLK A14 -1600 1350 100 R 30 27 1 1 P
X PC10/SPI3_SCK/I2S3S_CK/USART3_TX/UART4_TX/SDIO_D2/DCMI_D8 B14 -1600 -150 100 R 30 27 1 1 P
X TIM8_CH4/SPI2_MISO/I2S2EXT_SD/DCMI_D9/PI2 C14 1600 -600 100 L 30 27 1 1 P
X SPI2_SCK/I2S2_CK/DCMI_D8/PI1 D14 1600 -550 100 L 30 27 1 1 P
X TIM5_CH4/SPI2_NSS/I2S2_WS/DCMI_D13/PI0 E14 1600 -500 100 L 30 27 1 1 P
X PC9/MCO2/TIM3_CH4/TIM8_CH4/I2C3_SDA/I2S_CKIN/SDIO_D1/DCMI_D3 F14 -1600 -100 100 R 30 27 1 1 P
X PC8/TIM3_CH3/TIM8_CH3/USART6_CK/SDIO_D0/DCMI_D2 G14 -1600 -50 100 R 30 27 1 1 P
X USART6_RTS/ETH_PPS_OUT/PG8 H14 1600 1650 100 L 30 27 1 1 P
X USART6_CK/FSMC_INT3/PG7 J14 1600 1700 100 L 30 27 1 1 P
X FSMC_A14/PG4 K14 1600 1850 100 L 30 27 1 1 P
X PD15/TIM4_CH4/FSMC_D1 L14 -1600 -1250 100 R 30 27 1 1 P
X PD14/TIM4_CH3/FSMC_D0 M14 -1600 -1200 100 R 30 27 1 1 P
X PD11/USART3_CTS/FSMC_A16 N14 -1600 -1050 100 R 30 27 1 1 P
X PD9/USART3_RX/FSMC_D14 P14 -1600 -950 100 R 30 27 1 1 P
X PB14/TIM1_CH2N/TIM8_CH2N/SPI2_MISO/I2S2EXT_SD/USART3_RTS/TIM12_CH1/OTG_HS_DM R14 -1600 500 100 R 30 27 1 1 P
X PA13/JTMS-SWDIO A15 -1600 1400 100 R 30 27 1 1 P
X PA12/TIM1_ETR/USART1_RTS/CAN1_TX/OTG_FS_DP B15 -1600 1450 100 R 30 27 1 1 P
X PA11/TIM1_CH4/USART1_CTS/CAN1_RX/OTG_FS_DM C15 -1600 1500 100 R 30 27 1 1 P
X PA10/TIM1_CH3/USART1_RX/OTG_FS_ID/DCMI_D1 D15 -1600 1550 100 R 30 27 1 1 P
X PA9/TIM1_CH2/I2C3_SMBA/USART1_TX/DCMI_D0/OTG_FS_VBUS E15 -1600 1600 100 R 30 27 1 1 P
X PA8/MCO1/TIM1_CH1/I2C3_SCL/USART1_CK/OTG_FS_SOF F15 -1600 1650 100 R 30 27 1 1 P
X PC7/TIM3_CH2/TIM8_CH2/I2S3_MCK/USART6_RX/SDIO_D7/DCMI_D1 G15 -1600 0 100 R 30 27 1 1 P
X PC6/TIM3_CH1/TIM8_CH1/I2S2_MCK/USART6_TX/SDIO_D6/DCMI_D0 H15 -1600 50 100 R 30 27 1 1 P
X FSMC_INT2/PG6 J15 1600 1750 100 L 30 27 1 1 P
X FSMC_A13/PG3 K15 1600 1900 100 L 30 27 1 1 P
X FSMC_A12/PG2 L15 1600 1950 100 L 30 27 1 1 P
X PD13/TIM4_CH2/FSMC_A18 M15 -1600 -1150 100 R 30 27 1 1 P
X PD10/USART3_CK/FSMC_D15 N15 -1600 -1000 100 R 30 27 1 1 P
X PD8/USART3_TX/FSMC_D13 P15 -1600 -900 100 R 30 27 1 1 P
X PB15/RTC_50HZ/TIM1_CH3N/TIM8_CH3N/SPI2_MOSI/I2S2_SD/TIM12_CH2/OTG_HS_DP R15 -1600 450 100 R 30 27 1 1 P
ENDDRAW
ENDDEF
#
# STM32F40xVx
#
DEF STM32F40xVx U 0 40 Y Y 1 F N
F0 "U" 1000 1500 60 H V C CNN
F1 "STM32F40xVx" 1250 1400 60 H V C CNN
$FPLIST
 tqfp-100
$ENDFPLIST
DRAW
S -1500 1350 1500 -1350 0 1 0 N
X TRACECLK/ETH_MII_TXD3/FSMC_A23/PE2 1 1600 -650 100 L 30 27 1 1 P
X TRACED0/FSMC_A19/PE3 2 1600 -700 100 L 30 27 1 1 P
X TRACED1/FSMC_A20/PE4 3 1600 -750 100 L 30 27 1 1 P
X TRACED2/TIM9_CH1/FSMC_A21/DCMI_D6/PE5 4 1600 -800 100 L 30 27 1 1 P
X TRACED3/TIM9_CH2/FSMC_A22/DCMI_D7/PE6 5 1600 -850 100 L 30 27 1 1 P
X VBAT 6 1600 1050 100 L 30 27 1 1 P
X PC13/RTC_AF1 7 -1600 -1200 100 R 30 27 1 1 P
X PC14/OSC32_IN 8 -1600 -1250 100 R 30 27 1 1 P
X PC15/OSC32_OUT 9 -1600 -1300 100 R 30 27 1 1 P
X VSS 10 50 -1450 100 U 30 27 1 1 P
X VSSA 20 250 -1450 100 U 30 27 1 1 P
X PA5/TIM2_CH1/TIM2_ETR/TIM8_CH1N/SPI1_SCK/OTG_HS_ULPI_CK/ADC12_IN5/DAC2_OUT 30 -1600 900 100 R 30 27 1 1 P
X TIM1_CH1/FSMC_D6/PE9 40 1600 -1000 100 L 30 27 1 1 P
X VDD 50 -150 1450 100 D 30 27 1 1 P
X TIM4_CH2/FSMC_A18/PD13 60 1600 150 100 L 30 27 1 1 P
X PA11/TIM1_CH4/USART1_CTS/CAN1_RX/OTG_FS_DM 70 -1600 600 100 R 30 27 1 1 P
X PC12/SPI3_MOSI/I2S3_SD/USART3_CK/UART5_TX/SDIO_CK/DCMI_D9 80 -1600 -1150 100 R 30 27 1 1 P
X PB4/NJTRST/TIM3_CH1/SPI1_MISO/SPI3_MISO/I2S3EXT_SD 90 -1600 100 100 R 30 27 1 1 P
X VDD 11 150 1450 100 D 30 27 1 1 P
X VREF+ 21 1600 1150 100 L 30 27 1 1 P
X PA6/TIM1_BKIN/TIM3_CH1/TIM8_BKIN/SPI1_MISO/TIM13_CH1/DCMI_PIXCK/ADC12_IN6 31 -1600 850 100 R 30 27 1 1 P
X TIM1_CH2N/FSMC_D7/PE10 41 1600 -1050 100 L 30 27 1 1 P
X PB12/TIM1_BKIN/I2C2_SMBA/SPI2_NSS/I2S2_WS/USART3_CK/CAN2_RX/OTG_HS_ULPI_D5/ETH_MII_TXD0/ETH_RMII_TXD0 51 -1600 -300 100 R 30 27 1 1 P
X TIM4_CH3/FSMC_D0/PD14 61 1600 100 100 L 30 27 1 1 P
X PA12/TIM1_ETR/USART1_RTS/CAN1_TX/OTG_FS_DP 71 -1600 550 100 R 30 27 1 1 P
X CAN1_RX/FSMC_D2/PD0 81 1600 800 100 L 30 27 1 1 P
X PB5/TIM3_CH2/I2C1_SMBA/SPI1_MOSI/SPI3_MOSI/I2S3_SD/CAN2_RX/OTG_HS_ULPI_D7/ETH_PPS_OUT/DCMI_D10 91 -1600 50 100 R 30 27 1 1 P
X OSC_IN/PH0 12 1600 1300 100 L 30 27 1 1 P
X VDDA 22 350 1450 100 D 30 27 1 1 P
X PA7/TIM1_CH1N/TIM3_CH2/TIM8_CH1N/SPI1_MOSI/TIM14_CH1/ETH_MII_RX_DV/ETH_RMII_CRS_DV/ADC12_IN7 32 -1600 800 100 R 30 27 1 1 P
X TIM1_CH2/FSMC_D8/PE11 42 1600 -1100 100 L 30 27 1 1 P
X PB13/TIM1_CH1N/SPI2_SCK/I2S2_CK/USART3_CTS/CAN2_TX/OTG_HS_ULPI_D6/ETH_MII_TXD1/ETH_RMII_TXD1/OTG_HS_VBUS 52 -1600 -350 100 R 30 27 1 1 P
X TIM4_CH4/FSMC_D1/PD15 62 1600 50 100 L 30 27 1 1 P
X PA13/JTMS-SWDIO 72 -1600 500 100 R 30 27 1 1 P
X CAN1_TX/FSMC_D3/PD1 82 1600 750 100 L 30 27 1 1 P
X PB6/TIM4_CH1/I2C1_SCL/USART1_TX/CAN2_TX/DCMI_D5 92 -1600 0 100 R 30 27 1 1 P
X OSC_OUT/PH1 13 1600 1250 100 L 30 27 1 1 P
X PA0/TIM2_CH1/TIM2_ETR/TIM_5_CH1/TIM8_ETR/USART2_CTS/UART4_TX/ETH_MII_CRS/ADC123_IN0/WKUP 23 -1600 1150 100 R 30 27 1 1 P
X PC4/ETH_MII_RXD0/ETH_RMII_RXD0/ADC12_IN14 33 -1600 -750 100 R 30 27 1 1 P
X TIM1_CH3N/FSMC_D9/PE12 43 1600 -1150 100 L 30 27 1 1 P
X PB14/TIM1_CH2N/TIM8_CH2N/SPI2_MISO/I2S2EXT_SD/USART3_RTS/TIM12_CH1/OTG_HS_DM 53 -1600 -400 100 R 30 27 1 1 P
X PC6/TIM3_CH1/TIM8_CH1/I2S2_MCK/USART6_TX/SDIO_D6/DCMI_D0 63 -1600 -850 100 R 30 27 1 1 P
X VCAP_2 73 1600 -200 100 L 30 27 1 1 P
X TIM3_ETR/UART5_RX/SDIO_CMD/DCMI_D11/PD2 83 1600 700 100 L 30 27 1 1 P
X PB7/TIM4_CH2/I2C1_SDA/USART1_RX/FSMC_NL/DCMI_VSYNC 93 -1600 -50 100 R 30 27 1 1 P
X NRST 14 1600 950 100 L 30 27 1 1 P
X PA1/ETH_MII__RX_CLK/TIM2_CH2/TIM5_CH2/USART2_RTS/UART4_RX/ETH_RMII_REF_CLK/ADC123_IN1 24 -1600 1100 100 R 30 27 1 1 P
X PC5/ETH_MII_RXD1/ETH_RMII_RXD1/ADC12_IN15 34 -1600 -800 100 R 30 27 1 1 P
X TIM1_CH3/FSMC_D10/PE13 44 1600 -1200 100 L 30 27 1 1 P
X PB15/RTC_50HZ/TIM1_CH3N/TIM8_CH3N/SPI2_MOSI/I2S2_SD/TIM12_CH2/OTG_HS_DP 54 -1600 -450 100 R 30 27 1 1 P
X PC7/TIM3_CH2/TIM8_CH2/I2S3_MCK/USART6_RX/SDIO_D7/DCMI_D1 64 -1600 -900 100 R 30 27 1 1 P
X VSS 74 -150 -1450 100 U 30 27 1 1 P
X USART2_CTS/FSMC_CLK/PD3 84 1600 650 100 L 30 27 1 1 P
X VPP/BOOT0 94 1600 -350 100 L 30 27 1 1 P
X PC0/OTG_HS_ULPI_STP/ADC123_IN10 15 -1600 -550 100 R 30 27 1 1 P
X PA2/TIM2_CH3/TIM5_CH3/TIM9_CH1/USART2_TX/ETH_MDIO/ADC123_IN2 25 -1600 1050 100 R 30 27 1 1 P
X PB0/TIM1_CH2N/TIM3_CH3/TIM8_CH2N/OTG_HS_ULPI_D1/ETH_MII_RXD2/ADC12_IN8 35 -1600 300 100 R 30 27 1 1 P
X TIM1_CH4/FSMC_D11/PE14 45 1600 -1250 100 L 30 27 1 1 P
X USART3_TX/FSMC_D13/PD8 55 1600 400 100 L 30 27 1 1 P
X PC8/TIM3_CH3/TIM8_CH3/USART6_CK/SDIO_D0/DCMI_D2 65 -1600 -950 100 R 30 27 1 1 P
X VDD 75 -250 1450 100 D 30 27 1 1 P
X FSMC_NOE/USART2_RTS/PD4 85 1600 600 100 L 30 27 1 1 P
X PB8/TIM4_CH3/TIM10_CH1/I2C1_SCL/CAN1_RX/ETH_MII_TXD3/SDIO_D4/DCMI_D6 95 -1600 -100 100 R 30 27 1 1 P
X PC1/ETH_MDC/ADC123_IN11 16 -1600 -600 100 R 30 27 1 1 P
X PA3/TIM2_CH4/TIM5_CH4/TIM9_CH2/USART2_RX/OTG_HS_ULPI_D0/ETH_MII_COL/ADC123_IN3 26 -1600 1000 100 R 30 27 1 1 P
X PB1/TIM1_CH3N/TIM3_CH4/TIM8_CH3N/OTG_HS_ULPI_D2/ETH__MII_RXD3/ADC12_IN9 36 -1600 250 100 R 30 27 1 1 P
X TIM1_BKIN/FSMC_D12/PE15 46 1600 -1300 100 L 30 27 1 1 P
X USART3_RX/FSMC_D14/PD9 56 1600 350 100 L 30 27 1 1 P
X PC9/MCO2/TIM3_CH4/TIM8_CH4/I2C3_SDA/I2S_CKIN/SDIO_D1/DCMI_D3 66 -1600 -1000 100 R 30 27 1 1 P
X PA14/JTCK-SWCLK 76 -1600 450 100 R 30 27 1 1 P
X USART2_TX/FSMC_NWE/PD5 86 1600 550 100 L 30 27 1 1 P
X PB9/TIM4_CH4/TIM11_CH1/I2C1_SDA/SPI2_NSS/I2S2_WS/CAN1_TX/SDIO_D5/DCMI_D7 96 -1600 -150 100 R 30 27 1 1 P
X PC2/SPI2_MISO/I2S2EXT_SD/OTG_HS_ULPI_DIR/ETH_MII_TXD2/ADC123_IN12 17 -1600 -650 100 R 30 27 1 1 P
X VSS 27 -50 -1450 100 U 30 27 1 1 P
X PB2/BOOT1 37 -1600 200 100 R 30 27 1 1 P
X PB10/TIM2_CH3/I2C2_SCL/SPI2_SCK/I2S2_CK/USART3_TX/OTG_HS_ULPI_D3/ETH_MII_RX_ER 47 -1600 -200 100 R 30 27 1 1 P
X USART3_CK/FSMC_D15/PD10 57 1600 300 100 L 30 27 1 1 P
X PA8/MCO1/TIM1_CH1/I2C3_SCL/USART1_CK/OTG_FS_SOF 67 -1600 750 100 R 30 27 1 1 P
X PA15/JTDI/TIM2_CH1/TIM2_ETR/SPI1_NSS/SPI3_NSS/I2S3S_WS 77 -1600 400 100 R 30 27 1 1 P
X FSMC_NWAIT/USART2_RX/PD6 87 1600 500 100 L 30 27 1 1 P
X TIM4_ETR/FSMC_NBL0/DCMI_D2/PE0 97 1600 -550 100 L 30 27 1 1 P
X PC3/SPI2_MOSI/I2S2_SD/OTG_HS_ULPI_NXT/ETH_MII_TX_CLK/ADC123_IN13 18 -1600 -700 100 R 30 27 1 1 P
X VDD 28 -50 1450 100 D 30 27 1 1 P
X TIM1_ETR/FSMC_D4/PE7 38 1600 -900 100 L 30 27 1 1 P
X PB11/TIM2_CH4/I2C2_SDA/USART3_RX/OTG_HS_ULPI_D4/ETH_MII_TX_EN/ETH_RMII_TX_EN 48 -1600 -250 100 R 30 27 1 1 P
X USART3_CTS/FSMC_A16/PD11 58 1600 250 100 L 30 27 1 1 P
X PA9/TIM1_CH2/I2C3_SMBA/USART1_TX/DCMI_D0/OTG_FS_VBUS 68 -1600 700 100 R 30 27 1 1 P
X PC10/SPI3_SCK/I2S3S_CK/USART3_TX/UART4_TX/SDIO_D2/DCMI_D8 78 -1600 -1050 100 R 30 27 1 1 P
X USART2_CK/FSMC_NE1/FSMC_NCE2/PD7 88 1600 450 100 L 30 27 1 1 P
X FSMC_BLN1/DCMI_D3/PE1 98 1600 -600 100 L 30 27 1 1 P
X VDD 19 50 1450 100 D 30 27 1 1 P
X PA4/SPI3_NSS/SPI1_NSS/SPI3_NSS/I2S3_WS/USART2_CK/OTG_HS_SOF/DCMI_HSYNC/ADC12_IN4/DAC1_OUT 29 -1600 950 100 R 30 27 1 1 P
X TIM1_CH1N/FSMC_D5/PE8 39 1600 -950 100 L 30 27 1 1 P
X VCAP_1 49 1600 -100 100 L 30 27 1 1 P
X TIM4_CH1/USART3_RTS/FSMC_A17/PD12 59 1600 200 100 L 30 27 1 1 P
X PA10/TIM1_CH3/USART1_RX/OTG_FS_ID/DCMI_D1 69 -1600 650 100 R 30 27 1 1 P
X PC11/I2S3EXT_SD/SPI3_MISO/USART3_RX/UART4_RX/SDIO_D3/DCMI_D4 79 -1600 -1100 100 R 30 27 1 1 P
X PB3/JTDO/TRACESWO/SPI3_SCK/SPI1_SCK/TIM2_CH2/I2S3_CK 89 -1600 150 100 R 30 27 1 1 P
X VSS 99 -250 -1450 100 U 30 27 1 1 P
X VDD 100 -350 1450 100 D 30 27 1 1 P
ENDDRAW
ENDDEF
#
# STM32F40xZx
#
DEF STM32F40xZx U 0 40 Y Y 1 F N
F0 "U" 1000 2050 60 H V C CNN
F1 "STM32F40xZx" 1250 1950 60 H V C CNN
$FPLIST
 tqfp-144
$ENDFPLIST
DRAW
S 1500 -1900 -1500 1900 0 1 0 N
X TRACECLK/ETH_MII_TXD3/FSMC_A23/PE2 1 1600 1600 100 L 30 27 1 1 P
X TRACED0/FSMC_A19/PE3 2 1600 1550 100 L 30 27 1 1 P
X TRACED1/FSMC_A20/PE4 3 1600 1500 100 L 30 27 1 1 P
X TRACED2/TIM9_CH1/FSMC_A21/DCMI_D6/PE5 4 1600 1450 100 L 30 27 1 1 P
X TRACED3/TIM9_CH2/FSMC_A22/DCMI_D7/PE6 5 1600 1400 100 L 30 27 1 1 P
X VBAT 6 1600 -1150 100 L 30 27 1 1 P
X PC13/RTC_AF1 7 -1600 -650 100 R 30 27 1 1 P
X PC14/OSC32_IN 8 -1600 -700 100 R 30 27 1 1 P
X PC15/OSC32_OUT 9 -1600 -750 100 R 30 27 1 1 P
X I2C2_SDA/FSMC_A0/PF0 10 1600 850 100 L 30 27 1 1 P
X ADC3_IN6/TIM13_CH1/FSMC_NIOWR/PF8 20 1600 450 100 L 30 27 1 1 P
X VDD 30 400 2000 100 D 30 27 1 1 P
X PA4/SPI3_NSS/SPI1_NSS/SPI3_NSS/I2S3_WS/USART2_CK/OTG_HS_SOF/DCMI_HSYNC/ADC12_IN4/DAC1_OUT 40 -1600 1500 100 R 30 27 1 1 P
X FSMC_A6/PF12 50 1600 250 100 L 30 27 1 1 P
X TIM1_CH1/FSMC_D6/PE9 60 1600 1250 100 L 30 27 1 1 P
X PB11/TIM2_CH4/I2C2_SDA/USART3_RX/OTG_HS_ULPI_D4/ETH_MII_TX_EN/ETH_RMII_TX_EN 70 -1600 300 100 R 30 27 1 1 P
X PD11/USART3_CTS/FSMC_A16 80 -1600 -1400 100 R 30 27 1 1 P
X FSMC_A15/PG5 90 1600 -250 100 L 30 27 1 1 P
X I2C2_SCL/FSMC_A1/PF1 11 1600 800 100 L 30 27 1 1 P
X ADC3_IN7/TIM14_CH1/FSMC_CD/PF9 21 1600 400 100 L 30 27 1 1 P
X VSSA 31 550 -2000 100 U 30 27 1 1 P
X PA5/TIM2_CH1/TIM2_ETR/TIM8_CH1N/SPI1_SCK/OTG_HS_ULPI_CK/ADC12_IN5/DAC2_OUT 41 -1600 1450 100 R 30 27 1 1 P
X VSS 51 150 -2000 100 U 30 27 1 1 P
X VSS 61 50 -2000 100 U 30 27 1 1 P
X VCAP_1 71 1600 -1300 100 L 30 27 1 1 P
X PD12/TIM4_CH1/USART3_RTS/FSMC_A17 81 -1600 -1450 100 R 30 27 1 1 P
X FSMC_INT2/PG6 91 1600 -300 100 L 30 27 1 1 P
X I2C2_SMBA/FSMC_A2/PF2 12 1600 750 100 L 30 27 1 1 P
X ADC3_IN8/FSMC_INTR/PF10 22 1600 350 100 L 30 27 1 1 P
X VREF+ 32 1600 -1000 100 L 30 27 1 1 P
X PA6/TIM1_BKIN/TIM3_CH1/TIM8_BKIN/SPI1_MISO/TIM13_CH1/DCMI_PIXCK/ADC12_IN6 42 -1600 1400 100 R 30 27 1 1 P
X VDD 52 200 2000 100 D 30 27 1 1 P
X VDD 62 100 2000 100 D 30 27 1 1 P
X VDD 72 0 2000 100 D 30 27 1 1 P
X PD13/TIM4_CH2/FSMC_A18 82 -1600 -1500 100 R 30 27 1 1 P
X USART6_CK/FSMC_INT3/PG7 92 1600 -350 100 L 30 27 1 1 P
X ADC3_IN9/FSMC_A3/PF3 13 1600 700 100 L 30 27 1 1 P
X OSC_IN/PH0 23 1600 -850 100 L 30 27 1 1 P
X VDDA 33 700 2000 100 D 30 27 1 1 P
X PA7/TIM1_CH1N/TIM3_CH2/TIM8_CH1N/SPI1_MOSI/TIM14_CH1/ETH_MII_RX_DV/ETH_RMII_CRS_DV/ADC12_IN7 43 -1600 1350 100 R 30 27 1 1 P
X FSMC_A7/PF13 53 1600 200 100 L 30 27 1 1 P
X TIM1_CH2N/FSMC_D7/PE10 63 1600 1200 100 L 30 27 1 1 P
X PB12/TIM1_BKIN/I2C2_SMBA/SPI2_NSS/I2S2_WS/USART3_CK/CAN2_RX/OTG_HS_ULPI_D5/ETH_MII_TXD0/ETH_RMII_TXD0 73 -1600 250 100 R 30 27 1 1 P
X VSS 83 -50 -2000 100 U 30 27 1 1 P
X USART6_RTS/ETH_PPS_OUT/PG8 93 1600 -400 100 L 30 27 1 1 P
X ADC3_IN14/FSMC_A4/PF4 14 1600 650 100 L 30 27 1 1 P
X OSC_OUT/PH1 24 1600 -900 100 L 30 27 1 1 P
X PA0/TIM2_CH1/TIM2_ETR/TIM_5_CH1/TIM8_ETR/USART2_CTS/UART4_TX/ETH_MII_CRS/ADC123_IN0/WKUP 34 -1600 1700 100 R 30 27 1 1 P
X PC4/ETH_MII_RXD0/ETH_RMII_RXD0/ADC12_IN14 44 -1600 -200 100 R 30 27 1 1 P
X FSMC_A8/PF14 54 1600 150 100 L 30 27 1 1 P
X TIM1_CH2/FSMC_D8/PE11 64 1600 1150 100 L 30 27 1 1 P
X PB13/TIM1_CH1N/SPI2_SCK/I2S2_CK/USART3_CTS/CAN2_TX/OTG_HS_ULPI_D6/ETH_MII_TXD1/ETH_RMII_TXD1/OTG_HS_VBUS 74 -1600 200 100 R 30 27 1 1 P
X VDD 84 -100 2000 100 D 30 27 1 1 P
X VSS 94 -150 -2000 100 U 30 27 1 1 P
X ADC3_IN15/FSMC_A5/PF5 15 1600 600 100 L 30 27 1 1 P
X NRST 25 1600 -1850 100 L 30 27 1 1 P
X PA1/ETH_MII__RX_CLK/TIM2_CH2/TIM5_CH2/USART2_RTS/UART4_RX/ETH_RMII_REF_CLK/ADC123_IN1 35 -1600 1650 100 R 30 27 1 1 P
X PC5/ETH_MII_RXD1/ETH_RMII_RXD1/ADC12_IN15 45 -1600 -250 100 R 30 27 1 1 P
X FSMC_A9/PF15 55 1600 100 100 L 30 27 1 1 P
X TIM1_CH3N/FSMC_D9/PE12 65 1600 1100 100 L 30 27 1 1 P
X PB14/TIM1_CH2N/TIM8_CH2N/SPI2_MISO/I2S2EXT_SD/USART3_RTS/TIM12_CH1/OTG_HS_DM 75 -1600 150 100 R 30 27 1 1 P
X PD14/TIM4_CH3/FSMC_D0 85 -1600 -1550 100 R 30 27 1 1 P
X VDD 95 -200 2000 100 D 30 27 1 1 P
X VSS 16 350 -2000 100 U 30 27 1 1 P
X PC0/OTG_HS_ULPI_STP/ADC123_IN10 26 -1600 0 100 R 30 27 1 1 P
X PA2/TIM2_CH3/TIM5_CH3/TIM9_CH1/USART2_TX/ETH_MDIO/ADC123_IN2 36 -1600 1600 100 R 30 27 1 1 P
X PB0/TIM1_CH2N/TIM3_CH3/TIM8_CH2N/OTG_HS_ULPI_D1/ETH_MII_RXD2/ADC12_IN8 46 -1600 850 100 R 30 27 1 1 P
X FSMC_A10/PG0 56 1600 0 100 L 30 27 1 1 P
X TIM1_CH3/FSMC_D10/PE13 66 1600 1050 100 L 30 27 1 1 P
X PB15/RTC_50HZ/TIM1_CH3N/TIM8_CH3N/SPI2_MOSI/I2S2_SD/TIM12_CH2/OTG_HS_DP 76 -1600 100 100 R 30 27 1 1 P
X PD15/TIM4_CH4/FSMC_D1 86 -1600 -1600 100 R 30 27 1 1 P
X PC6/TIM3_CH1/TIM8_CH1/I2S2_MCK/USART6_TX/SDIO_D6/DCMI_D0 96 -1600 -300 100 R 30 27 1 1 P
X VDD 17 500 2000 100 D 30 27 1 1 P
X PC1/ETH_MDC/ADC123_IN11 27 -1600 -50 100 R 30 27 1 1 P
X PA3/TIM2_CH4/TIM5_CH4/TIM9_CH2/USART2_RX/OTG_HS_ULPI_D0/ETH_MII_COL/ADC123_IN3 37 -1600 1550 100 R 30 27 1 1 P
X PB1/TIM1_CH3N/TIM3_CH4/TIM8_CH3N/OTG_HS_ULPI_D2/ETH__MII_RXD3/ADC12_IN9 47 -1600 800 100 R 30 27 1 1 P
X FSMC_A11/PG1 57 1600 -50 100 L 30 27 1 1 P
X TIM1_CH4/FSMC_D11/PE14 67 1600 1000 100 L 30 27 1 1 P
X PD8/USART3_TX/FSMC_D13 77 -1600 -1250 100 R 30 27 1 1 P
X FSMC_A12/PG2 87 1600 -100 100 L 30 27 1 1 P
X PC7/TIM3_CH2/TIM8_CH2/I2S3_MCK/USART6_RX/SDIO_D7/DCMI_D1 97 -1600 -350 100 R 30 27 1 1 P
X ADC3_IN4/TIM10_CH1/FSMC_NIORD/PF6 18 1600 550 100 L 30 27 1 1 P
X PC2/SPI2_MISO/I2S2EXT_SD/OTG_HS_ULPI_DIR/ETH_MII_TXD2/ADC123_IN12 28 -1600 -100 100 R 30 27 1 1 P
X VSS 38 250 -2000 100 U 30 27 1 1 P
X PB2/BOOT1 48 -1600 750 100 R 30 27 1 1 P
X TIM1_ETR/FSMC_D4/PE7 58 1600 1350 100 L 30 27 1 1 P
X TIM1_BKIN/FSMC_D12/PE15 68 1600 950 100 L 30 27 1 1 P
X PD9/USART3_RX/FSMC_D14 78 -1600 -1300 100 R 30 27 1 1 P
X FSMC_A13/PG3 88 1600 -150 100 L 30 27 1 1 P
X PC8/TIM3_CH3/TIM8_CH3/USART6_CK/SDIO_D0/DCMI_D2 98 -1600 -400 100 R 30 27 1 1 P
X ADC3_IN5/TIM11_CH1/FSMC_NREG/PF7 19 1600 500 100 L 30 27 1 1 P
X PC3/SPI2_MOSI/I2S2_SD/OTG_HS_ULPI_NXT/ETH_MII_TX_CLK/ADC123_IN13 29 -1600 -150 100 R 30 27 1 1 P
X VDD 39 300 2000 100 D 30 27 1 1 P
X DCMI_D12/PF11 49 1600 300 100 L 30 27 1 1 P
X TIM1_CH1N/FSMC_D5/PE8 59 1600 1300 100 L 30 27 1 1 P
X PB10/TIM2_CH3/I2C2_SCL/SPI2_SCK/I2S2_CK/USART3_TX/OTG_HS_ULPI_D3/ETH_MII_RX_ER 69 -1600 350 100 R 30 27 1 1 P
X PD10/USART3_CK/FSMC_D15 79 -1600 -1350 100 R 30 27 1 1 P
X FSMC_A14/PG4 89 1600 -200 100 L 30 27 1 1 P
X PC9/MCO2/TIM3_CH4/TIM8_CH4/I2C3_SDA/I2S_CKIN/SDIO_D1/DCMI_D3 99 -1600 -450 100 R 30 27 1 1 P
X PA8/MCO1/TIM1_CH1/I2C3_SCL/USART1_CK/OTG_FS_SOF 100 -1600 1300 100 R 30 27 1 1 P
X PA15/JTDI/TIM2_CH1/TIM2_ETR/SPI1_NSS/SPI3_NSS/I2S3S_WS 110 -1600 950 100 R 30 27 1 1 P
X VSS 120 -350 -2000 100 U 30 27 1 1 P
X VSS 130 -450 -2000 100 U 30 27 1 1 P
X PB9/TIM4_CH4/TIM11_CH1/I2C1_SDA/SPI2_NSS/I2S2_WS/CAN1_TX/SDIO_D5/DCMI_D7 140 -1600 400 100 R 30 27 1 1 P
X PA9/TIM1_CH2/I2C3_SMBA/USART1_TX/DCMI_D0/OTG_FS_VBUS 101 -1600 1250 100 R 30 27 1 1 P
X PC10/SPI3_SCK/I2S3S_CK/USART3_TX/UART4_TX/SDIO_D2/DCMI_D8 111 -1600 -500 100 R 30 27 1 1 P
X VDD 121 -400 2000 100 D 30 27 1 1 P
X VDD 131 -500 2000 100 D 30 27 1 1 P
X TIM4_ETR/FSMC_NBL0/DCMI_D2/PE0 141 1600 1700 100 L 30 27 1 1 P
X PA10/TIM1_CH3/USART1_RX/OTG_FS_ID/DCMI_D1 102 -1600 1200 100 R 30 27 1 1 P
X PC11/I2S3EXT_SD/SPI3_MISO/USART3_RX/UART4_RX/SDIO_D3/DCMI_D4 112 -1600 -550 100 R 30 27 1 1 P
X PD6/FSMC_NWAIT/USART2_RX 122 -1600 -1150 100 R 30 27 1 1 P
X USART6_CTS/DCMI_D13/PG15 132 1600 -750 100 L 30 27 1 1 P
X FSMC_BLN1/DCMI_D3/PE1 142 1600 1650 100 L 30 27 1 1 P
X PA11/TIM1_CH4/USART1_CTS/CAN1_RX/OTG_FS_DM 103 -1600 1150 100 R 30 27 1 1 P
X PC12/SPI3_MOSI/I2S3_SD/USART3_CK/UART5_TX/SDIO_CK/DCMI_D9 113 -1600 -600 100 R 30 27 1 1 P
X PD7/USART2_CK/FSMC_NE1/FSMC_NCE2 123 -1600 -1200 100 R 30 27 1 1 P
X PB3/JTDO/TRACESWO/SPI3_SCK/SPI1_SCK/TIM2_CH2/I2S3_CK 133 -1600 700 100 R 30 27 1 1 P
X PDR_ON 143 1600 -1700 100 L 30 27 1 1 P
X PA12/TIM1_ETR/USART1_RTS/CAN1_TX/OTG_FS_DP 104 -1600 1100 100 R 30 27 1 1 P
X PD0/CAN1_RX/FSMC_D2 114 -1600 -850 100 R 30 27 1 1 P
X USART6_RX/FSMC_NE2/FSMC_NCE3/PG9 124 1600 -450 100 L 30 27 1 1 P
X PB4/NJTRST/TIM3_CH1/SPI1_MISO/SPI3_MISO/I2S3EXT_SD 134 -1600 650 100 R 30 27 1 1 P
X VDD 144 -600 2000 100 D 30 27 1 1 P
X PA13/JTMS-SWDIO 105 -1600 1050 100 R 30 27 1 1 P
X PD1/CAN1_TX/FSMC_D3 115 -1600 -900 100 R 30 27 1 1 P
X FSMC_NCE4_1/FSMC_NE3/PG10 125 1600 -500 100 L 30 27 1 1 P
X PB5/TIM3_CH2/I2C1_SMBA/SPI1_MOSI/SPI3_MOSI/I2S3_SD/CAN2_RX/OTG_HS_ULPI_D7/ETH_PPS_OUT/DCMI_D10 135 -1600 600 100 R 30 27 1 1 P
X VCAP_2 106 1600 -1400 100 L 30 27 1 1 P
X PD2/TIM3_ETR/UART5_RX/SDIO_CMD/DCMI_D11 116 -1600 -950 100 R 30 27 1 1 P
X ETH_MII_TX_EN/ETH_RMII_TX_EN/FSMC_NCE4_2/PG11 126 1600 -550 100 L 30 27 1 1 P
X PB6/TIM4_CH1/I2C1_SCL/USART1_TX/CAN2_TX/DCMI_D5 136 -1600 550 100 R 30 27 1 1 P
X VSS 107 -250 -2000 100 U 30 27 1 1 P
X PD3/USART2_CTS/FSMC_CLK 117 -1600 -1000 100 R 30 27 1 1 P
X USART6_RTS/FSMC_NE4/PG12 127 1600 -600 100 L 30 27 1 1 P
X PB7/TIM4_CH2/I2C1_SDA/USART1_RX/FSMC_NL/DCMI_VSYNC 137 -1600 500 100 R 30 27 1 1 P
X VDD 108 -300 2000 100 D 30 27 1 1 P
X PD4/FSMC_NOE/USART2_RTS 118 -1600 -1050 100 R 30 27 1 1 P
X UART6_CTS/ETH_MII_TXD0/ETH_RMII_TXD0/FSMC_A24/PG13 128 1600 -650 100 L 30 27 1 1 P
X VPP/BOOT0 138 1600 -1550 100 L 30 27 1 1 P
X PA14/JTCK-SWCLK 109 -1600 1000 100 R 30 27 1 1 P
X PD5/USART2_TX/FSMC_NWE 119 -1600 -1100 100 R 30 27 1 1 P
X USART6_TX/ETH_MII_TXD1/ETH_RMII_TXD1/FSMC_A25/PG14 129 1600 -700 100 L 30 27 1 1 P
X PB8/TIM4_CH3/TIM10_CH1/I2C1_SCL/CAN1_RX/ETH_MII_TXD3/SDIO_D4/DCMI_D6 139 -1600 450 100 R 30 27 1 1 P
ENDDRAW
ENDDEF
#
#End Library