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    LATBbits.LATB5 = 0;
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    LATBbits.LATB5 = 0;
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    SSP2STATbits.SMP = 0; // Input is sampled in the middle of data output time
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    SSP2STATbits.SMP = 0; // Input is sampled in the middle of data output time
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    SSP2STATbits.CKE = 0; // Transmit occurs on transition from Idle to active clock state
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    SSP2STATbits.CKE = 0; // Transmit occurs on transition from Idle to active clock state
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- 
 
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    SSP2CON1bits.SSPM = speed;
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    if (speed == SPI2_FOSC_4)
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//    if (speed == SPI2_FOSC_4)
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        SSP2CON1bits.SSPM = 0b0000; // Clock = FOSC/4
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//        SSP2CON1bits.SSPM = 0b0000; // Clock = FOSC/4
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    else if (speed == SPI2_FOSC_8)
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//    else if (speed == SPI2_FOSC_8)
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        SSP2CON1bits.SSPM = 0b1010; // Clock = FOSC/8
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//        SSP2CON1bits.SSPM = 0b1010; // Clock = FOSC/8
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    else if (speed == SPI2_FOSC_16)
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//    else if (speed == SPI2_FOSC_16)
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        SSP2CON1bits.SSPM = 0b0001; // Clock = FOSC/16
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//        SSP2CON1bits.SSPM = 0b0001; // Clock = FOSC/16
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    else
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//    else
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        SSP2CON1bits.SSPM = 0b0010; // Clock = FOSC/64
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//        SSP2CON1bits.SSPM = 0b0010; // Clock = FOSC/64
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    SSP2CON1bits.CKP = 1; // Idle state for clock is a high level
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    SSP2CON1bits.CKP = 1; // Idle state for clock is a high level
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    SSP2CON1bits.SSPEN = 1; // Enable MSSP module
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    SSP2CON1bits.SSPEN = 1; // Enable MSSP module
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#ifdef SPI2_USE_INTERRUPT
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#ifdef SPI2_USE_INTERRUPT