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Line 36... Line 36...
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//    U1BRG     = 21;         // Set baud rate to 921600 @ 80MHz (1.36% error)
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//    U1BRG     = 21;         // Set baud rate to 921600 @ 80MHz (1.36% error)
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    IEC0SET   = 0x0C000000; // Enable the RX and Error interrupts
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    IEC0SET   = 0x0C000000; // Enable the RX and Error interrupts
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    INTEnableInterrupts();
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    INTEnableInterrupts();
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 - 
 
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    TRISDbits.TRISD14 = 0;
 - 
 
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    PORTDbits.RD14 = 0;
 - 
 
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}
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}
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uint8_t UART1_Write(uint8_t *string, uint32_t length) {
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uint8_t UART1_Write(uint8_t *string, uint32_t length) {
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    if (length > UART1_BUFFER_SIZE)
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    if (length > UART1_BUFFER_SIZE)
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        return 0;
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        return 0;
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    IEC0SET = 0x10000000; // Enable TX interrupt
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    IEC0SET = 0x10000000; // Enable TX interrupt
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    return 1;
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    return 1;
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}
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}
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void __ISR(_UART_1_VECTOR, ipl2) __UART_1_Interrupt_Handler(void) {
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void __ISR(_UART_1_VECTOR, ipl2) __UART_1_Interrupt_Handler(void) {
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    PORTDbits.RD14 = 1;
 - 
 
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    // Process UART1 error flag
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    // Process UART1 error flag
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    if (IFS0bits.U1EIF) {
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    if (IFS0bits.U1EIF) {
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        if (U1STAbits.PERR) { // Process parity error
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        if (U1STAbits.PERR) { // Process parity error
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        }
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        }
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                    break;
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                    break;
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            }
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            }
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        }
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        }
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        IFS0CLR = 0x10000000; // Clear the transmit flag
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        IFS0CLR = 0x10000000; // Clear the transmit flag
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    }
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    }
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    PORTDbits.RD14 = 0;
 - 
 
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}
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}
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