| 40,6 → 40,7 |
|---|
| SSP2STAT = 0x0; |
| SSP2CON1 = 0x0; |
| SSP2CON2 = 0x0; |
| SSP2CON3 = 0x0; |
| SSP2CON1bits.SSPM = 0x8; // I2C Master Mode |
| if (speed == 0x01) { |
| SSP2ADD = 0x13; // Operate at 400KHz (32MHz) |
| 133,9 → 134,12 |
|---|
| SSP2STAT = 0x0; |
| SSP2CON1 = 0x0; |
| SSP2CON2 = 0x0; |
| SSP2CON3 = 0x0; |
| SSP2CON1bits.SSPM = 0xE; // Enable Slave 7-bit w/ start/stop interrupts |
| SSP2STATbits.SMP = 1; // Slew Off |
| SSP2CON2bits.SEN = 1; // Enable clock-stretching |
| SSP1CON3bits.PCIE = 1; // Interrupt on stop condition |
| SSP1CON3bits.SCIE = 0; // Disable interrupt on start condition |
| SSP2CON1bits.SSPEN = 1; // Enable MSSP2 Module |
| } |
| |
| 355,16 → 359,16 |
|---|
| if (!overrun_error) { |
| switch (i2c_data_p->operating_state) { |
| case I2C_IDLE: |
| // { |
| // // Ignore anything except a start |
| // if (SSP2STATbits.S == 1) { |
| // i2c_data_p->buffer_in_len_tmp = 0; |
| // i2c_data_p->operating_state = I2C_STARTED; |
| // } |
| // break; |
| // } |
| // case I2C_STARTED: |
| { |
| // Ignore anything except a start |
| if (SSP2STATbits.S == 1) { |
| i2c_data_p->buffer_in_len_tmp = 0; |
| i2c_data_p->operating_state = I2C_STARTED; |
| } |
| break; |
| } |
| case I2C_STARTED: |
| { |
| // In this case, we expect either an address or a stop bit |
| if (SSP2STATbits.P == 1) { |
| // Return to idle mode |
| 383,7 → 387,7 |
|---|
| } |
| } else { |
| i2c_data_p->operating_state = I2C_IDLE; |
| i2c_data_p->return_status = I2C_ERR_NODATA; |
| i2c_data_p->return_status = I2C_ERR_NOADDR; |
| } |
| } |
| break; |