| 197,6 → 197,7 |
|---|
| INTEnableInterrupts(); |
| } |
| |
| /* Reads from the specified register on the PHY chip */ |
| uint16_t ETH_PHY_Read(uint8_t address, uint8_t reg) { |
| EMAC1MADR = reg | (address << 8); |
| EMAC1MCMDbits.READ = 1; |
| 206,6 → 207,7 |
|---|
| return EMAC1MRDD; |
| } |
| |
| /* Write to the specified register on the PHY chip */ |
| void ETH_PHY_Write(uint8_t address, uint8_t reg, uint16_t value) { |
| EMAC1MADR = reg | (address << 8); |
| EMAC1MWTD = value; |
| 213,6 → 215,7 |
|---|
| while (EMAC1MINDbits.MIIMBUSY); |
| } |
| |
| /* Queries the number of pending packets */ |
| uint8_t ETH_Recv_Queue(void) { |
| return ETHSTATbits.BUFCNT; |
| } |
| 229,12 → 232,14 |
|---|
| (eth_data->RX_ED_table.descriptor[descriptor_index].SOP == 1) && |
| (eth_data->RX_ED_table.descriptor[descriptor_index].EOP == 1)) { |
| |
| // Read the packet data values into the buffer |
| size = eth_data->RX_ED_table.descriptor[descriptor_index].BYTE_COUNT - 18; |
| *length = size; |
| for (j = 0; j < size - 18; j++) { |
| buffer[j] = eth_data->RX_ED_buffer[descriptor_index][j+14]; |
| } |
| |
| |
| // Reset the descriptors |
| eth_data->RX_ED_table.descriptor[descriptor_index].SOP = 0; |
| eth_data->RX_ED_table.descriptor[descriptor_index].EOP = 0; |
| eth_data->RX_ED_table.descriptor[descriptor_index].EOWN = 1; |