| 0,0 → 1,392 |
|---|
| ****************************************************************************** |
| MSP430 Linker PC v4.2.1 |
| ****************************************************************************** |
| >> Linked Mon Jan 13 02:06:08 2014 |
| |
| OUTPUT FILE NAME: <MSP430_G2553.out> |
| ENTRY POINT SYMBOL: "_c_int00" address: 0000c0ce |
| |
| |
| MEMORY CONFIGURATION |
| |
| name origin length used unused attr fill |
| ---------------------- -------- --------- -------- -------- ---- -------- |
| SFR 00000000 00000010 00000000 00000010 RWIX |
| PERIPHERALS_8BIT 00000010 000000f0 00000000 000000f0 RWIX |
| PERIPHERALS_16BIT 00000100 00000100 00000000 00000100 RWIX |
| RAM 00000200 00000200 00000050 000001b0 RWIX |
| INFOD 00001000 00000040 00000000 00000040 RWIX |
| INFOC 00001040 00000040 00000000 00000040 RWIX |
| INFOB 00001080 00000040 00000000 00000040 RWIX |
| INFOA 000010c0 00000040 00000000 00000040 RWIX |
| FLASH 0000c000 00003fe0 00000106 00003eda RWIX |
| INT00 0000ffe0 00000002 00000000 00000002 RWIX |
| INT01 0000ffe2 00000002 00000000 00000002 RWIX |
| INT02 0000ffe4 00000002 00000002 00000000 RWIX |
| INT03 0000ffe6 00000002 00000002 00000000 RWIX |
| INT04 0000ffe8 00000002 00000000 00000002 RWIX |
| INT05 0000ffea 00000002 00000002 00000000 RWIX |
| INT06 0000ffec 00000002 00000002 00000000 RWIX |
| INT07 0000ffee 00000002 00000002 00000000 RWIX |
| INT08 0000fff0 00000002 00000002 00000000 RWIX |
| INT09 0000fff2 00000002 00000002 00000000 RWIX |
| INT10 0000fff4 00000002 00000002 00000000 RWIX |
| INT11 0000fff6 00000002 00000002 00000000 RWIX |
| INT12 0000fff8 00000002 00000002 00000000 RWIX |
| INT13 0000fffa 00000002 00000002 00000000 RWIX |
| INT14 0000fffc 00000002 00000002 00000000 RWIX |
| RESET 0000fffe 00000002 00000002 00000000 RWIX |
| |
| |
| SECTION ALLOCATION MAP |
| |
| output attributes/ |
| section page origin length input sections |
| -------- ---- ---------- ---------- ---------------- |
| .cinit 0 0000c000 00000000 UNINITIALIZED |
| |
| .init_array |
| * 0 0000c000 00000000 UNINITIALIZED |
| |
| .stack 0 000003b0 00000050 UNINITIALIZED |
| 000003b0 00000002 rts430_eabi.lib : boot.obj (.stack) |
| 000003b2 0000004e --HOLE-- |
| |
| .text 0 0000c000 00000106 |
| 0000c000 00000070 main.obj (.text:main) |
| 0000c070 0000005e rts430_eabi.lib : autoinit.obj (.text:_auto_init) |
| 0000c0ce 0000001a : boot.obj (.text:_c_int00_noexit) |
| 0000c0e8 00000010 : epilog.obj (.text) |
| 0000c0f8 00000006 : isr_trap.obj (.text:__TI_ISR_TRAP) |
| 0000c0fe 00000004 : pre_init.obj (.text:_system_pre_init) |
| 0000c102 00000004 : exit.obj (.text:abort) |
| |
| PORT1 0 0000ffe4 00000002 |
| 0000ffe4 00000002 rts430_eabi.lib : int02.obj (.int02) |
| |
| PORT2 0 0000ffe6 00000002 |
| 0000ffe6 00000002 rts430_eabi.lib : int03.obj (.int03) |
| |
| ADC10 0 0000ffea 00000002 |
| 0000ffea 00000002 rts430_eabi.lib : int05.obj (.int05) |
| |
| USCIAB0TX |
| * 0 0000ffec 00000002 |
| 0000ffec 00000002 rts430_eabi.lib : int06.obj (.int06) |
| |
| USCIAB0RX |
| * 0 0000ffee 00000002 |
| 0000ffee 00000002 rts430_eabi.lib : int07.obj (.int07) |
| |
| TIMER0_A1 |
| * 0 0000fff0 00000002 |
| 0000fff0 00000002 rts430_eabi.lib : int08.obj (.int08) |
| |
| TIMER0_A0 |
| * 0 0000fff2 00000002 |
| 0000fff2 00000002 rts430_eabi.lib : int09.obj (.int09) |
| |
| WDT 0 0000fff4 00000002 |
| 0000fff4 00000002 rts430_eabi.lib : int10.obj (.int10) |
| |
| COMPARATORA |
| * 0 0000fff6 00000002 |
| 0000fff6 00000002 rts430_eabi.lib : int11.obj (.int11) |
| |
| TIMER1_A1 |
| * 0 0000fff8 00000002 |
| 0000fff8 00000002 rts430_eabi.lib : int12.obj (.int12) |
| |
| TIMER1_A0 |
| * 0 0000fffa 00000002 |
| 0000fffa 00000002 rts430_eabi.lib : int13.obj (.int13) |
| |
| NMI 0 0000fffc 00000002 |
| 0000fffc 00000002 rts430_eabi.lib : int14.obj (.int14) |
| |
| .reset 0 0000fffe 00000002 |
| 0000fffe 00000002 rts430_eabi.lib : boot.obj (.reset) |
| |
| |
| GLOBAL SYMBOLS: SORTED ALPHABETICALLY BY Name |
| |
| address name |
| -------- ---- |
| 0000004a ADC10AE0 |
| 000001b0 ADC10CTL0 |
| 000001b2 ADC10CTL1 |
| 00000048 ADC10DTC0 |
| 00000049 ADC10DTC1 |
| 000001b4 ADC10MEM |
| 000001bc ADC10SA |
| 00000057 BCSCTL1 |
| 00000058 BCSCTL2 |
| 00000053 BCSCTL3 |
| 0000c102 C$$EXIT |
| 00000059 CACTL1 |
| 0000005a CACTL2 |
| 000010fb CALBC1_12MHZ |
| 000010f9 CALBC1_16MHZ |
| 000010ff CALBC1_1MHZ |
| 000010fd CALBC1_8MHZ |
| 000010fa CALDCO_12MHZ |
| 000010f8 CALDCO_16MHZ |
| 000010fe CALDCO_1MHZ |
| 000010fc CALDCO_8MHZ |
| 0000005b CAPD |
| 00000056 DCOCTL |
| 00000128 FCTL1 |
| 0000012a FCTL2 |
| 0000012c FCTL3 |
| 00000000 IE1 |
| 00000001 IE2 |
| 00000002 IFG1 |
| 00000003 IFG2 |
| 00000022 P1DIR |
| 00000025 P1IE |
| 00000024 P1IES |
| 00000023 P1IFG |
| 00000020 P1IN |
| 00000021 P1OUT |
| 00000027 P1REN |
| 00000026 P1SEL |
| 00000041 P1SEL2 |
| 0000002a P2DIR |
| 0000002d P2IE |
| 0000002c P2IES |
| 0000002b P2IFG |
| 00000028 P2IN |
| 00000029 P2OUT |
| 0000002f P2REN |
| 0000002e P2SEL |
| 00000042 P2SEL2 |
| 0000001a P3DIR |
| 00000018 P3IN |
| 00000019 P3OUT |
| 00000010 P3REN |
| 0000001b P3SEL |
| 00000043 P3SEL2 |
| 00000172 TA0CCR0 |
| 00000174 TA0CCR1 |
| 00000176 TA0CCR2 |
| 00000162 TA0CCTL0 |
| 00000164 TA0CCTL1 |
| 00000166 TA0CCTL2 |
| 00000160 TA0CTL |
| 0000012e TA0IV |
| 00000170 TA0R |
| 00000192 TA1CCR0 |
| 00000194 TA1CCR1 |
| 00000196 TA1CCR2 |
| 00000182 TA1CCTL0 |
| 00000184 TA1CCTL1 |
| 00000186 TA1CCTL2 |
| 00000180 TA1CTL |
| 0000011e TA1IV |
| 00000190 TA1R |
| 0000005d UCA0ABCTL |
| 00000062 UCA0BR0 |
| 00000063 UCA0BR1 |
| 00000060 UCA0CTL0 |
| 00000061 UCA0CTL1 |
| 0000005f UCA0IRRCTL |
| 0000005e UCA0IRTCTL |
| 00000064 UCA0MCTL |
| 00000066 UCA0RXBUF |
| 00000065 UCA0STAT |
| 00000067 UCA0TXBUF |
| 0000006a UCB0BR0 |
| 0000006b UCB0BR1 |
| 00000068 UCB0CTL0 |
| 00000069 UCB0CTL1 |
| 0000006c UCB0I2CIE |
| 00000118 UCB0I2COA |
| 0000011a UCB0I2CSA |
| 0000006e UCB0RXBUF |
| 0000006d UCB0STAT |
| 0000006f UCB0TXBUF |
| 00000120 WDTCTL |
| 00000400 __STACK_END |
| 00000050 __STACK_SIZE |
| UNDEFED __TI_CINIT_Base |
| UNDEFED __TI_CINIT_Limit |
| UNDEFED __TI_Handler_Table_Base |
| UNDEFED __TI_Handler_Table_Limit |
| UNDEFED __TI_INITARRAY_Base |
| UNDEFED __TI_INITARRAY_Limit |
| 0000c0f8 __TI_ISR_TRAP |
| 00000001 __TI_args_main |
| 00000001 __TI_exit |
| 0000ffe4 __TI_int02 |
| 0000ffe6 __TI_int03 |
| 0000ffea __TI_int05 |
| 0000ffec __TI_int06 |
| 0000ffee __TI_int07 |
| 0000fff0 __TI_int08 |
| 0000fff2 __TI_int09 |
| 0000fff4 __TI_int10 |
| 0000fff6 __TI_int11 |
| 0000fff8 __TI_int12 |
| 0000fffa __TI_int13 |
| 0000fffc __TI_int14 |
| ffffffff __binit__ |
| ffffffff __c_args__ |
| 0000c0f4 __mspabi_func_epilog_1 |
| 0000c0f2 __mspabi_func_epilog_2 |
| 0000c0f0 __mspabi_func_epilog_3 |
| 0000c0ee __mspabi_func_epilog_4 |
| 0000c0ec __mspabi_func_epilog_5 |
| 0000c0ea __mspabi_func_epilog_6 |
| 0000c0e8 __mspabi_func_epilog_7 |
| 0000c070 _auto_init |
| 0000c0ce _c_int00 |
| 0000c0ce _c_int00_noexit |
| 0000fffe _reset_vector |
| 000003b0 _stack |
| 0000c0fe _system_pre_init |
| 0000c102 abort |
| ffffffff binit |
| 0000c000 main |
| |
| |
| GLOBAL SYMBOLS: SORTED BY Symbol Address |
| |
| address name |
| -------- ---- |
| 00000000 IE1 |
| 00000001 IE2 |
| 00000001 __TI_args_main |
| 00000001 __TI_exit |
| 00000002 IFG1 |
| 00000003 IFG2 |
| 00000010 P3REN |
| 00000018 P3IN |
| 00000019 P3OUT |
| 0000001a P3DIR |
| 0000001b P3SEL |
| 00000020 P1IN |
| 00000021 P1OUT |
| 00000022 P1DIR |
| 00000023 P1IFG |
| 00000024 P1IES |
| 00000025 P1IE |
| 00000026 P1SEL |
| 00000027 P1REN |
| 00000028 P2IN |
| 00000029 P2OUT |
| 0000002a P2DIR |
| 0000002b P2IFG |
| 0000002c P2IES |
| 0000002d P2IE |
| 0000002e P2SEL |
| 0000002f P2REN |
| 00000041 P1SEL2 |
| 00000042 P2SEL2 |
| 00000043 P3SEL2 |
| 00000048 ADC10DTC0 |
| 00000049 ADC10DTC1 |
| 0000004a ADC10AE0 |
| 00000050 __STACK_SIZE |
| 00000053 BCSCTL3 |
| 00000056 DCOCTL |
| 00000057 BCSCTL1 |
| 00000058 BCSCTL2 |
| 00000059 CACTL1 |
| 0000005a CACTL2 |
| 0000005b CAPD |
| 0000005d UCA0ABCTL |
| 0000005e UCA0IRTCTL |
| 0000005f UCA0IRRCTL |
| 00000060 UCA0CTL0 |
| 00000061 UCA0CTL1 |
| 00000062 UCA0BR0 |
| 00000063 UCA0BR1 |
| 00000064 UCA0MCTL |
| 00000065 UCA0STAT |
| 00000066 UCA0RXBUF |
| 00000067 UCA0TXBUF |
| 00000068 UCB0CTL0 |
| 00000069 UCB0CTL1 |
| 0000006a UCB0BR0 |
| 0000006b UCB0BR1 |
| 0000006c UCB0I2CIE |
| 0000006d UCB0STAT |
| 0000006e UCB0RXBUF |
| 0000006f UCB0TXBUF |
| 00000118 UCB0I2COA |
| 0000011a UCB0I2CSA |
| 0000011e TA1IV |
| 00000120 WDTCTL |
| 00000128 FCTL1 |
| 0000012a FCTL2 |
| 0000012c FCTL3 |
| 0000012e TA0IV |
| 00000160 TA0CTL |
| 00000162 TA0CCTL0 |
| 00000164 TA0CCTL1 |
| 00000166 TA0CCTL2 |
| 00000170 TA0R |
| 00000172 TA0CCR0 |
| 00000174 TA0CCR1 |
| 00000176 TA0CCR2 |
| 00000180 TA1CTL |
| 00000182 TA1CCTL0 |
| 00000184 TA1CCTL1 |
| 00000186 TA1CCTL2 |
| 00000190 TA1R |
| 00000192 TA1CCR0 |
| 00000194 TA1CCR1 |
| 00000196 TA1CCR2 |
| 000001b0 ADC10CTL0 |
| 000001b2 ADC10CTL1 |
| 000001b4 ADC10MEM |
| 000001bc ADC10SA |
| 000003b0 _stack |
| 00000400 __STACK_END |
| 000010f8 CALDCO_16MHZ |
| 000010f9 CALBC1_16MHZ |
| 000010fa CALDCO_12MHZ |
| 000010fb CALBC1_12MHZ |
| 000010fc CALDCO_8MHZ |
| 000010fd CALBC1_8MHZ |
| 000010fe CALDCO_1MHZ |
| 000010ff CALBC1_1MHZ |
| 0000c000 main |
| 0000c070 _auto_init |
| 0000c0ce _c_int00 |
| 0000c0ce _c_int00_noexit |
| 0000c0e8 __mspabi_func_epilog_7 |
| 0000c0ea __mspabi_func_epilog_6 |
| 0000c0ec __mspabi_func_epilog_5 |
| 0000c0ee __mspabi_func_epilog_4 |
| 0000c0f0 __mspabi_func_epilog_3 |
| 0000c0f2 __mspabi_func_epilog_2 |
| 0000c0f4 __mspabi_func_epilog_1 |
| 0000c0f8 __TI_ISR_TRAP |
| 0000c0fe _system_pre_init |
| 0000c102 C$$EXIT |
| 0000c102 abort |
| 0000ffe4 __TI_int02 |
| 0000ffe6 __TI_int03 |
| 0000ffea __TI_int05 |
| 0000ffec __TI_int06 |
| 0000ffee __TI_int07 |
| 0000fff0 __TI_int08 |
| 0000fff2 __TI_int09 |
| 0000fff4 __TI_int10 |
| 0000fff6 __TI_int11 |
| 0000fff8 __TI_int12 |
| 0000fffa __TI_int13 |
| 0000fffc __TI_int14 |
| 0000fffe _reset_vector |
| ffffffff __binit__ |
| ffffffff __c_args__ |
| ffffffff binit |
| UNDEFED __TI_CINIT_Base |
| UNDEFED __TI_CINIT_Limit |
| UNDEFED __TI_Handler_Table_Base |
| UNDEFED __TI_Handler_Table_Limit |
| UNDEFED __TI_INITARRAY_Base |
| UNDEFED __TI_INITARRAY_Limit |
| |
| [135 symbols] |