1,4 → 1,4 |
EESchema Schematic File Version 2 date 3/13/2013 12:14:16 AM |
EESchema Schematic File Version 2 date 3/14/2013 12:50:08 AM |
LIBS:power |
LIBS:device |
LIBS:transistors |
47,7 → 47,7 |
encoding utf-8 |
Sheet 1 18 |
Title "" |
Date "13 mar 2013" |
Date "14 mar 2013" |
Rev "" |
Comp "" |
Comment1 "" |
256,17 → 256,6 |
Text Label 3850 2100 2 60 ~ 0 |
LOAD_IN |
$Comp |
L MCP29X00 U20 |
U 1 1 5132B9CD |
P 2750 4800 |
F 0 "U20" H 2750 5000 60 0000 C CNN |
F 1 "MCP29X00" H 2750 4900 60 0000 C CNN |
F 2 "~" H 2750 4800 60 0000 C CNN |
F 3 "~" H 2750 4800 60 0000 C CNN |
1 2750 4800 |
1 0 0 -1 |
$EndComp |
$Comp |
L BARREL_JACK CON1 |
U 1 1 5132D17C |
P 1900 4900 |
971,7 → 960,7 |
F 2 "~" H 3238 4350 30 0000 C CNN |
F 3 "~" H 3200 4500 60 0000 C CNN |
1 3200 4500 |
1 0 0 -1 |
-1 0 0 1 |
$EndComp |
$Comp |
L C C21 |
1023,4 → 1012,17 |
Wire Wire Line |
1450 2000 1450 1950 |
Connection ~ 1300 2000 |
$Comp |
L REG_PWR_2 U20 |
U 1 1 51416DF1 |
P 2750 4800 |
F 0 "U20" H 2750 5000 60 0000 C CNN |
F 1 "REG_PWR_2" H 2750 4900 60 0000 C CNN |
F 2 "~" H 2750 4800 60 0000 C CNN |
F 3 "~" H 2750 4800 60 0000 C CNN |
1 2750 4800 |
1 0 0 -1 |
$EndComp |
Wire Wire Line |
2750 5150 2900 5150 |
$EndSCHEMATC |