1,4 → 1,4 |
EESchema Schematic File Version 2 date 3/14/2013 6:38:47 AM |
EESchema Schematic File Version 2 date 3/14/2013 8:03:26 PM |
LIBS:power |
LIBS:device |
LIBS:transistors |
47,7 → 47,7 |
encoding utf-8 |
Sheet 18 18 |
Title "" |
Date "14 mar 2013" |
Date "15 mar 2013" |
Rev "" |
Comp "" |
Comment1 "" |
58,7 → 58,7 |
Text HLabel 2550 3550 0 60 Input ~ 0 |
AGND |
Text HLabel 2700 4450 0 60 Input ~ 0 |
VCC |
VDD |
Text HLabel 3600 5400 3 60 Input ~ 0 |
CLKI+ |
Text HLabel 3700 5400 3 60 Input ~ 0 |
80,7 → 80,7 |
Text HLabel 4000 2600 1 60 Output ~ 0 |
LOADO |
Text HLabel 4100 2600 1 60 Input ~ 0 |
VCC |
VDD |
Text HLabel 4100 5400 3 60 Input ~ 0 |
GND |
Text Label 2750 3650 2 60 ~ 0 |
517,7 → 517,7 |
1 0 0 -1 |
$EndComp |
Text HLabel 2200 5150 0 60 Input ~ 0 |
VCC |
VDD |
Wire Wire Line |
2200 5150 2700 5150 |
Wire Wire Line |