Català-Valencià – Catalan中文 – Chinese (Simplified)中文 – Chinese (Traditional)Česky – CzechDansk – DanishNederlands – DutchEnglish – EnglishSuomi – FinnishFrançais – FrenchDeutsch – Germanעברית – Hebrewहिंदी – HindiMagyar – HungarianBahasa Indonesia – IndonesianItaliano – Italian日本語 – Japanese한국어 – KoreanМакедонски – Macedonianमराठी – MarathiNorsk – NorwegianPolski – PolishPortuguês – PortuguesePortuguês – Portuguese (Brazil)Русский – RussianSlovenčina – SlovakSlovenščina – SlovenianEspañol – SpanishSvenska – SwedishTürkçe – TurkishУкраїнська – UkrainianOëzbekcha – Uzbek

Compare Revisions

• This comparison shows the changes necessary to convert path

  → / @ 151

  → / @ 152

  ↔ Reverse comparison

• Compare Path:	Rev

  With Path:	Rev

No changes between revisions

Ignore whitespace Rev 151 → Rev 152

/PIC Stuff/PICX_27J13/Makefile
0,0 → 1,108
#
# There exist several targets which are by default empty and which can be
# used for execution of your targets. These targets are usually executed
# before and after some main targets. They are:
#
# .build-pre: called before 'build' target
# .build-post: called after 'build' target
# .clean-pre: called before 'clean' target
# .clean-post: called after 'clean' target
# .clobber-pre: called before 'clobber' target
# .clobber-post: called after 'clobber' target
# .all-pre: called before 'all' target
# .all-post: called after 'all' target
# .help-pre: called before 'help' target
# .help-post: called after 'help' target
#
# Targets beginning with '.' are not intended to be called on their own.
#
# Main targets can be executed directly, and they are:
#
# build build a specific configuration
# clean remove built files from a configuration
# clobber remove all built files
# all build all configurations
# help print help mesage
#
# Targets .build-impl, .clean-impl, .clobber-impl, .all-impl, and
# .help-impl are implemented in nbproject/makefile-impl.mk.
#
# Available make variables:
#
# CND_BASEDIR base directory for relative paths
# CND_DISTDIR default top distribution directory (build artifacts)
# CND_BUILDDIR default top build directory (object files, ...)
# CONF name of current configuration
# CND_ARTIFACT_DIR_${CONF} directory of build artifact (current configuration)
# CND_ARTIFACT_NAME_${CONF} name of build artifact (current configuration)
# CND_ARTIFACT_PATH_${CONF} path to build artifact (current configuration)
# CND_PACKAGE_DIR_${CONF} directory of package (current configuration)
# CND_PACKAGE_NAME_${CONF} name of package (current configuration)
# CND_PACKAGE_PATH_${CONF} path to package (current configuration)
#
# NOCDDL
# Environment
MKDIR=mkdir
CP=cp
CCADMIN=CCadmin
RANLIB=ranlib
# build
build: .build-post
.build-pre:
# Add your pre 'build' code here...
.build-post: .build-impl
# Add your post 'build' code here...
# clean
clean: .clean-post
.clean-pre:
# Add your pre 'clean' code here...
.clean-post: .clean-impl
# Add your post 'clean' code here...
# clobber
clobber: .clobber-post
.clobber-pre:
# Add your pre 'clobber' code here...
.clobber-post: .clobber-impl
# Add your post 'clobber' code here...
# all
all: .all-post
.all-pre:
# Add your pre 'all' code here...
.all-post: .all-impl
# Add your post 'all' code here...
# help
help: .help-post
.help-pre:
# Add your pre 'help' code here...
.help-post: .help-impl
# Add your post 'help' code here...
# include project implementation makefile
include nbproject/Makefile-impl.mk
# include project make variables
include nbproject/Makefile-variables.mk

/PIC Stuff/PICX_27J13/build/default/production/main.p1
0,0 → 1,8148
Version 3.2 HI-TECH Software Intermediate Code
[p mainexit ]
"18442 C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h
[v _TXIF `Vb ~T0 @X0 0 e@31988 ]
"10272
[v _TXREG `Vuc ~T0 @X0 0 e@4014 ]
[; ;pic18f27j13.h: 44: extern volatile unsigned char ADCTRIG @ 0xEB8;
"46 C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h
[; ;pic18f27j13.h: 46: asm("ADCTRIG equ 0EB8h");
[; <" ADCTRIG equ 0EB8h ;# ">
[; ;pic18f27j13.h: 49: typedef union {
[; ;pic18f27j13.h: 50: struct {
[; ;pic18f27j13.h: 51: unsigned TRIGSEL :2;
[; ;pic18f27j13.h: 52: };
[; ;pic18f27j13.h: 53: struct {
[; ;pic18f27j13.h: 54: unsigned SRC0 :1;
[; ;pic18f27j13.h: 55: unsigned SRC1 :1;
[; ;pic18f27j13.h: 56: };
[; ;pic18f27j13.h: 57: struct {
[; ;pic18f27j13.h: 58: unsigned TRIGSEL0 :1;
[; ;pic18f27j13.h: 59: unsigned TRIGSEL1 :1;
[; ;pic18f27j13.h: 60: };
[; ;pic18f27j13.h: 61: struct {
[; ;pic18f27j13.h: 62: unsigned SRC :2;
[; ;pic18f27j13.h: 63: };
[; ;pic18f27j13.h: 64: } ADCTRIGbits_t;
[; ;pic18f27j13.h: 65: extern volatile ADCTRIGbits_t ADCTRIGbits @ 0xEB8;
[; ;pic18f27j13.h: 99: extern volatile unsigned char PMDIS0 @ 0xEB9;
"101
[; ;pic18f27j13.h: 101: asm("PMDIS0 equ 0EB9h");
[; <" PMDIS0 equ 0EB9h ;# ">
[; ;pic18f27j13.h: 104: extern volatile unsigned char PD0 @ 0xEB9;
"106
[; ;pic18f27j13.h: 106: asm("PD0 equ 0EB9h");
[; <" PD0 equ 0EB9h ;# ">
[; ;pic18f27j13.h: 109: typedef union {
[; ;pic18f27j13.h: 110: struct {
[; ;pic18f27j13.h: 111: unsigned ADCMD :1;
[; ;pic18f27j13.h: 112: unsigned SPI1MD :1;
[; ;pic18f27j13.h: 113: unsigned SPI2MD :1;
[; ;pic18f27j13.h: 114: unsigned UART1MD :1;
[; ;pic18f27j13.h: 115: unsigned UART2MD :1;
[; ;pic18f27j13.h: 116: unsigned ECCP1MD :1;
[; ;pic18f27j13.h: 117: unsigned ECCP2MD :1;
[; ;pic18f27j13.h: 118: unsigned ECCP3MD :1;
[; ;pic18f27j13.h: 119: };
[; ;pic18f27j13.h: 120: struct {
[; ;pic18f27j13.h: 121: unsigned :1;
[; ;pic18f27j13.h: 122: unsigned PMDMSSP1 :1;
[; ;pic18f27j13.h: 123: unsigned PMDMSSP2 :1;
[; ;pic18f27j13.h: 124: unsigned PMDUART1 :1;
[; ;pic18f27j13.h: 125: unsigned PMDUART2 :1;
[; ;pic18f27j13.h: 126: unsigned PMDECCP1 :1;
[; ;pic18f27j13.h: 127: unsigned PMDECCP2 :1;
[; ;pic18f27j13.h: 128: unsigned PMDECCP3 :1;
[; ;pic18f27j13.h: 129: };
[; ;pic18f27j13.h: 130: struct {
[; ;pic18f27j13.h: 131: unsigned PMDADC :1;
[; ;pic18f27j13.h: 132: unsigned PMDMSSP :2;
[; ;pic18f27j13.h: 133: unsigned PMDUART :2;
[; ;pic18f27j13.h: 134: unsigned PMDECCP :3;
[; ;pic18f27j13.h: 135: };
[; ;pic18f27j13.h: 136: struct {
[; ;pic18f27j13.h: 137: unsigned :1;
[; ;pic18f27j13.h: 138: unsigned SPIMD :2;
[; ;pic18f27j13.h: 139: unsigned UARTMD :2;
[; ;pic18f27j13.h: 140: unsigned ECCPMD :3;
[; ;pic18f27j13.h: 141: };
[; ;pic18f27j13.h: 142: } PMDIS0bits_t;
[; ;pic18f27j13.h: 143: extern volatile PMDIS0bits_t PMDIS0bits @ 0xEB9;
[; ;pic18f27j13.h: 256: typedef union {
[; ;pic18f27j13.h: 257: struct {
[; ;pic18f27j13.h: 258: unsigned ADCMD :1;
[; ;pic18f27j13.h: 259: unsigned SPI1MD :1;
[; ;pic18f27j13.h: 260: unsigned SPI2MD :1;
[; ;pic18f27j13.h: 261: unsigned UART1MD :1;
[; ;pic18f27j13.h: 262: unsigned UART2MD :1;
[; ;pic18f27j13.h: 263: unsigned ECCP1MD :1;
[; ;pic18f27j13.h: 264: unsigned ECCP2MD :1;
[; ;pic18f27j13.h: 265: unsigned ECCP3MD :1;
[; ;pic18f27j13.h: 266: };
[; ;pic18f27j13.h: 267: struct {
[; ;pic18f27j13.h: 268: unsigned :1;
[; ;pic18f27j13.h: 269: unsigned PMDMSSP1 :1;
[; ;pic18f27j13.h: 270: unsigned PMDMSSP2 :1;
[; ;pic18f27j13.h: 271: unsigned PMDUART1 :1;
[; ;pic18f27j13.h: 272: unsigned PMDUART2 :1;
[; ;pic18f27j13.h: 273: unsigned PMDECCP1 :1;
[; ;pic18f27j13.h: 274: unsigned PMDECCP2 :1;
[; ;pic18f27j13.h: 275: unsigned PMDECCP3 :1;
[; ;pic18f27j13.h: 276: };
[; ;pic18f27j13.h: 277: struct {
[; ;pic18f27j13.h: 278: unsigned PMDADC :1;
[; ;pic18f27j13.h: 279: unsigned PMDMSSP :2;
[; ;pic18f27j13.h: 280: unsigned PMDUART :2;
[; ;pic18f27j13.h: 281: unsigned PMDECCP :3;
[; ;pic18f27j13.h: 282: };
[; ;pic18f27j13.h: 283: struct {
[; ;pic18f27j13.h: 284: unsigned :1;
[; ;pic18f27j13.h: 285: unsigned SPIMD :2;
[; ;pic18f27j13.h: 286: unsigned UARTMD :2;
[; ;pic18f27j13.h: 287: unsigned ECCPMD :3;
[; ;pic18f27j13.h: 288: };
[; ;pic18f27j13.h: 289: } PD0bits_t;
[; ;pic18f27j13.h: 290: extern volatile PD0bits_t PD0bits @ 0xEB9;
[; ;pic18f27j13.h: 404: extern volatile unsigned char PMDIS1 @ 0xEBA;
"406
[; ;pic18f27j13.h: 406: asm("PMDIS1 equ 0EBAh");
[; <" PMDIS1 equ 0EBAh ;# ">
[; ;pic18f27j13.h: 409: extern volatile unsigned char PD1 @ 0xEBA;
"411
[; ;pic18f27j13.h: 411: asm("PD1 equ 0EBAh");
[; <" PD1 equ 0EBAh ;# ">
[; ;pic18f27j13.h: 414: typedef union {
[; ;pic18f27j13.h: 415: struct {
[; ;pic18f27j13.h: 416: unsigned :1;
[; ;pic18f27j13.h: 417: unsigned TMR1MD :1;
[; ;pic18f27j13.h: 418: unsigned TMR2MD :1;
[; ;pic18f27j13.h: 419: unsigned TMR3MD :1;
[; ;pic18f27j13.h: 420: unsigned TMR4MD :1;
[; ;pic18f27j13.h: 421: unsigned RTCCMD :1;
[; ;pic18f27j13.h: 422: unsigned CTMUMD :1;
[; ;pic18f27j13.h: 423: };
[; ;pic18f27j13.h: 424: struct {
[; ;pic18f27j13.h: 425: unsigned :1;
[; ;pic18f27j13.h: 426: unsigned PMDTMR1 :1;
[; ;pic18f27j13.h: 427: unsigned PMDTMR2 :1;
[; ;pic18f27j13.h: 428: unsigned PMDTMR3 :1;
[; ;pic18f27j13.h: 429: unsigned PMDTMR4 :1;
[; ;pic18f27j13.h: 430: };
[; ;pic18f27j13.h: 431: struct {
[; ;pic18f27j13.h: 432: unsigned :1;
[; ;pic18f27j13.h: 433: unsigned PMDTMR :4;
[; ;pic18f27j13.h: 434: unsigned PMDRTCC :1;
[; ;pic18f27j13.h: 435: unsigned PMDCTMU :1;
[; ;pic18f27j13.h: 436: };
[; ;pic18f27j13.h: 437: struct {
[; ;pic18f27j13.h: 438: unsigned :1;
[; ;pic18f27j13.h: 439: unsigned TMRMD :4;
[; ;pic18f27j13.h: 440: };
[; ;pic18f27j13.h: 441: } PMDIS1bits_t;
[; ;pic18f27j13.h: 442: extern volatile PMDIS1bits_t PMDIS1bits @ 0xEBA;
[; ;pic18f27j13.h: 515: typedef union {
[; ;pic18f27j13.h: 516: struct {
[; ;pic18f27j13.h: 517: unsigned :1;
[; ;pic18f27j13.h: 518: unsigned TMR1MD :1;
[; ;pic18f27j13.h: 519: unsigned TMR2MD :1;
[; ;pic18f27j13.h: 520: unsigned TMR3MD :1;
[; ;pic18f27j13.h: 521: unsigned TMR4MD :1;
[; ;pic18f27j13.h: 522: unsigned RTCCMD :1;
[; ;pic18f27j13.h: 523: unsigned CTMUMD :1;
[; ;pic18f27j13.h: 524: };
[; ;pic18f27j13.h: 525: struct {
[; ;pic18f27j13.h: 526: unsigned :1;
[; ;pic18f27j13.h: 527: unsigned PMDTMR1 :1;
[; ;pic18f27j13.h: 528: unsigned PMDTMR2 :1;
[; ;pic18f27j13.h: 529: unsigned PMDTMR3 :1;
[; ;pic18f27j13.h: 530: unsigned PMDTMR4 :1;
[; ;pic18f27j13.h: 531: };
[; ;pic18f27j13.h: 532: struct {
[; ;pic18f27j13.h: 533: unsigned :1;
[; ;pic18f27j13.h: 534: unsigned PMDTMR :4;
[; ;pic18f27j13.h: 535: unsigned PMDRTCC :1;
[; ;pic18f27j13.h: 536: unsigned PMDCTMU :1;
[; ;pic18f27j13.h: 537: };
[; ;pic18f27j13.h: 538: struct {
[; ;pic18f27j13.h: 539: unsigned :1;
[; ;pic18f27j13.h: 540: unsigned TMRMD :4;
[; ;pic18f27j13.h: 541: };
[; ;pic18f27j13.h: 542: } PD1bits_t;
[; ;pic18f27j13.h: 543: extern volatile PD1bits_t PD1bits @ 0xEBA;
[; ;pic18f27j13.h: 617: extern volatile unsigned char PMDIS2 @ 0xEBB;
"619
[; ;pic18f27j13.h: 619: asm("PMDIS2 equ 0EBBh");
[; <" PMDIS2 equ 0EBBh ;# ">
[; ;pic18f27j13.h: 622: extern volatile unsigned char PD2 @ 0xEBB;
"624
[; ;pic18f27j13.h: 624: asm("PD2 equ 0EBBh");
[; <" PD2 equ 0EBBh ;# ">
[; ;pic18f27j13.h: 627: typedef union {
[; ;pic18f27j13.h: 628: struct {
[; ;pic18f27j13.h: 629: unsigned CMP1MD :1;
[; ;pic18f27j13.h: 630: unsigned CMP2MD :1;
[; ;pic18f27j13.h: 631: unsigned CMP3MD :1;
[; ;pic18f27j13.h: 632: unsigned TMR5MD :1;
[; ;pic18f27j13.h: 633: unsigned TMR6MD :1;
[; ;pic18f27j13.h: 634: unsigned :1;
[; ;pic18f27j13.h: 635: unsigned TMR8MD :1;
[; ;pic18f27j13.h: 636: };
[; ;pic18f27j13.h: 637: struct {
[; ;pic18f27j13.h: 638: unsigned PMDCMP1 :1;
[; ;pic18f27j13.h: 639: unsigned PMDCMP2 :1;
[; ;pic18f27j13.h: 640: unsigned PMDCMP3 :1;
[; ;pic18f27j13.h: 641: };
[; ;pic18f27j13.h: 642: struct {
[; ;pic18f27j13.h: 643: unsigned PMDCMP :3;
[; ;pic18f27j13.h: 644: unsigned PMDTMR5 :1;
[; ;pic18f27j13.h: 645: unsigned PMDTMR6 :1;
[; ;pic18f27j13.h: 646: unsigned :1;
[; ;pic18f27j13.h: 647: unsigned PMDTMR8 :1;
[; ;pic18f27j13.h: 648: };
[; ;pic18f27j13.h: 649: struct {
[; ;pic18f27j13.h: 650: unsigned CMPMD :3;
[; ;pic18f27j13.h: 651: };
[; ;pic18f27j13.h: 652: } PMDIS2bits_t;
[; ;pic18f27j13.h: 653: extern volatile PMDIS2bits_t PMDIS2bits @ 0xEBB;
[; ;pic18f27j13.h: 726: typedef union {
[; ;pic18f27j13.h: 727: struct {
[; ;pic18f27j13.h: 728: unsigned CMP1MD :1;
[; ;pic18f27j13.h: 729: unsigned CMP2MD :1;
[; ;pic18f27j13.h: 730: unsigned CMP3MD :1;
[; ;pic18f27j13.h: 731: unsigned TMR5MD :1;
[; ;pic18f27j13.h: 732: unsigned TMR6MD :1;
[; ;pic18f27j13.h: 733: unsigned :1;
[; ;pic18f27j13.h: 734: unsigned TMR8MD :1;
[; ;pic18f27j13.h: 735: };
[; ;pic18f27j13.h: 736: struct {
[; ;pic18f27j13.h: 737: unsigned PMDCMP1 :1;
[; ;pic18f27j13.h: 738: unsigned PMDCMP2 :1;
[; ;pic18f27j13.h: 739: unsigned PMDCMP3 :1;
[; ;pic18f27j13.h: 740: };
[; ;pic18f27j13.h: 741: struct {
[; ;pic18f27j13.h: 742: unsigned PMDCMP :3;
[; ;pic18f27j13.h: 743: unsigned PMDTMR5 :1;
[; ;pic18f27j13.h: 744: unsigned PMDTMR6 :1;
[; ;pic18f27j13.h: 745: unsigned :1;
[; ;pic18f27j13.h: 746: unsigned PMDTMR8 :1;
[; ;pic18f27j13.h: 747: };
[; ;pic18f27j13.h: 748: struct {
[; ;pic18f27j13.h: 749: unsigned CMPMD :3;
[; ;pic18f27j13.h: 750: };
[; ;pic18f27j13.h: 751: } PD2bits_t;
[; ;pic18f27j13.h: 752: extern volatile PD2bits_t PD2bits @ 0xEBB;
[; ;pic18f27j13.h: 826: extern volatile unsigned char PMDIS3 @ 0xEBC;
"828
[; ;pic18f27j13.h: 828: asm("PMDIS3 equ 0EBCh");
[; <" PMDIS3 equ 0EBCh ;# ">
[; ;pic18f27j13.h: 831: extern volatile unsigned char PD3 @ 0xEBC;
"833
[; ;pic18f27j13.h: 833: asm("PD3 equ 0EBCh");
[; <" PD3 equ 0EBCh ;# ">
[; ;pic18f27j13.h: 836: typedef union {
[; ;pic18f27j13.h: 837: struct {
[; ;pic18f27j13.h: 838: unsigned :1;
[; ;pic18f27j13.h: 839: unsigned CCP4MD :1;
[; ;pic18f27j13.h: 840: unsigned CCP5MD :1;
[; ;pic18f27j13.h: 841: unsigned CCP6MD :1;
[; ;pic18f27j13.h: 842: unsigned CCP7MD :1;
[; ;pic18f27j13.h: 843: unsigned CCP8MD :1;
[; ;pic18f27j13.h: 844: unsigned CCP9MD :1;
[; ;pic18f27j13.h: 845: unsigned CCP10MD :1;
[; ;pic18f27j13.h: 846: };
[; ;pic18f27j13.h: 847: struct {
[; ;pic18f27j13.h: 848: unsigned :1;
[; ;pic18f27j13.h: 849: unsigned PMDCCP4 :1;
[; ;pic18f27j13.h: 850: unsigned PMDCCP5 :1;
[; ;pic18f27j13.h: 851: unsigned PMDCCP6 :1;
[; ;pic18f27j13.h: 852: unsigned PMDCCP7 :1;
[; ;pic18f27j13.h: 853: unsigned PMDCCP8 :1;
[; ;pic18f27j13.h: 854: unsigned PMDCCP9 :1;
[; ;pic18f27j13.h: 855: unsigned PMDCCP10 :1;
[; ;pic18f27j13.h: 856: };
[; ;pic18f27j13.h: 857: struct {
[; ;pic18f27j13.h: 858: unsigned :1;
[; ;pic18f27j13.h: 859: unsigned PMDCCP :7;
[; ;pic18f27j13.h: 860: };
[; ;pic18f27j13.h: 861: struct {
[; ;pic18f27j13.h: 862: unsigned :1;
[; ;pic18f27j13.h: 863: unsigned CCPMD :7;
[; ;pic18f27j13.h: 864: };
[; ;pic18f27j13.h: 865: } PMDIS3bits_t;
[; ;pic18f27j13.h: 866: extern volatile PMDIS3bits_t PMDIS3bits @ 0xEBC;
[; ;pic18f27j13.h: 949: typedef union {
[; ;pic18f27j13.h: 950: struct {
[; ;pic18f27j13.h: 951: unsigned :1;
[; ;pic18f27j13.h: 952: unsigned CCP4MD :1;
[; ;pic18f27j13.h: 953: unsigned CCP5MD :1;
[; ;pic18f27j13.h: 954: unsigned CCP6MD :1;
[; ;pic18f27j13.h: 955: unsigned CCP7MD :1;
[; ;pic18f27j13.h: 956: unsigned CCP8MD :1;
[; ;pic18f27j13.h: 957: unsigned CCP9MD :1;
[; ;pic18f27j13.h: 958: unsigned CCP10MD :1;
[; ;pic18f27j13.h: 959: };
[; ;pic18f27j13.h: 960: struct {
[; ;pic18f27j13.h: 961: unsigned :1;
[; ;pic18f27j13.h: 962: unsigned PMDCCP4 :1;
[; ;pic18f27j13.h: 963: unsigned PMDCCP5 :1;
[; ;pic18f27j13.h: 964: unsigned PMDCCP6 :1;
[; ;pic18f27j13.h: 965: unsigned PMDCCP7 :1;
[; ;pic18f27j13.h: 966: unsigned PMDCCP8 :1;
[; ;pic18f27j13.h: 967: unsigned PMDCCP9 :1;
[; ;pic18f27j13.h: 968: unsigned PMDCCP10 :1;
[; ;pic18f27j13.h: 969: };
[; ;pic18f27j13.h: 970: struct {
[; ;pic18f27j13.h: 971: unsigned :1;
[; ;pic18f27j13.h: 972: unsigned PMDCCP :7;
[; ;pic18f27j13.h: 973: };
[; ;pic18f27j13.h: 974: struct {
[; ;pic18f27j13.h: 975: unsigned :1;
[; ;pic18f27j13.h: 976: unsigned CCPMD :7;
[; ;pic18f27j13.h: 977: };
[; ;pic18f27j13.h: 978: } PD3bits_t;
[; ;pic18f27j13.h: 979: extern volatile PD3bits_t PD3bits @ 0xEBC;
[; ;pic18f27j13.h: 1063: extern volatile unsigned char PPSCON @ 0xEBF;
"1065
[; ;pic18f27j13.h: 1065: asm("PPSCON equ 0EBFh");
[; <" PPSCON equ 0EBFh ;# ">
[; ;pic18f27j13.h: 1068: typedef union {
[; ;pic18f27j13.h: 1069: struct {
[; ;pic18f27j13.h: 1070: unsigned IOLOCK :1;
[; ;pic18f27j13.h: 1071: };
[; ;pic18f27j13.h: 1072: } PPSCONbits_t;
[; ;pic18f27j13.h: 1073: extern volatile PPSCONbits_t PPSCONbits @ 0xEBF;
[; ;pic18f27j13.h: 1082: extern volatile unsigned char RPOR0 @ 0xEC0;
"1084
[; ;pic18f27j13.h: 1084: asm("RPOR0 equ 0EC0h");
[; <" RPOR0 equ 0EC0h ;# ">
[; ;pic18f27j13.h: 1088: extern volatile unsigned char RPOR1 @ 0xEC1;
"1090
[; ;pic18f27j13.h: 1090: asm("RPOR1 equ 0EC1h");
[; <" RPOR1 equ 0EC1h ;# ">
[; ;pic18f27j13.h: 1094: extern volatile unsigned char RPOR2 @ 0xEC2;
"1096
[; ;pic18f27j13.h: 1096: asm("RPOR2 equ 0EC2h");
[; <" RPOR2 equ 0EC2h ;# ">
[; ;pic18f27j13.h: 1100: extern volatile unsigned char RPOR3 @ 0xEC3;
"1102
[; ;pic18f27j13.h: 1102: asm("RPOR3 equ 0EC3h");
[; <" RPOR3 equ 0EC3h ;# ">
[; ;pic18f27j13.h: 1106: extern volatile unsigned char RPOR4 @ 0xEC4;
"1108
[; ;pic18f27j13.h: 1108: asm("RPOR4 equ 0EC4h");
[; <" RPOR4 equ 0EC4h ;# ">
[; ;pic18f27j13.h: 1112: extern volatile unsigned char RPOR5 @ 0xEC5;
"1114
[; ;pic18f27j13.h: 1114: asm("RPOR5 equ 0EC5h");
[; <" RPOR5 equ 0EC5h ;# ">
[; ;pic18f27j13.h: 1118: extern volatile unsigned char RPOR6 @ 0xEC6;
"1120
[; ;pic18f27j13.h: 1120: asm("RPOR6 equ 0EC6h");
[; <" RPOR6 equ 0EC6h ;# ">
[; ;pic18f27j13.h: 1124: extern volatile unsigned char RPOR7 @ 0xEC7;
"1126
[; ;pic18f27j13.h: 1126: asm("RPOR7 equ 0EC7h");
[; <" RPOR7 equ 0EC7h ;# ">
[; ;pic18f27j13.h: 1130: extern volatile unsigned char RPOR8 @ 0xEC8;
"1132
[; ;pic18f27j13.h: 1132: asm("RPOR8 equ 0EC8h");
[; <" RPOR8 equ 0EC8h ;# ">
[; ;pic18f27j13.h: 1136: extern volatile unsigned char RPOR9 @ 0xEC9;
"1138
[; ;pic18f27j13.h: 1138: asm("RPOR9 equ 0EC9h");
[; <" RPOR9 equ 0EC9h ;# ">
[; ;pic18f27j13.h: 1142: extern volatile unsigned char RPOR10 @ 0xECA;
"1144
[; ;pic18f27j13.h: 1144: asm("RPOR10 equ 0ECAh");
[; <" RPOR10 equ 0ECAh ;# ">
[; ;pic18f27j13.h: 1148: extern volatile unsigned char RPOR11 @ 0xECB;
"1150
[; ;pic18f27j13.h: 1150: asm("RPOR11 equ 0ECBh");
[; <" RPOR11 equ 0ECBh ;# ">
[; ;pic18f27j13.h: 1154: extern volatile unsigned char RPOR12 @ 0xECC;
"1156
[; ;pic18f27j13.h: 1156: asm("RPOR12 equ 0ECCh");
[; <" RPOR12 equ 0ECCh ;# ">
[; ;pic18f27j13.h: 1160: extern volatile unsigned char RPOR13 @ 0xECD;
"1162
[; ;pic18f27j13.h: 1162: asm("RPOR13 equ 0ECDh");
[; <" RPOR13 equ 0ECDh ;# ">
[; ;pic18f27j13.h: 1166: extern volatile unsigned char RPOR14 @ 0xECE;
"1168
[; ;pic18f27j13.h: 1168: asm("RPOR14 equ 0ECEh");
[; <" RPOR14 equ 0ECEh ;# ">
[; ;pic18f27j13.h: 1172: extern volatile unsigned char RPOR15 @ 0xECF;
"1174
[; ;pic18f27j13.h: 1174: asm("RPOR15 equ 0ECFh");
[; <" RPOR15 equ 0ECFh ;# ">
[; ;pic18f27j13.h: 1178: extern volatile unsigned char RPOR16 @ 0xED0;
"1180
[; ;pic18f27j13.h: 1180: asm("RPOR16 equ 0ED0h");
[; <" RPOR16 equ 0ED0h ;# ">
[; ;pic18f27j13.h: 1184: extern volatile unsigned char RPOR17 @ 0xED1;
"1186
[; ;pic18f27j13.h: 1186: asm("RPOR17 equ 0ED1h");
[; <" RPOR17 equ 0ED1h ;# ">
[; ;pic18f27j13.h: 1190: extern volatile unsigned char RPOR18 @ 0xED2;
"1192
[; ;pic18f27j13.h: 1192: asm("RPOR18 equ 0ED2h");
[; <" RPOR18 equ 0ED2h ;# ">
[; ;pic18f27j13.h: 1196: extern volatile unsigned char RPINR1 @ 0xEE1;
"1198
[; ;pic18f27j13.h: 1198: asm("RPINR1 equ 0EE1h");
[; <" RPINR1 equ 0EE1h ;# ">
[; ;pic18f27j13.h: 1202: extern volatile unsigned char RPINR2 @ 0xEE2;
"1204
[; ;pic18f27j13.h: 1204: asm("RPINR2 equ 0EE2h");
[; <" RPINR2 equ 0EE2h ;# ">
[; ;pic18f27j13.h: 1208: extern volatile unsigned char RPINR3 @ 0xEE3;
"1210
[; ;pic18f27j13.h: 1210: asm("RPINR3 equ 0EE3h");
[; <" RPINR3 equ 0EE3h ;# ">
[; ;pic18f27j13.h: 1214: extern volatile unsigned char RPINR4 @ 0xEE4;
"1216
[; ;pic18f27j13.h: 1216: asm("RPINR4 equ 0EE4h");
[; <" RPINR4 equ 0EE4h ;# ">
[; ;pic18f27j13.h: 1220: extern volatile unsigned char RPINR6 @ 0xEE6;
"1222
[; ;pic18f27j13.h: 1222: asm("RPINR6 equ 0EE6h");
[; <" RPINR6 equ 0EE6h ;# ">
[; ;pic18f27j13.h: 1226: extern volatile unsigned char RPINR15 @ 0xEE7;
"1228
[; ;pic18f27j13.h: 1228: asm("RPINR15 equ 0EE7h");
[; <" RPINR15 equ 0EE7h ;# ">
[; ;pic18f27j13.h: 1232: extern volatile unsigned char RPINR7 @ 0xEE8;
"1234
[; ;pic18f27j13.h: 1234: asm("RPINR7 equ 0EE8h");
[; <" RPINR7 equ 0EE8h ;# ">
[; ;pic18f27j13.h: 1238: extern volatile unsigned char RPINR8 @ 0xEE9;
"1240
[; ;pic18f27j13.h: 1240: asm("RPINR8 equ 0EE9h");
[; <" RPINR8 equ 0EE9h ;# ">
[; ;pic18f27j13.h: 1244: extern volatile unsigned char RPINR9 @ 0xEEA;
"1246
[; ;pic18f27j13.h: 1246: asm("RPINR9 equ 0EEAh");
[; <" RPINR9 equ 0EEAh ;# ">
[; ;pic18f27j13.h: 1250: extern volatile unsigned char RPINR12 @ 0xEF2;
"1252
[; ;pic18f27j13.h: 1252: asm("RPINR12 equ 0EF2h");
[; <" RPINR12 equ 0EF2h ;# ">
[; ;pic18f27j13.h: 1256: extern volatile unsigned char RPINR13 @ 0xEF3;
"1258
[; ;pic18f27j13.h: 1258: asm("RPINR13 equ 0EF3h");
[; <" RPINR13 equ 0EF3h ;# ">
[; ;pic18f27j13.h: 1262: extern volatile unsigned char RPINR14 @ 0xEF4;
"1264
[; ;pic18f27j13.h: 1264: asm("RPINR14 equ 0EF4h");
[; <" RPINR14 equ 0EF4h ;# ">
[; ;pic18f27j13.h: 1268: extern volatile unsigned char RPINR16 @ 0xEF7;
"1270
[; ;pic18f27j13.h: 1270: asm("RPINR16 equ 0EF7h");
[; <" RPINR16 equ 0EF7h ;# ">
[; ;pic18f27j13.h: 1274: extern volatile unsigned char RPINR17 @ 0xEF8;
"1276
[; ;pic18f27j13.h: 1276: asm("RPINR17 equ 0EF8h");
[; <" RPINR17 equ 0EF8h ;# ">
[; ;pic18f27j13.h: 1280: extern volatile unsigned char RPINR21 @ 0xEFC;
"1282
[; ;pic18f27j13.h: 1282: asm("RPINR21 equ 0EFCh");
[; <" RPINR21 equ 0EFCh ;# ">
[; ;pic18f27j13.h: 1286: extern volatile unsigned char RPINR22 @ 0xEFD;
"1288
[; ;pic18f27j13.h: 1288: asm("RPINR22 equ 0EFDh");
[; <" RPINR22 equ 0EFDh ;# ">
[; ;pic18f27j13.h: 1292: extern volatile unsigned char RPINR23 @ 0xEFE;
"1294
[; ;pic18f27j13.h: 1294: asm("RPINR23 equ 0EFEh");
[; <" RPINR23 equ 0EFEh ;# ">
[; ;pic18f27j13.h: 1298: extern volatile unsigned char RPINR24 @ 0xEFF;
"1300
[; ;pic18f27j13.h: 1300: asm("RPINR24 equ 0EFFh");
[; <" RPINR24 equ 0EFFh ;# ">
[; ;pic18f27j13.h: 1304: extern volatile unsigned char CCP10CON @ 0xF00;
"1306
[; ;pic18f27j13.h: 1306: asm("CCP10CON equ 0F00h");
[; <" CCP10CON equ 0F00h ;# ">
[; ;pic18f27j13.h: 1309: typedef union {
[; ;pic18f27j13.h: 1310: struct {
[; ;pic18f27j13.h: 1311: unsigned CCP10M :4;
[; ;pic18f27j13.h: 1312: unsigned DC10B :2;
[; ;pic18f27j13.h: 1313: };
[; ;pic18f27j13.h: 1314: struct {
[; ;pic18f27j13.h: 1315: unsigned CCP10M0 :1;
[; ;pic18f27j13.h: 1316: unsigned CCP10M1 :1;
[; ;pic18f27j13.h: 1317: unsigned CCP10M2 :1;
[; ;pic18f27j13.h: 1318: unsigned CCP10M3 :1;
[; ;pic18f27j13.h: 1319: unsigned DC10B0 :1;
[; ;pic18f27j13.h: 1320: unsigned DC10B1 :1;
[; ;pic18f27j13.h: 1321: };
[; ;pic18f27j13.h: 1322: } CCP10CONbits_t;
[; ;pic18f27j13.h: 1323: extern volatile CCP10CONbits_t CCP10CONbits @ 0xF00;
[; ;pic18f27j13.h: 1367: extern volatile unsigned char CCPR10L @ 0xF01;
"1369
[; ;pic18f27j13.h: 1369: asm("CCPR10L equ 0F01h");
[; <" CCPR10L equ 0F01h ;# ">
[; ;pic18f27j13.h: 1372: typedef union {
[; ;pic18f27j13.h: 1373: struct {
[; ;pic18f27j13.h: 1374: unsigned CCPR10L :8;
[; ;pic18f27j13.h: 1375: };
[; ;pic18f27j13.h: 1376: } CCPR10Lbits_t;
[; ;pic18f27j13.h: 1377: extern volatile CCPR10Lbits_t CCPR10Lbits @ 0xF01;
[; ;pic18f27j13.h: 1386: extern volatile unsigned char CCPR10H @ 0xF02;
"1388
[; ;pic18f27j13.h: 1388: asm("CCPR10H equ 0F02h");
[; <" CCPR10H equ 0F02h ;# ">
[; ;pic18f27j13.h: 1391: typedef union {
[; ;pic18f27j13.h: 1392: struct {
[; ;pic18f27j13.h: 1393: unsigned CCPR10H :8;
[; ;pic18f27j13.h: 1394: };
[; ;pic18f27j13.h: 1395: } CCPR10Hbits_t;
[; ;pic18f27j13.h: 1396: extern volatile CCPR10Hbits_t CCPR10Hbits @ 0xF02;
[; ;pic18f27j13.h: 1405: extern volatile unsigned char CCP9CON @ 0xF03;
"1407
[; ;pic18f27j13.h: 1407: asm("CCP9CON equ 0F03h");
[; <" CCP9CON equ 0F03h ;# ">
[; ;pic18f27j13.h: 1410: typedef union {
[; ;pic18f27j13.h: 1411: struct {
[; ;pic18f27j13.h: 1412: unsigned CCP9M :4;
[; ;pic18f27j13.h: 1413: unsigned DC9B :2;
[; ;pic18f27j13.h: 1414: };
[; ;pic18f27j13.h: 1415: struct {
[; ;pic18f27j13.h: 1416: unsigned CCP9M0 :1;
[; ;pic18f27j13.h: 1417: unsigned CCP9M1 :1;
[; ;pic18f27j13.h: 1418: unsigned CCP9M2 :1;
[; ;pic18f27j13.h: 1419: unsigned CCP9M3 :1;
[; ;pic18f27j13.h: 1420: unsigned DC9B0 :1;
[; ;pic18f27j13.h: 1421: unsigned DC9B1 :1;
[; ;pic18f27j13.h: 1422: };
[; ;pic18f27j13.h: 1423: } CCP9CONbits_t;
[; ;pic18f27j13.h: 1424: extern volatile CCP9CONbits_t CCP9CONbits @ 0xF03;
[; ;pic18f27j13.h: 1468: extern volatile unsigned char CCPR9L @ 0xF04;
"1470
[; ;pic18f27j13.h: 1470: asm("CCPR9L equ 0F04h");
[; <" CCPR9L equ 0F04h ;# ">
[; ;pic18f27j13.h: 1473: typedef union {
[; ;pic18f27j13.h: 1474: struct {
[; ;pic18f27j13.h: 1475: unsigned CCPR9L :8;
[; ;pic18f27j13.h: 1476: };
[; ;pic18f27j13.h: 1477: } CCPR9Lbits_t;
[; ;pic18f27j13.h: 1478: extern volatile CCPR9Lbits_t CCPR9Lbits @ 0xF04;
[; ;pic18f27j13.h: 1487: extern volatile unsigned char CCPR9H @ 0xF05;
"1489
[; ;pic18f27j13.h: 1489: asm("CCPR9H equ 0F05h");
[; <" CCPR9H equ 0F05h ;# ">
[; ;pic18f27j13.h: 1492: typedef union {
[; ;pic18f27j13.h: 1493: struct {
[; ;pic18f27j13.h: 1494: unsigned CCPR9H :8;
[; ;pic18f27j13.h: 1495: };
[; ;pic18f27j13.h: 1496: } CCPR9Hbits_t;
[; ;pic18f27j13.h: 1497: extern volatile CCPR9Hbits_t CCPR9Hbits @ 0xF05;
[; ;pic18f27j13.h: 1506: extern volatile unsigned char CCP8CON @ 0xF06;
"1508
[; ;pic18f27j13.h: 1508: asm("CCP8CON equ 0F06h");
[; <" CCP8CON equ 0F06h ;# ">
[; ;pic18f27j13.h: 1511: typedef union {
[; ;pic18f27j13.h: 1512: struct {
[; ;pic18f27j13.h: 1513: unsigned CCP8M :4;
[; ;pic18f27j13.h: 1514: unsigned DC8B :2;
[; ;pic18f27j13.h: 1515: };
[; ;pic18f27j13.h: 1516: struct {
[; ;pic18f27j13.h: 1517: unsigned CCP8M0 :1;
[; ;pic18f27j13.h: 1518: unsigned CCP8M1 :1;
[; ;pic18f27j13.h: 1519: unsigned CCP8M2 :1;
[; ;pic18f27j13.h: 1520: unsigned CCP8M3 :1;
[; ;pic18f27j13.h: 1521: unsigned DC8B0 :1;
[; ;pic18f27j13.h: 1522: unsigned DC8B1 :1;
[; ;pic18f27j13.h: 1523: };
[; ;pic18f27j13.h: 1524: } CCP8CONbits_t;
[; ;pic18f27j13.h: 1525: extern volatile CCP8CONbits_t CCP8CONbits @ 0xF06;
[; ;pic18f27j13.h: 1569: extern volatile unsigned char CCPR8L @ 0xF07;
"1571
[; ;pic18f27j13.h: 1571: asm("CCPR8L equ 0F07h");
[; <" CCPR8L equ 0F07h ;# ">
[; ;pic18f27j13.h: 1574: typedef union {
[; ;pic18f27j13.h: 1575: struct {
[; ;pic18f27j13.h: 1576: unsigned CCPR8L :8;
[; ;pic18f27j13.h: 1577: };
[; ;pic18f27j13.h: 1578: } CCPR8Lbits_t;
[; ;pic18f27j13.h: 1579: extern volatile CCPR8Lbits_t CCPR8Lbits @ 0xF07;
[; ;pic18f27j13.h: 1588: extern volatile unsigned char CCPR8H @ 0xF08;
"1590
[; ;pic18f27j13.h: 1590: asm("CCPR8H equ 0F08h");
[; <" CCPR8H equ 0F08h ;# ">
[; ;pic18f27j13.h: 1593: typedef union {
[; ;pic18f27j13.h: 1594: struct {
[; ;pic18f27j13.h: 1595: unsigned CCPR8H :8;
[; ;pic18f27j13.h: 1596: };
[; ;pic18f27j13.h: 1597: } CCPR8Hbits_t;
[; ;pic18f27j13.h: 1598: extern volatile CCPR8Hbits_t CCPR8Hbits @ 0xF08;
[; ;pic18f27j13.h: 1607: extern volatile unsigned char CCP7CON @ 0xF09;
"1609
[; ;pic18f27j13.h: 1609: asm("CCP7CON equ 0F09h");
[; <" CCP7CON equ 0F09h ;# ">
[; ;pic18f27j13.h: 1612: typedef union {
[; ;pic18f27j13.h: 1613: struct {
[; ;pic18f27j13.h: 1614: unsigned CCP7M :4;
[; ;pic18f27j13.h: 1615: unsigned DC7B :2;
[; ;pic18f27j13.h: 1616: };
[; ;pic18f27j13.h: 1617: struct {
[; ;pic18f27j13.h: 1618: unsigned CCP7M0 :1;
[; ;pic18f27j13.h: 1619: unsigned CCP7M1 :1;
[; ;pic18f27j13.h: 1620: unsigned CCP7M2 :1;
[; ;pic18f27j13.h: 1621: unsigned CCP7M3 :1;
[; ;pic18f27j13.h: 1622: unsigned DC7B0 :1;
[; ;pic18f27j13.h: 1623: unsigned DC7B1 :1;
[; ;pic18f27j13.h: 1624: };
[; ;pic18f27j13.h: 1625: } CCP7CONbits_t;
[; ;pic18f27j13.h: 1626: extern volatile CCP7CONbits_t CCP7CONbits @ 0xF09;
[; ;pic18f27j13.h: 1670: extern volatile unsigned char CCPR7L @ 0xF0A;
"1672
[; ;pic18f27j13.h: 1672: asm("CCPR7L equ 0F0Ah");
[; <" CCPR7L equ 0F0Ah ;# ">
[; ;pic18f27j13.h: 1675: typedef union {
[; ;pic18f27j13.h: 1676: struct {
[; ;pic18f27j13.h: 1677: unsigned CCPR7L :8;
[; ;pic18f27j13.h: 1678: };
[; ;pic18f27j13.h: 1679: } CCPR7Lbits_t;
[; ;pic18f27j13.h: 1680: extern volatile CCPR7Lbits_t CCPR7Lbits @ 0xF0A;
[; ;pic18f27j13.h: 1689: extern volatile unsigned char CCPR7H @ 0xF0B;
"1691
[; ;pic18f27j13.h: 1691: asm("CCPR7H equ 0F0Bh");
[; <" CCPR7H equ 0F0Bh ;# ">
[; ;pic18f27j13.h: 1694: typedef union {
[; ;pic18f27j13.h: 1695: struct {
[; ;pic18f27j13.h: 1696: unsigned CCPR7H :8;
[; ;pic18f27j13.h: 1697: };
[; ;pic18f27j13.h: 1698: } CCPR7Hbits_t;
[; ;pic18f27j13.h: 1699: extern volatile CCPR7Hbits_t CCPR7Hbits @ 0xF0B;
[; ;pic18f27j13.h: 1708: extern volatile unsigned char CCP6CON @ 0xF0C;
"1710
[; ;pic18f27j13.h: 1710: asm("CCP6CON equ 0F0Ch");
[; <" CCP6CON equ 0F0Ch ;# ">
[; ;pic18f27j13.h: 1713: typedef union {
[; ;pic18f27j13.h: 1714: struct {
[; ;pic18f27j13.h: 1715: unsigned CCP6M :4;
[; ;pic18f27j13.h: 1716: unsigned DC6B :2;
[; ;pic18f27j13.h: 1717: };
[; ;pic18f27j13.h: 1718: struct {
[; ;pic18f27j13.h: 1719: unsigned CCP6M0 :1;
[; ;pic18f27j13.h: 1720: unsigned CCP6M1 :1;
[; ;pic18f27j13.h: 1721: unsigned CCP6M2 :1;
[; ;pic18f27j13.h: 1722: unsigned CCP6M3 :1;
[; ;pic18f27j13.h: 1723: unsigned DC6B0 :1;
[; ;pic18f27j13.h: 1724: unsigned DC6B1 :1;
[; ;pic18f27j13.h: 1725: };
[; ;pic18f27j13.h: 1726: } CCP6CONbits_t;
[; ;pic18f27j13.h: 1727: extern volatile CCP6CONbits_t CCP6CONbits @ 0xF0C;
[; ;pic18f27j13.h: 1771: extern volatile unsigned char CCPR6L @ 0xF0D;
"1773
[; ;pic18f27j13.h: 1773: asm("CCPR6L equ 0F0Dh");
[; <" CCPR6L equ 0F0Dh ;# ">
[; ;pic18f27j13.h: 1776: typedef union {
[; ;pic18f27j13.h: 1777: struct {
[; ;pic18f27j13.h: 1778: unsigned CCPR6L :8;
[; ;pic18f27j13.h: 1779: };
[; ;pic18f27j13.h: 1780: } CCPR6Lbits_t;
[; ;pic18f27j13.h: 1781: extern volatile CCPR6Lbits_t CCPR6Lbits @ 0xF0D;
[; ;pic18f27j13.h: 1790: extern volatile unsigned char CCPR6H @ 0xF0E;
"1792
[; ;pic18f27j13.h: 1792: asm("CCPR6H equ 0F0Eh");
[; <" CCPR6H equ 0F0Eh ;# ">
[; ;pic18f27j13.h: 1795: typedef union {
[; ;pic18f27j13.h: 1796: struct {
[; ;pic18f27j13.h: 1797: unsigned CCPR6H :8;
[; ;pic18f27j13.h: 1798: };
[; ;pic18f27j13.h: 1799: } CCPR6Hbits_t;
[; ;pic18f27j13.h: 1800: extern volatile CCPR6Hbits_t CCPR6Hbits @ 0xF0E;
[; ;pic18f27j13.h: 1809: extern volatile unsigned char CCP5CON @ 0xF0F;
"1811
[; ;pic18f27j13.h: 1811: asm("CCP5CON equ 0F0Fh");
[; <" CCP5CON equ 0F0Fh ;# ">
[; ;pic18f27j13.h: 1814: typedef union {
[; ;pic18f27j13.h: 1815: struct {
[; ;pic18f27j13.h: 1816: unsigned CCP5M :4;
[; ;pic18f27j13.h: 1817: unsigned DC5B :2;
[; ;pic18f27j13.h: 1818: };
[; ;pic18f27j13.h: 1819: struct {
[; ;pic18f27j13.h: 1820: unsigned CCP5M0 :1;
[; ;pic18f27j13.h: 1821: unsigned CCP5M1 :1;
[; ;pic18f27j13.h: 1822: unsigned CCP5M2 :1;
[; ;pic18f27j13.h: 1823: unsigned CCP5M3 :1;
[; ;pic18f27j13.h: 1824: unsigned DC5B0 :1;
[; ;pic18f27j13.h: 1825: unsigned DC5B1 :1;
[; ;pic18f27j13.h: 1826: };
[; ;pic18f27j13.h: 1827: } CCP5CONbits_t;
[; ;pic18f27j13.h: 1828: extern volatile CCP5CONbits_t CCP5CONbits @ 0xF0F;
[; ;pic18f27j13.h: 1872: extern volatile unsigned char CCPR5L @ 0xF10;
"1874
[; ;pic18f27j13.h: 1874: asm("CCPR5L equ 0F10h");
[; <" CCPR5L equ 0F10h ;# ">
[; ;pic18f27j13.h: 1877: typedef union {
[; ;pic18f27j13.h: 1878: struct {
[; ;pic18f27j13.h: 1879: unsigned CCPR5L :8;
[; ;pic18f27j13.h: 1880: };
[; ;pic18f27j13.h: 1881: } CCPR5Lbits_t;
[; ;pic18f27j13.h: 1882: extern volatile CCPR5Lbits_t CCPR5Lbits @ 0xF10;
[; ;pic18f27j13.h: 1891: extern volatile unsigned char CCPR5H @ 0xF11;
"1893
[; ;pic18f27j13.h: 1893: asm("CCPR5H equ 0F11h");
[; <" CCPR5H equ 0F11h ;# ">
[; ;pic18f27j13.h: 1896: typedef union {
[; ;pic18f27j13.h: 1897: struct {
[; ;pic18f27j13.h: 1898: unsigned CCPR5H :8;
[; ;pic18f27j13.h: 1899: };
[; ;pic18f27j13.h: 1900: } CCPR5Hbits_t;
[; ;pic18f27j13.h: 1901: extern volatile CCPR5Hbits_t CCPR5Hbits @ 0xF11;
[; ;pic18f27j13.h: 1910: extern volatile unsigned char CCP4CON @ 0xF12;
"1912
[; ;pic18f27j13.h: 1912: asm("CCP4CON equ 0F12h");
[; <" CCP4CON equ 0F12h ;# ">
[; ;pic18f27j13.h: 1915: typedef union {
[; ;pic18f27j13.h: 1916: struct {
[; ;pic18f27j13.h: 1917: unsigned CCP4M :4;
[; ;pic18f27j13.h: 1918: unsigned DC4B :2;
[; ;pic18f27j13.h: 1919: };
[; ;pic18f27j13.h: 1920: struct {
[; ;pic18f27j13.h: 1921: unsigned CCP4M0 :1;
[; ;pic18f27j13.h: 1922: unsigned CCP4M1 :1;
[; ;pic18f27j13.h: 1923: unsigned CCP4M2 :1;
[; ;pic18f27j13.h: 1924: unsigned CCP4M3 :1;
[; ;pic18f27j13.h: 1925: unsigned DC4B0 :1;
[; ;pic18f27j13.h: 1926: unsigned DC4B1 :1;
[; ;pic18f27j13.h: 1927: };
[; ;pic18f27j13.h: 1928: } CCP4CONbits_t;
[; ;pic18f27j13.h: 1929: extern volatile CCP4CONbits_t CCP4CONbits @ 0xF12;
[; ;pic18f27j13.h: 1973: extern volatile unsigned char CCPR4L @ 0xF13;
"1975
[; ;pic18f27j13.h: 1975: asm("CCPR4L equ 0F13h");
[; <" CCPR4L equ 0F13h ;# ">
[; ;pic18f27j13.h: 1978: typedef union {
[; ;pic18f27j13.h: 1979: struct {
[; ;pic18f27j13.h: 1980: unsigned CCPR4L :8;
[; ;pic18f27j13.h: 1981: };
[; ;pic18f27j13.h: 1982: } CCPR4Lbits_t;
[; ;pic18f27j13.h: 1983: extern volatile CCPR4Lbits_t CCPR4Lbits @ 0xF13;
[; ;pic18f27j13.h: 1992: extern volatile unsigned char CCPR4H @ 0xF14;
"1994
[; ;pic18f27j13.h: 1994: asm("CCPR4H equ 0F14h");
[; <" CCPR4H equ 0F14h ;# ">
[; ;pic18f27j13.h: 1997: typedef union {
[; ;pic18f27j13.h: 1998: struct {
[; ;pic18f27j13.h: 1999: unsigned CCPR4H :8;
[; ;pic18f27j13.h: 2000: };
[; ;pic18f27j13.h: 2001: } CCPR4Hbits_t;
[; ;pic18f27j13.h: 2002: extern volatile CCPR4Hbits_t CCPR4Hbits @ 0xF14;
[; ;pic18f27j13.h: 2011: extern volatile unsigned char CCP3CON @ 0xF15;
"2013
[; ;pic18f27j13.h: 2013: asm("CCP3CON equ 0F15h");
[; <" CCP3CON equ 0F15h ;# ">
[; ;pic18f27j13.h: 2016: typedef union {
[; ;pic18f27j13.h: 2017: struct {
[; ;pic18f27j13.h: 2018: unsigned CCP3M :4;
[; ;pic18f27j13.h: 2019: unsigned DC3B :2;
[; ;pic18f27j13.h: 2020: unsigned P3M :2;
[; ;pic18f27j13.h: 2021: };
[; ;pic18f27j13.h: 2022: struct {
[; ;pic18f27j13.h: 2023: unsigned CCP3M0 :1;
[; ;pic18f27j13.h: 2024: unsigned CCP3M1 :1;
[; ;pic18f27j13.h: 2025: unsigned CCP3M2 :1;
[; ;pic18f27j13.h: 2026: unsigned CCP3M3 :1;
[; ;pic18f27j13.h: 2027: unsigned DC3B0 :1;
[; ;pic18f27j13.h: 2028: unsigned DC3B1 :1;
[; ;pic18f27j13.h: 2029: unsigned P3M0 :1;
[; ;pic18f27j13.h: 2030: unsigned P3M1 :1;
[; ;pic18f27j13.h: 2031: };
[; ;pic18f27j13.h: 2032: } CCP3CONbits_t;
[; ;pic18f27j13.h: 2033: extern volatile CCP3CONbits_t CCP3CONbits @ 0xF15;
[; ;pic18f27j13.h: 2092: extern volatile unsigned char CCPR3L @ 0xF16;
"2094
[; ;pic18f27j13.h: 2094: asm("CCPR3L equ 0F16h");
[; <" CCPR3L equ 0F16h ;# ">
[; ;pic18f27j13.h: 2097: typedef union {
[; ;pic18f27j13.h: 2098: struct {
[; ;pic18f27j13.h: 2099: unsigned CCPR3L :8;
[; ;pic18f27j13.h: 2100: };
[; ;pic18f27j13.h: 2101: } CCPR3Lbits_t;
[; ;pic18f27j13.h: 2102: extern volatile CCPR3Lbits_t CCPR3Lbits @ 0xF16;
[; ;pic18f27j13.h: 2111: extern volatile unsigned char CCPR3H @ 0xF17;
"2113
[; ;pic18f27j13.h: 2113: asm("CCPR3H equ 0F17h");
[; <" CCPR3H equ 0F17h ;# ">
[; ;pic18f27j13.h: 2116: typedef union {
[; ;pic18f27j13.h: 2117: struct {
[; ;pic18f27j13.h: 2118: unsigned CCPR3H :8;
[; ;pic18f27j13.h: 2119: };
[; ;pic18f27j13.h: 2120: } CCPR3Hbits_t;
[; ;pic18f27j13.h: 2121: extern volatile CCPR3Hbits_t CCPR3Hbits @ 0xF17;
[; ;pic18f27j13.h: 2130: extern volatile unsigned char ECCP3DEL @ 0xF18;
"2132
[; ;pic18f27j13.h: 2132: asm("ECCP3DEL equ 0F18h");
[; <" ECCP3DEL equ 0F18h ;# ">
[; ;pic18f27j13.h: 2135: typedef union {
[; ;pic18f27j13.h: 2136: struct {
[; ;pic18f27j13.h: 2137: unsigned P3DC :7;
[; ;pic18f27j13.h: 2138: unsigned P3RSEN :1;
[; ;pic18f27j13.h: 2139: };
[; ;pic18f27j13.h: 2140: struct {
[; ;pic18f27j13.h: 2141: unsigned P3DC0 :1;
[; ;pic18f27j13.h: 2142: unsigned P3DC1 :1;
[; ;pic18f27j13.h: 2143: unsigned P3DC2 :1;
[; ;pic18f27j13.h: 2144: unsigned P3DC3 :1;
[; ;pic18f27j13.h: 2145: unsigned P3DC4 :1;
[; ;pic18f27j13.h: 2146: unsigned P3DC5 :1;
[; ;pic18f27j13.h: 2147: unsigned P3DC6 :1;
[; ;pic18f27j13.h: 2148: };
[; ;pic18f27j13.h: 2149: } ECCP3DELbits_t;
[; ;pic18f27j13.h: 2150: extern volatile ECCP3DELbits_t ECCP3DELbits @ 0xF18;
[; ;pic18f27j13.h: 2199: extern volatile unsigned char ECCP3AS @ 0xF19;
"2201
[; ;pic18f27j13.h: 2201: asm("ECCP3AS equ 0F19h");
[; <" ECCP3AS equ 0F19h ;# ">
[; ;pic18f27j13.h: 2204: typedef union {
[; ;pic18f27j13.h: 2205: struct {
[; ;pic18f27j13.h: 2206: unsigned PSS3BD :2;
[; ;pic18f27j13.h: 2207: unsigned PSS3AC :2;
[; ;pic18f27j13.h: 2208: unsigned ECCP3AS :3;
[; ;pic18f27j13.h: 2209: unsigned ECCP3ASE :1;
[; ;pic18f27j13.h: 2210: };
[; ;pic18f27j13.h: 2211: struct {
[; ;pic18f27j13.h: 2212: unsigned PSS3BD0 :1;
[; ;pic18f27j13.h: 2213: unsigned PSS3BD1 :1;
[; ;pic18f27j13.h: 2214: unsigned PSS3AC0 :1;
[; ;pic18f27j13.h: 2215: unsigned PSS3AC1 :1;
[; ;pic18f27j13.h: 2216: unsigned ECCP3AS0 :1;
[; ;pic18f27j13.h: 2217: unsigned ECCP3AS1 :1;
[; ;pic18f27j13.h: 2218: unsigned ECCP3AS2 :1;
[; ;pic18f27j13.h: 2219: };
[; ;pic18f27j13.h: 2220: } ECCP3ASbits_t;
[; ;pic18f27j13.h: 2221: extern volatile ECCP3ASbits_t ECCP3ASbits @ 0xF19;
[; ;pic18f27j13.h: 2280: extern volatile unsigned char PSTR3CON @ 0xF1A;
"2282
[; ;pic18f27j13.h: 2282: asm("PSTR3CON equ 0F1Ah");
[; <" PSTR3CON equ 0F1Ah ;# ">
[; ;pic18f27j13.h: 2285: typedef union {
[; ;pic18f27j13.h: 2286: struct {
[; ;pic18f27j13.h: 2287: unsigned STRA :1;
[; ;pic18f27j13.h: 2288: unsigned STRB :1;
[; ;pic18f27j13.h: 2289: unsigned STRC :1;
[; ;pic18f27j13.h: 2290: unsigned STRD :1;
[; ;pic18f27j13.h: 2291: unsigned STRSYNC :1;
[; ;pic18f27j13.h: 2292: unsigned :1;
[; ;pic18f27j13.h: 2293: unsigned CMPL :2;
[; ;pic18f27j13.h: 2294: };
[; ;pic18f27j13.h: 2295: struct {
[; ;pic18f27j13.h: 2296: unsigned :6;
[; ;pic18f27j13.h: 2297: unsigned CMPL0 :1;
[; ;pic18f27j13.h: 2298: unsigned CMPL1 :1;
[; ;pic18f27j13.h: 2299: };
[; ;pic18f27j13.h: 2300: struct {
[; ;pic18f27j13.h: 2301: unsigned :6;
[; ;pic18f27j13.h: 2302: unsigned CMPL03 :1;
[; ;pic18f27j13.h: 2303: };
[; ;pic18f27j13.h: 2304: struct {
[; ;pic18f27j13.h: 2305: unsigned :7;
[; ;pic18f27j13.h: 2306: unsigned CMPL13 :1;
[; ;pic18f27j13.h: 2307: };
[; ;pic18f27j13.h: 2308: struct {
[; ;pic18f27j13.h: 2309: unsigned STRA3 :1;
[; ;pic18f27j13.h: 2310: };
[; ;pic18f27j13.h: 2311: struct {
[; ;pic18f27j13.h: 2312: unsigned :1;
[; ;pic18f27j13.h: 2313: unsigned STRB3 :1;
[; ;pic18f27j13.h: 2314: };
[; ;pic18f27j13.h: 2315: struct {
[; ;pic18f27j13.h: 2316: unsigned :2;
[; ;pic18f27j13.h: 2317: unsigned STRC3 :1;
[; ;pic18f27j13.h: 2318: };
[; ;pic18f27j13.h: 2319: struct {
[; ;pic18f27j13.h: 2320: unsigned :3;
[; ;pic18f27j13.h: 2321: unsigned STRD3 :1;
[; ;pic18f27j13.h: 2322: };
[; ;pic18f27j13.h: 2323: struct {
[; ;pic18f27j13.h: 2324: unsigned :4;
[; ;pic18f27j13.h: 2325: unsigned STRSYNC3 :1;
[; ;pic18f27j13.h: 2326: };
[; ;pic18f27j13.h: 2327: } PSTR3CONbits_t;
[; ;pic18f27j13.h: 2328: extern volatile PSTR3CONbits_t PSTR3CONbits @ 0xF1A;
[; ;pic18f27j13.h: 2407: extern volatile unsigned char T8CON @ 0xF1B;
"2409
[; ;pic18f27j13.h: 2409: asm("T8CON equ 0F1Bh");
[; <" T8CON equ 0F1Bh ;# ">
[; ;pic18f27j13.h: 2412: typedef union {
[; ;pic18f27j13.h: 2413: struct {
[; ;pic18f27j13.h: 2414: unsigned T8CKPS :2;
[; ;pic18f27j13.h: 2415: unsigned TMR8ON :1;
[; ;pic18f27j13.h: 2416: unsigned T8OUTPS :4;
[; ;pic18f27j13.h: 2417: };
[; ;pic18f27j13.h: 2418: struct {
[; ;pic18f27j13.h: 2419: unsigned T8CKPS0 :1;
[; ;pic18f27j13.h: 2420: unsigned T8CKPS1 :1;
[; ;pic18f27j13.h: 2421: unsigned :1;
[; ;pic18f27j13.h: 2422: unsigned T8OUTPS0 :1;
[; ;pic18f27j13.h: 2423: unsigned T8OUTPS1 :1;
[; ;pic18f27j13.h: 2424: unsigned T8OUTPS2 :1;
[; ;pic18f27j13.h: 2425: unsigned T8OUTPS3 :1;
[; ;pic18f27j13.h: 2426: };
[; ;pic18f27j13.h: 2427: } T8CONbits_t;
[; ;pic18f27j13.h: 2428: extern volatile T8CONbits_t T8CONbits @ 0xF1B;
[; ;pic18f27j13.h: 2477: extern volatile unsigned char PR8 @ 0xF1C;
"2479
[; ;pic18f27j13.h: 2479: asm("PR8 equ 0F1Ch");
[; <" PR8 equ 0F1Ch ;# ">
[; ;pic18f27j13.h: 2482: typedef union {
[; ;pic18f27j13.h: 2483: struct {
[; ;pic18f27j13.h: 2484: unsigned PR8 :8;
[; ;pic18f27j13.h: 2485: };
[; ;pic18f27j13.h: 2486: } PR8bits_t;
[; ;pic18f27j13.h: 2487: extern volatile PR8bits_t PR8bits @ 0xF1C;
[; ;pic18f27j13.h: 2496: extern volatile unsigned char TMR8 @ 0xF1D;
"2498
[; ;pic18f27j13.h: 2498: asm("TMR8 equ 0F1Dh");
[; <" TMR8 equ 0F1Dh ;# ">
[; ;pic18f27j13.h: 2501: typedef union {
[; ;pic18f27j13.h: 2502: struct {
[; ;pic18f27j13.h: 2503: unsigned TMR8 :8;
[; ;pic18f27j13.h: 2504: };
[; ;pic18f27j13.h: 2505: } TMR8bits_t;
[; ;pic18f27j13.h: 2506: extern volatile TMR8bits_t TMR8bits @ 0xF1D;
[; ;pic18f27j13.h: 2515: extern volatile unsigned char T6CON @ 0xF1E;
"2517
[; ;pic18f27j13.h: 2517: asm("T6CON equ 0F1Eh");
[; <" T6CON equ 0F1Eh ;# ">
[; ;pic18f27j13.h: 2520: typedef union {
[; ;pic18f27j13.h: 2521: struct {
[; ;pic18f27j13.h: 2522: unsigned T6CKPS :2;
[; ;pic18f27j13.h: 2523: unsigned TMR6ON :1;
[; ;pic18f27j13.h: 2524: unsigned T6OUTPS :4;
[; ;pic18f27j13.h: 2525: };
[; ;pic18f27j13.h: 2526: struct {
[; ;pic18f27j13.h: 2527: unsigned T6CKPS0 :1;
[; ;pic18f27j13.h: 2528: unsigned T6CKPS1 :1;
[; ;pic18f27j13.h: 2529: unsigned :1;
[; ;pic18f27j13.h: 2530: unsigned T6OUTPS0 :1;
[; ;pic18f27j13.h: 2531: unsigned T6OUTPS1 :1;
[; ;pic18f27j13.h: 2532: unsigned T6OUTPS2 :1;
[; ;pic18f27j13.h: 2533: unsigned T6OUTPS3 :1;
[; ;pic18f27j13.h: 2534: };
[; ;pic18f27j13.h: 2535: } T6CONbits_t;
[; ;pic18f27j13.h: 2536: extern volatile T6CONbits_t T6CONbits @ 0xF1E;
[; ;pic18f27j13.h: 2585: extern volatile unsigned char PR6 @ 0xF1F;
"2587
[; ;pic18f27j13.h: 2587: asm("PR6 equ 0F1Fh");
[; <" PR6 equ 0F1Fh ;# ">
[; ;pic18f27j13.h: 2590: typedef union {
[; ;pic18f27j13.h: 2591: struct {
[; ;pic18f27j13.h: 2592: unsigned PR6 :8;
[; ;pic18f27j13.h: 2593: };
[; ;pic18f27j13.h: 2594: } PR6bits_t;
[; ;pic18f27j13.h: 2595: extern volatile PR6bits_t PR6bits @ 0xF1F;
[; ;pic18f27j13.h: 2604: extern volatile unsigned char TMR6 @ 0xF20;
"2606
[; ;pic18f27j13.h: 2606: asm("TMR6 equ 0F20h");
[; <" TMR6 equ 0F20h ;# ">
[; ;pic18f27j13.h: 2609: typedef union {
[; ;pic18f27j13.h: 2610: struct {
[; ;pic18f27j13.h: 2611: unsigned TMR6 :8;
[; ;pic18f27j13.h: 2612: };
[; ;pic18f27j13.h: 2613: } TMR6bits_t;
[; ;pic18f27j13.h: 2614: extern volatile TMR6bits_t TMR6bits @ 0xF20;
[; ;pic18f27j13.h: 2623: extern volatile unsigned char T5GCON @ 0xF21;
"2625
[; ;pic18f27j13.h: 2625: asm("T5GCON equ 0F21h");
[; <" T5GCON equ 0F21h ;# ">
[; ;pic18f27j13.h: 2628: typedef union {
[; ;pic18f27j13.h: 2629: struct {
[; ;pic18f27j13.h: 2630: unsigned :3;
[; ;pic18f27j13.h: 2631: unsigned T5GGO_NOT_T5DONE :1;
[; ;pic18f27j13.h: 2632: };
[; ;pic18f27j13.h: 2633: struct {
[; ;pic18f27j13.h: 2634: unsigned T5GSS :2;
[; ;pic18f27j13.h: 2635: unsigned T5GVAL :1;
[; ;pic18f27j13.h: 2636: unsigned T5GGO_nT5DONE :1;
[; ;pic18f27j13.h: 2637: unsigned T5GSPM :1;
[; ;pic18f27j13.h: 2638: unsigned T5GTM :1;
[; ;pic18f27j13.h: 2639: unsigned T5GPOL :1;
[; ;pic18f27j13.h: 2640: unsigned TMR5GE :1;
[; ;pic18f27j13.h: 2641: };
[; ;pic18f27j13.h: 2642: struct {
[; ;pic18f27j13.h: 2643: unsigned T5GSS0 :1;
[; ;pic18f27j13.h: 2644: unsigned T5GSS1 :1;
[; ;pic18f27j13.h: 2645: unsigned :1;
[; ;pic18f27j13.h: 2646: unsigned T5GGO :1;
[; ;pic18f27j13.h: 2647: };
[; ;pic18f27j13.h: 2648: struct {
[; ;pic18f27j13.h: 2649: unsigned :3;
[; ;pic18f27j13.h: 2650: unsigned NOT_T5DONE :1;
[; ;pic18f27j13.h: 2651: };
[; ;pic18f27j13.h: 2652: struct {
[; ;pic18f27j13.h: 2653: unsigned :3;
[; ;pic18f27j13.h: 2654: unsigned nT5DONE :1;
[; ;pic18f27j13.h: 2655: };
[; ;pic18f27j13.h: 2656: struct {
[; ;pic18f27j13.h: 2657: unsigned :3;
[; ;pic18f27j13.h: 2658: unsigned T5DONE :1;
[; ;pic18f27j13.h: 2659: };
[; ;pic18f27j13.h: 2660: } T5GCONbits_t;
[; ;pic18f27j13.h: 2661: extern volatile T5GCONbits_t T5GCONbits @ 0xF21;
[; ;pic18f27j13.h: 2735: extern volatile unsigned char T5CON @ 0xF22;
"2737
[; ;pic18f27j13.h: 2737: asm("T5CON equ 0F22h");
[; <" T5CON equ 0F22h ;# ">
[; ;pic18f27j13.h: 2740: typedef union {
[; ;pic18f27j13.h: 2741: struct {
[; ;pic18f27j13.h: 2742: unsigned :2;
[; ;pic18f27j13.h: 2743: unsigned NOT_T5SYNC :1;
[; ;pic18f27j13.h: 2744: };
[; ;pic18f27j13.h: 2745: struct {
[; ;pic18f27j13.h: 2746: unsigned TMR5ON :1;
[; ;pic18f27j13.h: 2747: unsigned RD16 :1;
[; ;pic18f27j13.h: 2748: unsigned nT5SYNC :1;
[; ;pic18f27j13.h: 2749: unsigned T5OSCEN :1;
[; ;pic18f27j13.h: 2750: unsigned T5CKPS :2;
[; ;pic18f27j13.h: 2751: unsigned TMR5CS :2;
[; ;pic18f27j13.h: 2752: };
[; ;pic18f27j13.h: 2753: struct {
[; ;pic18f27j13.h: 2754: unsigned :4;
[; ;pic18f27j13.h: 2755: unsigned T5CKPS0 :1;
[; ;pic18f27j13.h: 2756: unsigned T5CKPS1 :1;
[; ;pic18f27j13.h: 2757: unsigned TMR5CS0 :1;
[; ;pic18f27j13.h: 2758: unsigned TMR5CS1 :1;
[; ;pic18f27j13.h: 2759: };
[; ;pic18f27j13.h: 2760: struct {
[; ;pic18f27j13.h: 2761: unsigned :1;
[; ;pic18f27j13.h: 2762: unsigned RD165 :1;
[; ;pic18f27j13.h: 2763: };
[; ;pic18f27j13.h: 2764: struct {
[; ;pic18f27j13.h: 2765: unsigned :3;
[; ;pic18f27j13.h: 2766: unsigned SOSCEN5 :1;
[; ;pic18f27j13.h: 2767: };
[; ;pic18f27j13.h: 2768: } T5CONbits_t;
[; ;pic18f27j13.h: 2769: extern volatile T5CONbits_t T5CONbits @ 0xF22;
[; ;pic18f27j13.h: 2838: extern volatile unsigned char TMR5L @ 0xF23;
"2840
[; ;pic18f27j13.h: 2840: asm("TMR5L equ 0F23h");
[; <" TMR5L equ 0F23h ;# ">
[; ;pic18f27j13.h: 2843: typedef union {
[; ;pic18f27j13.h: 2844: struct {
[; ;pic18f27j13.h: 2845: unsigned TMR5L :8;
[; ;pic18f27j13.h: 2846: };
[; ;pic18f27j13.h: 2847: } TMR5Lbits_t;
[; ;pic18f27j13.h: 2848: extern volatile TMR5Lbits_t TMR5Lbits @ 0xF23;
[; ;pic18f27j13.h: 2857: extern volatile unsigned char TMR5H @ 0xF24;
"2859
[; ;pic18f27j13.h: 2859: asm("TMR5H equ 0F24h");
[; <" TMR5H equ 0F24h ;# ">
[; ;pic18f27j13.h: 2862: typedef union {
[; ;pic18f27j13.h: 2863: struct {
[; ;pic18f27j13.h: 2864: unsigned TMR5H :8;
[; ;pic18f27j13.h: 2865: };
[; ;pic18f27j13.h: 2866: } TMR5Hbits_t;
[; ;pic18f27j13.h: 2867: extern volatile TMR5Hbits_t TMR5Hbits @ 0xF24;
[; ;pic18f27j13.h: 2876: extern volatile unsigned char CM3CON @ 0xF25;
"2878
[; ;pic18f27j13.h: 2878: asm("CM3CON equ 0F25h");
[; <" CM3CON equ 0F25h ;# ">
[; ;pic18f27j13.h: 2881: typedef union {
[; ;pic18f27j13.h: 2882: struct {
[; ;pic18f27j13.h: 2883: unsigned CCH :2;
[; ;pic18f27j13.h: 2884: unsigned CREF :1;
[; ;pic18f27j13.h: 2885: unsigned EVPOL :2;
[; ;pic18f27j13.h: 2886: unsigned CPOL :1;
[; ;pic18f27j13.h: 2887: unsigned COE :1;
[; ;pic18f27j13.h: 2888: unsigned CON :1;
[; ;pic18f27j13.h: 2889: };
[; ;pic18f27j13.h: 2890: struct {
[; ;pic18f27j13.h: 2891: unsigned CCH0 :1;
[; ;pic18f27j13.h: 2892: unsigned CCH1 :1;
[; ;pic18f27j13.h: 2893: unsigned :1;
[; ;pic18f27j13.h: 2894: unsigned EVPOL0 :1;
[; ;pic18f27j13.h: 2895: unsigned EVPOL1 :1;
[; ;pic18f27j13.h: 2896: };
[; ;pic18f27j13.h: 2897: struct {
[; ;pic18f27j13.h: 2898: unsigned CCH03 :1;
[; ;pic18f27j13.h: 2899: };
[; ;pic18f27j13.h: 2900: struct {
[; ;pic18f27j13.h: 2901: unsigned :1;
[; ;pic18f27j13.h: 2902: unsigned CCH13 :1;
[; ;pic18f27j13.h: 2903: };
[; ;pic18f27j13.h: 2904: struct {
[; ;pic18f27j13.h: 2905: unsigned :6;
[; ;pic18f27j13.h: 2906: unsigned COE3 :1;
[; ;pic18f27j13.h: 2907: };
[; ;pic18f27j13.h: 2908: struct {
[; ;pic18f27j13.h: 2909: unsigned :7;
[; ;pic18f27j13.h: 2910: unsigned CON3 :1;
[; ;pic18f27j13.h: 2911: };
[; ;pic18f27j13.h: 2912: struct {
[; ;pic18f27j13.h: 2913: unsigned :5;
[; ;pic18f27j13.h: 2914: unsigned CPOL3 :1;
[; ;pic18f27j13.h: 2915: };
[; ;pic18f27j13.h: 2916: struct {
[; ;pic18f27j13.h: 2917: unsigned :2;
[; ;pic18f27j13.h: 2918: unsigned CREF3 :1;
[; ;pic18f27j13.h: 2919: };
[; ;pic18f27j13.h: 2920: struct {
[; ;pic18f27j13.h: 2921: unsigned :3;
[; ;pic18f27j13.h: 2922: unsigned EVPOL03 :1;
[; ;pic18f27j13.h: 2923: };
[; ;pic18f27j13.h: 2924: struct {
[; ;pic18f27j13.h: 2925: unsigned :4;
[; ;pic18f27j13.h: 2926: unsigned EVPOL13 :1;
[; ;pic18f27j13.h: 2927: };
[; ;pic18f27j13.h: 2928: } CM3CONbits_t;
[; ;pic18f27j13.h: 2929: extern volatile CM3CONbits_t CM3CONbits @ 0xF25;
[; ;pic18f27j13.h: 3023: extern volatile unsigned char RTCVALL @ 0xF3A;
"3025
[; ;pic18f27j13.h: 3025: asm("RTCVALL equ 0F3Ah");
[; <" RTCVALL equ 0F3Ah ;# ">
[; ;pic18f27j13.h: 3028: typedef union {
[; ;pic18f27j13.h: 3029: struct {
[; ;pic18f27j13.h: 3030: unsigned RTCVALL :8;
[; ;pic18f27j13.h: 3031: };
[; ;pic18f27j13.h: 3032: } RTCVALLbits_t;
[; ;pic18f27j13.h: 3033: extern volatile RTCVALLbits_t RTCVALLbits @ 0xF3A;
[; ;pic18f27j13.h: 3042: extern volatile unsigned char RTCVALH @ 0xF3B;
"3044
[; ;pic18f27j13.h: 3044: asm("RTCVALH equ 0F3Bh");
[; <" RTCVALH equ 0F3Bh ;# ">
[; ;pic18f27j13.h: 3047: typedef union {
[; ;pic18f27j13.h: 3048: struct {
[; ;pic18f27j13.h: 3049: unsigned RTCVALH :8;
[; ;pic18f27j13.h: 3050: };
[; ;pic18f27j13.h: 3051: struct {
[; ;pic18f27j13.h: 3052: unsigned :6;
[; ;pic18f27j13.h: 3053: unsigned WAITB0 :1;
[; ;pic18f27j13.h: 3054: };
[; ;pic18f27j13.h: 3055: struct {
[; ;pic18f27j13.h: 3056: unsigned :7;
[; ;pic18f27j13.h: 3057: unsigned WAITB1 :1;
[; ;pic18f27j13.h: 3058: };
[; ;pic18f27j13.h: 3059: struct {
[; ;pic18f27j13.h: 3060: unsigned WAITE0 :1;
[; ;pic18f27j13.h: 3061: };
[; ;pic18f27j13.h: 3062: struct {
[; ;pic18f27j13.h: 3063: unsigned :1;
[; ;pic18f27j13.h: 3064: unsigned WAITE1 :1;
[; ;pic18f27j13.h: 3065: };
[; ;pic18f27j13.h: 3066: struct {
[; ;pic18f27j13.h: 3067: unsigned :2;
[; ;pic18f27j13.h: 3068: unsigned WAITM0 :1;
[; ;pic18f27j13.h: 3069: };
[; ;pic18f27j13.h: 3070: struct {
[; ;pic18f27j13.h: 3071: unsigned :3;
[; ;pic18f27j13.h: 3072: unsigned WAITM1 :1;
[; ;pic18f27j13.h: 3073: };
[; ;pic18f27j13.h: 3074: struct {
[; ;pic18f27j13.h: 3075: unsigned :4;
[; ;pic18f27j13.h: 3076: unsigned WAITM2 :1;
[; ;pic18f27j13.h: 3077: };
[; ;pic18f27j13.h: 3078: struct {
[; ;pic18f27j13.h: 3079: unsigned :5;
[; ;pic18f27j13.h: 3080: unsigned WAITM3 :1;
[; ;pic18f27j13.h: 3081: };
[; ;pic18f27j13.h: 3082: } RTCVALHbits_t;
[; ;pic18f27j13.h: 3083: extern volatile RTCVALHbits_t RTCVALHbits @ 0xF3B;
[; ;pic18f27j13.h: 3132: extern volatile unsigned char PADCFG1 @ 0xF3C;
"3134
[; ;pic18f27j13.h: 3134: asm("PADCFG1 equ 0F3Ch");
[; <" PADCFG1 equ 0F3Ch ;# ">
[; ;pic18f27j13.h: 3137: typedef union {
[; ;pic18f27j13.h: 3138: struct {
[; ;pic18f27j13.h: 3139: unsigned :1;
[; ;pic18f27j13.h: 3140: unsigned RTSECSEL0 :1;
[; ;pic18f27j13.h: 3141: unsigned RTSECSEL1 :1;
[; ;pic18f27j13.h: 3142: };
[; ;pic18f27j13.h: 3143: } PADCFG1bits_t;
[; ;pic18f27j13.h: 3144: extern volatile PADCFG1bits_t PADCFG1bits @ 0xF3C;
[; ;pic18f27j13.h: 3158: extern volatile unsigned char REFOCON @ 0xF3D;
"3160
[; ;pic18f27j13.h: 3160: asm("REFOCON equ 0F3Dh");
[; <" REFOCON equ 0F3Dh ;# ">
[; ;pic18f27j13.h: 3163: typedef union {
[; ;pic18f27j13.h: 3164: struct {
[; ;pic18f27j13.h: 3165: unsigned RODIV :4;
[; ;pic18f27j13.h: 3166: unsigned ROSEL :1;
[; ;pic18f27j13.h: 3167: unsigned ROSSLP :1;
[; ;pic18f27j13.h: 3168: unsigned :1;
[; ;pic18f27j13.h: 3169: unsigned ROON :1;
[; ;pic18f27j13.h: 3170: };
[; ;pic18f27j13.h: 3171: struct {
[; ;pic18f27j13.h: 3172: unsigned RODIV0 :1;
[; ;pic18f27j13.h: 3173: unsigned RODIV1 :1;
[; ;pic18f27j13.h: 3174: unsigned RODIV2 :1;
[; ;pic18f27j13.h: 3175: unsigned RODIV3 :1;
[; ;pic18f27j13.h: 3176: };
[; ;pic18f27j13.h: 3177: } REFOCONbits_t;
[; ;pic18f27j13.h: 3178: extern volatile REFOCONbits_t REFOCONbits @ 0xF3D;
[; ;pic18f27j13.h: 3222: extern volatile unsigned char RTCCAL @ 0xF3E;
"3224
[; ;pic18f27j13.h: 3224: asm("RTCCAL equ 0F3Eh");
[; <" RTCCAL equ 0F3Eh ;# ">
[; ;pic18f27j13.h: 3227: typedef union {
[; ;pic18f27j13.h: 3228: struct {
[; ;pic18f27j13.h: 3229: unsigned CAL :8;
[; ;pic18f27j13.h: 3230: };
[; ;pic18f27j13.h: 3231: struct {
[; ;pic18f27j13.h: 3232: unsigned CAL0 :1;
[; ;pic18f27j13.h: 3233: unsigned CAL1 :1;
[; ;pic18f27j13.h: 3234: unsigned CAL2 :1;
[; ;pic18f27j13.h: 3235: unsigned CAL3 :1;
[; ;pic18f27j13.h: 3236: unsigned CAL4 :1;
[; ;pic18f27j13.h: 3237: unsigned CAL5 :1;
[; ;pic18f27j13.h: 3238: unsigned CAL6 :1;
[; ;pic18f27j13.h: 3239: unsigned CAL7 :1;
[; ;pic18f27j13.h: 3240: };
[; ;pic18f27j13.h: 3241: } RTCCALbits_t;
[; ;pic18f27j13.h: 3242: extern volatile RTCCALbits_t RTCCALbits @ 0xF3E;
[; ;pic18f27j13.h: 3291: extern volatile unsigned char RTCCFG @ 0xF3F;
"3293
[; ;pic18f27j13.h: 3293: asm("RTCCFG equ 0F3Fh");
[; <" RTCCFG equ 0F3Fh ;# ">
[; ;pic18f27j13.h: 3296: typedef union {
[; ;pic18f27j13.h: 3297: struct {
[; ;pic18f27j13.h: 3298: unsigned RTCPTR0 :1;
[; ;pic18f27j13.h: 3299: unsigned RTCPTR1 :1;
[; ;pic18f27j13.h: 3300: unsigned RTCOE :1;
[; ;pic18f27j13.h: 3301: unsigned HALFSEC :1;
[; ;pic18f27j13.h: 3302: unsigned RTCSYNC :1;
[; ;pic18f27j13.h: 3303: unsigned RTCWREN :1;
[; ;pic18f27j13.h: 3304: unsigned :1;
[; ;pic18f27j13.h: 3305: unsigned RTCEN :1;
[; ;pic18f27j13.h: 3306: };
[; ;pic18f27j13.h: 3307: } RTCCFGbits_t;
[; ;pic18f27j13.h: 3308: extern volatile RTCCFGbits_t RTCCFGbits @ 0xF3F;
[; ;pic18f27j13.h: 3347: extern volatile unsigned char ODCON3 @ 0xF40;
"3349
[; ;pic18f27j13.h: 3349: asm("ODCON3 equ 0F40h");
[; <" ODCON3 equ 0F40h ;# ">
[; ;pic18f27j13.h: 3352: typedef union {
[; ;pic18f27j13.h: 3353: struct {
[; ;pic18f27j13.h: 3354: unsigned SPI1OD :1;
[; ;pic18f27j13.h: 3355: unsigned SPI2OD :1;
[; ;pic18f27j13.h: 3356: unsigned :5;
[; ;pic18f27j13.h: 3357: unsigned CTMUDS :1;
[; ;pic18f27j13.h: 3358: };
[; ;pic18f27j13.h: 3359: } ODCON3bits_t;
[; ;pic18f27j13.h: 3360: extern volatile ODCON3bits_t ODCON3bits @ 0xF40;
[; ;pic18f27j13.h: 3379: extern volatile unsigned char ODCON2 @ 0xF41;
"3381
[; ;pic18f27j13.h: 3381: asm("ODCON2 equ 0F41h");
[; <" ODCON2 equ 0F41h ;# ">
[; ;pic18f27j13.h: 3384: typedef union {
[; ;pic18f27j13.h: 3385: struct {
[; ;pic18f27j13.h: 3386: unsigned U1OD :1;
[; ;pic18f27j13.h: 3387: unsigned U2OD :1;
[; ;pic18f27j13.h: 3388: unsigned CCP9OD :1;
[; ;pic18f27j13.h: 3389: unsigned CCP10OD :1;
[; ;pic18f27j13.h: 3390: };
[; ;pic18f27j13.h: 3391: } ODCON2bits_t;
[; ;pic18f27j13.h: 3392: extern volatile ODCON2bits_t ODCON2bits @ 0xF41;
[; ;pic18f27j13.h: 3416: extern volatile unsigned char ODCON1 @ 0xF42;
"3418
[; ;pic18f27j13.h: 3418: asm("ODCON1 equ 0F42h");
[; <" ODCON1 equ 0F42h ;# ">
[; ;pic18f27j13.h: 3421: typedef union {
[; ;pic18f27j13.h: 3422: struct {
[; ;pic18f27j13.h: 3423: unsigned ECCP1OD :1;
[; ;pic18f27j13.h: 3424: unsigned ECCP2OD :1;
[; ;pic18f27j13.h: 3425: unsigned ECCP3OD :1;
[; ;pic18f27j13.h: 3426: unsigned CCP4OD :1;
[; ;pic18f27j13.h: 3427: unsigned CCP5OD :1;
[; ;pic18f27j13.h: 3428: unsigned CCP6OD :1;
[; ;pic18f27j13.h: 3429: unsigned CCP7OD :1;
[; ;pic18f27j13.h: 3430: unsigned CCP8OD :1;
[; ;pic18f27j13.h: 3431: };
[; ;pic18f27j13.h: 3432: } ODCON1bits_t;
[; ;pic18f27j13.h: 3433: extern volatile ODCON1bits_t ODCON1bits @ 0xF42;
[; ;pic18f27j13.h: 3477: extern volatile unsigned char ALRMVALL @ 0xF44;
"3479
[; ;pic18f27j13.h: 3479: asm("ALRMVALL equ 0F44h");
[; <" ALRMVALL equ 0F44h ;# ">
[; ;pic18f27j13.h: 3482: typedef union {
[; ;pic18f27j13.h: 3483: struct {
[; ;pic18f27j13.h: 3484: unsigned ALRMVALL :8;
[; ;pic18f27j13.h: 3485: };
[; ;pic18f27j13.h: 3486: } ALRMVALLbits_t;
[; ;pic18f27j13.h: 3487: extern volatile ALRMVALLbits_t ALRMVALLbits @ 0xF44;
[; ;pic18f27j13.h: 3496: extern volatile unsigned char ALRMVALH @ 0xF45;
"3498
[; ;pic18f27j13.h: 3498: asm("ALRMVALH equ 0F45h");
[; <" ALRMVALH equ 0F45h ;# ">
[; ;pic18f27j13.h: 3501: typedef union {
[; ;pic18f27j13.h: 3502: struct {
[; ;pic18f27j13.h: 3503: unsigned ALRMVALH :8;
[; ;pic18f27j13.h: 3504: };
[; ;pic18f27j13.h: 3505: } ALRMVALHbits_t;
[; ;pic18f27j13.h: 3506: extern volatile ALRMVALHbits_t ALRMVALHbits @ 0xF45;
[; ;pic18f27j13.h: 3515: extern volatile unsigned char ALRMRPT @ 0xF46;
"3517
[; ;pic18f27j13.h: 3517: asm("ALRMRPT equ 0F46h");
[; <" ALRMRPT equ 0F46h ;# ">
[; ;pic18f27j13.h: 3520: typedef union {
[; ;pic18f27j13.h: 3521: struct {
[; ;pic18f27j13.h: 3522: unsigned ARPT :8;
[; ;pic18f27j13.h: 3523: };
[; ;pic18f27j13.h: 3524: struct {
[; ;pic18f27j13.h: 3525: unsigned ARPT0 :1;
[; ;pic18f27j13.h: 3526: unsigned ARPT1 :1;
[; ;pic18f27j13.h: 3527: unsigned ARPT2 :1;
[; ;pic18f27j13.h: 3528: unsigned ARPT3 :1;
[; ;pic18f27j13.h: 3529: unsigned ARPT4 :1;
[; ;pic18f27j13.h: 3530: unsigned ARPT5 :1;
[; ;pic18f27j13.h: 3531: unsigned ARPT6 :1;
[; ;pic18f27j13.h: 3532: unsigned ARPT7 :1;
[; ;pic18f27j13.h: 3533: };
[; ;pic18f27j13.h: 3534: } ALRMRPTbits_t;
[; ;pic18f27j13.h: 3535: extern volatile ALRMRPTbits_t ALRMRPTbits @ 0xF46;
[; ;pic18f27j13.h: 3584: extern volatile unsigned char ALRMCFG @ 0xF47;
"3586
[; ;pic18f27j13.h: 3586: asm("ALRMCFG equ 0F47h");
[; <" ALRMCFG equ 0F47h ;# ">
[; ;pic18f27j13.h: 3589: typedef union {
[; ;pic18f27j13.h: 3590: struct {
[; ;pic18f27j13.h: 3591: unsigned ALRMPTR :2;
[; ;pic18f27j13.h: 3592: unsigned AMASK :4;
[; ;pic18f27j13.h: 3593: unsigned CHIME :1;
[; ;pic18f27j13.h: 3594: unsigned ALRMEN :1;
[; ;pic18f27j13.h: 3595: };
[; ;pic18f27j13.h: 3596: struct {
[; ;pic18f27j13.h: 3597: unsigned ALRMPTR0 :1;
[; ;pic18f27j13.h: 3598: unsigned ALRMPTR1 :1;
[; ;pic18f27j13.h: 3599: unsigned AMASK0 :1;
[; ;pic18f27j13.h: 3600: unsigned AMASK1 :1;
[; ;pic18f27j13.h: 3601: unsigned AMASK2 :1;
[; ;pic18f27j13.h: 3602: unsigned AMASK3 :1;
[; ;pic18f27j13.h: 3603: };
[; ;pic18f27j13.h: 3604: } ALRMCFGbits_t;
[; ;pic18f27j13.h: 3605: extern volatile ALRMCFGbits_t ALRMCFGbits @ 0xF47;
[; ;pic18f27j13.h: 3659: extern volatile unsigned char ANCON0 @ 0xF48;
"3661
[; ;pic18f27j13.h: 3661: asm("ANCON0 equ 0F48h");
[; <" ANCON0 equ 0F48h ;# ">
[; ;pic18f27j13.h: 3664: typedef union {
[; ;pic18f27j13.h: 3665: struct {
[; ;pic18f27j13.h: 3666: unsigned PCFG0 :1;
[; ;pic18f27j13.h: 3667: unsigned PCFG1 :1;
[; ;pic18f27j13.h: 3668: unsigned PCFG2 :1;
[; ;pic18f27j13.h: 3669: unsigned PCFG3 :1;
[; ;pic18f27j13.h: 3670: unsigned PCFG4 :1;
[; ;pic18f27j13.h: 3671: };
[; ;pic18f27j13.h: 3672: } ANCON0bits_t;
[; ;pic18f27j13.h: 3673: extern volatile ANCON0bits_t ANCON0bits @ 0xF48;
[; ;pic18f27j13.h: 3702: extern volatile unsigned char ANCON1 @ 0xF49;
"3704
[; ;pic18f27j13.h: 3704: asm("ANCON1 equ 0F49h");
[; <" ANCON1 equ 0F49h ;# ">
[; ;pic18f27j13.h: 3707: typedef union {
[; ;pic18f27j13.h: 3708: struct {
[; ;pic18f27j13.h: 3709: unsigned PCFG8 :1;
[; ;pic18f27j13.h: 3710: unsigned PCFG9 :1;
[; ;pic18f27j13.h: 3711: unsigned PCFG10 :1;
[; ;pic18f27j13.h: 3712: unsigned PCFG11 :1;
[; ;pic18f27j13.h: 3713: unsigned PCFG12 :1;
[; ;pic18f27j13.h: 3714: unsigned :2;
[; ;pic18f27j13.h: 3715: unsigned VBGEN :1;
[; ;pic18f27j13.h: 3716: };
[; ;pic18f27j13.h: 3717: struct {
[; ;pic18f27j13.h: 3718: unsigned :7;
[; ;pic18f27j13.h: 3719: unsigned PCFG15 :1;
[; ;pic18f27j13.h: 3720: };
[; ;pic18f27j13.h: 3721: } ANCON1bits_t;
[; ;pic18f27j13.h: 3722: extern volatile ANCON1bits_t ANCON1bits @ 0xF49;
[; ;pic18f27j13.h: 3761: extern volatile unsigned char DSWAKEL @ 0xF4A;
"3763
[; ;pic18f27j13.h: 3763: asm("DSWAKEL equ 0F4Ah");
[; <" DSWAKEL equ 0F4Ah ;# ">
[; ;pic18f27j13.h: 3766: typedef union {
[; ;pic18f27j13.h: 3767: struct {
[; ;pic18f27j13.h: 3768: unsigned DSPOR :1;
[; ;pic18f27j13.h: 3769: unsigned :1;
[; ;pic18f27j13.h: 3770: unsigned DSMCLR :1;
[; ;pic18f27j13.h: 3771: unsigned DSRTC :1;
[; ;pic18f27j13.h: 3772: unsigned DSWDT :1;
[; ;pic18f27j13.h: 3773: unsigned DSULP :1;
[; ;pic18f27j13.h: 3774: unsigned :1;
[; ;pic18f27j13.h: 3775: unsigned DSFLT :1;
[; ;pic18f27j13.h: 3776: };
[; ;pic18f27j13.h: 3777: } DSWAKELbits_t;
[; ;pic18f27j13.h: 3778: extern volatile DSWAKELbits_t DSWAKELbits @ 0xF4A;
[; ;pic18f27j13.h: 3812: extern volatile unsigned char DSWAKEH @ 0xF4B;
"3814
[; ;pic18f27j13.h: 3814: asm("DSWAKEH equ 0F4Bh");
[; <" DSWAKEH equ 0F4Bh ;# ">
[; ;pic18f27j13.h: 3817: typedef union {
[; ;pic18f27j13.h: 3818: struct {
[; ;pic18f27j13.h: 3819: unsigned DSINT0 :1;
[; ;pic18f27j13.h: 3820: };
[; ;pic18f27j13.h: 3821: } DSWAKEHbits_t;
[; ;pic18f27j13.h: 3822: extern volatile DSWAKEHbits_t DSWAKEHbits @ 0xF4B;
[; ;pic18f27j13.h: 3831: extern volatile unsigned char DSCONL @ 0xF4C;
"3833
[; ;pic18f27j13.h: 3833: asm("DSCONL equ 0F4Ch");
[; <" DSCONL equ 0F4Ch ;# ">
[; ;pic18f27j13.h: 3836: typedef union {
[; ;pic18f27j13.h: 3837: struct {
[; ;pic18f27j13.h: 3838: unsigned RELEASE :1;
[; ;pic18f27j13.h: 3839: unsigned DSBOR :1;
[; ;pic18f27j13.h: 3840: unsigned ULPWDIS :1;
[; ;pic18f27j13.h: 3841: };
[; ;pic18f27j13.h: 3842: } DSCONLbits_t;
[; ;pic18f27j13.h: 3843: extern volatile DSCONLbits_t DSCONLbits @ 0xF4C;
[; ;pic18f27j13.h: 3862: extern volatile unsigned char DSCONH @ 0xF4D;
"3864
[; ;pic18f27j13.h: 3864: asm("DSCONH equ 0F4Dh");
[; <" DSCONH equ 0F4Dh ;# ">
[; ;pic18f27j13.h: 3867: typedef union {
[; ;pic18f27j13.h: 3868: struct {
[; ;pic18f27j13.h: 3869: unsigned RTCWDIS :1;
[; ;pic18f27j13.h: 3870: unsigned DSULPEN :1;
[; ;pic18f27j13.h: 3871: unsigned :5;
[; ;pic18f27j13.h: 3872: unsigned DSEN :1;
[; ;pic18f27j13.h: 3873: };
[; ;pic18f27j13.h: 3874: } DSCONHbits_t;
[; ;pic18f27j13.h: 3875: extern volatile DSCONHbits_t DSCONHbits @ 0xF4D;
[; ;pic18f27j13.h: 3894: extern volatile unsigned char DSGPR0 @ 0xF4E;
"3896
[; ;pic18f27j13.h: 3896: asm("DSGPR0 equ 0F4Eh");
[; <" DSGPR0 equ 0F4Eh ;# ">
[; ;pic18f27j13.h: 3899: typedef union {
[; ;pic18f27j13.h: 3900: struct {
[; ;pic18f27j13.h: 3901: unsigned DSGPR0 :8;
[; ;pic18f27j13.h: 3902: };
[; ;pic18f27j13.h: 3903: } DSGPR0bits_t;
[; ;pic18f27j13.h: 3904: extern volatile DSGPR0bits_t DSGPR0bits @ 0xF4E;
[; ;pic18f27j13.h: 3913: extern volatile unsigned char DSGPR1 @ 0xF4F;
"3915
[; ;pic18f27j13.h: 3915: asm("DSGPR1 equ 0F4Fh");
[; <" DSGPR1 equ 0F4Fh ;# ">
[; ;pic18f27j13.h: 3918: typedef union {
[; ;pic18f27j13.h: 3919: struct {
[; ;pic18f27j13.h: 3920: unsigned DSGPR1 :8;
[; ;pic18f27j13.h: 3921: };
[; ;pic18f27j13.h: 3922: } DSGPR1bits_t;
[; ;pic18f27j13.h: 3923: extern volatile DSGPR1bits_t DSGPR1bits @ 0xF4F;
[; ;pic18f27j13.h: 3932: extern volatile unsigned char CCPTMRS2 @ 0xF50;
"3934
[; ;pic18f27j13.h: 3934: asm("CCPTMRS2 equ 0F50h");
[; <" CCPTMRS2 equ 0F50h ;# ">
[; ;pic18f27j13.h: 3937: typedef union {
[; ;pic18f27j13.h: 3938: struct {
[; ;pic18f27j13.h: 3939: unsigned C8TSEL :2;
[; ;pic18f27j13.h: 3940: unsigned C9TSEL0 :1;
[; ;pic18f27j13.h: 3941: unsigned :1;
[; ;pic18f27j13.h: 3942: unsigned C10TSEL0 :1;
[; ;pic18f27j13.h: 3943: };
[; ;pic18f27j13.h: 3944: struct {
[; ;pic18f27j13.h: 3945: unsigned C8TSEL0 :1;
[; ;pic18f27j13.h: 3946: unsigned C8TSEL1 :1;
[; ;pic18f27j13.h: 3947: };
[; ;pic18f27j13.h: 3948: } CCPTMRS2bits_t;
[; ;pic18f27j13.h: 3949: extern volatile CCPTMRS2bits_t CCPTMRS2bits @ 0xF50;
[; ;pic18f27j13.h: 3978: extern volatile unsigned char CCPTMRS1 @ 0xF51;
"3980
[; ;pic18f27j13.h: 3980: asm("CCPTMRS1 equ 0F51h");
[; <" CCPTMRS1 equ 0F51h ;# ">
[; ;pic18f27j13.h: 3983: typedef union {
[; ;pic18f27j13.h: 3984: struct {
[; ;pic18f27j13.h: 3985: unsigned C4TSEL :2;
[; ;pic18f27j13.h: 3986: unsigned C5TSEL0 :1;
[; ;pic18f27j13.h: 3987: unsigned :1;
[; ;pic18f27j13.h: 3988: unsigned C6TSEL0 :1;
[; ;pic18f27j13.h: 3989: unsigned :1;
[; ;pic18f27j13.h: 3990: unsigned C7TSEL :2;
[; ;pic18f27j13.h: 3991: };
[; ;pic18f27j13.h: 3992: struct {
[; ;pic18f27j13.h: 3993: unsigned C4TSEL0 :1;
[; ;pic18f27j13.h: 3994: unsigned C4TSEL1 :1;
[; ;pic18f27j13.h: 3995: unsigned :4;
[; ;pic18f27j13.h: 3996: unsigned C7TSEL0 :1;
[; ;pic18f27j13.h: 3997: unsigned C7TSEL1 :1;
[; ;pic18f27j13.h: 3998: };
[; ;pic18f27j13.h: 3999: } CCPTMRS1bits_t;
[; ;pic18f27j13.h: 4000: extern volatile CCPTMRS1bits_t CCPTMRS1bits @ 0xF51;
[; ;pic18f27j13.h: 4044: extern volatile unsigned char CCPTMRS0 @ 0xF52;
"4046
[; ;pic18f27j13.h: 4046: asm("CCPTMRS0 equ 0F52h");
[; <" CCPTMRS0 equ 0F52h ;# ">
[; ;pic18f27j13.h: 4049: typedef union {
[; ;pic18f27j13.h: 4050: struct {
[; ;pic18f27j13.h: 4051: unsigned C1TSEL :3;
[; ;pic18f27j13.h: 4052: unsigned C2TSEL :3;
[; ;pic18f27j13.h: 4053: unsigned C3TSEL :2;
[; ;pic18f27j13.h: 4054: };
[; ;pic18f27j13.h: 4055: struct {
[; ;pic18f27j13.h: 4056: unsigned C1TSEL0 :1;
[; ;pic18f27j13.h: 4057: unsigned C1TSEL1 :1;
[; ;pic18f27j13.h: 4058: unsigned C1TSEL2 :1;
[; ;pic18f27j13.h: 4059: unsigned C2TSEL0 :1;
[; ;pic18f27j13.h: 4060: unsigned C2TSEL1 :1;
[; ;pic18f27j13.h: 4061: unsigned C2TSEL2 :1;
[; ;pic18f27j13.h: 4062: unsigned C3TSEL0 :1;
[; ;pic18f27j13.h: 4063: unsigned C3TSEL1 :1;
[; ;pic18f27j13.h: 4064: };
[; ;pic18f27j13.h: 4065: } CCPTMRS0bits_t;
[; ;pic18f27j13.h: 4066: extern volatile CCPTMRS0bits_t CCPTMRS0bits @ 0xF52;
[; ;pic18f27j13.h: 4125: extern volatile unsigned char CVRCON @ 0xF53;
"4127
[; ;pic18f27j13.h: 4127: asm("CVRCON equ 0F53h");
[; <" CVRCON equ 0F53h ;# ">
[; ;pic18f27j13.h: 4130: typedef union {
[; ;pic18f27j13.h: 4131: struct {
[; ;pic18f27j13.h: 4132: unsigned CVR :4;
[; ;pic18f27j13.h: 4133: unsigned CVRSS :1;
[; ;pic18f27j13.h: 4134: unsigned CVRR :1;
[; ;pic18f27j13.h: 4135: unsigned CVROE :1;
[; ;pic18f27j13.h: 4136: unsigned CVREN :1;
[; ;pic18f27j13.h: 4137: };
[; ;pic18f27j13.h: 4138: struct {
[; ;pic18f27j13.h: 4139: unsigned CVR0 :1;
[; ;pic18f27j13.h: 4140: unsigned CVR1 :1;
[; ;pic18f27j13.h: 4141: unsigned CVR2 :1;
[; ;pic18f27j13.h: 4142: unsigned CVR3 :1;
[; ;pic18f27j13.h: 4143: };
[; ;pic18f27j13.h: 4144: struct {
[; ;pic18f27j13.h: 4145: unsigned :6;
[; ;pic18f27j13.h: 4146: unsigned CVROEN :1;
[; ;pic18f27j13.h: 4147: };
[; ;pic18f27j13.h: 4148: } CVRCONbits_t;
[; ;pic18f27j13.h: 4149: extern volatile CVRCONbits_t CVRCONbits @ 0xF53;
[; ;pic18f27j13.h: 4203: extern volatile unsigned char DMABCH @ 0xF66;
"4205
[; ;pic18f27j13.h: 4205: asm("DMABCH equ 0F66h");
[; <" DMABCH equ 0F66h ;# ">
[; ;pic18f27j13.h: 4208: typedef union {
[; ;pic18f27j13.h: 4209: struct {
[; ;pic18f27j13.h: 4210: unsigned DMACNTHB :2;
[; ;pic18f27j13.h: 4211: };
[; ;pic18f27j13.h: 4212: } DMABCHbits_t;
[; ;pic18f27j13.h: 4213: extern volatile DMABCHbits_t DMABCHbits @ 0xF66;
[; ;pic18f27j13.h: 4222: extern volatile unsigned char DMABCL @ 0xF67;
"4224
[; ;pic18f27j13.h: 4224: asm("DMABCL equ 0F67h");
[; <" DMABCL equ 0F67h ;# ">
[; ;pic18f27j13.h: 4227: typedef union {
[; ;pic18f27j13.h: 4228: struct {
[; ;pic18f27j13.h: 4229: unsigned DMACNTLB :8;
[; ;pic18f27j13.h: 4230: };
[; ;pic18f27j13.h: 4231: } DMABCLbits_t;
[; ;pic18f27j13.h: 4232: extern volatile DMABCLbits_t DMABCLbits @ 0xF67;
[; ;pic18f27j13.h: 4241: extern volatile unsigned char RXADDRH @ 0xF68;
"4243
[; ;pic18f27j13.h: 4243: asm("RXADDRH equ 0F68h");
[; <" RXADDRH equ 0F68h ;# ">
[; ;pic18f27j13.h: 4246: typedef union {
[; ;pic18f27j13.h: 4247: struct {
[; ;pic18f27j13.h: 4248: unsigned DMARCVPTRHB :4;
[; ;pic18f27j13.h: 4249: };
[; ;pic18f27j13.h: 4250: } RXADDRHbits_t;
[; ;pic18f27j13.h: 4251: extern volatile RXADDRHbits_t RXADDRHbits @ 0xF68;
[; ;pic18f27j13.h: 4260: extern volatile unsigned char RXADDRL @ 0xF69;
"4262
[; ;pic18f27j13.h: 4262: asm("RXADDRL equ 0F69h");
[; <" RXADDRL equ 0F69h ;# ">
[; ;pic18f27j13.h: 4265: typedef union {
[; ;pic18f27j13.h: 4266: struct {
[; ;pic18f27j13.h: 4267: unsigned DMARCVPTRLB :8;
[; ;pic18f27j13.h: 4268: };
[; ;pic18f27j13.h: 4269: } RXADDRLbits_t;
[; ;pic18f27j13.h: 4270: extern volatile RXADDRLbits_t RXADDRLbits @ 0xF69;
[; ;pic18f27j13.h: 4279: extern volatile unsigned char TXADDRH @ 0xF6A;
"4281
[; ;pic18f27j13.h: 4281: asm("TXADDRH equ 0F6Ah");
[; <" TXADDRH equ 0F6Ah ;# ">
[; ;pic18f27j13.h: 4284: typedef union {
[; ;pic18f27j13.h: 4285: struct {
[; ;pic18f27j13.h: 4286: unsigned DMATXPTRHB :4;
[; ;pic18f27j13.h: 4287: };
[; ;pic18f27j13.h: 4288: } TXADDRHbits_t;
[; ;pic18f27j13.h: 4289: extern volatile TXADDRHbits_t TXADDRHbits @ 0xF6A;
[; ;pic18f27j13.h: 4298: extern volatile unsigned char TXADDRL @ 0xF6B;
"4300
[; ;pic18f27j13.h: 4300: asm("TXADDRL equ 0F6Bh");
[; <" TXADDRL equ 0F6Bh ;# ">
[; ;pic18f27j13.h: 4303: typedef union {
[; ;pic18f27j13.h: 4304: struct {
[; ;pic18f27j13.h: 4305: unsigned DMATXPTRLB :8;
[; ;pic18f27j13.h: 4306: };
[; ;pic18f27j13.h: 4307: } TXADDRLbits_t;
[; ;pic18f27j13.h: 4308: extern volatile TXADDRLbits_t TXADDRLbits @ 0xF6B;
[; ;pic18f27j13.h: 4317: extern volatile unsigned char CMSTAT @ 0xF70;
"4319
[; ;pic18f27j13.h: 4319: asm("CMSTAT equ 0F70h");
[; <" CMSTAT equ 0F70h ;# ">
[; ;pic18f27j13.h: 4322: extern volatile unsigned char CMSTATUS @ 0xF70;
"4324
[; ;pic18f27j13.h: 4324: asm("CMSTATUS equ 0F70h");
[; <" CMSTATUS equ 0F70h ;# ">
[; ;pic18f27j13.h: 4327: typedef union {
[; ;pic18f27j13.h: 4328: struct {
[; ;pic18f27j13.h: 4329: unsigned COUT1 :1;
[; ;pic18f27j13.h: 4330: unsigned COUT2 :1;
[; ;pic18f27j13.h: 4331: unsigned COUT3 :1;
[; ;pic18f27j13.h: 4332: };
[; ;pic18f27j13.h: 4333: } CMSTATbits_t;
[; ;pic18f27j13.h: 4334: extern volatile CMSTATbits_t CMSTATbits @ 0xF70;
[; ;pic18f27j13.h: 4352: typedef union {
[; ;pic18f27j13.h: 4353: struct {
[; ;pic18f27j13.h: 4354: unsigned COUT1 :1;
[; ;pic18f27j13.h: 4355: unsigned COUT2 :1;
[; ;pic18f27j13.h: 4356: unsigned COUT3 :1;
[; ;pic18f27j13.h: 4357: };
[; ;pic18f27j13.h: 4358: } CMSTATUSbits_t;
[; ;pic18f27j13.h: 4359: extern volatile CMSTATUSbits_t CMSTATUSbits @ 0xF70;
[; ;pic18f27j13.h: 4378: extern volatile unsigned char SSP2CON2 @ 0xF71;
"4380
[; ;pic18f27j13.h: 4380: asm("SSP2CON2 equ 0F71h");
[; <" SSP2CON2 equ 0F71h ;# ">
[; ;pic18f27j13.h: 4383: typedef union {
[; ;pic18f27j13.h: 4384: struct {
[; ;pic18f27j13.h: 4385: unsigned SEN :1;
[; ;pic18f27j13.h: 4386: unsigned RSEN :1;
[; ;pic18f27j13.h: 4387: unsigned PEN :1;
[; ;pic18f27j13.h: 4388: unsigned RCEN :1;
[; ;pic18f27j13.h: 4389: unsigned ACKEN :1;
[; ;pic18f27j13.h: 4390: unsigned ACKDT :1;
[; ;pic18f27j13.h: 4391: unsigned ACKSTAT :1;
[; ;pic18f27j13.h: 4392: unsigned GCEN :1;
[; ;pic18f27j13.h: 4393: };
[; ;pic18f27j13.h: 4394: struct {
[; ;pic18f27j13.h: 4395: unsigned :1;
[; ;pic18f27j13.h: 4396: unsigned ADMSK1 :1;
[; ;pic18f27j13.h: 4397: unsigned ADMSK2 :1;
[; ;pic18f27j13.h: 4398: unsigned ADMSK3 :1;
[; ;pic18f27j13.h: 4399: unsigned ADMSK4 :1;
[; ;pic18f27j13.h: 4400: unsigned ADMSK5 :1;
[; ;pic18f27j13.h: 4401: };
[; ;pic18f27j13.h: 4402: struct {
[; ;pic18f27j13.h: 4403: unsigned :5;
[; ;pic18f27j13.h: 4404: unsigned ACKDT2 :1;
[; ;pic18f27j13.h: 4405: };
[; ;pic18f27j13.h: 4406: struct {
[; ;pic18f27j13.h: 4407: unsigned :4;
[; ;pic18f27j13.h: 4408: unsigned ACKEN2 :1;
[; ;pic18f27j13.h: 4409: };
[; ;pic18f27j13.h: 4410: struct {
[; ;pic18f27j13.h: 4411: unsigned :6;
[; ;pic18f27j13.h: 4412: unsigned ACKSTAT2 :1;
[; ;pic18f27j13.h: 4413: };
[; ;pic18f27j13.h: 4414: struct {
[; ;pic18f27j13.h: 4415: unsigned :1;
[; ;pic18f27j13.h: 4416: unsigned ADMSK12 :1;
[; ;pic18f27j13.h: 4417: };
[; ;pic18f27j13.h: 4418: struct {
[; ;pic18f27j13.h: 4419: unsigned :2;
[; ;pic18f27j13.h: 4420: unsigned ADMSK22 :1;
[; ;pic18f27j13.h: 4421: };
[; ;pic18f27j13.h: 4422: struct {
[; ;pic18f27j13.h: 4423: unsigned :3;
[; ;pic18f27j13.h: 4424: unsigned ADMSK32 :1;
[; ;pic18f27j13.h: 4425: };
[; ;pic18f27j13.h: 4426: struct {
[; ;pic18f27j13.h: 4427: unsigned :4;
[; ;pic18f27j13.h: 4428: unsigned ADMSK42 :1;
[; ;pic18f27j13.h: 4429: };
[; ;pic18f27j13.h: 4430: struct {
[; ;pic18f27j13.h: 4431: unsigned :5;
[; ;pic18f27j13.h: 4432: unsigned ADMSK52 :1;
[; ;pic18f27j13.h: 4433: };
[; ;pic18f27j13.h: 4434: struct {
[; ;pic18f27j13.h: 4435: unsigned :7;
[; ;pic18f27j13.h: 4436: unsigned GCEN2 :1;
[; ;pic18f27j13.h: 4437: };
[; ;pic18f27j13.h: 4438: struct {
[; ;pic18f27j13.h: 4439: unsigned :2;
[; ;pic18f27j13.h: 4440: unsigned PEN2 :1;
[; ;pic18f27j13.h: 4441: };
[; ;pic18f27j13.h: 4442: struct {
[; ;pic18f27j13.h: 4443: unsigned :3;
[; ;pic18f27j13.h: 4444: unsigned RCEN2 :1;
[; ;pic18f27j13.h: 4445: };
[; ;pic18f27j13.h: 4446: struct {
[; ;pic18f27j13.h: 4447: unsigned :1;
[; ;pic18f27j13.h: 4448: unsigned RSEN2 :1;
[; ;pic18f27j13.h: 4449: };
[; ;pic18f27j13.h: 4450: struct {
[; ;pic18f27j13.h: 4451: unsigned SEN2 :1;
[; ;pic18f27j13.h: 4452: };
[; ;pic18f27j13.h: 4453: } SSP2CON2bits_t;
[; ;pic18f27j13.h: 4454: extern volatile SSP2CON2bits_t SSP2CON2bits @ 0xF71;
[; ;pic18f27j13.h: 4588: extern volatile unsigned char SSP2CON1 @ 0xF72;
"4590
[; ;pic18f27j13.h: 4590: asm("SSP2CON1 equ 0F72h");
[; <" SSP2CON1 equ 0F72h ;# ">
[; ;pic18f27j13.h: 4593: typedef union {
[; ;pic18f27j13.h: 4594: struct {
[; ;pic18f27j13.h: 4595: unsigned SSPM :4;
[; ;pic18f27j13.h: 4596: unsigned CKP :1;
[; ;pic18f27j13.h: 4597: unsigned SSPEN :1;
[; ;pic18f27j13.h: 4598: unsigned SSPOV :1;
[; ;pic18f27j13.h: 4599: unsigned WCOL :1;
[; ;pic18f27j13.h: 4600: };
[; ;pic18f27j13.h: 4601: struct {
[; ;pic18f27j13.h: 4602: unsigned SSPM0 :1;
[; ;pic18f27j13.h: 4603: unsigned SSPM1 :1;
[; ;pic18f27j13.h: 4604: unsigned SSPM2 :1;
[; ;pic18f27j13.h: 4605: unsigned SSPM3 :1;
[; ;pic18f27j13.h: 4606: };
[; ;pic18f27j13.h: 4607: struct {
[; ;pic18f27j13.h: 4608: unsigned :4;
[; ;pic18f27j13.h: 4609: unsigned CKP2 :1;
[; ;pic18f27j13.h: 4610: };
[; ;pic18f27j13.h: 4611: struct {
[; ;pic18f27j13.h: 4612: unsigned :5;
[; ;pic18f27j13.h: 4613: unsigned SSPEN2 :1;
[; ;pic18f27j13.h: 4614: };
[; ;pic18f27j13.h: 4615: struct {
[; ;pic18f27j13.h: 4616: unsigned SSPM02 :1;
[; ;pic18f27j13.h: 4617: };
[; ;pic18f27j13.h: 4618: struct {
[; ;pic18f27j13.h: 4619: unsigned :1;
[; ;pic18f27j13.h: 4620: unsigned SSPM12 :1;
[; ;pic18f27j13.h: 4621: };
[; ;pic18f27j13.h: 4622: struct {
[; ;pic18f27j13.h: 4623: unsigned :2;
[; ;pic18f27j13.h: 4624: unsigned SSPM22 :1;
[; ;pic18f27j13.h: 4625: };
[; ;pic18f27j13.h: 4626: struct {
[; ;pic18f27j13.h: 4627: unsigned :3;
[; ;pic18f27j13.h: 4628: unsigned SSPM32 :1;
[; ;pic18f27j13.h: 4629: };
[; ;pic18f27j13.h: 4630: struct {
[; ;pic18f27j13.h: 4631: unsigned :6;
[; ;pic18f27j13.h: 4632: unsigned SSPOV2 :1;
[; ;pic18f27j13.h: 4633: };
[; ;pic18f27j13.h: 4634: struct {
[; ;pic18f27j13.h: 4635: unsigned :7;
[; ;pic18f27j13.h: 4636: unsigned WCOL2 :1;
[; ;pic18f27j13.h: 4637: };
[; ;pic18f27j13.h: 4638: } SSP2CON1bits_t;
[; ;pic18f27j13.h: 4639: extern volatile SSP2CON1bits_t SSP2CON1bits @ 0xF72;
[; ;pic18f27j13.h: 4728: extern volatile unsigned char SSP2STAT @ 0xF73;
"4730
[; ;pic18f27j13.h: 4730: asm("SSP2STAT equ 0F73h");
[; <" SSP2STAT equ 0F73h ;# ">
[; ;pic18f27j13.h: 4733: typedef union {
[; ;pic18f27j13.h: 4734: struct {
[; ;pic18f27j13.h: 4735: unsigned :2;
[; ;pic18f27j13.h: 4736: unsigned R_NOT_W :1;
[; ;pic18f27j13.h: 4737: };
[; ;pic18f27j13.h: 4738: struct {
[; ;pic18f27j13.h: 4739: unsigned :5;
[; ;pic18f27j13.h: 4740: unsigned D_NOT_A :1;
[; ;pic18f27j13.h: 4741: };
[; ;pic18f27j13.h: 4742: struct {
[; ;pic18f27j13.h: 4743: unsigned BF :1;
[; ;pic18f27j13.h: 4744: unsigned UA :1;
[; ;pic18f27j13.h: 4745: unsigned R_nW :1;
[; ;pic18f27j13.h: 4746: unsigned S :1;
[; ;pic18f27j13.h: 4747: unsigned P :1;
[; ;pic18f27j13.h: 4748: unsigned D_nA :1;
[; ;pic18f27j13.h: 4749: unsigned CKE :1;
[; ;pic18f27j13.h: 4750: unsigned SMP :1;
[; ;pic18f27j13.h: 4751: };
[; ;pic18f27j13.h: 4752: struct {
[; ;pic18f27j13.h: 4753: unsigned BF2 :1;
[; ;pic18f27j13.h: 4754: };
[; ;pic18f27j13.h: 4755: struct {
[; ;pic18f27j13.h: 4756: unsigned :6;
[; ;pic18f27j13.h: 4757: unsigned CKE2 :1;
[; ;pic18f27j13.h: 4758: };
[; ;pic18f27j13.h: 4759: struct {
[; ;pic18f27j13.h: 4760: unsigned :5;
[; ;pic18f27j13.h: 4761: unsigned DA2 :1;
[; ;pic18f27j13.h: 4762: };
[; ;pic18f27j13.h: 4763: struct {
[; ;pic18f27j13.h: 4764: unsigned :5;
[; ;pic18f27j13.h: 4765: unsigned DATA_ADDRESS2 :1;
[; ;pic18f27j13.h: 4766: };
[; ;pic18f27j13.h: 4767: struct {
[; ;pic18f27j13.h: 4768: unsigned :5;
[; ;pic18f27j13.h: 4769: unsigned D_A2 :1;
[; ;pic18f27j13.h: 4770: };
[; ;pic18f27j13.h: 4771: struct {
[; ;pic18f27j13.h: 4772: unsigned :5;
[; ;pic18f27j13.h: 4773: unsigned D_nA2 :1;
[; ;pic18f27j13.h: 4774: };
[; ;pic18f27j13.h: 4775: struct {
[; ;pic18f27j13.h: 4776: unsigned :5;
[; ;pic18f27j13.h: 4777: unsigned I2C_DAT2 :1;
[; ;pic18f27j13.h: 4778: };
[; ;pic18f27j13.h: 4779: struct {
[; ;pic18f27j13.h: 4780: unsigned :2;
[; ;pic18f27j13.h: 4781: unsigned I2C_READ2 :1;
[; ;pic18f27j13.h: 4782: };
[; ;pic18f27j13.h: 4783: struct {
[; ;pic18f27j13.h: 4784: unsigned :3;
[; ;pic18f27j13.h: 4785: unsigned I2C_START2 :1;
[; ;pic18f27j13.h: 4786: };
[; ;pic18f27j13.h: 4787: struct {
[; ;pic18f27j13.h: 4788: unsigned :4;
[; ;pic18f27j13.h: 4789: unsigned I2C_STOP2 :1;
[; ;pic18f27j13.h: 4790: };
[; ;pic18f27j13.h: 4791: struct {
[; ;pic18f27j13.h: 4792: unsigned :4;
[; ;pic18f27j13.h: 4793: unsigned P2 :1;
[; ;pic18f27j13.h: 4794: };
[; ;pic18f27j13.h: 4795: struct {
[; ;pic18f27j13.h: 4796: unsigned :2;
[; ;pic18f27j13.h: 4797: unsigned READ_WRITE2 :1;
[; ;pic18f27j13.h: 4798: };
[; ;pic18f27j13.h: 4799: struct {
[; ;pic18f27j13.h: 4800: unsigned :2;
[; ;pic18f27j13.h: 4801: unsigned RW2 :1;
[; ;pic18f27j13.h: 4802: };
[; ;pic18f27j13.h: 4803: struct {
[; ;pic18f27j13.h: 4804: unsigned :2;
[; ;pic18f27j13.h: 4805: unsigned R_W2 :1;
[; ;pic18f27j13.h: 4806: };
[; ;pic18f27j13.h: 4807: struct {
[; ;pic18f27j13.h: 4808: unsigned :2;
[; ;pic18f27j13.h: 4809: unsigned R_nW2 :1;
[; ;pic18f27j13.h: 4810: };
[; ;pic18f27j13.h: 4811: struct {
[; ;pic18f27j13.h: 4812: unsigned :3;
[; ;pic18f27j13.h: 4813: unsigned S2 :1;
[; ;pic18f27j13.h: 4814: };
[; ;pic18f27j13.h: 4815: struct {
[; ;pic18f27j13.h: 4816: unsigned :7;
[; ;pic18f27j13.h: 4817: unsigned SMP2 :1;
[; ;pic18f27j13.h: 4818: };
[; ;pic18f27j13.h: 4819: struct {
[; ;pic18f27j13.h: 4820: unsigned :3;
[; ;pic18f27j13.h: 4821: unsigned START2 :1;
[; ;pic18f27j13.h: 4822: };
[; ;pic18f27j13.h: 4823: struct {
[; ;pic18f27j13.h: 4824: unsigned :4;
[; ;pic18f27j13.h: 4825: unsigned STOP2 :1;
[; ;pic18f27j13.h: 4826: };
[; ;pic18f27j13.h: 4827: struct {
[; ;pic18f27j13.h: 4828: unsigned :1;
[; ;pic18f27j13.h: 4829: unsigned UA2 :1;
[; ;pic18f27j13.h: 4830: };
[; ;pic18f27j13.h: 4831: struct {
[; ;pic18f27j13.h: 4832: unsigned :5;
[; ;pic18f27j13.h: 4833: unsigned nA2 :1;
[; ;pic18f27j13.h: 4834: };
[; ;pic18f27j13.h: 4835: struct {
[; ;pic18f27j13.h: 4836: unsigned :5;
[; ;pic18f27j13.h: 4837: unsigned nADDRESS2 :1;
[; ;pic18f27j13.h: 4838: };
[; ;pic18f27j13.h: 4839: struct {
[; ;pic18f27j13.h: 4840: unsigned :2;
[; ;pic18f27j13.h: 4841: unsigned nW2 :1;
[; ;pic18f27j13.h: 4842: };
[; ;pic18f27j13.h: 4843: struct {
[; ;pic18f27j13.h: 4844: unsigned :2;
[; ;pic18f27j13.h: 4845: unsigned nWRITE2 :1;
[; ;pic18f27j13.h: 4846: };
[; ;pic18f27j13.h: 4847: } SSP2STATbits_t;
[; ;pic18f27j13.h: 4848: extern volatile SSP2STATbits_t SSP2STATbits @ 0xF73;
[; ;pic18f27j13.h: 5022: extern volatile unsigned char SSP2ADD @ 0xF74;
"5024
[; ;pic18f27j13.h: 5024: asm("SSP2ADD equ 0F74h");
[; <" SSP2ADD equ 0F74h ;# ">
[; ;pic18f27j13.h: 5027: typedef union {
[; ;pic18f27j13.h: 5028: struct {
[; ;pic18f27j13.h: 5029: unsigned SSPADD :8;
[; ;pic18f27j13.h: 5030: };
[; ;pic18f27j13.h: 5031: struct {
[; ;pic18f27j13.h: 5032: unsigned MSK02 :1;
[; ;pic18f27j13.h: 5033: };
[; ;pic18f27j13.h: 5034: struct {
[; ;pic18f27j13.h: 5035: unsigned :1;
[; ;pic18f27j13.h: 5036: unsigned MSK12 :1;
[; ;pic18f27j13.h: 5037: };
[; ;pic18f27j13.h: 5038: struct {
[; ;pic18f27j13.h: 5039: unsigned :2;
[; ;pic18f27j13.h: 5040: unsigned MSK22 :1;
[; ;pic18f27j13.h: 5041: };
[; ;pic18f27j13.h: 5042: struct {
[; ;pic18f27j13.h: 5043: unsigned :3;
[; ;pic18f27j13.h: 5044: unsigned MSK32 :1;
[; ;pic18f27j13.h: 5045: };
[; ;pic18f27j13.h: 5046: struct {
[; ;pic18f27j13.h: 5047: unsigned :4;
[; ;pic18f27j13.h: 5048: unsigned MSK42 :1;
[; ;pic18f27j13.h: 5049: };
[; ;pic18f27j13.h: 5050: struct {
[; ;pic18f27j13.h: 5051: unsigned :5;
[; ;pic18f27j13.h: 5052: unsigned MSK52 :1;
[; ;pic18f27j13.h: 5053: };
[; ;pic18f27j13.h: 5054: struct {
[; ;pic18f27j13.h: 5055: unsigned :6;
[; ;pic18f27j13.h: 5056: unsigned MSK62 :1;
[; ;pic18f27j13.h: 5057: };
[; ;pic18f27j13.h: 5058: struct {
[; ;pic18f27j13.h: 5059: unsigned :7;
[; ;pic18f27j13.h: 5060: unsigned MSK72 :1;
[; ;pic18f27j13.h: 5061: };
[; ;pic18f27j13.h: 5062: } SSP2ADDbits_t;
[; ;pic18f27j13.h: 5063: extern volatile SSP2ADDbits_t SSP2ADDbits @ 0xF74;
[; ;pic18f27j13.h: 5112: extern volatile unsigned char SSP2MSK @ 0xF74;
"5114
[; ;pic18f27j13.h: 5114: asm("SSP2MSK equ 0F74h");
[; <" SSP2MSK equ 0F74h ;# ">
[; ;pic18f27j13.h: 5117: typedef union {
[; ;pic18f27j13.h: 5118: struct {
[; ;pic18f27j13.h: 5119: unsigned MSK0 :1;
[; ;pic18f27j13.h: 5120: unsigned MSK1 :1;
[; ;pic18f27j13.h: 5121: unsigned MSK2 :1;
[; ;pic18f27j13.h: 5122: unsigned MSK3 :1;
[; ;pic18f27j13.h: 5123: unsigned MSK4 :1;
[; ;pic18f27j13.h: 5124: unsigned MSK5 :1;
[; ;pic18f27j13.h: 5125: unsigned MSK6 :1;
[; ;pic18f27j13.h: 5126: unsigned MSK7 :1;
[; ;pic18f27j13.h: 5127: };
[; ;pic18f27j13.h: 5128: } SSP2MSKbits_t;
[; ;pic18f27j13.h: 5129: extern volatile SSP2MSKbits_t SSP2MSKbits @ 0xF74;
[; ;pic18f27j13.h: 5173: extern volatile unsigned char SSP2BUF @ 0xF75;
"5175
[; ;pic18f27j13.h: 5175: asm("SSP2BUF equ 0F75h");
[; <" SSP2BUF equ 0F75h ;# ">
[; ;pic18f27j13.h: 5178: typedef union {
[; ;pic18f27j13.h: 5179: struct {
[; ;pic18f27j13.h: 5180: unsigned SSPBUF :8;
[; ;pic18f27j13.h: 5181: };
[; ;pic18f27j13.h: 5182: } SSP2BUFbits_t;
[; ;pic18f27j13.h: 5183: extern volatile SSP2BUFbits_t SSP2BUFbits @ 0xF75;
[; ;pic18f27j13.h: 5192: extern volatile unsigned char T4CON @ 0xF76;
"5194
[; ;pic18f27j13.h: 5194: asm("T4CON equ 0F76h");
[; <" T4CON equ 0F76h ;# ">
[; ;pic18f27j13.h: 5197: typedef union {
[; ;pic18f27j13.h: 5198: struct {
[; ;pic18f27j13.h: 5199: unsigned T4CKPS :2;
[; ;pic18f27j13.h: 5200: unsigned TMR4ON :1;
[; ;pic18f27j13.h: 5201: unsigned T4OUTPS :4;
[; ;pic18f27j13.h: 5202: };
[; ;pic18f27j13.h: 5203: struct {
[; ;pic18f27j13.h: 5204: unsigned T4CKPS0 :1;
[; ;pic18f27j13.h: 5205: unsigned T4CKPS1 :1;
[; ;pic18f27j13.h: 5206: unsigned :1;
[; ;pic18f27j13.h: 5207: unsigned T4OUTPS0 :1;
[; ;pic18f27j13.h: 5208: unsigned T4OUTPS1 :1;
[; ;pic18f27j13.h: 5209: unsigned T4OUTPS2 :1;
[; ;pic18f27j13.h: 5210: unsigned T4OUTPS3 :1;
[; ;pic18f27j13.h: 5211: };
[; ;pic18f27j13.h: 5212: } T4CONbits_t;
[; ;pic18f27j13.h: 5213: extern volatile T4CONbits_t T4CONbits @ 0xF76;
[; ;pic18f27j13.h: 5262: extern volatile unsigned char PR4 @ 0xF77;
"5264
[; ;pic18f27j13.h: 5264: asm("PR4 equ 0F77h");
[; <" PR4 equ 0F77h ;# ">
[; ;pic18f27j13.h: 5267: typedef union {
[; ;pic18f27j13.h: 5268: struct {
[; ;pic18f27j13.h: 5269: unsigned PR4 :8;
[; ;pic18f27j13.h: 5270: };
[; ;pic18f27j13.h: 5271: } PR4bits_t;
[; ;pic18f27j13.h: 5272: extern volatile PR4bits_t PR4bits @ 0xF77;
[; ;pic18f27j13.h: 5281: extern volatile unsigned char TMR4 @ 0xF78;
"5283
[; ;pic18f27j13.h: 5283: asm("TMR4 equ 0F78h");
[; <" TMR4 equ 0F78h ;# ">
[; ;pic18f27j13.h: 5286: typedef union {
[; ;pic18f27j13.h: 5287: struct {
[; ;pic18f27j13.h: 5288: unsigned TMR4 :8;
[; ;pic18f27j13.h: 5289: };
[; ;pic18f27j13.h: 5290: } TMR4bits_t;
[; ;pic18f27j13.h: 5291: extern volatile TMR4bits_t TMR4bits @ 0xF78;
[; ;pic18f27j13.h: 5300: extern volatile unsigned char T3CON @ 0xF79;
"5302
[; ;pic18f27j13.h: 5302: asm("T3CON equ 0F79h");
[; <" T3CON equ 0F79h ;# ">
[; ;pic18f27j13.h: 5305: typedef union {
[; ;pic18f27j13.h: 5306: struct {
[; ;pic18f27j13.h: 5307: unsigned :2;
[; ;pic18f27j13.h: 5308: unsigned NOT_T3SYNC :1;
[; ;pic18f27j13.h: 5309: };
[; ;pic18f27j13.h: 5310: struct {
[; ;pic18f27j13.h: 5311: unsigned TMR3ON :1;
[; ;pic18f27j13.h: 5312: unsigned RD16 :1;
[; ;pic18f27j13.h: 5313: unsigned nT3SYNC :1;
[; ;pic18f27j13.h: 5314: unsigned T3OSCEN :1;
[; ;pic18f27j13.h: 5315: unsigned T3CKPS :2;
[; ;pic18f27j13.h: 5316: unsigned TMR3CS :2;
[; ;pic18f27j13.h: 5317: };
[; ;pic18f27j13.h: 5318: struct {
[; ;pic18f27j13.h: 5319: unsigned :4;
[; ;pic18f27j13.h: 5320: unsigned T3CKPS0 :1;
[; ;pic18f27j13.h: 5321: unsigned T3CKPS1 :1;
[; ;pic18f27j13.h: 5322: unsigned TMR3CS0 :1;
[; ;pic18f27j13.h: 5323: unsigned TMR3CS1 :1;
[; ;pic18f27j13.h: 5324: };
[; ;pic18f27j13.h: 5325: struct {
[; ;pic18f27j13.h: 5326: unsigned :7;
[; ;pic18f27j13.h: 5327: unsigned RD163 :1;
[; ;pic18f27j13.h: 5328: };
[; ;pic18f27j13.h: 5329: struct {
[; ;pic18f27j13.h: 5330: unsigned :3;
[; ;pic18f27j13.h: 5331: unsigned SOSCEN3 :1;
[; ;pic18f27j13.h: 5332: };
[; ;pic18f27j13.h: 5333: struct {
[; ;pic18f27j13.h: 5334: unsigned :7;
[; ;pic18f27j13.h: 5335: unsigned T3RD16 :1;
[; ;pic18f27j13.h: 5336: };
[; ;pic18f27j13.h: 5337: } T3CONbits_t;
[; ;pic18f27j13.h: 5338: extern volatile T3CONbits_t T3CONbits @ 0xF79;
[; ;pic18f27j13.h: 5412: extern volatile unsigned short TMR3 @ 0xF7A;
"5414
[; ;pic18f27j13.h: 5414: asm("TMR3 equ 0F7Ah");
[; <" TMR3 equ 0F7Ah ;# ">
[; ;pic18f27j13.h: 5418: extern volatile unsigned char TMR3L @ 0xF7A;
"5420
[; ;pic18f27j13.h: 5420: asm("TMR3L equ 0F7Ah");
[; <" TMR3L equ 0F7Ah ;# ">
[; ;pic18f27j13.h: 5423: typedef union {
[; ;pic18f27j13.h: 5424: struct {
[; ;pic18f27j13.h: 5425: unsigned TMR3L :8;
[; ;pic18f27j13.h: 5426: };
[; ;pic18f27j13.h: 5427: } TMR3Lbits_t;
[; ;pic18f27j13.h: 5428: extern volatile TMR3Lbits_t TMR3Lbits @ 0xF7A;
[; ;pic18f27j13.h: 5437: extern volatile unsigned char TMR3H @ 0xF7B;
"5439
[; ;pic18f27j13.h: 5439: asm("TMR3H equ 0F7Bh");
[; <" TMR3H equ 0F7Bh ;# ">
[; ;pic18f27j13.h: 5442: typedef union {
[; ;pic18f27j13.h: 5443: struct {
[; ;pic18f27j13.h: 5444: unsigned TMR3H :8;
[; ;pic18f27j13.h: 5445: };
[; ;pic18f27j13.h: 5446: } TMR3Hbits_t;
[; ;pic18f27j13.h: 5447: extern volatile TMR3Hbits_t TMR3Hbits @ 0xF7B;
[; ;pic18f27j13.h: 5456: extern volatile unsigned char BAUDCON2 @ 0xF7C;
"5458
[; ;pic18f27j13.h: 5458: asm("BAUDCON2 equ 0F7Ch");
[; <" BAUDCON2 equ 0F7Ch ;# ">
[; ;pic18f27j13.h: 5461: typedef union {
[; ;pic18f27j13.h: 5462: struct {
[; ;pic18f27j13.h: 5463: unsigned ABDEN :1;
[; ;pic18f27j13.h: 5464: unsigned WUE :1;
[; ;pic18f27j13.h: 5465: unsigned :1;
[; ;pic18f27j13.h: 5466: unsigned BRG16 :1;
[; ;pic18f27j13.h: 5467: unsigned TXCKP :1;
[; ;pic18f27j13.h: 5468: unsigned RXDTP :1;
[; ;pic18f27j13.h: 5469: unsigned RCIDL :1;
[; ;pic18f27j13.h: 5470: unsigned ABDOVF :1;
[; ;pic18f27j13.h: 5471: };
[; ;pic18f27j13.h: 5472: struct {
[; ;pic18f27j13.h: 5473: unsigned ABDEN2 :1;
[; ;pic18f27j13.h: 5474: };
[; ;pic18f27j13.h: 5475: struct {
[; ;pic18f27j13.h: 5476: unsigned :7;
[; ;pic18f27j13.h: 5477: unsigned ABDOVF2 :1;
[; ;pic18f27j13.h: 5478: };
[; ;pic18f27j13.h: 5479: struct {
[; ;pic18f27j13.h: 5480: unsigned :3;
[; ;pic18f27j13.h: 5481: unsigned BRG162 :1;
[; ;pic18f27j13.h: 5482: };
[; ;pic18f27j13.h: 5483: struct {
[; ;pic18f27j13.h: 5484: unsigned :5;
[; ;pic18f27j13.h: 5485: unsigned DTRXP2 :1;
[; ;pic18f27j13.h: 5486: };
[; ;pic18f27j13.h: 5487: struct {
[; ;pic18f27j13.h: 5488: unsigned :6;
[; ;pic18f27j13.h: 5489: unsigned RCIDL2 :1;
[; ;pic18f27j13.h: 5490: };
[; ;pic18f27j13.h: 5491: struct {
[; ;pic18f27j13.h: 5492: unsigned :6;
[; ;pic18f27j13.h: 5493: unsigned RCMT2 :1;
[; ;pic18f27j13.h: 5494: };
[; ;pic18f27j13.h: 5495: struct {
[; ;pic18f27j13.h: 5496: unsigned :5;
[; ;pic18f27j13.h: 5497: unsigned RXDTP2 :1;
[; ;pic18f27j13.h: 5498: };
[; ;pic18f27j13.h: 5499: struct {
[; ;pic18f27j13.h: 5500: unsigned :4;
[; ;pic18f27j13.h: 5501: unsigned SCKP2 :1;
[; ;pic18f27j13.h: 5502: };
[; ;pic18f27j13.h: 5503: struct {
[; ;pic18f27j13.h: 5504: unsigned :4;
[; ;pic18f27j13.h: 5505: unsigned TXCKP2 :1;
[; ;pic18f27j13.h: 5506: };
[; ;pic18f27j13.h: 5507: struct {
[; ;pic18f27j13.h: 5508: unsigned :1;
[; ;pic18f27j13.h: 5509: unsigned WUE2 :1;
[; ;pic18f27j13.h: 5510: };
[; ;pic18f27j13.h: 5511: } BAUDCON2bits_t;
[; ;pic18f27j13.h: 5512: extern volatile BAUDCON2bits_t BAUDCON2bits @ 0xF7C;
[; ;pic18f27j13.h: 5601: extern volatile unsigned char SPBRGH2 @ 0xF7D;
"5603
[; ;pic18f27j13.h: 5603: asm("SPBRGH2 equ 0F7Dh");
[; <" SPBRGH2 equ 0F7Dh ;# ">
[; ;pic18f27j13.h: 5606: typedef union {
[; ;pic18f27j13.h: 5607: struct {
[; ;pic18f27j13.h: 5608: unsigned SPBRGH2 :8;
[; ;pic18f27j13.h: 5609: };
[; ;pic18f27j13.h: 5610: } SPBRGH2bits_t;
[; ;pic18f27j13.h: 5611: extern volatile SPBRGH2bits_t SPBRGH2bits @ 0xF7D;
[; ;pic18f27j13.h: 5620: extern volatile unsigned char BAUDCON1 @ 0xF7E;
"5622
[; ;pic18f27j13.h: 5622: asm("BAUDCON1 equ 0F7Eh");
[; <" BAUDCON1 equ 0F7Eh ;# ">
[; ;pic18f27j13.h: 5625: extern volatile unsigned char BAUDCON @ 0xF7E;
"5627
[; ;pic18f27j13.h: 5627: asm("BAUDCON equ 0F7Eh");
[; <" BAUDCON equ 0F7Eh ;# ">
[; ;pic18f27j13.h: 5629: extern volatile unsigned char BAUDCTL @ 0xF7E;
"5631
[; ;pic18f27j13.h: 5631: asm("BAUDCTL equ 0F7Eh");
[; <" BAUDCTL equ 0F7Eh ;# ">
[; ;pic18f27j13.h: 5634: typedef union {
[; ;pic18f27j13.h: 5635: struct {
[; ;pic18f27j13.h: 5636: unsigned ABDEN :1;
[; ;pic18f27j13.h: 5637: unsigned WUE :1;
[; ;pic18f27j13.h: 5638: unsigned :1;
[; ;pic18f27j13.h: 5639: unsigned BRG16 :1;
[; ;pic18f27j13.h: 5640: unsigned TXCKP :1;
[; ;pic18f27j13.h: 5641: unsigned RXDTP :1;
[; ;pic18f27j13.h: 5642: unsigned RCIDL :1;
[; ;pic18f27j13.h: 5643: unsigned ABDOVF :1;
[; ;pic18f27j13.h: 5644: };
[; ;pic18f27j13.h: 5645: struct {
[; ;pic18f27j13.h: 5646: unsigned ABDEN1 :1;
[; ;pic18f27j13.h: 5647: };
[; ;pic18f27j13.h: 5648: struct {
[; ;pic18f27j13.h: 5649: unsigned :7;
[; ;pic18f27j13.h: 5650: unsigned ABDOVF1 :1;
[; ;pic18f27j13.h: 5651: };
[; ;pic18f27j13.h: 5652: struct {
[; ;pic18f27j13.h: 5653: unsigned :3;
[; ;pic18f27j13.h: 5654: unsigned BRG161 :1;
[; ;pic18f27j13.h: 5655: };
[; ;pic18f27j13.h: 5656: struct {
[; ;pic18f27j13.h: 5657: unsigned :4;
[; ;pic18f27j13.h: 5658: unsigned CKTXP :1;
[; ;pic18f27j13.h: 5659: };
[; ;pic18f27j13.h: 5660: struct {
[; ;pic18f27j13.h: 5661: unsigned :5;
[; ;pic18f27j13.h: 5662: unsigned DTRXP :1;
[; ;pic18f27j13.h: 5663: };
[; ;pic18f27j13.h: 5664: struct {
[; ;pic18f27j13.h: 5665: unsigned :5;
[; ;pic18f27j13.h: 5666: unsigned DTRXP1 :1;
[; ;pic18f27j13.h: 5667: };
[; ;pic18f27j13.h: 5668: struct {
[; ;pic18f27j13.h: 5669: unsigned :6;
[; ;pic18f27j13.h: 5670: unsigned RCIDL1 :1;
[; ;pic18f27j13.h: 5671: };
[; ;pic18f27j13.h: 5672: struct {
[; ;pic18f27j13.h: 5673: unsigned :6;
[; ;pic18f27j13.h: 5674: unsigned RCMT :1;
[; ;pic18f27j13.h: 5675: };
[; ;pic18f27j13.h: 5676: struct {
[; ;pic18f27j13.h: 5677: unsigned :6;
[; ;pic18f27j13.h: 5678: unsigned RCMT1 :1;
[; ;pic18f27j13.h: 5679: };
[; ;pic18f27j13.h: 5680: struct {
[; ;pic18f27j13.h: 5681: unsigned :5;
[; ;pic18f27j13.h: 5682: unsigned RXDTP1 :1;
[; ;pic18f27j13.h: 5683: };
[; ;pic18f27j13.h: 5684: struct {
[; ;pic18f27j13.h: 5685: unsigned :4;
[; ;pic18f27j13.h: 5686: unsigned SCKP :1;
[; ;pic18f27j13.h: 5687: };
[; ;pic18f27j13.h: 5688: struct {
[; ;pic18f27j13.h: 5689: unsigned :4;
[; ;pic18f27j13.h: 5690: unsigned SCKP1 :1;
[; ;pic18f27j13.h: 5691: };
[; ;pic18f27j13.h: 5692: struct {
[; ;pic18f27j13.h: 5693: unsigned :4;
[; ;pic18f27j13.h: 5694: unsigned TXCKP1 :1;
[; ;pic18f27j13.h: 5695: };
[; ;pic18f27j13.h: 5696: struct {
[; ;pic18f27j13.h: 5697: unsigned :1;
[; ;pic18f27j13.h: 5698: unsigned WUE1 :1;
[; ;pic18f27j13.h: 5699: };
[; ;pic18f27j13.h: 5700: struct {
[; ;pic18f27j13.h: 5701: unsigned :5;
[; ;pic18f27j13.h: 5702: unsigned RXCKP :1;
[; ;pic18f27j13.h: 5703: };
[; ;pic18f27j13.h: 5704: struct {
[; ;pic18f27j13.h: 5705: unsigned :1;
[; ;pic18f27j13.h: 5706: unsigned W4E :1;
[; ;pic18f27j13.h: 5707: };
[; ;pic18f27j13.h: 5708: } BAUDCON1bits_t;
[; ;pic18f27j13.h: 5709: extern volatile BAUDCON1bits_t BAUDCON1bits @ 0xF7E;
[; ;pic18f27j13.h: 5827: typedef union {
[; ;pic18f27j13.h: 5828: struct {
[; ;pic18f27j13.h: 5829: unsigned ABDEN :1;
[; ;pic18f27j13.h: 5830: unsigned WUE :1;
[; ;pic18f27j13.h: 5831: unsigned :1;
[; ;pic18f27j13.h: 5832: unsigned BRG16 :1;
[; ;pic18f27j13.h: 5833: unsigned TXCKP :1;
[; ;pic18f27j13.h: 5834: unsigned RXDTP :1;
[; ;pic18f27j13.h: 5835: unsigned RCIDL :1;
[; ;pic18f27j13.h: 5836: unsigned ABDOVF :1;
[; ;pic18f27j13.h: 5837: };
[; ;pic18f27j13.h: 5838: struct {
[; ;pic18f27j13.h: 5839: unsigned ABDEN1 :1;
[; ;pic18f27j13.h: 5840: };
[; ;pic18f27j13.h: 5841: struct {
[; ;pic18f27j13.h: 5842: unsigned :7;
[; ;pic18f27j13.h: 5843: unsigned ABDOVF1 :1;
[; ;pic18f27j13.h: 5844: };
[; ;pic18f27j13.h: 5845: struct {
[; ;pic18f27j13.h: 5846: unsigned :3;
[; ;pic18f27j13.h: 5847: unsigned BRG161 :1;
[; ;pic18f27j13.h: 5848: };
[; ;pic18f27j13.h: 5849: struct {
[; ;pic18f27j13.h: 5850: unsigned :4;
[; ;pic18f27j13.h: 5851: unsigned CKTXP :1;
[; ;pic18f27j13.h: 5852: };
[; ;pic18f27j13.h: 5853: struct {
[; ;pic18f27j13.h: 5854: unsigned :5;
[; ;pic18f27j13.h: 5855: unsigned DTRXP :1;
[; ;pic18f27j13.h: 5856: };
[; ;pic18f27j13.h: 5857: struct {
[; ;pic18f27j13.h: 5858: unsigned :5;
[; ;pic18f27j13.h: 5859: unsigned DTRXP1 :1;
[; ;pic18f27j13.h: 5860: };
[; ;pic18f27j13.h: 5861: struct {
[; ;pic18f27j13.h: 5862: unsigned :6;
[; ;pic18f27j13.h: 5863: unsigned RCIDL1 :1;
[; ;pic18f27j13.h: 5864: };
[; ;pic18f27j13.h: 5865: struct {
[; ;pic18f27j13.h: 5866: unsigned :6;
[; ;pic18f27j13.h: 5867: unsigned RCMT :1;
[; ;pic18f27j13.h: 5868: };
[; ;pic18f27j13.h: 5869: struct {
[; ;pic18f27j13.h: 5870: unsigned :6;
[; ;pic18f27j13.h: 5871: unsigned RCMT1 :1;
[; ;pic18f27j13.h: 5872: };
[; ;pic18f27j13.h: 5873: struct {
[; ;pic18f27j13.h: 5874: unsigned :5;
[; ;pic18f27j13.h: 5875: unsigned RXDTP1 :1;
[; ;pic18f27j13.h: 5876: };
[; ;pic18f27j13.h: 5877: struct {
[; ;pic18f27j13.h: 5878: unsigned :4;
[; ;pic18f27j13.h: 5879: unsigned SCKP :1;
[; ;pic18f27j13.h: 5880: };
[; ;pic18f27j13.h: 5881: struct {
[; ;pic18f27j13.h: 5882: unsigned :4;
[; ;pic18f27j13.h: 5883: unsigned SCKP1 :1;
[; ;pic18f27j13.h: 5884: };
[; ;pic18f27j13.h: 5885: struct {
[; ;pic18f27j13.h: 5886: unsigned :4;
[; ;pic18f27j13.h: 5887: unsigned TXCKP1 :1;
[; ;pic18f27j13.h: 5888: };
[; ;pic18f27j13.h: 5889: struct {
[; ;pic18f27j13.h: 5890: unsigned :1;
[; ;pic18f27j13.h: 5891: unsigned WUE1 :1;
[; ;pic18f27j13.h: 5892: };
[; ;pic18f27j13.h: 5893: struct {
[; ;pic18f27j13.h: 5894: unsigned :5;
[; ;pic18f27j13.h: 5895: unsigned RXCKP :1;
[; ;pic18f27j13.h: 5896: };
[; ;pic18f27j13.h: 5897: struct {
[; ;pic18f27j13.h: 5898: unsigned :1;
[; ;pic18f27j13.h: 5899: unsigned W4E :1;
[; ;pic18f27j13.h: 5900: };
[; ;pic18f27j13.h: 5901: } BAUDCONbits_t;
[; ;pic18f27j13.h: 5902: extern volatile BAUDCONbits_t BAUDCONbits @ 0xF7E;
[; ;pic18f27j13.h: 6019: typedef union {
[; ;pic18f27j13.h: 6020: struct {
[; ;pic18f27j13.h: 6021: unsigned ABDEN :1;
[; ;pic18f27j13.h: 6022: unsigned WUE :1;
[; ;pic18f27j13.h: 6023: unsigned :1;
[; ;pic18f27j13.h: 6024: unsigned BRG16 :1;
[; ;pic18f27j13.h: 6025: unsigned TXCKP :1;
[; ;pic18f27j13.h: 6026: unsigned RXDTP :1;
[; ;pic18f27j13.h: 6027: unsigned RCIDL :1;
[; ;pic18f27j13.h: 6028: unsigned ABDOVF :1;
[; ;pic18f27j13.h: 6029: };
[; ;pic18f27j13.h: 6030: struct {
[; ;pic18f27j13.h: 6031: unsigned ABDEN1 :1;
[; ;pic18f27j13.h: 6032: };
[; ;pic18f27j13.h: 6033: struct {
[; ;pic18f27j13.h: 6034: unsigned :7;
[; ;pic18f27j13.h: 6035: unsigned ABDOVF1 :1;
[; ;pic18f27j13.h: 6036: };
[; ;pic18f27j13.h: 6037: struct {
[; ;pic18f27j13.h: 6038: unsigned :3;
[; ;pic18f27j13.h: 6039: unsigned BRG161 :1;
[; ;pic18f27j13.h: 6040: };
[; ;pic18f27j13.h: 6041: struct {
[; ;pic18f27j13.h: 6042: unsigned :4;
[; ;pic18f27j13.h: 6043: unsigned CKTXP :1;
[; ;pic18f27j13.h: 6044: };
[; ;pic18f27j13.h: 6045: struct {
[; ;pic18f27j13.h: 6046: unsigned :5;
[; ;pic18f27j13.h: 6047: unsigned DTRXP :1;
[; ;pic18f27j13.h: 6048: };
[; ;pic18f27j13.h: 6049: struct {
[; ;pic18f27j13.h: 6050: unsigned :5;
[; ;pic18f27j13.h: 6051: unsigned DTRXP1 :1;
[; ;pic18f27j13.h: 6052: };
[; ;pic18f27j13.h: 6053: struct {
[; ;pic18f27j13.h: 6054: unsigned :6;
[; ;pic18f27j13.h: 6055: unsigned RCIDL1 :1;
[; ;pic18f27j13.h: 6056: };
[; ;pic18f27j13.h: 6057: struct {
[; ;pic18f27j13.h: 6058: unsigned :6;
[; ;pic18f27j13.h: 6059: unsigned RCMT :1;
[; ;pic18f27j13.h: 6060: };
[; ;pic18f27j13.h: 6061: struct {
[; ;pic18f27j13.h: 6062: unsigned :6;
[; ;pic18f27j13.h: 6063: unsigned RCMT1 :1;
[; ;pic18f27j13.h: 6064: };
[; ;pic18f27j13.h: 6065: struct {
[; ;pic18f27j13.h: 6066: unsigned :5;
[; ;pic18f27j13.h: 6067: unsigned RXDTP1 :1;
[; ;pic18f27j13.h: 6068: };
[; ;pic18f27j13.h: 6069: struct {
[; ;pic18f27j13.h: 6070: unsigned :4;
[; ;pic18f27j13.h: 6071: unsigned SCKP :1;
[; ;pic18f27j13.h: 6072: };
[; ;pic18f27j13.h: 6073: struct {
[; ;pic18f27j13.h: 6074: unsigned :4;
[; ;pic18f27j13.h: 6075: unsigned SCKP1 :1;
[; ;pic18f27j13.h: 6076: };
[; ;pic18f27j13.h: 6077: struct {
[; ;pic18f27j13.h: 6078: unsigned :4;
[; ;pic18f27j13.h: 6079: unsigned TXCKP1 :1;
[; ;pic18f27j13.h: 6080: };
[; ;pic18f27j13.h: 6081: struct {
[; ;pic18f27j13.h: 6082: unsigned :1;
[; ;pic18f27j13.h: 6083: unsigned WUE1 :1;
[; ;pic18f27j13.h: 6084: };
[; ;pic18f27j13.h: 6085: struct {
[; ;pic18f27j13.h: 6086: unsigned :5;
[; ;pic18f27j13.h: 6087: unsigned RXCKP :1;
[; ;pic18f27j13.h: 6088: };
[; ;pic18f27j13.h: 6089: struct {
[; ;pic18f27j13.h: 6090: unsigned :1;
[; ;pic18f27j13.h: 6091: unsigned W4E :1;
[; ;pic18f27j13.h: 6092: };
[; ;pic18f27j13.h: 6093: } BAUDCTLbits_t;
[; ;pic18f27j13.h: 6094: extern volatile BAUDCTLbits_t BAUDCTLbits @ 0xF7E;
[; ;pic18f27j13.h: 6213: extern volatile unsigned char SPBRGH1 @ 0xF7F;
"6215
[; ;pic18f27j13.h: 6215: asm("SPBRGH1 equ 0F7Fh");
[; <" SPBRGH1 equ 0F7Fh ;# ">
[; ;pic18f27j13.h: 6218: extern volatile unsigned char SPBRGH @ 0xF7F;
"6220
[; ;pic18f27j13.h: 6220: asm("SPBRGH equ 0F7Fh");
[; <" SPBRGH equ 0F7Fh ;# ">
[; ;pic18f27j13.h: 6223: typedef union {
[; ;pic18f27j13.h: 6224: struct {
[; ;pic18f27j13.h: 6225: unsigned SPBRGH1 :8;
[; ;pic18f27j13.h: 6226: };
[; ;pic18f27j13.h: 6227: } SPBRGH1bits_t;
[; ;pic18f27j13.h: 6228: extern volatile SPBRGH1bits_t SPBRGH1bits @ 0xF7F;
[; ;pic18f27j13.h: 6236: typedef union {
[; ;pic18f27j13.h: 6237: struct {
[; ;pic18f27j13.h: 6238: unsigned SPBRGH1 :8;
[; ;pic18f27j13.h: 6239: };
[; ;pic18f27j13.h: 6240: } SPBRGHbits_t;
[; ;pic18f27j13.h: 6241: extern volatile SPBRGHbits_t SPBRGHbits @ 0xF7F;
[; ;pic18f27j13.h: 6250: extern volatile unsigned char PORTA @ 0xF80;
"6252
[; ;pic18f27j13.h: 6252: asm("PORTA equ 0F80h");
[; <" PORTA equ 0F80h ;# ">
[; ;pic18f27j13.h: 6255: typedef union {
[; ;pic18f27j13.h: 6256: struct {
[; ;pic18f27j13.h: 6257: unsigned RA0 :1;
[; ;pic18f27j13.h: 6258: unsigned RA1 :1;
[; ;pic18f27j13.h: 6259: unsigned RA2 :1;
[; ;pic18f27j13.h: 6260: unsigned RA3 :1;
[; ;pic18f27j13.h: 6261: unsigned :1;
[; ;pic18f27j13.h: 6262: unsigned RA5 :1;
[; ;pic18f27j13.h: 6263: unsigned RA6 :1;
[; ;pic18f27j13.h: 6264: unsigned RA7 :1;
[; ;pic18f27j13.h: 6265: };
[; ;pic18f27j13.h: 6266: struct {
[; ;pic18f27j13.h: 6267: unsigned AN0 :1;
[; ;pic18f27j13.h: 6268: unsigned AN1 :1;
[; ;pic18f27j13.h: 6269: unsigned AN2 :1;
[; ;pic18f27j13.h: 6270: unsigned AN3 :1;
[; ;pic18f27j13.h: 6271: unsigned :1;
[; ;pic18f27j13.h: 6272: unsigned AN4 :1;
[; ;pic18f27j13.h: 6273: unsigned OSC2 :1;
[; ;pic18f27j13.h: 6274: unsigned OSC1 :1;
[; ;pic18f27j13.h: 6275: };
[; ;pic18f27j13.h: 6276: struct {
[; ;pic18f27j13.h: 6277: unsigned :5;
[; ;pic18f27j13.h: 6278: unsigned NOT_SS1 :1;
[; ;pic18f27j13.h: 6279: };
[; ;pic18f27j13.h: 6280: struct {
[; ;pic18f27j13.h: 6281: unsigned C1INA :1;
[; ;pic18f27j13.h: 6282: unsigned C2INA :1;
[; ;pic18f27j13.h: 6283: unsigned VREF_MINUS :1;
[; ;pic18f27j13.h: 6284: unsigned VREF_PLUS :1;
[; ;pic18f27j13.h: 6285: unsigned :1;
[; ;pic18f27j13.h: 6286: unsigned nSS1 :1;
[; ;pic18f27j13.h: 6287: unsigned CLKO :1;
[; ;pic18f27j13.h: 6288: unsigned CLKI :1;
[; ;pic18f27j13.h: 6289: };
[; ;pic18f27j13.h: 6290: struct {
[; ;pic18f27j13.h: 6291: unsigned :2;
[; ;pic18f27j13.h: 6292: unsigned CVREF :1;
[; ;pic18f27j13.h: 6293: unsigned C1INB :1;
[; ;pic18f27j13.h: 6294: unsigned :1;
[; ;pic18f27j13.h: 6295: unsigned HLVDIN :1;
[; ;pic18f27j13.h: 6296: };
[; ;pic18f27j13.h: 6297: struct {
[; ;pic18f27j13.h: 6298: unsigned RP0 :1;
[; ;pic18f27j13.h: 6299: unsigned RP1 :1;
[; ;pic18f27j13.h: 6300: unsigned C2INB :1;
[; ;pic18f27j13.h: 6301: };
[; ;pic18f27j13.h: 6302: struct {
[; ;pic18f27j13.h: 6303: unsigned ULPWU :1;
[; ;pic18f27j13.h: 6304: unsigned VBG :1;
[; ;pic18f27j13.h: 6305: unsigned C3INB :1;
[; ;pic18f27j13.h: 6306: unsigned :2;
[; ;pic18f27j13.h: 6307: unsigned RP2 :1;
[; ;pic18f27j13.h: 6308: };
[; ;pic18f27j13.h: 6309: struct {
[; ;pic18f27j13.h: 6310: unsigned :2;
[; ;pic18f27j13.h: 6311: unsigned C1IND :1;
[; ;pic18f27j13.h: 6312: unsigned :2;
[; ;pic18f27j13.h: 6313: unsigned C1INC :1;
[; ;pic18f27j13.h: 6314: };
[; ;pic18f27j13.h: 6315: struct {
[; ;pic18f27j13.h: 6316: unsigned :5;
[; ;pic18f27j13.h: 6317: unsigned LVDIN :1;
[; ;pic18f27j13.h: 6318: };
[; ;pic18f27j13.h: 6319: struct {
[; ;pic18f27j13.h: 6320: unsigned :4;
[; ;pic18f27j13.h: 6321: unsigned RA4 :1;
[; ;pic18f27j13.h: 6322: };
[; ;pic18f27j13.h: 6323: struct {
[; ;pic18f27j13.h: 6324: unsigned :7;
[; ;pic18f27j13.h: 6325: unsigned RJPU :1;
[; ;pic18f27j13.h: 6326: };
[; ;pic18f27j13.h: 6327: struct {
[; ;pic18f27j13.h: 6328: unsigned ULPWUIN :1;
[; ;pic18f27j13.h: 6329: };
[; ;pic18f27j13.h: 6330: } PORTAbits_t;
[; ;pic18f27j13.h: 6331: extern volatile PORTAbits_t PORTAbits @ 0xF80;
[; ;pic18f27j13.h: 6525: extern volatile unsigned char PORTB @ 0xF81;
"6527
[; ;pic18f27j13.h: 6527: asm("PORTB equ 0F81h");
[; <" PORTB equ 0F81h ;# ">
[; ;pic18f27j13.h: 6530: typedef union {
[; ;pic18f27j13.h: 6531: struct {
[; ;pic18f27j13.h: 6532: unsigned RB0 :1;
[; ;pic18f27j13.h: 6533: unsigned RB1 :1;
[; ;pic18f27j13.h: 6534: unsigned RB2 :1;
[; ;pic18f27j13.h: 6535: unsigned RB3 :1;
[; ;pic18f27j13.h: 6536: unsigned RB4 :1;
[; ;pic18f27j13.h: 6537: unsigned RB5 :1;
[; ;pic18f27j13.h: 6538: unsigned RB6 :1;
[; ;pic18f27j13.h: 6539: unsigned RB7 :1;
[; ;pic18f27j13.h: 6540: };
[; ;pic18f27j13.h: 6541: struct {
[; ;pic18f27j13.h: 6542: unsigned AN12 :1;
[; ;pic18f27j13.h: 6543: unsigned AN10 :1;
[; ;pic18f27j13.h: 6544: unsigned AN8 :1;
[; ;pic18f27j13.h: 6545: unsigned AN9 :1;
[; ;pic18f27j13.h: 6546: unsigned :2;
[; ;pic18f27j13.h: 6547: unsigned KBI2 :1;
[; ;pic18f27j13.h: 6548: unsigned KBI3 :1;
[; ;pic18f27j13.h: 6549: };
[; ;pic18f27j13.h: 6550: struct {
[; ;pic18f27j13.h: 6551: unsigned INT0 :1;
[; ;pic18f27j13.h: 6552: unsigned :1;
[; ;pic18f27j13.h: 6553: unsigned CTED1 :1;
[; ;pic18f27j13.h: 6554: unsigned CTED2 :1;
[; ;pic18f27j13.h: 6555: unsigned KBI0 :1;
[; ;pic18f27j13.h: 6556: unsigned KBI1 :1;
[; ;pic18f27j13.h: 6557: unsigned PGC :1;
[; ;pic18f27j13.h: 6558: unsigned PGD :1;
[; ;pic18f27j13.h: 6559: };
[; ;pic18f27j13.h: 6560: struct {
[; ;pic18f27j13.h: 6561: unsigned RP3 :1;
[; ;pic18f27j13.h: 6562: unsigned RTCC :1;
[; ;pic18f27j13.h: 6563: unsigned :4;
[; ;pic18f27j13.h: 6564: unsigned RP9 :1;
[; ;pic18f27j13.h: 6565: unsigned RP10 :1;
[; ;pic18f27j13.h: 6566: };
[; ;pic18f27j13.h: 6567: struct {
[; ;pic18f27j13.h: 6568: unsigned C3IND :1;
[; ;pic18f27j13.h: 6569: unsigned C3INC :1;
[; ;pic18f27j13.h: 6570: unsigned C2INC :1;
[; ;pic18f27j13.h: 6571: unsigned :1;
[; ;pic18f27j13.h: 6572: unsigned SCL2 :1;
[; ;pic18f27j13.h: 6573: unsigned SDA2 :1;
[; ;pic18f27j13.h: 6574: };
[; ;pic18f27j13.h: 6575: struct {
[; ;pic18f27j13.h: 6576: unsigned :1;
[; ;pic18f27j13.h: 6577: unsigned RP4 :1;
[; ;pic18f27j13.h: 6578: unsigned REFO :1;
[; ;pic18f27j13.h: 6579: unsigned RP6 :1;
[; ;pic18f27j13.h: 6580: unsigned RP7 :1;
[; ;pic18f27j13.h: 6581: unsigned RP8 :1;
[; ;pic18f27j13.h: 6582: };
[; ;pic18f27j13.h: 6583: struct {
[; ;pic18f27j13.h: 6584: unsigned :2;
[; ;pic18f27j13.h: 6585: unsigned RP5 :1;
[; ;pic18f27j13.h: 6586: unsigned C3INA :1;
[; ;pic18f27j13.h: 6587: unsigned CCP4 :1;
[; ;pic18f27j13.h: 6588: unsigned CCP5 :1;
[; ;pic18f27j13.h: 6589: unsigned CCP6 :1;
[; ;pic18f27j13.h: 6590: unsigned CCP7 :1;
[; ;pic18f27j13.h: 6591: };
[; ;pic18f27j13.h: 6592: struct {
[; ;pic18f27j13.h: 6593: unsigned :3;
[; ;pic18f27j13.h: 6594: unsigned CCP2_PA2 :1;
[; ;pic18f27j13.h: 6595: };
[; ;pic18f27j13.h: 6596: } PORTBbits_t;
[; ;pic18f27j13.h: 6597: extern volatile PORTBbits_t PORTBbits @ 0xF81;
[; ;pic18f27j13.h: 6811: extern volatile unsigned char PORTC @ 0xF82;
"6813
[; ;pic18f27j13.h: 6813: asm("PORTC equ 0F82h");
[; <" PORTC equ 0F82h ;# ">
[; ;pic18f27j13.h: 6816: typedef union {
[; ;pic18f27j13.h: 6817: struct {
[; ;pic18f27j13.h: 6818: unsigned RC0 :1;
[; ;pic18f27j13.h: 6819: unsigned RC1 :1;
[; ;pic18f27j13.h: 6820: unsigned RC2 :1;
[; ;pic18f27j13.h: 6821: unsigned RC3 :1;
[; ;pic18f27j13.h: 6822: unsigned RC4 :1;
[; ;pic18f27j13.h: 6823: unsigned RC5 :1;
[; ;pic18f27j13.h: 6824: unsigned RC6 :1;
[; ;pic18f27j13.h: 6825: unsigned RC7 :1;
[; ;pic18f27j13.h: 6826: };
[; ;pic18f27j13.h: 6827: struct {
[; ;pic18f27j13.h: 6828: unsigned T1OSO :1;
[; ;pic18f27j13.h: 6829: unsigned T1OSI :1;
[; ;pic18f27j13.h: 6830: unsigned AN11 :1;
[; ;pic18f27j13.h: 6831: unsigned SCL1 :1;
[; ;pic18f27j13.h: 6832: unsigned SDA1 :1;
[; ;pic18f27j13.h: 6833: };
[; ;pic18f27j13.h: 6834: struct {
[; ;pic18f27j13.h: 6835: unsigned T1CKI :1;
[; ;pic18f27j13.h: 6836: unsigned :1;
[; ;pic18f27j13.h: 6837: unsigned CTPLS :1;
[; ;pic18f27j13.h: 6838: unsigned :3;
[; ;pic18f27j13.h: 6839: unsigned TX1 :1;
[; ;pic18f27j13.h: 6840: unsigned RX1 :1;
[; ;pic18f27j13.h: 6841: };
[; ;pic18f27j13.h: 6842: struct {
[; ;pic18f27j13.h: 6843: unsigned RP11 :1;
[; ;pic18f27j13.h: 6844: unsigned RP12 :1;
[; ;pic18f27j13.h: 6845: unsigned RP13 :1;
[; ;pic18f27j13.h: 6846: unsigned RP14 :1;
[; ;pic18f27j13.h: 6847: unsigned RP15 :1;
[; ;pic18f27j13.h: 6848: unsigned RP16 :1;
[; ;pic18f27j13.h: 6849: unsigned CK1 :1;
[; ;pic18f27j13.h: 6850: unsigned DT1 :1;
[; ;pic18f27j13.h: 6851: };
[; ;pic18f27j13.h: 6852: struct {
[; ;pic18f27j13.h: 6853: unsigned :1;
[; ;pic18f27j13.h: 6854: unsigned CCP8 :1;
[; ;pic18f27j13.h: 6855: unsigned C2IND :1;
[; ;pic18f27j13.h: 6856: unsigned SCK1 :1;
[; ;pic18f27j13.h: 6857: unsigned SDI1 :1;
[; ;pic18f27j13.h: 6858: unsigned SDO1 :1;
[; ;pic18f27j13.h: 6859: unsigned CCP9 :1;
[; ;pic18f27j13.h: 6860: unsigned CCP10 :1;
[; ;pic18f27j13.h: 6861: };
[; ;pic18f27j13.h: 6862: struct {
[; ;pic18f27j13.h: 6863: unsigned :6;
[; ;pic18f27j13.h: 6864: unsigned RP17 :1;
[; ;pic18f27j13.h: 6865: unsigned RP18 :1;
[; ;pic18f27j13.h: 6866: };
[; ;pic18f27j13.h: 6867: struct {
[; ;pic18f27j13.h: 6868: unsigned :1;
[; ;pic18f27j13.h: 6869: unsigned CCP2 :1;
[; ;pic18f27j13.h: 6870: };
[; ;pic18f27j13.h: 6871: struct {
[; ;pic18f27j13.h: 6872: unsigned :2;
[; ;pic18f27j13.h: 6873: unsigned PA1 :1;
[; ;pic18f27j13.h: 6874: };
[; ;pic18f27j13.h: 6875: struct {
[; ;pic18f27j13.h: 6876: unsigned :1;
[; ;pic18f27j13.h: 6877: unsigned PA2 :1;
[; ;pic18f27j13.h: 6878: };
[; ;pic18f27j13.h: 6879: } PORTCbits_t;
[; ;pic18f27j13.h: 6880: extern volatile PORTCbits_t PORTCbits @ 0xF82;
[; ;pic18f27j13.h: 7069: extern volatile unsigned char HLVDCON @ 0xF85;
"7071
[; ;pic18f27j13.h: 7071: asm("HLVDCON equ 0F85h");
[; <" HLVDCON equ 0F85h ;# ">
[; ;pic18f27j13.h: 7074: typedef union {
[; ;pic18f27j13.h: 7075: struct {
[; ;pic18f27j13.h: 7076: unsigned HLVDL :4;
[; ;pic18f27j13.h: 7077: unsigned HLVDEN :1;
[; ;pic18f27j13.h: 7078: unsigned IRVST :1;
[; ;pic18f27j13.h: 7079: unsigned BGVST :1;
[; ;pic18f27j13.h: 7080: unsigned VDIRMAG :1;
[; ;pic18f27j13.h: 7081: };
[; ;pic18f27j13.h: 7082: struct {
[; ;pic18f27j13.h: 7083: unsigned HLVDL0 :1;
[; ;pic18f27j13.h: 7084: unsigned HLVDL1 :1;
[; ;pic18f27j13.h: 7085: unsigned HLVDL2 :1;
[; ;pic18f27j13.h: 7086: unsigned HLVDL3 :1;
[; ;pic18f27j13.h: 7087: };
[; ;pic18f27j13.h: 7088: } HLVDCONbits_t;
[; ;pic18f27j13.h: 7089: extern volatile HLVDCONbits_t HLVDCONbits @ 0xF85;
[; ;pic18f27j13.h: 7138: extern volatile unsigned char DMACON2 @ 0xF86;
"7140
[; ;pic18f27j13.h: 7140: asm("DMACON2 equ 0F86h");
[; <" DMACON2 equ 0F86h ;# ">
[; ;pic18f27j13.h: 7143: typedef union {
[; ;pic18f27j13.h: 7144: struct {
[; ;pic18f27j13.h: 7145: unsigned INTLVL :4;
[; ;pic18f27j13.h: 7146: unsigned DLYCYC :4;
[; ;pic18f27j13.h: 7147: };
[; ;pic18f27j13.h: 7148: struct {
[; ;pic18f27j13.h: 7149: unsigned INTLVL0 :1;
[; ;pic18f27j13.h: 7150: unsigned INTLVL1 :1;
[; ;pic18f27j13.h: 7151: unsigned INTLVL2 :1;
[; ;pic18f27j13.h: 7152: unsigned INTLVL3 :1;
[; ;pic18f27j13.h: 7153: unsigned DLYCYC0 :1;
[; ;pic18f27j13.h: 7154: unsigned DLYCYC1 :1;
[; ;pic18f27j13.h: 7155: unsigned DLYCYC2 :1;
[; ;pic18f27j13.h: 7156: unsigned DLYCYC3 :1;
[; ;pic18f27j13.h: 7157: };
[; ;pic18f27j13.h: 7158: } DMACON2bits_t;
[; ;pic18f27j13.h: 7159: extern volatile DMACON2bits_t DMACON2bits @ 0xF86;
[; ;pic18f27j13.h: 7213: extern volatile unsigned char OSCCON2 @ 0xF87;
"7215
[; ;pic18f27j13.h: 7215: asm("OSCCON2 equ 0F87h");
[; <" OSCCON2 equ 0F87h ;# ">
[; ;pic18f27j13.h: 7218: typedef union {
[; ;pic18f27j13.h: 7219: struct {
[; ;pic18f27j13.h: 7220: unsigned :2;
[; ;pic18f27j13.h: 7221: unsigned PRISD :1;
[; ;pic18f27j13.h: 7222: unsigned SOSCGO :1;
[; ;pic18f27j13.h: 7223: unsigned SOSCDRV :1;
[; ;pic18f27j13.h: 7224: unsigned :1;
[; ;pic18f27j13.h: 7225: unsigned SOSCRUN :1;
[; ;pic18f27j13.h: 7226: };
[; ;pic18f27j13.h: 7227: } OSCCON2bits_t;
[; ;pic18f27j13.h: 7228: extern volatile OSCCON2bits_t OSCCON2bits @ 0xF87;
[; ;pic18f27j13.h: 7252: extern volatile unsigned char DMACON1 @ 0xF88;
"7254
[; ;pic18f27j13.h: 7254: asm("DMACON1 equ 0F88h");
[; <" DMACON1 equ 0F88h ;# ">
[; ;pic18f27j13.h: 7257: typedef union {
[; ;pic18f27j13.h: 7258: struct {
[; ;pic18f27j13.h: 7259: unsigned DMAEN :1;
[; ;pic18f27j13.h: 7260: unsigned DLYINTEN :1;
[; ;pic18f27j13.h: 7261: unsigned DUPLEX0 :1;
[; ;pic18f27j13.h: 7262: unsigned DUPLEX1 :1;
[; ;pic18f27j13.h: 7263: unsigned RXINC :1;
[; ;pic18f27j13.h: 7264: unsigned TXINC :1;
[; ;pic18f27j13.h: 7265: unsigned SSCON0 :1;
[; ;pic18f27j13.h: 7266: unsigned SSCON1 :1;
[; ;pic18f27j13.h: 7267: };
[; ;pic18f27j13.h: 7268: } DMACON1bits_t;
[; ;pic18f27j13.h: 7269: extern volatile DMACON1bits_t DMACON1bits @ 0xF88;
[; ;pic18f27j13.h: 7313: extern volatile unsigned char LATA @ 0xF89;
"7315
[; ;pic18f27j13.h: 7315: asm("LATA equ 0F89h");
[; <" LATA equ 0F89h ;# ">
[; ;pic18f27j13.h: 7318: typedef union {
[; ;pic18f27j13.h: 7319: struct {
[; ;pic18f27j13.h: 7320: unsigned LATA0 :1;
[; ;pic18f27j13.h: 7321: unsigned LATA1 :1;
[; ;pic18f27j13.h: 7322: unsigned LATA2 :1;
[; ;pic18f27j13.h: 7323: unsigned LATA3 :1;
[; ;pic18f27j13.h: 7324: unsigned :1;
[; ;pic18f27j13.h: 7325: unsigned LATA5 :1;
[; ;pic18f27j13.h: 7326: unsigned LATA6 :1;
[; ;pic18f27j13.h: 7327: unsigned LATA7 :1;
[; ;pic18f27j13.h: 7328: };
[; ;pic18f27j13.h: 7329: struct {
[; ;pic18f27j13.h: 7330: unsigned LA0 :1;
[; ;pic18f27j13.h: 7331: };
[; ;pic18f27j13.h: 7332: struct {
[; ;pic18f27j13.h: 7333: unsigned :1;
[; ;pic18f27j13.h: 7334: unsigned LA1 :1;
[; ;pic18f27j13.h: 7335: };
[; ;pic18f27j13.h: 7336: struct {
[; ;pic18f27j13.h: 7337: unsigned :2;
[; ;pic18f27j13.h: 7338: unsigned LA2 :1;
[; ;pic18f27j13.h: 7339: };
[; ;pic18f27j13.h: 7340: struct {
[; ;pic18f27j13.h: 7341: unsigned :3;
[; ;pic18f27j13.h: 7342: unsigned LA3 :1;
[; ;pic18f27j13.h: 7343: };
[; ;pic18f27j13.h: 7344: struct {
[; ;pic18f27j13.h: 7345: unsigned :4;
[; ;pic18f27j13.h: 7346: unsigned LA4 :1;
[; ;pic18f27j13.h: 7347: };
[; ;pic18f27j13.h: 7348: struct {
[; ;pic18f27j13.h: 7349: unsigned :5;
[; ;pic18f27j13.h: 7350: unsigned LA5 :1;
[; ;pic18f27j13.h: 7351: };
[; ;pic18f27j13.h: 7352: struct {
[; ;pic18f27j13.h: 7353: unsigned :6;
[; ;pic18f27j13.h: 7354: unsigned LA6 :1;
[; ;pic18f27j13.h: 7355: };
[; ;pic18f27j13.h: 7356: struct {
[; ;pic18f27j13.h: 7357: unsigned :7;
[; ;pic18f27j13.h: 7358: unsigned LA7 :1;
[; ;pic18f27j13.h: 7359: };
[; ;pic18f27j13.h: 7360: } LATAbits_t;
[; ;pic18f27j13.h: 7361: extern volatile LATAbits_t LATAbits @ 0xF89;
[; ;pic18f27j13.h: 7440: extern volatile unsigned char LATB @ 0xF8A;
"7442
[; ;pic18f27j13.h: 7442: asm("LATB equ 0F8Ah");
[; <" LATB equ 0F8Ah ;# ">
[; ;pic18f27j13.h: 7445: typedef union {
[; ;pic18f27j13.h: 7446: struct {
[; ;pic18f27j13.h: 7447: unsigned LATB0 :1;
[; ;pic18f27j13.h: 7448: unsigned LATB1 :1;
[; ;pic18f27j13.h: 7449: unsigned LATB2 :1;
[; ;pic18f27j13.h: 7450: unsigned LATB3 :1;
[; ;pic18f27j13.h: 7451: unsigned LATB4 :1;
[; ;pic18f27j13.h: 7452: unsigned LATB5 :1;
[; ;pic18f27j13.h: 7453: unsigned LATB6 :1;
[; ;pic18f27j13.h: 7454: unsigned LATB7 :1;
[; ;pic18f27j13.h: 7455: };
[; ;pic18f27j13.h: 7456: struct {
[; ;pic18f27j13.h: 7457: unsigned LB0 :1;
[; ;pic18f27j13.h: 7458: };
[; ;pic18f27j13.h: 7459: struct {
[; ;pic18f27j13.h: 7460: unsigned :1;
[; ;pic18f27j13.h: 7461: unsigned LB1 :1;
[; ;pic18f27j13.h: 7462: };
[; ;pic18f27j13.h: 7463: struct {
[; ;pic18f27j13.h: 7464: unsigned :2;
[; ;pic18f27j13.h: 7465: unsigned LB2 :1;
[; ;pic18f27j13.h: 7466: };
[; ;pic18f27j13.h: 7467: struct {
[; ;pic18f27j13.h: 7468: unsigned :3;
[; ;pic18f27j13.h: 7469: unsigned LB3 :1;
[; ;pic18f27j13.h: 7470: };
[; ;pic18f27j13.h: 7471: struct {
[; ;pic18f27j13.h: 7472: unsigned :4;
[; ;pic18f27j13.h: 7473: unsigned LB4 :1;
[; ;pic18f27j13.h: 7474: };
[; ;pic18f27j13.h: 7475: struct {
[; ;pic18f27j13.h: 7476: unsigned :5;
[; ;pic18f27j13.h: 7477: unsigned LB5 :1;
[; ;pic18f27j13.h: 7478: };
[; ;pic18f27j13.h: 7479: struct {
[; ;pic18f27j13.h: 7480: unsigned :6;
[; ;pic18f27j13.h: 7481: unsigned LB6 :1;
[; ;pic18f27j13.h: 7482: };
[; ;pic18f27j13.h: 7483: struct {
[; ;pic18f27j13.h: 7484: unsigned :7;
[; ;pic18f27j13.h: 7485: unsigned LB7 :1;
[; ;pic18f27j13.h: 7486: };
[; ;pic18f27j13.h: 7487: } LATBbits_t;
[; ;pic18f27j13.h: 7488: extern volatile LATBbits_t LATBbits @ 0xF8A;
[; ;pic18f27j13.h: 7572: extern volatile unsigned char LATC @ 0xF8B;
"7574
[; ;pic18f27j13.h: 7574: asm("LATC equ 0F8Bh");
[; <" LATC equ 0F8Bh ;# ">
[; ;pic18f27j13.h: 7577: typedef union {
[; ;pic18f27j13.h: 7578: struct {
[; ;pic18f27j13.h: 7579: unsigned LATC0 :1;
[; ;pic18f27j13.h: 7580: unsigned LATC1 :1;
[; ;pic18f27j13.h: 7581: unsigned LATC2 :1;
[; ;pic18f27j13.h: 7582: unsigned LATC3 :1;
[; ;pic18f27j13.h: 7583: unsigned LATC4 :1;
[; ;pic18f27j13.h: 7584: unsigned LATC5 :1;
[; ;pic18f27j13.h: 7585: unsigned LATC6 :1;
[; ;pic18f27j13.h: 7586: unsigned LATC7 :1;
[; ;pic18f27j13.h: 7587: };
[; ;pic18f27j13.h: 7588: struct {
[; ;pic18f27j13.h: 7589: unsigned LC0 :1;
[; ;pic18f27j13.h: 7590: };
[; ;pic18f27j13.h: 7591: struct {
[; ;pic18f27j13.h: 7592: unsigned :1;
[; ;pic18f27j13.h: 7593: unsigned LC1 :1;
[; ;pic18f27j13.h: 7594: };
[; ;pic18f27j13.h: 7595: struct {
[; ;pic18f27j13.h: 7596: unsigned :2;
[; ;pic18f27j13.h: 7597: unsigned LC2 :1;
[; ;pic18f27j13.h: 7598: };
[; ;pic18f27j13.h: 7599: struct {
[; ;pic18f27j13.h: 7600: unsigned :3;
[; ;pic18f27j13.h: 7601: unsigned LC3 :1;
[; ;pic18f27j13.h: 7602: };
[; ;pic18f27j13.h: 7603: struct {
[; ;pic18f27j13.h: 7604: unsigned :4;
[; ;pic18f27j13.h: 7605: unsigned LC4 :1;
[; ;pic18f27j13.h: 7606: };
[; ;pic18f27j13.h: 7607: struct {
[; ;pic18f27j13.h: 7608: unsigned :5;
[; ;pic18f27j13.h: 7609: unsigned LC5 :1;
[; ;pic18f27j13.h: 7610: };
[; ;pic18f27j13.h: 7611: struct {
[; ;pic18f27j13.h: 7612: unsigned :6;
[; ;pic18f27j13.h: 7613: unsigned LC6 :1;
[; ;pic18f27j13.h: 7614: };
[; ;pic18f27j13.h: 7615: struct {
[; ;pic18f27j13.h: 7616: unsigned :7;
[; ;pic18f27j13.h: 7617: unsigned LC7 :1;
[; ;pic18f27j13.h: 7618: };
[; ;pic18f27j13.h: 7619: } LATCbits_t;
[; ;pic18f27j13.h: 7620: extern volatile LATCbits_t LATCbits @ 0xF8B;
[; ;pic18f27j13.h: 7704: extern volatile unsigned char PIE4 @ 0xF8E;
"7706
[; ;pic18f27j13.h: 7706: asm("PIE4 equ 0F8Eh");
[; <" PIE4 equ 0F8Eh ;# ">
[; ;pic18f27j13.h: 7709: typedef union {
[; ;pic18f27j13.h: 7710: struct {
[; ;pic18f27j13.h: 7711: unsigned CCP3IE :1;
[; ;pic18f27j13.h: 7712: unsigned CCP4IE :1;
[; ;pic18f27j13.h: 7713: unsigned CCP5IE :1;
[; ;pic18f27j13.h: 7714: unsigned CCP6IE :1;
[; ;pic18f27j13.h: 7715: unsigned CCP7IE :1;
[; ;pic18f27j13.h: 7716: unsigned CCP8IE :1;
[; ;pic18f27j13.h: 7717: unsigned CCP9IE :1;
[; ;pic18f27j13.h: 7718: unsigned CCP10IE :1;
[; ;pic18f27j13.h: 7719: };
[; ;pic18f27j13.h: 7720: } PIE4bits_t;
[; ;pic18f27j13.h: 7721: extern volatile PIE4bits_t PIE4bits @ 0xF8E;
[; ;pic18f27j13.h: 7765: extern volatile unsigned char PIR4 @ 0xF8F;
"7767
[; ;pic18f27j13.h: 7767: asm("PIR4 equ 0F8Fh");
[; <" PIR4 equ 0F8Fh ;# ">
[; ;pic18f27j13.h: 7770: typedef union {
[; ;pic18f27j13.h: 7771: struct {
[; ;pic18f27j13.h: 7772: unsigned CCP3IF :1;
[; ;pic18f27j13.h: 7773: unsigned CCP4IF :1;
[; ;pic18f27j13.h: 7774: unsigned CCP5IF :1;
[; ;pic18f27j13.h: 7775: unsigned CCP6IF :1;
[; ;pic18f27j13.h: 7776: unsigned CCP7IF :1;
[; ;pic18f27j13.h: 7777: unsigned CCP8IF :1;
[; ;pic18f27j13.h: 7778: unsigned CCP9IF :1;
[; ;pic18f27j13.h: 7779: unsigned CCP10IF :1;
[; ;pic18f27j13.h: 7780: };
[; ;pic18f27j13.h: 7781: } PIR4bits_t;
[; ;pic18f27j13.h: 7782: extern volatile PIR4bits_t PIR4bits @ 0xF8F;
[; ;pic18f27j13.h: 7826: extern volatile unsigned char IPR4 @ 0xF90;
"7828
[; ;pic18f27j13.h: 7828: asm("IPR4 equ 0F90h");
[; <" IPR4 equ 0F90h ;# ">
[; ;pic18f27j13.h: 7831: typedef union {
[; ;pic18f27j13.h: 7832: struct {
[; ;pic18f27j13.h: 7833: unsigned CCP3IP :1;
[; ;pic18f27j13.h: 7834: unsigned CCP4IP :1;
[; ;pic18f27j13.h: 7835: unsigned CCP5IP :1;
[; ;pic18f27j13.h: 7836: unsigned CCP6IP :1;
[; ;pic18f27j13.h: 7837: unsigned CCP7IP :1;
[; ;pic18f27j13.h: 7838: unsigned CCP8IP :1;
[; ;pic18f27j13.h: 7839: unsigned CCP9IP :1;
[; ;pic18f27j13.h: 7840: unsigned CCP10IP :1;
[; ;pic18f27j13.h: 7841: };
[; ;pic18f27j13.h: 7842: struct {
[; ;pic18f27j13.h: 7843: unsigned CCIP3IP :1;
[; ;pic18f27j13.h: 7844: };
[; ;pic18f27j13.h: 7845: } IPR4bits_t;
[; ;pic18f27j13.h: 7846: extern volatile IPR4bits_t IPR4bits @ 0xF90;
[; ;pic18f27j13.h: 7895: extern volatile unsigned char PIE5 @ 0xF91;
"7897
[; ;pic18f27j13.h: 7897: asm("PIE5 equ 0F91h");
[; <" PIE5 equ 0F91h ;# ">
[; ;pic18f27j13.h: 7900: typedef union {
[; ;pic18f27j13.h: 7901: struct {
[; ;pic18f27j13.h: 7902: unsigned TMR1GIE :1;
[; ;pic18f27j13.h: 7903: unsigned TMR5GIE :1;
[; ;pic18f27j13.h: 7904: unsigned TMR5IE :1;
[; ;pic18f27j13.h: 7905: unsigned TMR6IE :1;
[; ;pic18f27j13.h: 7906: unsigned TMR8IE :1;
[; ;pic18f27j13.h: 7907: unsigned CM3IE :1;
[; ;pic18f27j13.h: 7908: };
[; ;pic18f27j13.h: 7909: } PIE5bits_t;
[; ;pic18f27j13.h: 7910: extern volatile PIE5bits_t PIE5bits @ 0xF91;
[; ;pic18f27j13.h: 7944: extern volatile unsigned char TRISA @ 0xF92;
"7946
[; ;pic18f27j13.h: 7946: asm("TRISA equ 0F92h");
[; <" TRISA equ 0F92h ;# ">
[; ;pic18f27j13.h: 7949: typedef union {
[; ;pic18f27j13.h: 7950: struct {
[; ;pic18f27j13.h: 7951: unsigned TRISA0 :1;
[; ;pic18f27j13.h: 7952: unsigned TRISA1 :1;
[; ;pic18f27j13.h: 7953: unsigned TRISA2 :1;
[; ;pic18f27j13.h: 7954: unsigned TRISA3 :1;
[; ;pic18f27j13.h: 7955: unsigned :1;
[; ;pic18f27j13.h: 7956: unsigned TRISA5 :1;
[; ;pic18f27j13.h: 7957: unsigned TRISA6 :1;
[; ;pic18f27j13.h: 7958: unsigned TRISA7 :1;
[; ;pic18f27j13.h: 7959: };
[; ;pic18f27j13.h: 7960: } TRISAbits_t;
[; ;pic18f27j13.h: 7961: extern volatile TRISAbits_t TRISAbits @ 0xF92;
[; ;pic18f27j13.h: 8000: extern volatile unsigned char TRISB @ 0xF93;
"8002
[; ;pic18f27j13.h: 8002: asm("TRISB equ 0F93h");
[; <" TRISB equ 0F93h ;# ">
[; ;pic18f27j13.h: 8005: typedef union {
[; ;pic18f27j13.h: 8006: struct {
[; ;pic18f27j13.h: 8007: unsigned TRISB0 :1;
[; ;pic18f27j13.h: 8008: unsigned TRISB1 :1;
[; ;pic18f27j13.h: 8009: unsigned TRISB2 :1;
[; ;pic18f27j13.h: 8010: unsigned TRISB3 :1;
[; ;pic18f27j13.h: 8011: unsigned TRISB4 :1;
[; ;pic18f27j13.h: 8012: unsigned TRISB5 :1;
[; ;pic18f27j13.h: 8013: unsigned TRISB6 :1;
[; ;pic18f27j13.h: 8014: unsigned TRISB7 :1;
[; ;pic18f27j13.h: 8015: };
[; ;pic18f27j13.h: 8016: } TRISBbits_t;
[; ;pic18f27j13.h: 8017: extern volatile TRISBbits_t TRISBbits @ 0xF93;
[; ;pic18f27j13.h: 8061: extern volatile unsigned char TRISC @ 0xF94;
"8063
[; ;pic18f27j13.h: 8063: asm("TRISC equ 0F94h");
[; <" TRISC equ 0F94h ;# ">
[; ;pic18f27j13.h: 8066: typedef union {
[; ;pic18f27j13.h: 8067: struct {
[; ;pic18f27j13.h: 8068: unsigned TRISC0 :1;
[; ;pic18f27j13.h: 8069: unsigned TRISC1 :1;
[; ;pic18f27j13.h: 8070: unsigned TRISC2 :1;
[; ;pic18f27j13.h: 8071: unsigned TRISC3 :1;
[; ;pic18f27j13.h: 8072: unsigned TRISC4 :1;
[; ;pic18f27j13.h: 8073: unsigned TRISC5 :1;
[; ;pic18f27j13.h: 8074: unsigned TRISC6 :1;
[; ;pic18f27j13.h: 8075: unsigned TRISC7 :1;
[; ;pic18f27j13.h: 8076: };
[; ;pic18f27j13.h: 8077: } TRISCbits_t;
[; ;pic18f27j13.h: 8078: extern volatile TRISCbits_t TRISCbits @ 0xF94;
[; ;pic18f27j13.h: 8122: extern volatile unsigned char T3GCON @ 0xF97;
"8124
[; ;pic18f27j13.h: 8124: asm("T3GCON equ 0F97h");
[; <" T3GCON equ 0F97h ;# ">
[; ;pic18f27j13.h: 8127: typedef union {
[; ;pic18f27j13.h: 8128: struct {
[; ;pic18f27j13.h: 8129: unsigned T3GSS0 :1;
[; ;pic18f27j13.h: 8130: unsigned T3GSS1 :1;
[; ;pic18f27j13.h: 8131: unsigned T3GVAL :1;
[; ;pic18f27j13.h: 8132: unsigned T3GGO_T3DONE :1;
[; ;pic18f27j13.h: 8133: unsigned T3GSPM :1;
[; ;pic18f27j13.h: 8134: unsigned T3GTM :1;
[; ;pic18f27j13.h: 8135: unsigned T3GPOL :1;
[; ;pic18f27j13.h: 8136: unsigned TMR3GE :1;
[; ;pic18f27j13.h: 8137: };
[; ;pic18f27j13.h: 8138: struct {
[; ;pic18f27j13.h: 8139: unsigned :3;
[; ;pic18f27j13.h: 8140: unsigned T3GGO :1;
[; ;pic18f27j13.h: 8141: };
[; ;pic18f27j13.h: 8142: struct {
[; ;pic18f27j13.h: 8143: unsigned :3;
[; ;pic18f27j13.h: 8144: unsigned T3DONE :1;
[; ;pic18f27j13.h: 8145: };
[; ;pic18f27j13.h: 8146: } T3GCONbits_t;
[; ;pic18f27j13.h: 8147: extern volatile T3GCONbits_t T3GCONbits @ 0xF97;
[; ;pic18f27j13.h: 8201: extern volatile unsigned char PIR5 @ 0xF98;
"8203
[; ;pic18f27j13.h: 8203: asm("PIR5 equ 0F98h");
[; <" PIR5 equ 0F98h ;# ">
[; ;pic18f27j13.h: 8206: typedef union {
[; ;pic18f27j13.h: 8207: struct {
[; ;pic18f27j13.h: 8208: unsigned TMR1GIF :1;
[; ;pic18f27j13.h: 8209: unsigned TMR5GIF :1;
[; ;pic18f27j13.h: 8210: unsigned TMR5IF :1;
[; ;pic18f27j13.h: 8211: unsigned TMR6IF :1;
[; ;pic18f27j13.h: 8212: unsigned TMR8IF :1;
[; ;pic18f27j13.h: 8213: unsigned CM3IF :1;
[; ;pic18f27j13.h: 8214: };
[; ;pic18f27j13.h: 8215: } PIR5bits_t;
[; ;pic18f27j13.h: 8216: extern volatile PIR5bits_t PIR5bits @ 0xF98;
[; ;pic18f27j13.h: 8250: extern volatile unsigned char IPR5 @ 0xF99;
"8252
[; ;pic18f27j13.h: 8252: asm("IPR5 equ 0F99h");
[; <" IPR5 equ 0F99h ;# ">
[; ;pic18f27j13.h: 8255: typedef union {
[; ;pic18f27j13.h: 8256: struct {
[; ;pic18f27j13.h: 8257: unsigned TMR1GIP :1;
[; ;pic18f27j13.h: 8258: unsigned TMR5GIP :1;
[; ;pic18f27j13.h: 8259: unsigned TMR5IP :1;
[; ;pic18f27j13.h: 8260: unsigned TMR6IP :1;
[; ;pic18f27j13.h: 8261: unsigned TMR8IP :1;
[; ;pic18f27j13.h: 8262: unsigned CM3IP :1;
[; ;pic18f27j13.h: 8263: };
[; ;pic18f27j13.h: 8264: struct {
[; ;pic18f27j13.h: 8265: unsigned CCH05 :1;
[; ;pic18f27j13.h: 8266: };
[; ;pic18f27j13.h: 8267: struct {
[; ;pic18f27j13.h: 8268: unsigned :1;
[; ;pic18f27j13.h: 8269: unsigned CCH15 :1;
[; ;pic18f27j13.h: 8270: };
[; ;pic18f27j13.h: 8271: struct {
[; ;pic18f27j13.h: 8272: unsigned :3;
[; ;pic18f27j13.h: 8273: unsigned EVPOL05 :1;
[; ;pic18f27j13.h: 8274: };
[; ;pic18f27j13.h: 8275: struct {
[; ;pic18f27j13.h: 8276: unsigned :4;
[; ;pic18f27j13.h: 8277: unsigned EVPOL15 :1;
[; ;pic18f27j13.h: 8278: };
[; ;pic18f27j13.h: 8279: } IPR5bits_t;
[; ;pic18f27j13.h: 8280: extern volatile IPR5bits_t IPR5bits @ 0xF99;
[; ;pic18f27j13.h: 8334: extern volatile unsigned char T1GCON @ 0xF9A;
"8336
[; ;pic18f27j13.h: 8336: asm("T1GCON equ 0F9Ah");
[; <" T1GCON equ 0F9Ah ;# ">
[; ;pic18f27j13.h: 8339: typedef union {
[; ;pic18f27j13.h: 8340: struct {
[; ;pic18f27j13.h: 8341: unsigned :3;
[; ;pic18f27j13.h: 8342: unsigned T1GGO_NOT_T1DONE :1;
[; ;pic18f27j13.h: 8343: };
[; ;pic18f27j13.h: 8344: struct {
[; ;pic18f27j13.h: 8345: unsigned T1GSS0 :1;
[; ;pic18f27j13.h: 8346: unsigned T1GSS1 :1;
[; ;pic18f27j13.h: 8347: unsigned T1GVAL :1;
[; ;pic18f27j13.h: 8348: unsigned T1GGO_nT1DONE :1;
[; ;pic18f27j13.h: 8349: unsigned T1GSPM :1;
[; ;pic18f27j13.h: 8350: unsigned T1GTM :1;
[; ;pic18f27j13.h: 8351: unsigned T1GPOL :1;
[; ;pic18f27j13.h: 8352: unsigned TMR1GE :1;
[; ;pic18f27j13.h: 8353: };
[; ;pic18f27j13.h: 8354: struct {
[; ;pic18f27j13.h: 8355: unsigned :3;
[; ;pic18f27j13.h: 8356: unsigned T1GGO :1;
[; ;pic18f27j13.h: 8357: };
[; ;pic18f27j13.h: 8358: struct {
[; ;pic18f27j13.h: 8359: unsigned :3;
[; ;pic18f27j13.h: 8360: unsigned NOT_T1DONE :1;
[; ;pic18f27j13.h: 8361: };
[; ;pic18f27j13.h: 8362: struct {
[; ;pic18f27j13.h: 8363: unsigned :3;
[; ;pic18f27j13.h: 8364: unsigned nT1DONE :1;
[; ;pic18f27j13.h: 8365: };
[; ;pic18f27j13.h: 8366: struct {
[; ;pic18f27j13.h: 8367: unsigned :3;
[; ;pic18f27j13.h: 8368: unsigned T1DONE :1;
[; ;pic18f27j13.h: 8369: };
[; ;pic18f27j13.h: 8370: } T1GCONbits_t;
[; ;pic18f27j13.h: 8371: extern volatile T1GCONbits_t T1GCONbits @ 0xF9A;
[; ;pic18f27j13.h: 8440: extern volatile unsigned char OSCTUNE @ 0xF9B;
"8442
[; ;pic18f27j13.h: 8442: asm("OSCTUNE equ 0F9Bh");
[; <" OSCTUNE equ 0F9Bh ;# ">
[; ;pic18f27j13.h: 8445: typedef union {
[; ;pic18f27j13.h: 8446: struct {
[; ;pic18f27j13.h: 8447: unsigned TUN :6;
[; ;pic18f27j13.h: 8448: unsigned PLLEN :1;
[; ;pic18f27j13.h: 8449: unsigned INTSRC :1;
[; ;pic18f27j13.h: 8450: };
[; ;pic18f27j13.h: 8451: struct {
[; ;pic18f27j13.h: 8452: unsigned TUN0 :1;
[; ;pic18f27j13.h: 8453: unsigned TUN1 :1;
[; ;pic18f27j13.h: 8454: unsigned TUN2 :1;
[; ;pic18f27j13.h: 8455: unsigned TUN3 :1;
[; ;pic18f27j13.h: 8456: unsigned TUN4 :1;
[; ;pic18f27j13.h: 8457: unsigned TUN5 :1;
[; ;pic18f27j13.h: 8458: };
[; ;pic18f27j13.h: 8459: } OSCTUNEbits_t;
[; ;pic18f27j13.h: 8460: extern volatile OSCTUNEbits_t OSCTUNEbits @ 0xF9B;
[; ;pic18f27j13.h: 8509: extern volatile unsigned char RCSTA2 @ 0xF9C;
"8511
[; ;pic18f27j13.h: 8511: asm("RCSTA2 equ 0F9Ch");
[; <" RCSTA2 equ 0F9Ch ;# ">
[; ;pic18f27j13.h: 8514: typedef union {
[; ;pic18f27j13.h: 8515: struct {
[; ;pic18f27j13.h: 8516: unsigned RX9D :1;
[; ;pic18f27j13.h: 8517: unsigned OERR :1;
[; ;pic18f27j13.h: 8518: unsigned FERR :1;
[; ;pic18f27j13.h: 8519: unsigned ADDEN :1;
[; ;pic18f27j13.h: 8520: unsigned CREN :1;
[; ;pic18f27j13.h: 8521: unsigned SREN :1;
[; ;pic18f27j13.h: 8522: unsigned RX9 :1;
[; ;pic18f27j13.h: 8523: unsigned SPEN :1;
[; ;pic18f27j13.h: 8524: };
[; ;pic18f27j13.h: 8525: struct {
[; ;pic18f27j13.h: 8526: unsigned RX9D2 :1;
[; ;pic18f27j13.h: 8527: unsigned OERR2 :1;
[; ;pic18f27j13.h: 8528: unsigned FERR2 :1;
[; ;pic18f27j13.h: 8529: unsigned ADDEN2 :1;
[; ;pic18f27j13.h: 8530: unsigned CREN2 :1;
[; ;pic18f27j13.h: 8531: unsigned SREN2 :1;
[; ;pic18f27j13.h: 8532: unsigned RX92 :1;
[; ;pic18f27j13.h: 8533: unsigned SPEN2 :1;
[; ;pic18f27j13.h: 8534: };
[; ;pic18f27j13.h: 8535: struct {
[; ;pic18f27j13.h: 8536: unsigned :6;
[; ;pic18f27j13.h: 8537: unsigned RC8_92 :1;
[; ;pic18f27j13.h: 8538: };
[; ;pic18f27j13.h: 8539: struct {
[; ;pic18f27j13.h: 8540: unsigned :6;
[; ;pic18f27j13.h: 8541: unsigned RC92 :1;
[; ;pic18f27j13.h: 8542: };
[; ;pic18f27j13.h: 8543: struct {
[; ;pic18f27j13.h: 8544: unsigned RCD82 :1;
[; ;pic18f27j13.h: 8545: };
[; ;pic18f27j13.h: 8546: } RCSTA2bits_t;
[; ;pic18f27j13.h: 8547: extern volatile RCSTA2bits_t RCSTA2bits @ 0xF9C;
[; ;pic18f27j13.h: 8646: extern volatile unsigned char PIE1 @ 0xF9D;
"8648
[; ;pic18f27j13.h: 8648: asm("PIE1 equ 0F9Dh");
[; <" PIE1 equ 0F9Dh ;# ">
[; ;pic18f27j13.h: 8651: typedef union {
[; ;pic18f27j13.h: 8652: struct {
[; ;pic18f27j13.h: 8653: unsigned TMR1IE :1;
[; ;pic18f27j13.h: 8654: unsigned TMR2IE :1;
[; ;pic18f27j13.h: 8655: unsigned CCP1IE :1;
[; ;pic18f27j13.h: 8656: unsigned SSP1IE :1;
[; ;pic18f27j13.h: 8657: unsigned TX1IE :1;
[; ;pic18f27j13.h: 8658: unsigned RC1IE :1;
[; ;pic18f27j13.h: 8659: unsigned ADIE :1;
[; ;pic18f27j13.h: 8660: };
[; ;pic18f27j13.h: 8661: struct {
[; ;pic18f27j13.h: 8662: unsigned :3;
[; ;pic18f27j13.h: 8663: unsigned SSPIE :1;
[; ;pic18f27j13.h: 8664: unsigned TXIE :1;
[; ;pic18f27j13.h: 8665: unsigned RCIE :1;
[; ;pic18f27j13.h: 8666: };
[; ;pic18f27j13.h: 8667: } PIE1bits_t;
[; ;pic18f27j13.h: 8668: extern volatile PIE1bits_t PIE1bits @ 0xF9D;
[; ;pic18f27j13.h: 8722: extern volatile unsigned char PIR1 @ 0xF9E;
"8724
[; ;pic18f27j13.h: 8724: asm("PIR1 equ 0F9Eh");
[; <" PIR1 equ 0F9Eh ;# ">
[; ;pic18f27j13.h: 8727: typedef union {
[; ;pic18f27j13.h: 8728: struct {
[; ;pic18f27j13.h: 8729: unsigned TMR1IF :1;
[; ;pic18f27j13.h: 8730: unsigned TMR2IF :1;
[; ;pic18f27j13.h: 8731: unsigned CCP1IF :1;
[; ;pic18f27j13.h: 8732: unsigned SSP1IF :1;
[; ;pic18f27j13.h: 8733: unsigned TX1IF :1;
[; ;pic18f27j13.h: 8734: unsigned RC1IF :1;
[; ;pic18f27j13.h: 8735: unsigned ADIF :1;
[; ;pic18f27j13.h: 8736: };
[; ;pic18f27j13.h: 8737: struct {
[; ;pic18f27j13.h: 8738: unsigned :3;
[; ;pic18f27j13.h: 8739: unsigned SSPIF :1;
[; ;pic18f27j13.h: 8740: unsigned TXIF :1;
[; ;pic18f27j13.h: 8741: unsigned RCIF :1;
[; ;pic18f27j13.h: 8742: };
[; ;pic18f27j13.h: 8743: } PIR1bits_t;
[; ;pic18f27j13.h: 8744: extern volatile PIR1bits_t PIR1bits @ 0xF9E;
[; ;pic18f27j13.h: 8798: extern volatile unsigned char IPR1 @ 0xF9F;
"8800
[; ;pic18f27j13.h: 8800: asm("IPR1 equ 0F9Fh");
[; <" IPR1 equ 0F9Fh ;# ">
[; ;pic18f27j13.h: 8803: typedef union {
[; ;pic18f27j13.h: 8804: struct {
[; ;pic18f27j13.h: 8805: unsigned TMR1IP :1;
[; ;pic18f27j13.h: 8806: unsigned TMR2IP :1;
[; ;pic18f27j13.h: 8807: unsigned CCP1IP :1;
[; ;pic18f27j13.h: 8808: unsigned SSP1IP :1;
[; ;pic18f27j13.h: 8809: unsigned TX1IP :1;
[; ;pic18f27j13.h: 8810: unsigned RC1IP :1;
[; ;pic18f27j13.h: 8811: unsigned ADIP :1;
[; ;pic18f27j13.h: 8812: };
[; ;pic18f27j13.h: 8813: struct {
[; ;pic18f27j13.h: 8814: unsigned :3;
[; ;pic18f27j13.h: 8815: unsigned SSPIP :1;
[; ;pic18f27j13.h: 8816: unsigned TXIP :1;
[; ;pic18f27j13.h: 8817: unsigned RCIP :1;
[; ;pic18f27j13.h: 8818: };
[; ;pic18f27j13.h: 8819: } IPR1bits_t;
[; ;pic18f27j13.h: 8820: extern volatile IPR1bits_t IPR1bits @ 0xF9F;
[; ;pic18f27j13.h: 8874: extern volatile unsigned char PIE2 @ 0xFA0;
"8876
[; ;pic18f27j13.h: 8876: asm("PIE2 equ 0FA0h");
[; <" PIE2 equ 0FA0h ;# ">
[; ;pic18f27j13.h: 8879: typedef union {
[; ;pic18f27j13.h: 8880: struct {
[; ;pic18f27j13.h: 8881: unsigned CCP2IE :1;
[; ;pic18f27j13.h: 8882: unsigned TMR3IE :1;
[; ;pic18f27j13.h: 8883: unsigned LVDIE :1;
[; ;pic18f27j13.h: 8884: unsigned BCL1IE :1;
[; ;pic18f27j13.h: 8885: unsigned :1;
[; ;pic18f27j13.h: 8886: unsigned CM1IE :1;
[; ;pic18f27j13.h: 8887: unsigned CM2IE :1;
[; ;pic18f27j13.h: 8888: unsigned OSCFIE :1;
[; ;pic18f27j13.h: 8889: };
[; ;pic18f27j13.h: 8890: struct {
[; ;pic18f27j13.h: 8891: unsigned :2;
[; ;pic18f27j13.h: 8892: unsigned HLVDIE :1;
[; ;pic18f27j13.h: 8893: unsigned BCLIE :1;
[; ;pic18f27j13.h: 8894: };
[; ;pic18f27j13.h: 8895: struct {
[; ;pic18f27j13.h: 8896: unsigned :6;
[; ;pic18f27j13.h: 8897: unsigned CMIE :1;
[; ;pic18f27j13.h: 8898: };
[; ;pic18f27j13.h: 8899: } PIE2bits_t;
[; ;pic18f27j13.h: 8900: extern volatile PIE2bits_t PIE2bits @ 0xFA0;
[; ;pic18f27j13.h: 8954: extern volatile unsigned char PIR2 @ 0xFA1;
"8956
[; ;pic18f27j13.h: 8956: asm("PIR2 equ 0FA1h");
[; <" PIR2 equ 0FA1h ;# ">
[; ;pic18f27j13.h: 8959: typedef union {
[; ;pic18f27j13.h: 8960: struct {
[; ;pic18f27j13.h: 8961: unsigned CCP2IF :1;
[; ;pic18f27j13.h: 8962: unsigned TMR3IF :1;
[; ;pic18f27j13.h: 8963: unsigned LVDIF :1;
[; ;pic18f27j13.h: 8964: unsigned BCL1IF :1;
[; ;pic18f27j13.h: 8965: unsigned :1;
[; ;pic18f27j13.h: 8966: unsigned CM1IF :1;
[; ;pic18f27j13.h: 8967: unsigned CM2IF :1;
[; ;pic18f27j13.h: 8968: unsigned OSCFIF :1;
[; ;pic18f27j13.h: 8969: };
[; ;pic18f27j13.h: 8970: struct {
[; ;pic18f27j13.h: 8971: unsigned :2;
[; ;pic18f27j13.h: 8972: unsigned HLVDIF :1;
[; ;pic18f27j13.h: 8973: unsigned BCLIF :1;
[; ;pic18f27j13.h: 8974: };
[; ;pic18f27j13.h: 8975: struct {
[; ;pic18f27j13.h: 8976: unsigned :6;
[; ;pic18f27j13.h: 8977: unsigned CMIF :1;
[; ;pic18f27j13.h: 8978: };
[; ;pic18f27j13.h: 8979: } PIR2bits_t;
[; ;pic18f27j13.h: 8980: extern volatile PIR2bits_t PIR2bits @ 0xFA1;
[; ;pic18f27j13.h: 9034: extern volatile unsigned char IPR2 @ 0xFA2;
"9036
[; ;pic18f27j13.h: 9036: asm("IPR2 equ 0FA2h");
[; <" IPR2 equ 0FA2h ;# ">
[; ;pic18f27j13.h: 9039: typedef union {
[; ;pic18f27j13.h: 9040: struct {
[; ;pic18f27j13.h: 9041: unsigned CCP2IP :1;
[; ;pic18f27j13.h: 9042: unsigned TMR3IP :1;
[; ;pic18f27j13.h: 9043: unsigned LVDIP :1;
[; ;pic18f27j13.h: 9044: unsigned BCL1IP :1;
[; ;pic18f27j13.h: 9045: unsigned :1;
[; ;pic18f27j13.h: 9046: unsigned CM1IP :1;
[; ;pic18f27j13.h: 9047: unsigned CM2IP :1;
[; ;pic18f27j13.h: 9048: unsigned OSCFIP :1;
[; ;pic18f27j13.h: 9049: };
[; ;pic18f27j13.h: 9050: struct {
[; ;pic18f27j13.h: 9051: unsigned :2;
[; ;pic18f27j13.h: 9052: unsigned HLVDIP :1;
[; ;pic18f27j13.h: 9053: unsigned BCLIP :1;
[; ;pic18f27j13.h: 9054: };
[; ;pic18f27j13.h: 9055: struct {
[; ;pic18f27j13.h: 9056: unsigned :6;
[; ;pic18f27j13.h: 9057: unsigned CMIP :1;
[; ;pic18f27j13.h: 9058: };
[; ;pic18f27j13.h: 9059: } IPR2bits_t;
[; ;pic18f27j13.h: 9060: extern volatile IPR2bits_t IPR2bits @ 0xFA2;
[; ;pic18f27j13.h: 9114: extern volatile unsigned char PIE3 @ 0xFA3;
"9116
[; ;pic18f27j13.h: 9116: asm("PIE3 equ 0FA3h");
[; <" PIE3 equ 0FA3h ;# ">
[; ;pic18f27j13.h: 9119: typedef union {
[; ;pic18f27j13.h: 9120: struct {
[; ;pic18f27j13.h: 9121: unsigned RTCCIE :1;
[; ;pic18f27j13.h: 9122: unsigned TMR3GIE :1;
[; ;pic18f27j13.h: 9123: unsigned CTMUIE :1;
[; ;pic18f27j13.h: 9124: unsigned TMR4IE :1;
[; ;pic18f27j13.h: 9125: unsigned TX2IE :1;
[; ;pic18f27j13.h: 9126: unsigned RC2IE :1;
[; ;pic18f27j13.h: 9127: unsigned BCL2IE :1;
[; ;pic18f27j13.h: 9128: unsigned SSP2IE :1;
[; ;pic18f27j13.h: 9129: };
[; ;pic18f27j13.h: 9130: struct {
[; ;pic18f27j13.h: 9131: unsigned RXB0IE :1;
[; ;pic18f27j13.h: 9132: };
[; ;pic18f27j13.h: 9133: struct {
[; ;pic18f27j13.h: 9134: unsigned :1;
[; ;pic18f27j13.h: 9135: unsigned RXB1IE :1;
[; ;pic18f27j13.h: 9136: };
[; ;pic18f27j13.h: 9137: struct {
[; ;pic18f27j13.h: 9138: unsigned :1;
[; ;pic18f27j13.h: 9139: unsigned RXBNIE :1;
[; ;pic18f27j13.h: 9140: };
[; ;pic18f27j13.h: 9141: struct {
[; ;pic18f27j13.h: 9142: unsigned :2;
[; ;pic18f27j13.h: 9143: unsigned TXB0IE :1;
[; ;pic18f27j13.h: 9144: };
[; ;pic18f27j13.h: 9145: struct {
[; ;pic18f27j13.h: 9146: unsigned :3;
[; ;pic18f27j13.h: 9147: unsigned TXB1IE :1;
[; ;pic18f27j13.h: 9148: };
[; ;pic18f27j13.h: 9149: struct {
[; ;pic18f27j13.h: 9150: unsigned :4;
[; ;pic18f27j13.h: 9151: unsigned TXB2IE :1;
[; ;pic18f27j13.h: 9152: };
[; ;pic18f27j13.h: 9153: struct {
[; ;pic18f27j13.h: 9154: unsigned :4;
[; ;pic18f27j13.h: 9155: unsigned TXBNIE :1;
[; ;pic18f27j13.h: 9156: };
[; ;pic18f27j13.h: 9157: } PIE3bits_t;
[; ;pic18f27j13.h: 9158: extern volatile PIE3bits_t PIE3bits @ 0xFA3;
[; ;pic18f27j13.h: 9237: extern volatile unsigned char PIR3 @ 0xFA4;
"9239
[; ;pic18f27j13.h: 9239: asm("PIR3 equ 0FA4h");
[; <" PIR3 equ 0FA4h ;# ">
[; ;pic18f27j13.h: 9242: typedef union {
[; ;pic18f27j13.h: 9243: struct {
[; ;pic18f27j13.h: 9244: unsigned RTCCIF :1;
[; ;pic18f27j13.h: 9245: unsigned TMR3GIF :1;
[; ;pic18f27j13.h: 9246: unsigned CTMUIF :1;
[; ;pic18f27j13.h: 9247: unsigned TMR4IF :1;
[; ;pic18f27j13.h: 9248: unsigned TX2IF :1;
[; ;pic18f27j13.h: 9249: unsigned RC2IF :1;
[; ;pic18f27j13.h: 9250: unsigned BCL2IF :1;
[; ;pic18f27j13.h: 9251: unsigned SSP2IF :1;
[; ;pic18f27j13.h: 9252: };
[; ;pic18f27j13.h: 9253: struct {
[; ;pic18f27j13.h: 9254: unsigned :1;
[; ;pic18f27j13.h: 9255: unsigned RXBNIF :1;
[; ;pic18f27j13.h: 9256: };
[; ;pic18f27j13.h: 9257: struct {
[; ;pic18f27j13.h: 9258: unsigned :4;
[; ;pic18f27j13.h: 9259: unsigned TXBNIF :1;
[; ;pic18f27j13.h: 9260: };
[; ;pic18f27j13.h: 9261: } PIR3bits_t;
[; ;pic18f27j13.h: 9262: extern volatile PIR3bits_t PIR3bits @ 0xFA4;
[; ;pic18f27j13.h: 9316: extern volatile unsigned char IPR3 @ 0xFA5;
"9318
[; ;pic18f27j13.h: 9318: asm("IPR3 equ 0FA5h");
[; <" IPR3 equ 0FA5h ;# ">
[; ;pic18f27j13.h: 9321: typedef union {
[; ;pic18f27j13.h: 9322: struct {
[; ;pic18f27j13.h: 9323: unsigned RTCCIP :1;
[; ;pic18f27j13.h: 9324: unsigned TMR3GIP :1;
[; ;pic18f27j13.h: 9325: unsigned CTMUIP :1;
[; ;pic18f27j13.h: 9326: unsigned TMR4IP :1;
[; ;pic18f27j13.h: 9327: unsigned TX2IP :1;
[; ;pic18f27j13.h: 9328: unsigned RC2IP :1;
[; ;pic18f27j13.h: 9329: unsigned BCL2IP :1;
[; ;pic18f27j13.h: 9330: unsigned SSP2IP :1;
[; ;pic18f27j13.h: 9331: };
[; ;pic18f27j13.h: 9332: struct {
[; ;pic18f27j13.h: 9333: unsigned :1;
[; ;pic18f27j13.h: 9334: unsigned RXBNIP :1;
[; ;pic18f27j13.h: 9335: };
[; ;pic18f27j13.h: 9336: struct {
[; ;pic18f27j13.h: 9337: unsigned :4;
[; ;pic18f27j13.h: 9338: unsigned TXBNIP :1;
[; ;pic18f27j13.h: 9339: };
[; ;pic18f27j13.h: 9340: } IPR3bits_t;
[; ;pic18f27j13.h: 9341: extern volatile IPR3bits_t IPR3bits @ 0xFA5;
[; ;pic18f27j13.h: 9395: extern volatile unsigned char EECON1 @ 0xFA6;
"9397
[; ;pic18f27j13.h: 9397: asm("EECON1 equ 0FA6h");
[; <" EECON1 equ 0FA6h ;# ">
[; ;pic18f27j13.h: 9400: typedef union {
[; ;pic18f27j13.h: 9401: struct {
[; ;pic18f27j13.h: 9402: unsigned :1;
[; ;pic18f27j13.h: 9403: unsigned WR :1;
[; ;pic18f27j13.h: 9404: unsigned WREN :1;
[; ;pic18f27j13.h: 9405: unsigned WRERR :1;
[; ;pic18f27j13.h: 9406: unsigned FREE :1;
[; ;pic18f27j13.h: 9407: unsigned WPROG :1;
[; ;pic18f27j13.h: 9408: };
[; ;pic18f27j13.h: 9409: } EECON1bits_t;
[; ;pic18f27j13.h: 9410: extern volatile EECON1bits_t EECON1bits @ 0xFA6;
[; ;pic18f27j13.h: 9439: extern volatile unsigned char EECON2 @ 0xFA7;
"9441
[; ;pic18f27j13.h: 9441: asm("EECON2 equ 0FA7h");
[; <" EECON2 equ 0FA7h ;# ">
[; ;pic18f27j13.h: 9444: typedef union {
[; ;pic18f27j13.h: 9445: struct {
[; ;pic18f27j13.h: 9446: unsigned EECON2 :8;
[; ;pic18f27j13.h: 9447: };
[; ;pic18f27j13.h: 9448: } EECON2bits_t;
[; ;pic18f27j13.h: 9449: extern volatile EECON2bits_t EECON2bits @ 0xFA7;
[; ;pic18f27j13.h: 9458: extern volatile unsigned char TXSTA2 @ 0xFA8;
"9460
[; ;pic18f27j13.h: 9460: asm("TXSTA2 equ 0FA8h");
[; <" TXSTA2 equ 0FA8h ;# ">
[; ;pic18f27j13.h: 9463: typedef union {
[; ;pic18f27j13.h: 9464: struct {
[; ;pic18f27j13.h: 9465: unsigned TX9D :1;
[; ;pic18f27j13.h: 9466: unsigned TRMT :1;
[; ;pic18f27j13.h: 9467: unsigned BRGH :1;
[; ;pic18f27j13.h: 9468: unsigned SENDB :1;
[; ;pic18f27j13.h: 9469: unsigned SYNC :1;
[; ;pic18f27j13.h: 9470: unsigned TXEN :1;
[; ;pic18f27j13.h: 9471: unsigned TX9 :1;
[; ;pic18f27j13.h: 9472: unsigned CSRC :1;
[; ;pic18f27j13.h: 9473: };
[; ;pic18f27j13.h: 9474: struct {
[; ;pic18f27j13.h: 9475: unsigned TX9D2 :1;
[; ;pic18f27j13.h: 9476: unsigned TRMT2 :1;
[; ;pic18f27j13.h: 9477: unsigned BRGH2 :1;
[; ;pic18f27j13.h: 9478: unsigned SENDB2 :1;
[; ;pic18f27j13.h: 9479: unsigned SYNC2 :1;
[; ;pic18f27j13.h: 9480: unsigned TXEN2 :1;
[; ;pic18f27j13.h: 9481: unsigned TX92 :1;
[; ;pic18f27j13.h: 9482: unsigned CSRC2 :1;
[; ;pic18f27j13.h: 9483: };
[; ;pic18f27j13.h: 9484: struct {
[; ;pic18f27j13.h: 9485: unsigned :6;
[; ;pic18f27j13.h: 9486: unsigned TX8_92 :1;
[; ;pic18f27j13.h: 9487: };
[; ;pic18f27j13.h: 9488: struct {
[; ;pic18f27j13.h: 9489: unsigned TXD82 :1;
[; ;pic18f27j13.h: 9490: };
[; ;pic18f27j13.h: 9491: } TXSTA2bits_t;
[; ;pic18f27j13.h: 9492: extern volatile TXSTA2bits_t TXSTA2bits @ 0xFA8;
[; ;pic18f27j13.h: 9586: extern volatile unsigned char TXREG2 @ 0xFA9;
"9588
[; ;pic18f27j13.h: 9588: asm("TXREG2 equ 0FA9h");
[; <" TXREG2 equ 0FA9h ;# ">
[; ;pic18f27j13.h: 9591: typedef union {
[; ;pic18f27j13.h: 9592: struct {
[; ;pic18f27j13.h: 9593: unsigned TXREG2 :8;
[; ;pic18f27j13.h: 9594: };
[; ;pic18f27j13.h: 9595: } TXREG2bits_t;
[; ;pic18f27j13.h: 9596: extern volatile TXREG2bits_t TXREG2bits @ 0xFA9;
[; ;pic18f27j13.h: 9605: extern volatile unsigned char RCREG2 @ 0xFAA;
"9607
[; ;pic18f27j13.h: 9607: asm("RCREG2 equ 0FAAh");
[; <" RCREG2 equ 0FAAh ;# ">
[; ;pic18f27j13.h: 9610: typedef union {
[; ;pic18f27j13.h: 9611: struct {
[; ;pic18f27j13.h: 9612: unsigned RCREG2 :8;
[; ;pic18f27j13.h: 9613: };
[; ;pic18f27j13.h: 9614: } RCREG2bits_t;
[; ;pic18f27j13.h: 9615: extern volatile RCREG2bits_t RCREG2bits @ 0xFAA;
[; ;pic18f27j13.h: 9624: extern volatile unsigned char SPBRG2 @ 0xFAB;
"9626
[; ;pic18f27j13.h: 9626: asm("SPBRG2 equ 0FABh");
[; <" SPBRG2 equ 0FABh ;# ">
[; ;pic18f27j13.h: 9629: typedef union {
[; ;pic18f27j13.h: 9630: struct {
[; ;pic18f27j13.h: 9631: unsigned SPBRG2 :8;
[; ;pic18f27j13.h: 9632: };
[; ;pic18f27j13.h: 9633: } SPBRG2bits_t;
[; ;pic18f27j13.h: 9634: extern volatile SPBRG2bits_t SPBRG2bits @ 0xFAB;
[; ;pic18f27j13.h: 9643: extern volatile unsigned char RCSTA1 @ 0xFAC;
"9645
[; ;pic18f27j13.h: 9645: asm("RCSTA1 equ 0FACh");
[; <" RCSTA1 equ 0FACh ;# ">
[; ;pic18f27j13.h: 9648: extern volatile unsigned char RCSTA @ 0xFAC;
"9650
[; ;pic18f27j13.h: 9650: asm("RCSTA equ 0FACh");
[; <" RCSTA equ 0FACh ;# ">
[; ;pic18f27j13.h: 9653: typedef union {
[; ;pic18f27j13.h: 9654: struct {
[; ;pic18f27j13.h: 9655: unsigned RX9D :1;
[; ;pic18f27j13.h: 9656: unsigned OERR :1;
[; ;pic18f27j13.h: 9657: unsigned FERR :1;
[; ;pic18f27j13.h: 9658: unsigned ADDEN :1;
[; ;pic18f27j13.h: 9659: unsigned CREN :1;
[; ;pic18f27j13.h: 9660: unsigned SREN :1;
[; ;pic18f27j13.h: 9661: unsigned RX9 :1;
[; ;pic18f27j13.h: 9662: unsigned SPEN :1;
[; ;pic18f27j13.h: 9663: };
[; ;pic18f27j13.h: 9664: struct {
[; ;pic18f27j13.h: 9665: unsigned RCD8 :1;
[; ;pic18f27j13.h: 9666: unsigned :2;
[; ;pic18f27j13.h: 9667: unsigned ADEN :1;
[; ;pic18f27j13.h: 9668: unsigned :2;
[; ;pic18f27j13.h: 9669: unsigned RC9 :1;
[; ;pic18f27j13.h: 9670: };
[; ;pic18f27j13.h: 9671: struct {
[; ;pic18f27j13.h: 9672: unsigned :6;
[; ;pic18f27j13.h: 9673: unsigned NOT_RC8 :1;
[; ;pic18f27j13.h: 9674: };
[; ;pic18f27j13.h: 9675: struct {
[; ;pic18f27j13.h: 9676: unsigned :6;
[; ;pic18f27j13.h: 9677: unsigned nRC8 :1;
[; ;pic18f27j13.h: 9678: };
[; ;pic18f27j13.h: 9679: struct {
[; ;pic18f27j13.h: 9680: unsigned :6;
[; ;pic18f27j13.h: 9681: unsigned RC8_9 :1;
[; ;pic18f27j13.h: 9682: };
[; ;pic18f27j13.h: 9683: struct {
[; ;pic18f27j13.h: 9684: unsigned RX9D1 :1;
[; ;pic18f27j13.h: 9685: unsigned OERR1 :1;
[; ;pic18f27j13.h: 9686: unsigned FERR1 :1;
[; ;pic18f27j13.h: 9687: unsigned ADDEN1 :1;
[; ;pic18f27j13.h: 9688: unsigned CREN1 :1;
[; ;pic18f27j13.h: 9689: unsigned SREN1 :1;
[; ;pic18f27j13.h: 9690: unsigned RX91 :1;
[; ;pic18f27j13.h: 9691: unsigned SPEN1 :1;
[; ;pic18f27j13.h: 9692: };
[; ;pic18f27j13.h: 9693: struct {
[; ;pic18f27j13.h: 9694: unsigned :5;
[; ;pic18f27j13.h: 9695: unsigned SRENA :1;
[; ;pic18f27j13.h: 9696: };
[; ;pic18f27j13.h: 9697: } RCSTA1bits_t;
[; ;pic18f27j13.h: 9698: extern volatile RCSTA1bits_t RCSTA1bits @ 0xFAC;
[; ;pic18f27j13.h: 9816: typedef union {
[; ;pic18f27j13.h: 9817: struct {
[; ;pic18f27j13.h: 9818: unsigned RX9D :1;
[; ;pic18f27j13.h: 9819: unsigned OERR :1;
[; ;pic18f27j13.h: 9820: unsigned FERR :1;
[; ;pic18f27j13.h: 9821: unsigned ADDEN :1;
[; ;pic18f27j13.h: 9822: unsigned CREN :1;
[; ;pic18f27j13.h: 9823: unsigned SREN :1;
[; ;pic18f27j13.h: 9824: unsigned RX9 :1;
[; ;pic18f27j13.h: 9825: unsigned SPEN :1;
[; ;pic18f27j13.h: 9826: };
[; ;pic18f27j13.h: 9827: struct {
[; ;pic18f27j13.h: 9828: unsigned RCD8 :1;
[; ;pic18f27j13.h: 9829: unsigned :2;
[; ;pic18f27j13.h: 9830: unsigned ADEN :1;
[; ;pic18f27j13.h: 9831: unsigned :2;
[; ;pic18f27j13.h: 9832: unsigned RC9 :1;
[; ;pic18f27j13.h: 9833: };
[; ;pic18f27j13.h: 9834: struct {
[; ;pic18f27j13.h: 9835: unsigned :6;
[; ;pic18f27j13.h: 9836: unsigned NOT_RC8 :1;
[; ;pic18f27j13.h: 9837: };
[; ;pic18f27j13.h: 9838: struct {
[; ;pic18f27j13.h: 9839: unsigned :6;
[; ;pic18f27j13.h: 9840: unsigned nRC8 :1;
[; ;pic18f27j13.h: 9841: };
[; ;pic18f27j13.h: 9842: struct {
[; ;pic18f27j13.h: 9843: unsigned :6;
[; ;pic18f27j13.h: 9844: unsigned RC8_9 :1;
[; ;pic18f27j13.h: 9845: };
[; ;pic18f27j13.h: 9846: struct {
[; ;pic18f27j13.h: 9847: unsigned RX9D1 :1;
[; ;pic18f27j13.h: 9848: unsigned OERR1 :1;
[; ;pic18f27j13.h: 9849: unsigned FERR1 :1;
[; ;pic18f27j13.h: 9850: unsigned ADDEN1 :1;
[; ;pic18f27j13.h: 9851: unsigned CREN1 :1;
[; ;pic18f27j13.h: 9852: unsigned SREN1 :1;
[; ;pic18f27j13.h: 9853: unsigned RX91 :1;
[; ;pic18f27j13.h: 9854: unsigned SPEN1 :1;
[; ;pic18f27j13.h: 9855: };
[; ;pic18f27j13.h: 9856: struct {
[; ;pic18f27j13.h: 9857: unsigned :5;
[; ;pic18f27j13.h: 9858: unsigned SRENA :1;
[; ;pic18f27j13.h: 9859: };
[; ;pic18f27j13.h: 9860: } RCSTAbits_t;
[; ;pic18f27j13.h: 9861: extern volatile RCSTAbits_t RCSTAbits @ 0xFAC;
[; ;pic18f27j13.h: 9980: extern volatile unsigned char TXSTA1 @ 0xFAD;
"9982
[; ;pic18f27j13.h: 9982: asm("TXSTA1 equ 0FADh");
[; <" TXSTA1 equ 0FADh ;# ">
[; ;pic18f27j13.h: 9985: extern volatile unsigned char TXSTA @ 0xFAD;
"9987
[; ;pic18f27j13.h: 9987: asm("TXSTA equ 0FADh");
[; <" TXSTA equ 0FADh ;# ">
[; ;pic18f27j13.h: 9990: typedef union {
[; ;pic18f27j13.h: 9991: struct {
[; ;pic18f27j13.h: 9992: unsigned TX9D :1;
[; ;pic18f27j13.h: 9993: unsigned TRMT :1;
[; ;pic18f27j13.h: 9994: unsigned BRGH :1;
[; ;pic18f27j13.h: 9995: unsigned SENDB :1;
[; ;pic18f27j13.h: 9996: unsigned SYNC :1;
[; ;pic18f27j13.h: 9997: unsigned TXEN :1;
[; ;pic18f27j13.h: 9998: unsigned TX9 :1;
[; ;pic18f27j13.h: 9999: unsigned CSRC :1;
[; ;pic18f27j13.h: 10000: };
[; ;pic18f27j13.h: 10001: struct {
[; ;pic18f27j13.h: 10002: unsigned TXD8 :1;
[; ;pic18f27j13.h: 10003: unsigned :5;
[; ;pic18f27j13.h: 10004: unsigned TX8_9 :1;
[; ;pic18f27j13.h: 10005: };
[; ;pic18f27j13.h: 10006: struct {
[; ;pic18f27j13.h: 10007: unsigned :6;
[; ;pic18f27j13.h: 10008: unsigned NOT_TX8 :1;
[; ;pic18f27j13.h: 10009: };
[; ;pic18f27j13.h: 10010: struct {
[; ;pic18f27j13.h: 10011: unsigned :6;
[; ;pic18f27j13.h: 10012: unsigned nTX8 :1;
[; ;pic18f27j13.h: 10013: };
[; ;pic18f27j13.h: 10014: struct {
[; ;pic18f27j13.h: 10015: unsigned TX9D1 :1;
[; ;pic18f27j13.h: 10016: unsigned TRMT1 :1;
[; ;pic18f27j13.h: 10017: unsigned BRGH1 :1;
[; ;pic18f27j13.h: 10018: unsigned SENDB1 :1;
[; ;pic18f27j13.h: 10019: unsigned SYNC1 :1;
[; ;pic18f27j13.h: 10020: unsigned TXEN1 :1;
[; ;pic18f27j13.h: 10021: unsigned TX91 :1;
[; ;pic18f27j13.h: 10022: unsigned CSRC1 :1;
[; ;pic18f27j13.h: 10023: };
[; ;pic18f27j13.h: 10024: } TXSTA1bits_t;
[; ;pic18f27j13.h: 10025: extern volatile TXSTA1bits_t TXSTA1bits @ 0xFAD;
[; ;pic18f27j13.h: 10128: typedef union {
[; ;pic18f27j13.h: 10129: struct {
[; ;pic18f27j13.h: 10130: unsigned TX9D :1;
[; ;pic18f27j13.h: 10131: unsigned TRMT :1;
[; ;pic18f27j13.h: 10132: unsigned BRGH :1;
[; ;pic18f27j13.h: 10133: unsigned SENDB :1;
[; ;pic18f27j13.h: 10134: unsigned SYNC :1;
[; ;pic18f27j13.h: 10135: unsigned TXEN :1;
[; ;pic18f27j13.h: 10136: unsigned TX9 :1;
[; ;pic18f27j13.h: 10137: unsigned CSRC :1;
[; ;pic18f27j13.h: 10138: };
[; ;pic18f27j13.h: 10139: struct {
[; ;pic18f27j13.h: 10140: unsigned TXD8 :1;
[; ;pic18f27j13.h: 10141: unsigned :5;
[; ;pic18f27j13.h: 10142: unsigned TX8_9 :1;
[; ;pic18f27j13.h: 10143: };
[; ;pic18f27j13.h: 10144: struct {
[; ;pic18f27j13.h: 10145: unsigned :6;
[; ;pic18f27j13.h: 10146: unsigned NOT_TX8 :1;
[; ;pic18f27j13.h: 10147: };
[; ;pic18f27j13.h: 10148: struct {
[; ;pic18f27j13.h: 10149: unsigned :6;
[; ;pic18f27j13.h: 10150: unsigned nTX8 :1;
[; ;pic18f27j13.h: 10151: };
[; ;pic18f27j13.h: 10152: struct {
[; ;pic18f27j13.h: 10153: unsigned TX9D1 :1;
[; ;pic18f27j13.h: 10154: unsigned TRMT1 :1;
[; ;pic18f27j13.h: 10155: unsigned BRGH1 :1;
[; ;pic18f27j13.h: 10156: unsigned SENDB1 :1;
[; ;pic18f27j13.h: 10157: unsigned SYNC1 :1;
[; ;pic18f27j13.h: 10158: unsigned TXEN1 :1;
[; ;pic18f27j13.h: 10159: unsigned TX91 :1;
[; ;pic18f27j13.h: 10160: unsigned CSRC1 :1;
[; ;pic18f27j13.h: 10161: };
[; ;pic18f27j13.h: 10162: } TXSTAbits_t;
[; ;pic18f27j13.h: 10163: extern volatile TXSTAbits_t TXSTAbits @ 0xFAD;
[; ;pic18f27j13.h: 10267: extern volatile unsigned char TXREG1 @ 0xFAE;
"10269
[; ;pic18f27j13.h: 10269: asm("TXREG1 equ 0FAEh");
[; <" TXREG1 equ 0FAEh ;# ">
[; ;pic18f27j13.h: 10272: extern volatile unsigned char TXREG @ 0xFAE;
"10274
[; ;pic18f27j13.h: 10274: asm("TXREG equ 0FAEh");
[; <" TXREG equ 0FAEh ;# ">
[; ;pic18f27j13.h: 10277: typedef union {
[; ;pic18f27j13.h: 10278: struct {
[; ;pic18f27j13.h: 10279: unsigned TXREG1 :8;
[; ;pic18f27j13.h: 10280: };
[; ;pic18f27j13.h: 10281: } TXREG1bits_t;
[; ;pic18f27j13.h: 10282: extern volatile TXREG1bits_t TXREG1bits @ 0xFAE;
[; ;pic18f27j13.h: 10290: typedef union {
[; ;pic18f27j13.h: 10291: struct {
[; ;pic18f27j13.h: 10292: unsigned TXREG1 :8;
[; ;pic18f27j13.h: 10293: };
[; ;pic18f27j13.h: 10294: } TXREGbits_t;
[; ;pic18f27j13.h: 10295: extern volatile TXREGbits_t TXREGbits @ 0xFAE;
[; ;pic18f27j13.h: 10304: extern volatile unsigned char RCREG1 @ 0xFAF;
"10306
[; ;pic18f27j13.h: 10306: asm("RCREG1 equ 0FAFh");
[; <" RCREG1 equ 0FAFh ;# ">
[; ;pic18f27j13.h: 10309: extern volatile unsigned char RCREG @ 0xFAF;
"10311
[; ;pic18f27j13.h: 10311: asm("RCREG equ 0FAFh");
[; <" RCREG equ 0FAFh ;# ">
[; ;pic18f27j13.h: 10314: typedef union {
[; ;pic18f27j13.h: 10315: struct {
[; ;pic18f27j13.h: 10316: unsigned RCREG1 :8;
[; ;pic18f27j13.h: 10317: };
[; ;pic18f27j13.h: 10318: } RCREG1bits_t;
[; ;pic18f27j13.h: 10319: extern volatile RCREG1bits_t RCREG1bits @ 0xFAF;
[; ;pic18f27j13.h: 10327: typedef union {
[; ;pic18f27j13.h: 10328: struct {
[; ;pic18f27j13.h: 10329: unsigned RCREG1 :8;
[; ;pic18f27j13.h: 10330: };
[; ;pic18f27j13.h: 10331: } RCREGbits_t;
[; ;pic18f27j13.h: 10332: extern volatile RCREGbits_t RCREGbits @ 0xFAF;
[; ;pic18f27j13.h: 10341: extern volatile unsigned char SPBRG1 @ 0xFB0;
"10343
[; ;pic18f27j13.h: 10343: asm("SPBRG1 equ 0FB0h");
[; <" SPBRG1 equ 0FB0h ;# ">
[; ;pic18f27j13.h: 10346: extern volatile unsigned char SPBRG @ 0xFB0;
"10348
[; ;pic18f27j13.h: 10348: asm("SPBRG equ 0FB0h");
[; <" SPBRG equ 0FB0h ;# ">
[; ;pic18f27j13.h: 10351: typedef union {
[; ;pic18f27j13.h: 10352: struct {
[; ;pic18f27j13.h: 10353: unsigned SPBRG1 :8;
[; ;pic18f27j13.h: 10354: };
[; ;pic18f27j13.h: 10355: } SPBRG1bits_t;
[; ;pic18f27j13.h: 10356: extern volatile SPBRG1bits_t SPBRG1bits @ 0xFB0;
[; ;pic18f27j13.h: 10364: typedef union {
[; ;pic18f27j13.h: 10365: struct {
[; ;pic18f27j13.h: 10366: unsigned SPBRG1 :8;
[; ;pic18f27j13.h: 10367: };
[; ;pic18f27j13.h: 10368: } SPBRGbits_t;
[; ;pic18f27j13.h: 10369: extern volatile SPBRGbits_t SPBRGbits @ 0xFB0;
[; ;pic18f27j13.h: 10378: extern volatile unsigned char CTMUICON @ 0xFB1;
"10380
[; ;pic18f27j13.h: 10380: asm("CTMUICON equ 0FB1h");
[; <" CTMUICON equ 0FB1h ;# ">
[; ;pic18f27j13.h: 10383: typedef union {
[; ;pic18f27j13.h: 10384: struct {
[; ;pic18f27j13.h: 10385: unsigned IRNG :2;
[; ;pic18f27j13.h: 10386: unsigned ITRIM :6;
[; ;pic18f27j13.h: 10387: };
[; ;pic18f27j13.h: 10388: struct {
[; ;pic18f27j13.h: 10389: unsigned IRNG0 :1;
[; ;pic18f27j13.h: 10390: unsigned IRNG1 :1;
[; ;pic18f27j13.h: 10391: unsigned ITRIM0 :1;
[; ;pic18f27j13.h: 10392: unsigned ITRIM1 :1;
[; ;pic18f27j13.h: 10393: unsigned ITRIM2 :1;
[; ;pic18f27j13.h: 10394: unsigned ITRIM3 :1;
[; ;pic18f27j13.h: 10395: unsigned ITRIM4 :1;
[; ;pic18f27j13.h: 10396: unsigned ITRIM5 :1;
[; ;pic18f27j13.h: 10397: };
[; ;pic18f27j13.h: 10398: } CTMUICONbits_t;
[; ;pic18f27j13.h: 10399: extern volatile CTMUICONbits_t CTMUICONbits @ 0xFB1;
[; ;pic18f27j13.h: 10453: extern volatile unsigned char CTMUCONL @ 0xFB2;
"10455
[; ;pic18f27j13.h: 10455: asm("CTMUCONL equ 0FB2h");
[; <" CTMUCONL equ 0FB2h ;# ">
[; ;pic18f27j13.h: 10458: typedef union {
[; ;pic18f27j13.h: 10459: struct {
[; ;pic18f27j13.h: 10460: unsigned EDG1STAT :1;
[; ;pic18f27j13.h: 10461: unsigned EDG2STAT :1;
[; ;pic18f27j13.h: 10462: unsigned EDG1SEL0 :1;
[; ;pic18f27j13.h: 10463: unsigned EDG1SEL1 :1;
[; ;pic18f27j13.h: 10464: unsigned EDG1POL :1;
[; ;pic18f27j13.h: 10465: unsigned EDG2SEL0 :1;
[; ;pic18f27j13.h: 10466: unsigned EDG2SEL1 :1;
[; ;pic18f27j13.h: 10467: unsigned EDG2POL :1;
[; ;pic18f27j13.h: 10468: };
[; ;pic18f27j13.h: 10469: } CTMUCONLbits_t;
[; ;pic18f27j13.h: 10470: extern volatile CTMUCONLbits_t CTMUCONLbits @ 0xFB2;
[; ;pic18f27j13.h: 10514: extern volatile unsigned char CTMUCONH @ 0xFB3;
"10516
[; ;pic18f27j13.h: 10516: asm("CTMUCONH equ 0FB3h");
[; <" CTMUCONH equ 0FB3h ;# ">
[; ;pic18f27j13.h: 10519: typedef union {
[; ;pic18f27j13.h: 10520: struct {
[; ;pic18f27j13.h: 10521: unsigned CTTRIG :1;
[; ;pic18f27j13.h: 10522: unsigned IDISSEN :1;
[; ;pic18f27j13.h: 10523: unsigned EDGSEQEN :1;
[; ;pic18f27j13.h: 10524: unsigned EDGEN :1;
[; ;pic18f27j13.h: 10525: unsigned TGEN :1;
[; ;pic18f27j13.h: 10526: unsigned CTMUSIDL :1;
[; ;pic18f27j13.h: 10527: unsigned :1;
[; ;pic18f27j13.h: 10528: unsigned CTMUEN :1;
[; ;pic18f27j13.h: 10529: };
[; ;pic18f27j13.h: 10530: } CTMUCONHbits_t;
[; ;pic18f27j13.h: 10531: extern volatile CTMUCONHbits_t CTMUCONHbits @ 0xFB3;
[; ;pic18f27j13.h: 10570: extern volatile unsigned char CCP2CON @ 0xFB4;
"10572
[; ;pic18f27j13.h: 10572: asm("CCP2CON equ 0FB4h");
[; <" CCP2CON equ 0FB4h ;# ">
[; ;pic18f27j13.h: 10575: extern volatile unsigned char ECCP2CON @ 0xFB4;
"10577
[; ;pic18f27j13.h: 10577: asm("ECCP2CON equ 0FB4h");
[; <" ECCP2CON equ 0FB4h ;# ">
[; ;pic18f27j13.h: 10580: typedef union {
[; ;pic18f27j13.h: 10581: struct {
[; ;pic18f27j13.h: 10582: unsigned CCP2M :4;
[; ;pic18f27j13.h: 10583: unsigned DC2B :2;
[; ;pic18f27j13.h: 10584: unsigned P2M :2;
[; ;pic18f27j13.h: 10585: };
[; ;pic18f27j13.h: 10586: struct {
[; ;pic18f27j13.h: 10587: unsigned CCP2M0 :1;
[; ;pic18f27j13.h: 10588: unsigned CCP2M1 :1;
[; ;pic18f27j13.h: 10589: unsigned CCP2M2 :1;
[; ;pic18f27j13.h: 10590: unsigned CCP2M3 :1;
[; ;pic18f27j13.h: 10591: unsigned DC2B0 :1;
[; ;pic18f27j13.h: 10592: unsigned DC2B1 :1;
[; ;pic18f27j13.h: 10593: unsigned P2M0 :1;
[; ;pic18f27j13.h: 10594: unsigned P2M1 :1;
[; ;pic18f27j13.h: 10595: };
[; ;pic18f27j13.h: 10596: struct {
[; ;pic18f27j13.h: 10597: unsigned :4;
[; ;pic18f27j13.h: 10598: unsigned CCP2Y :1;
[; ;pic18f27j13.h: 10599: unsigned CCP2X :1;
[; ;pic18f27j13.h: 10600: };
[; ;pic18f27j13.h: 10601: } CCP2CONbits_t;
[; ;pic18f27j13.h: 10602: extern volatile CCP2CONbits_t CCP2CONbits @ 0xFB4;
[; ;pic18f27j13.h: 10670: typedef union {
[; ;pic18f27j13.h: 10671: struct {
[; ;pic18f27j13.h: 10672: unsigned CCP2M :4;
[; ;pic18f27j13.h: 10673: unsigned DC2B :2;
[; ;pic18f27j13.h: 10674: unsigned P2M :2;
[; ;pic18f27j13.h: 10675: };
[; ;pic18f27j13.h: 10676: struct {
[; ;pic18f27j13.h: 10677: unsigned CCP2M0 :1;
[; ;pic18f27j13.h: 10678: unsigned CCP2M1 :1;
[; ;pic18f27j13.h: 10679: unsigned CCP2M2 :1;
[; ;pic18f27j13.h: 10680: unsigned CCP2M3 :1;
[; ;pic18f27j13.h: 10681: unsigned DC2B0 :1;
[; ;pic18f27j13.h: 10682: unsigned DC2B1 :1;
[; ;pic18f27j13.h: 10683: unsigned P2M0 :1;
[; ;pic18f27j13.h: 10684: unsigned P2M1 :1;
[; ;pic18f27j13.h: 10685: };
[; ;pic18f27j13.h: 10686: struct {
[; ;pic18f27j13.h: 10687: unsigned :4;
[; ;pic18f27j13.h: 10688: unsigned CCP2Y :1;
[; ;pic18f27j13.h: 10689: unsigned CCP2X :1;
[; ;pic18f27j13.h: 10690: };
[; ;pic18f27j13.h: 10691: } ECCP2CONbits_t;
[; ;pic18f27j13.h: 10692: extern volatile ECCP2CONbits_t ECCP2CONbits @ 0xFB4;
[; ;pic18f27j13.h: 10761: extern volatile unsigned short CCPR2 @ 0xFB5;
"10763
[; ;pic18f27j13.h: 10763: asm("CCPR2 equ 0FB5h");
[; <" CCPR2 equ 0FB5h ;# ">
[; ;pic18f27j13.h: 10767: extern volatile unsigned char CCPR2L @ 0xFB5;
"10769
[; ;pic18f27j13.h: 10769: asm("CCPR2L equ 0FB5h");
[; <" CCPR2L equ 0FB5h ;# ">
[; ;pic18f27j13.h: 10772: typedef union {
[; ;pic18f27j13.h: 10773: struct {
[; ;pic18f27j13.h: 10774: unsigned CCPR2L :8;
[; ;pic18f27j13.h: 10775: };
[; ;pic18f27j13.h: 10776: } CCPR2Lbits_t;
[; ;pic18f27j13.h: 10777: extern volatile CCPR2Lbits_t CCPR2Lbits @ 0xFB5;
[; ;pic18f27j13.h: 10786: extern volatile unsigned char CCPR2H @ 0xFB6;
"10788
[; ;pic18f27j13.h: 10788: asm("CCPR2H equ 0FB6h");
[; <" CCPR2H equ 0FB6h ;# ">
[; ;pic18f27j13.h: 10791: typedef union {
[; ;pic18f27j13.h: 10792: struct {
[; ;pic18f27j13.h: 10793: unsigned CCPR2H :8;
[; ;pic18f27j13.h: 10794: };
[; ;pic18f27j13.h: 10795: } CCPR2Hbits_t;
[; ;pic18f27j13.h: 10796: extern volatile CCPR2Hbits_t CCPR2Hbits @ 0xFB6;
[; ;pic18f27j13.h: 10805: extern volatile unsigned char ECCP2DEL @ 0xFB7;
"10807
[; ;pic18f27j13.h: 10807: asm("ECCP2DEL equ 0FB7h");
[; <" ECCP2DEL equ 0FB7h ;# ">
[; ;pic18f27j13.h: 10810: extern volatile unsigned char PWM2CON @ 0xFB7;
"10812
[; ;pic18f27j13.h: 10812: asm("PWM2CON equ 0FB7h");
[; <" PWM2CON equ 0FB7h ;# ">
[; ;pic18f27j13.h: 10815: typedef union {
[; ;pic18f27j13.h: 10816: struct {
[; ;pic18f27j13.h: 10817: unsigned P2DC :7;
[; ;pic18f27j13.h: 10818: unsigned P2RSEN :1;
[; ;pic18f27j13.h: 10819: };
[; ;pic18f27j13.h: 10820: struct {
[; ;pic18f27j13.h: 10821: unsigned P2DC0 :1;
[; ;pic18f27j13.h: 10822: unsigned P2DC1 :1;
[; ;pic18f27j13.h: 10823: unsigned P2DC2 :1;
[; ;pic18f27j13.h: 10824: unsigned P2DC3 :1;
[; ;pic18f27j13.h: 10825: unsigned P2DC4 :1;
[; ;pic18f27j13.h: 10826: unsigned P2DC5 :1;
[; ;pic18f27j13.h: 10827: unsigned P2DC6 :1;
[; ;pic18f27j13.h: 10828: };
[; ;pic18f27j13.h: 10829: } ECCP2DELbits_t;
[; ;pic18f27j13.h: 10830: extern volatile ECCP2DELbits_t ECCP2DELbits @ 0xFB7;
[; ;pic18f27j13.h: 10878: typedef union {
[; ;pic18f27j13.h: 10879: struct {
[; ;pic18f27j13.h: 10880: unsigned P2DC :7;
[; ;pic18f27j13.h: 10881: unsigned P2RSEN :1;
[; ;pic18f27j13.h: 10882: };
[; ;pic18f27j13.h: 10883: struct {
[; ;pic18f27j13.h: 10884: unsigned P2DC0 :1;
[; ;pic18f27j13.h: 10885: unsigned P2DC1 :1;
[; ;pic18f27j13.h: 10886: unsigned P2DC2 :1;
[; ;pic18f27j13.h: 10887: unsigned P2DC3 :1;
[; ;pic18f27j13.h: 10888: unsigned P2DC4 :1;
[; ;pic18f27j13.h: 10889: unsigned P2DC5 :1;
[; ;pic18f27j13.h: 10890: unsigned P2DC6 :1;
[; ;pic18f27j13.h: 10891: };
[; ;pic18f27j13.h: 10892: } PWM2CONbits_t;
[; ;pic18f27j13.h: 10893: extern volatile PWM2CONbits_t PWM2CONbits @ 0xFB7;
[; ;pic18f27j13.h: 10942: extern volatile unsigned char ECCP2AS @ 0xFB8;
"10944
[; ;pic18f27j13.h: 10944: asm("ECCP2AS equ 0FB8h");
[; <" ECCP2AS equ 0FB8h ;# ">
[; ;pic18f27j13.h: 10947: typedef union {
[; ;pic18f27j13.h: 10948: struct {
[; ;pic18f27j13.h: 10949: unsigned PSS2BD :2;
[; ;pic18f27j13.h: 10950: unsigned PSS2AC :2;
[; ;pic18f27j13.h: 10951: unsigned ECCP2AS :3;
[; ;pic18f27j13.h: 10952: unsigned ECCP2ASE :1;
[; ;pic18f27j13.h: 10953: };
[; ;pic18f27j13.h: 10954: struct {
[; ;pic18f27j13.h: 10955: unsigned PSS2BD0 :1;
[; ;pic18f27j13.h: 10956: unsigned PSS2BD1 :1;
[; ;pic18f27j13.h: 10957: unsigned PSS2AC0 :1;
[; ;pic18f27j13.h: 10958: unsigned PSS2AC1 :1;
[; ;pic18f27j13.h: 10959: unsigned ECCP2AS0 :1;
[; ;pic18f27j13.h: 10960: unsigned ECCP2AS1 :1;
[; ;pic18f27j13.h: 10961: unsigned ECCP2AS2 :1;
[; ;pic18f27j13.h: 10962: };
[; ;pic18f27j13.h: 10963: } ECCP2ASbits_t;
[; ;pic18f27j13.h: 10964: extern volatile ECCP2ASbits_t ECCP2ASbits @ 0xFB8;
[; ;pic18f27j13.h: 11023: extern volatile unsigned char PSTR2CON @ 0xFB9;
"11025
[; ;pic18f27j13.h: 11025: asm("PSTR2CON equ 0FB9h");
[; <" PSTR2CON equ 0FB9h ;# ">
[; ;pic18f27j13.h: 11028: typedef union {
[; ;pic18f27j13.h: 11029: struct {
[; ;pic18f27j13.h: 11030: unsigned STRA :1;
[; ;pic18f27j13.h: 11031: unsigned STRB :1;
[; ;pic18f27j13.h: 11032: unsigned STRC :1;
[; ;pic18f27j13.h: 11033: unsigned STRD :1;
[; ;pic18f27j13.h: 11034: unsigned STRSYNC :1;
[; ;pic18f27j13.h: 11035: unsigned :1;
[; ;pic18f27j13.h: 11036: unsigned CMPL0 :1;
[; ;pic18f27j13.h: 11037: unsigned CMPL1 :1;
[; ;pic18f27j13.h: 11038: };
[; ;pic18f27j13.h: 11039: struct {
[; ;pic18f27j13.h: 11040: unsigned P2DC0 :1;
[; ;pic18f27j13.h: 11041: unsigned P2DC1 :1;
[; ;pic18f27j13.h: 11042: unsigned P2DC2 :1;
[; ;pic18f27j13.h: 11043: unsigned P2DC3 :1;
[; ;pic18f27j13.h: 11044: unsigned P2DC4 :1;
[; ;pic18f27j13.h: 11045: unsigned P2DC5 :1;
[; ;pic18f27j13.h: 11046: unsigned P2DC6 :1;
[; ;pic18f27j13.h: 11047: };
[; ;pic18f27j13.h: 11048: struct {
[; ;pic18f27j13.h: 11049: unsigned :6;
[; ;pic18f27j13.h: 11050: unsigned CMPL02 :1;
[; ;pic18f27j13.h: 11051: };
[; ;pic18f27j13.h: 11052: struct {
[; ;pic18f27j13.h: 11053: unsigned :7;
[; ;pic18f27j13.h: 11054: unsigned CMPL12 :1;
[; ;pic18f27j13.h: 11055: };
[; ;pic18f27j13.h: 11056: struct {
[; ;pic18f27j13.h: 11057: unsigned P2DC02 :1;
[; ;pic18f27j13.h: 11058: };
[; ;pic18f27j13.h: 11059: struct {
[; ;pic18f27j13.h: 11060: unsigned P2DC0CON :1;
[; ;pic18f27j13.h: 11061: };
[; ;pic18f27j13.h: 11062: struct {
[; ;pic18f27j13.h: 11063: unsigned :1;
[; ;pic18f27j13.h: 11064: unsigned P2DC12 :1;
[; ;pic18f27j13.h: 11065: };
[; ;pic18f27j13.h: 11066: struct {
[; ;pic18f27j13.h: 11067: unsigned :1;
[; ;pic18f27j13.h: 11068: unsigned P2DC1CON :1;
[; ;pic18f27j13.h: 11069: };
[; ;pic18f27j13.h: 11070: struct {
[; ;pic18f27j13.h: 11071: unsigned :2;
[; ;pic18f27j13.h: 11072: unsigned P2DC22 :1;
[; ;pic18f27j13.h: 11073: };
[; ;pic18f27j13.h: 11074: struct {
[; ;pic18f27j13.h: 11075: unsigned :2;
[; ;pic18f27j13.h: 11076: unsigned P2DC2CON :1;
[; ;pic18f27j13.h: 11077: };
[; ;pic18f27j13.h: 11078: struct {
[; ;pic18f27j13.h: 11079: unsigned :3;
[; ;pic18f27j13.h: 11080: unsigned P2DC32 :1;
[; ;pic18f27j13.h: 11081: };
[; ;pic18f27j13.h: 11082: struct {
[; ;pic18f27j13.h: 11083: unsigned :3;
[; ;pic18f27j13.h: 11084: unsigned P2DC3CON :1;
[; ;pic18f27j13.h: 11085: };
[; ;pic18f27j13.h: 11086: struct {
[; ;pic18f27j13.h: 11087: unsigned :4;
[; ;pic18f27j13.h: 11088: unsigned P2DC42 :1;
[; ;pic18f27j13.h: 11089: };
[; ;pic18f27j13.h: 11090: struct {
[; ;pic18f27j13.h: 11091: unsigned :4;
[; ;pic18f27j13.h: 11092: unsigned P2DC4CON :1;
[; ;pic18f27j13.h: 11093: };
[; ;pic18f27j13.h: 11094: struct {
[; ;pic18f27j13.h: 11095: unsigned :5;
[; ;pic18f27j13.h: 11096: unsigned P2DC52 :1;
[; ;pic18f27j13.h: 11097: };
[; ;pic18f27j13.h: 11098: struct {
[; ;pic18f27j13.h: 11099: unsigned :5;
[; ;pic18f27j13.h: 11100: unsigned P2DC5CON :1;
[; ;pic18f27j13.h: 11101: };
[; ;pic18f27j13.h: 11102: struct {
[; ;pic18f27j13.h: 11103: unsigned :6;
[; ;pic18f27j13.h: 11104: unsigned P2DC62 :1;
[; ;pic18f27j13.h: 11105: };
[; ;pic18f27j13.h: 11106: struct {
[; ;pic18f27j13.h: 11107: unsigned :6;
[; ;pic18f27j13.h: 11108: unsigned P2DC6CON :1;
[; ;pic18f27j13.h: 11109: };
[; ;pic18f27j13.h: 11110: struct {
[; ;pic18f27j13.h: 11111: unsigned STRA2 :1;
[; ;pic18f27j13.h: 11112: };
[; ;pic18f27j13.h: 11113: struct {
[; ;pic18f27j13.h: 11114: unsigned :1;
[; ;pic18f27j13.h: 11115: unsigned STRB2 :1;
[; ;pic18f27j13.h: 11116: };
[; ;pic18f27j13.h: 11117: struct {
[; ;pic18f27j13.h: 11118: unsigned :2;
[; ;pic18f27j13.h: 11119: unsigned STRC2 :1;
[; ;pic18f27j13.h: 11120: };
[; ;pic18f27j13.h: 11121: struct {
[; ;pic18f27j13.h: 11122: unsigned :3;
[; ;pic18f27j13.h: 11123: unsigned STRD2 :1;
[; ;pic18f27j13.h: 11124: };
[; ;pic18f27j13.h: 11125: struct {
[; ;pic18f27j13.h: 11126: unsigned :4;
[; ;pic18f27j13.h: 11127: unsigned STRSYNC2 :1;
[; ;pic18f27j13.h: 11128: };
[; ;pic18f27j13.h: 11129: } PSTR2CONbits_t;
[; ;pic18f27j13.h: 11130: extern volatile PSTR2CONbits_t PSTR2CONbits @ 0xFB9;
[; ;pic18f27j13.h: 11309: extern volatile unsigned char CCP1CON @ 0xFBA;
"11311
[; ;pic18f27j13.h: 11311: asm("CCP1CON equ 0FBAh");
[; <" CCP1CON equ 0FBAh ;# ">
[; ;pic18f27j13.h: 11314: extern volatile unsigned char ECCP1CON @ 0xFBA;
"11316
[; ;pic18f27j13.h: 11316: asm("ECCP1CON equ 0FBAh");
[; <" ECCP1CON equ 0FBAh ;# ">
[; ;pic18f27j13.h: 11319: typedef union {
[; ;pic18f27j13.h: 11320: struct {
[; ;pic18f27j13.h: 11321: unsigned CCP1M :4;
[; ;pic18f27j13.h: 11322: unsigned DC1B :2;
[; ;pic18f27j13.h: 11323: unsigned P1M :2;
[; ;pic18f27j13.h: 11324: };
[; ;pic18f27j13.h: 11325: struct {
[; ;pic18f27j13.h: 11326: unsigned CCP1M0 :1;
[; ;pic18f27j13.h: 11327: unsigned CCP1M1 :1;
[; ;pic18f27j13.h: 11328: unsigned CCP1M2 :1;
[; ;pic18f27j13.h: 11329: unsigned CCP1M3 :1;
[; ;pic18f27j13.h: 11330: unsigned DC1B0 :1;
[; ;pic18f27j13.h: 11331: unsigned DC1B1 :1;
[; ;pic18f27j13.h: 11332: unsigned P1M0 :1;
[; ;pic18f27j13.h: 11333: unsigned P1M1 :1;
[; ;pic18f27j13.h: 11334: };
[; ;pic18f27j13.h: 11335: struct {
[; ;pic18f27j13.h: 11336: unsigned :4;
[; ;pic18f27j13.h: 11337: unsigned CCP1Y :1;
[; ;pic18f27j13.h: 11338: unsigned CCP1X :1;
[; ;pic18f27j13.h: 11339: };
[; ;pic18f27j13.h: 11340: } CCP1CONbits_t;
[; ;pic18f27j13.h: 11341: extern volatile CCP1CONbits_t CCP1CONbits @ 0xFBA;
[; ;pic18f27j13.h: 11409: typedef union {
[; ;pic18f27j13.h: 11410: struct {
[; ;pic18f27j13.h: 11411: unsigned CCP1M :4;
[; ;pic18f27j13.h: 11412: unsigned DC1B :2;
[; ;pic18f27j13.h: 11413: unsigned P1M :2;
[; ;pic18f27j13.h: 11414: };
[; ;pic18f27j13.h: 11415: struct {
[; ;pic18f27j13.h: 11416: unsigned CCP1M0 :1;
[; ;pic18f27j13.h: 11417: unsigned CCP1M1 :1;
[; ;pic18f27j13.h: 11418: unsigned CCP1M2 :1;
[; ;pic18f27j13.h: 11419: unsigned CCP1M3 :1;
[; ;pic18f27j13.h: 11420: unsigned DC1B0 :1;
[; ;pic18f27j13.h: 11421: unsigned DC1B1 :1;
[; ;pic18f27j13.h: 11422: unsigned P1M0 :1;
[; ;pic18f27j13.h: 11423: unsigned P1M1 :1;
[; ;pic18f27j13.h: 11424: };
[; ;pic18f27j13.h: 11425: struct {
[; ;pic18f27j13.h: 11426: unsigned :4;
[; ;pic18f27j13.h: 11427: unsigned CCP1Y :1;
[; ;pic18f27j13.h: 11428: unsigned CCP1X :1;
[; ;pic18f27j13.h: 11429: };
[; ;pic18f27j13.h: 11430: } ECCP1CONbits_t;
[; ;pic18f27j13.h: 11431: extern volatile ECCP1CONbits_t ECCP1CONbits @ 0xFBA;
[; ;pic18f27j13.h: 11500: extern volatile unsigned short CCPR1 @ 0xFBB;
"11502
[; ;pic18f27j13.h: 11502: asm("CCPR1 equ 0FBBh");
[; <" CCPR1 equ 0FBBh ;# ">
[; ;pic18f27j13.h: 11506: extern volatile unsigned char CCPR1L @ 0xFBB;
"11508
[; ;pic18f27j13.h: 11508: asm("CCPR1L equ 0FBBh");
[; <" CCPR1L equ 0FBBh ;# ">
[; ;pic18f27j13.h: 11511: typedef union {
[; ;pic18f27j13.h: 11512: struct {
[; ;pic18f27j13.h: 11513: unsigned CCPR1L :8;
[; ;pic18f27j13.h: 11514: };
[; ;pic18f27j13.h: 11515: } CCPR1Lbits_t;
[; ;pic18f27j13.h: 11516: extern volatile CCPR1Lbits_t CCPR1Lbits @ 0xFBB;
[; ;pic18f27j13.h: 11525: extern volatile unsigned char CCPR1H @ 0xFBC;
"11527
[; ;pic18f27j13.h: 11527: asm("CCPR1H equ 0FBCh");
[; <" CCPR1H equ 0FBCh ;# ">
[; ;pic18f27j13.h: 11530: typedef union {
[; ;pic18f27j13.h: 11531: struct {
[; ;pic18f27j13.h: 11532: unsigned CCPR1H :8;
[; ;pic18f27j13.h: 11533: };
[; ;pic18f27j13.h: 11534: } CCPR1Hbits_t;
[; ;pic18f27j13.h: 11535: extern volatile CCPR1Hbits_t CCPR1Hbits @ 0xFBC;
[; ;pic18f27j13.h: 11544: extern volatile unsigned char ECCP1DEL @ 0xFBD;
"11546
[; ;pic18f27j13.h: 11546: asm("ECCP1DEL equ 0FBDh");
[; <" ECCP1DEL equ 0FBDh ;# ">
[; ;pic18f27j13.h: 11549: extern volatile unsigned char PWM1CON @ 0xFBD;
"11551
[; ;pic18f27j13.h: 11551: asm("PWM1CON equ 0FBDh");
[; <" PWM1CON equ 0FBDh ;# ">
[; ;pic18f27j13.h: 11554: typedef union {
[; ;pic18f27j13.h: 11555: struct {
[; ;pic18f27j13.h: 11556: unsigned P1DC :7;
[; ;pic18f27j13.h: 11557: unsigned P1RSEN :1;
[; ;pic18f27j13.h: 11558: };
[; ;pic18f27j13.h: 11559: struct {
[; ;pic18f27j13.h: 11560: unsigned P1DC0 :1;
[; ;pic18f27j13.h: 11561: unsigned P1DC1 :1;
[; ;pic18f27j13.h: 11562: unsigned P1DC2 :1;
[; ;pic18f27j13.h: 11563: unsigned P1DC3 :1;
[; ;pic18f27j13.h: 11564: unsigned P1DC4 :1;
[; ;pic18f27j13.h: 11565: unsigned P1DC5 :1;
[; ;pic18f27j13.h: 11566: unsigned P1DC6 :1;
[; ;pic18f27j13.h: 11567: };
[; ;pic18f27j13.h: 11568: } ECCP1DELbits_t;
[; ;pic18f27j13.h: 11569: extern volatile ECCP1DELbits_t ECCP1DELbits @ 0xFBD;
[; ;pic18f27j13.h: 11617: typedef union {
[; ;pic18f27j13.h: 11618: struct {
[; ;pic18f27j13.h: 11619: unsigned P1DC :7;
[; ;pic18f27j13.h: 11620: unsigned P1RSEN :1;
[; ;pic18f27j13.h: 11621: };
[; ;pic18f27j13.h: 11622: struct {
[; ;pic18f27j13.h: 11623: unsigned P1DC0 :1;
[; ;pic18f27j13.h: 11624: unsigned P1DC1 :1;
[; ;pic18f27j13.h: 11625: unsigned P1DC2 :1;
[; ;pic18f27j13.h: 11626: unsigned P1DC3 :1;
[; ;pic18f27j13.h: 11627: unsigned P1DC4 :1;
[; ;pic18f27j13.h: 11628: unsigned P1DC5 :1;
[; ;pic18f27j13.h: 11629: unsigned P1DC6 :1;
[; ;pic18f27j13.h: 11630: };
[; ;pic18f27j13.h: 11631: } PWM1CONbits_t;
[; ;pic18f27j13.h: 11632: extern volatile PWM1CONbits_t PWM1CONbits @ 0xFBD;
[; ;pic18f27j13.h: 11681: extern volatile unsigned char ECCP1AS @ 0xFBE;
"11683
[; ;pic18f27j13.h: 11683: asm("ECCP1AS equ 0FBEh");
[; <" ECCP1AS equ 0FBEh ;# ">
[; ;pic18f27j13.h: 11686: typedef union {
[; ;pic18f27j13.h: 11687: struct {
[; ;pic18f27j13.h: 11688: unsigned PSS1BD :2;
[; ;pic18f27j13.h: 11689: unsigned PSS1AC :2;
[; ;pic18f27j13.h: 11690: unsigned ECCP1AS :3;
[; ;pic18f27j13.h: 11691: unsigned ECCP1ASE :1;
[; ;pic18f27j13.h: 11692: };
[; ;pic18f27j13.h: 11693: struct {
[; ;pic18f27j13.h: 11694: unsigned PSS1BD0 :1;
[; ;pic18f27j13.h: 11695: unsigned PSS1BD1 :1;
[; ;pic18f27j13.h: 11696: unsigned PSS1AC0 :1;
[; ;pic18f27j13.h: 11697: unsigned PSS1AC1 :1;
[; ;pic18f27j13.h: 11698: unsigned ECCP1AS0 :1;
[; ;pic18f27j13.h: 11699: unsigned ECCP1AS1 :1;
[; ;pic18f27j13.h: 11700: unsigned ECCP1AS2 :1;
[; ;pic18f27j13.h: 11701: };
[; ;pic18f27j13.h: 11702: } ECCP1ASbits_t;
[; ;pic18f27j13.h: 11703: extern volatile ECCP1ASbits_t ECCP1ASbits @ 0xFBE;
[; ;pic18f27j13.h: 11762: extern volatile unsigned char PSTR1CON @ 0xFBF;
"11764
[; ;pic18f27j13.h: 11764: asm("PSTR1CON equ 0FBFh");
[; <" PSTR1CON equ 0FBFh ;# ">
[; ;pic18f27j13.h: 11767: typedef union {
[; ;pic18f27j13.h: 11768: struct {
[; ;pic18f27j13.h: 11769: unsigned STRA :1;
[; ;pic18f27j13.h: 11770: unsigned STRB :1;
[; ;pic18f27j13.h: 11771: unsigned STRC :1;
[; ;pic18f27j13.h: 11772: unsigned STRD :1;
[; ;pic18f27j13.h: 11773: unsigned STRSYNC :1;
[; ;pic18f27j13.h: 11774: unsigned :1;
[; ;pic18f27j13.h: 11775: unsigned CMPL0 :1;
[; ;pic18f27j13.h: 11776: unsigned CMPL1 :1;
[; ;pic18f27j13.h: 11777: };
[; ;pic18f27j13.h: 11778: } PSTR1CONbits_t;
[; ;pic18f27j13.h: 11779: extern volatile PSTR1CONbits_t PSTR1CONbits @ 0xFBF;
[; ;pic18f27j13.h: 11818: extern volatile unsigned char WDTCON @ 0xFC0;
"11820
[; ;pic18f27j13.h: 11820: asm("WDTCON equ 0FC0h");
[; <" WDTCON equ 0FC0h ;# ">
[; ;pic18f27j13.h: 11823: typedef union {
[; ;pic18f27j13.h: 11824: struct {
[; ;pic18f27j13.h: 11825: unsigned SWDTEN :1;
[; ;pic18f27j13.h: 11826: unsigned ULPSINK :1;
[; ;pic18f27j13.h: 11827: unsigned ULPEN :1;
[; ;pic18f27j13.h: 11828: unsigned DS :1;
[; ;pic18f27j13.h: 11829: unsigned VBGOE :1;
[; ;pic18f27j13.h: 11830: unsigned ULPLVL :1;
[; ;pic18f27j13.h: 11831: unsigned LVDSTAT :1;
[; ;pic18f27j13.h: 11832: unsigned REGSLP :1;
[; ;pic18f27j13.h: 11833: };
[; ;pic18f27j13.h: 11834: struct {
[; ;pic18f27j13.h: 11835: unsigned SWDTE :1;
[; ;pic18f27j13.h: 11836: };
[; ;pic18f27j13.h: 11837: } WDTCONbits_t;
[; ;pic18f27j13.h: 11838: extern volatile WDTCONbits_t WDTCONbits @ 0xFC0;
[; ;pic18f27j13.h: 11887: extern volatile unsigned char ADCON1 @ 0xFC1;
"11889
[; ;pic18f27j13.h: 11889: asm("ADCON1 equ 0FC1h");
[; <" ADCON1 equ 0FC1h ;# ">
[; ;pic18f27j13.h: 11892: typedef union {
[; ;pic18f27j13.h: 11893: struct {
[; ;pic18f27j13.h: 11894: unsigned ADCS :3;
[; ;pic18f27j13.h: 11895: unsigned ACQT :3;
[; ;pic18f27j13.h: 11896: unsigned ADCAL :1;
[; ;pic18f27j13.h: 11897: unsigned ADFM :1;
[; ;pic18f27j13.h: 11898: };
[; ;pic18f27j13.h: 11899: struct {
[; ;pic18f27j13.h: 11900: unsigned ADCS0 :1;
[; ;pic18f27j13.h: 11901: unsigned ADCS1 :1;
[; ;pic18f27j13.h: 11902: unsigned ADCS2 :1;
[; ;pic18f27j13.h: 11903: unsigned ACQT0 :1;
[; ;pic18f27j13.h: 11904: unsigned ACQT1 :1;
[; ;pic18f27j13.h: 11905: unsigned ACQT2 :1;
[; ;pic18f27j13.h: 11906: };
[; ;pic18f27j13.h: 11907: struct {
[; ;pic18f27j13.h: 11908: unsigned :3;
[; ;pic18f27j13.h: 11909: unsigned CHSN3 :1;
[; ;pic18f27j13.h: 11910: };
[; ;pic18f27j13.h: 11911: struct {
[; ;pic18f27j13.h: 11912: unsigned :4;
[; ;pic18f27j13.h: 11913: unsigned VCFG01 :1;
[; ;pic18f27j13.h: 11914: };
[; ;pic18f27j13.h: 11915: struct {
[; ;pic18f27j13.h: 11916: unsigned :5;
[; ;pic18f27j13.h: 11917: unsigned VCFG11 :1;
[; ;pic18f27j13.h: 11918: };
[; ;pic18f27j13.h: 11919: } ADCON1bits_t;
[; ;pic18f27j13.h: 11920: extern volatile ADCON1bits_t ADCON1bits @ 0xFC1;
[; ;pic18f27j13.h: 11989: extern volatile unsigned char ADCON0 @ 0xFC2;
"11991
[; ;pic18f27j13.h: 11991: asm("ADCON0 equ 0FC2h");
[; <" ADCON0 equ 0FC2h ;# ">
[; ;pic18f27j13.h: 11994: typedef union {
[; ;pic18f27j13.h: 11995: struct {
[; ;pic18f27j13.h: 11996: unsigned :1;
[; ;pic18f27j13.h: 11997: unsigned GO_NOT_DONE :1;
[; ;pic18f27j13.h: 11998: };
[; ;pic18f27j13.h: 11999: struct {
[; ;pic18f27j13.h: 12000: unsigned ADON :1;
[; ;pic18f27j13.h: 12001: unsigned GO_nDONE :1;
[; ;pic18f27j13.h: 12002: unsigned CHS :4;
[; ;pic18f27j13.h: 12003: unsigned VCFG :2;
[; ;pic18f27j13.h: 12004: };
[; ;pic18f27j13.h: 12005: struct {
[; ;pic18f27j13.h: 12006: unsigned :1;
[; ;pic18f27j13.h: 12007: unsigned GO_DONE :1;
[; ;pic18f27j13.h: 12008: unsigned CHS0 :1;
[; ;pic18f27j13.h: 12009: unsigned CHS1 :1;
[; ;pic18f27j13.h: 12010: unsigned CHS2 :1;
[; ;pic18f27j13.h: 12011: unsigned CHS3 :1;
[; ;pic18f27j13.h: 12012: unsigned VCFG0 :1;
[; ;pic18f27j13.h: 12013: unsigned VCFG1 :1;
[; ;pic18f27j13.h: 12014: };
[; ;pic18f27j13.h: 12015: struct {
[; ;pic18f27j13.h: 12016: unsigned :1;
[; ;pic18f27j13.h: 12017: unsigned DONE :1;
[; ;pic18f27j13.h: 12018: };
[; ;pic18f27j13.h: 12019: struct {
[; ;pic18f27j13.h: 12020: unsigned :1;
[; ;pic18f27j13.h: 12021: unsigned GO :1;
[; ;pic18f27j13.h: 12022: };
[; ;pic18f27j13.h: 12023: struct {
[; ;pic18f27j13.h: 12024: unsigned :1;
[; ;pic18f27j13.h: 12025: unsigned NOT_DONE :1;
[; ;pic18f27j13.h: 12026: };
[; ;pic18f27j13.h: 12027: struct {
[; ;pic18f27j13.h: 12028: unsigned :1;
[; ;pic18f27j13.h: 12029: unsigned nDONE :1;
[; ;pic18f27j13.h: 12030: };
[; ;pic18f27j13.h: 12031: struct {
[; ;pic18f27j13.h: 12032: unsigned :7;
[; ;pic18f27j13.h: 12033: unsigned ADCAL :1;
[; ;pic18f27j13.h: 12034: };
[; ;pic18f27j13.h: 12035: struct {
[; ;pic18f27j13.h: 12036: unsigned :1;
[; ;pic18f27j13.h: 12037: unsigned GODONE :1;
[; ;pic18f27j13.h: 12038: };
[; ;pic18f27j13.h: 12039: } ADCON0bits_t;
[; ;pic18f27j13.h: 12040: extern volatile ADCON0bits_t ADCON0bits @ 0xFC2;
[; ;pic18f27j13.h: 12134: extern volatile unsigned short ADRES @ 0xFC3;
"12136
[; ;pic18f27j13.h: 12136: asm("ADRES equ 0FC3h");
[; <" ADRES equ 0FC3h ;# ">
[; ;pic18f27j13.h: 12140: extern volatile unsigned char ADRESL @ 0xFC3;
"12142
[; ;pic18f27j13.h: 12142: asm("ADRESL equ 0FC3h");
[; <" ADRESL equ 0FC3h ;# ">
[; ;pic18f27j13.h: 12145: typedef union {
[; ;pic18f27j13.h: 12146: struct {
[; ;pic18f27j13.h: 12147: unsigned ADRESL :8;
[; ;pic18f27j13.h: 12148: };
[; ;pic18f27j13.h: 12149: } ADRESLbits_t;
[; ;pic18f27j13.h: 12150: extern volatile ADRESLbits_t ADRESLbits @ 0xFC3;
[; ;pic18f27j13.h: 12159: extern volatile unsigned char ADRESH @ 0xFC4;
"12161
[; ;pic18f27j13.h: 12161: asm("ADRESH equ 0FC4h");
[; <" ADRESH equ 0FC4h ;# ">
[; ;pic18f27j13.h: 12164: typedef union {
[; ;pic18f27j13.h: 12165: struct {
[; ;pic18f27j13.h: 12166: unsigned ADRESH :8;
[; ;pic18f27j13.h: 12167: };
[; ;pic18f27j13.h: 12168: } ADRESHbits_t;
[; ;pic18f27j13.h: 12169: extern volatile ADRESHbits_t ADRESHbits @ 0xFC4;
[; ;pic18f27j13.h: 12178: extern volatile unsigned char SSP1CON2 @ 0xFC5;
"12180
[; ;pic18f27j13.h: 12180: asm("SSP1CON2 equ 0FC5h");
[; <" SSP1CON2 equ 0FC5h ;# ">
[; ;pic18f27j13.h: 12183: extern volatile unsigned char SSPCON2 @ 0xFC5;
"12185
[; ;pic18f27j13.h: 12185: asm("SSPCON2 equ 0FC5h");
[; <" SSPCON2 equ 0FC5h ;# ">
[; ;pic18f27j13.h: 12188: typedef union {
[; ;pic18f27j13.h: 12189: struct {
[; ;pic18f27j13.h: 12190: unsigned SEN :1;
[; ;pic18f27j13.h: 12191: unsigned RSEN :1;
[; ;pic18f27j13.h: 12192: unsigned PEN :1;
[; ;pic18f27j13.h: 12193: unsigned RCEN :1;
[; ;pic18f27j13.h: 12194: unsigned ACKEN :1;
[; ;pic18f27j13.h: 12195: unsigned ACKDT :1;
[; ;pic18f27j13.h: 12196: unsigned ACKSTAT :1;
[; ;pic18f27j13.h: 12197: unsigned GCEN :1;
[; ;pic18f27j13.h: 12198: };
[; ;pic18f27j13.h: 12199: struct {
[; ;pic18f27j13.h: 12200: unsigned :1;
[; ;pic18f27j13.h: 12201: unsigned ADMSK1 :1;
[; ;pic18f27j13.h: 12202: unsigned ADMSK2 :1;
[; ;pic18f27j13.h: 12203: unsigned ADMSK3 :1;
[; ;pic18f27j13.h: 12204: unsigned ADMSK4 :1;
[; ;pic18f27j13.h: 12205: unsigned ADMSK5 :1;
[; ;pic18f27j13.h: 12206: };
[; ;pic18f27j13.h: 12207: struct {
[; ;pic18f27j13.h: 12208: unsigned :5;
[; ;pic18f27j13.h: 12209: unsigned ACKDT1 :1;
[; ;pic18f27j13.h: 12210: };
[; ;pic18f27j13.h: 12211: struct {
[; ;pic18f27j13.h: 12212: unsigned :4;
[; ;pic18f27j13.h: 12213: unsigned ACKEN1 :1;
[; ;pic18f27j13.h: 12214: };
[; ;pic18f27j13.h: 12215: struct {
[; ;pic18f27j13.h: 12216: unsigned :6;
[; ;pic18f27j13.h: 12217: unsigned ACKSTAT1 :1;
[; ;pic18f27j13.h: 12218: };
[; ;pic18f27j13.h: 12219: struct {
[; ;pic18f27j13.h: 12220: unsigned :1;
[; ;pic18f27j13.h: 12221: unsigned ADMSK11 :1;
[; ;pic18f27j13.h: 12222: };
[; ;pic18f27j13.h: 12223: struct {
[; ;pic18f27j13.h: 12224: unsigned :2;
[; ;pic18f27j13.h: 12225: unsigned ADMSK21 :1;
[; ;pic18f27j13.h: 12226: };
[; ;pic18f27j13.h: 12227: struct {
[; ;pic18f27j13.h: 12228: unsigned :3;
[; ;pic18f27j13.h: 12229: unsigned ADMSK31 :1;
[; ;pic18f27j13.h: 12230: };
[; ;pic18f27j13.h: 12231: struct {
[; ;pic18f27j13.h: 12232: unsigned :4;
[; ;pic18f27j13.h: 12233: unsigned ADMSK41 :1;
[; ;pic18f27j13.h: 12234: };
[; ;pic18f27j13.h: 12235: struct {
[; ;pic18f27j13.h: 12236: unsigned :5;
[; ;pic18f27j13.h: 12237: unsigned ADMSK51 :1;
[; ;pic18f27j13.h: 12238: };
[; ;pic18f27j13.h: 12239: struct {
[; ;pic18f27j13.h: 12240: unsigned :7;
[; ;pic18f27j13.h: 12241: unsigned GCEN1 :1;
[; ;pic18f27j13.h: 12242: };
[; ;pic18f27j13.h: 12243: struct {
[; ;pic18f27j13.h: 12244: unsigned :2;
[; ;pic18f27j13.h: 12245: unsigned PEN1 :1;
[; ;pic18f27j13.h: 12246: };
[; ;pic18f27j13.h: 12247: struct {
[; ;pic18f27j13.h: 12248: unsigned :3;
[; ;pic18f27j13.h: 12249: unsigned RCEN1 :1;
[; ;pic18f27j13.h: 12250: };
[; ;pic18f27j13.h: 12251: struct {
[; ;pic18f27j13.h: 12252: unsigned :1;
[; ;pic18f27j13.h: 12253: unsigned RSEN1 :1;
[; ;pic18f27j13.h: 12254: };
[; ;pic18f27j13.h: 12255: struct {
[; ;pic18f27j13.h: 12256: unsigned SEN1 :1;
[; ;pic18f27j13.h: 12257: };
[; ;pic18f27j13.h: 12258: } SSP1CON2bits_t;
[; ;pic18f27j13.h: 12259: extern volatile SSP1CON2bits_t SSP1CON2bits @ 0xFC5;
[; ;pic18f27j13.h: 12392: typedef union {
[; ;pic18f27j13.h: 12393: struct {
[; ;pic18f27j13.h: 12394: unsigned SEN :1;
[; ;pic18f27j13.h: 12395: unsigned RSEN :1;
[; ;pic18f27j13.h: 12396: unsigned PEN :1;
[; ;pic18f27j13.h: 12397: unsigned RCEN :1;
[; ;pic18f27j13.h: 12398: unsigned ACKEN :1;
[; ;pic18f27j13.h: 12399: unsigned ACKDT :1;
[; ;pic18f27j13.h: 12400: unsigned ACKSTAT :1;
[; ;pic18f27j13.h: 12401: unsigned GCEN :1;
[; ;pic18f27j13.h: 12402: };
[; ;pic18f27j13.h: 12403: struct {
[; ;pic18f27j13.h: 12404: unsigned :1;
[; ;pic18f27j13.h: 12405: unsigned ADMSK1 :1;
[; ;pic18f27j13.h: 12406: unsigned ADMSK2 :1;
[; ;pic18f27j13.h: 12407: unsigned ADMSK3 :1;
[; ;pic18f27j13.h: 12408: unsigned ADMSK4 :1;
[; ;pic18f27j13.h: 12409: unsigned ADMSK5 :1;
[; ;pic18f27j13.h: 12410: };
[; ;pic18f27j13.h: 12411: struct {
[; ;pic18f27j13.h: 12412: unsigned :5;
[; ;pic18f27j13.h: 12413: unsigned ACKDT1 :1;
[; ;pic18f27j13.h: 12414: };
[; ;pic18f27j13.h: 12415: struct {
[; ;pic18f27j13.h: 12416: unsigned :4;
[; ;pic18f27j13.h: 12417: unsigned ACKEN1 :1;
[; ;pic18f27j13.h: 12418: };
[; ;pic18f27j13.h: 12419: struct {
[; ;pic18f27j13.h: 12420: unsigned :6;
[; ;pic18f27j13.h: 12421: unsigned ACKSTAT1 :1;
[; ;pic18f27j13.h: 12422: };
[; ;pic18f27j13.h: 12423: struct {
[; ;pic18f27j13.h: 12424: unsigned :1;
[; ;pic18f27j13.h: 12425: unsigned ADMSK11 :1;
[; ;pic18f27j13.h: 12426: };
[; ;pic18f27j13.h: 12427: struct {
[; ;pic18f27j13.h: 12428: unsigned :2;
[; ;pic18f27j13.h: 12429: unsigned ADMSK21 :1;
[; ;pic18f27j13.h: 12430: };
[; ;pic18f27j13.h: 12431: struct {
[; ;pic18f27j13.h: 12432: unsigned :3;
[; ;pic18f27j13.h: 12433: unsigned ADMSK31 :1;
[; ;pic18f27j13.h: 12434: };
[; ;pic18f27j13.h: 12435: struct {
[; ;pic18f27j13.h: 12436: unsigned :4;
[; ;pic18f27j13.h: 12437: unsigned ADMSK41 :1;
[; ;pic18f27j13.h: 12438: };
[; ;pic18f27j13.h: 12439: struct {
[; ;pic18f27j13.h: 12440: unsigned :5;
[; ;pic18f27j13.h: 12441: unsigned ADMSK51 :1;
[; ;pic18f27j13.h: 12442: };
[; ;pic18f27j13.h: 12443: struct {
[; ;pic18f27j13.h: 12444: unsigned :7;
[; ;pic18f27j13.h: 12445: unsigned GCEN1 :1;
[; ;pic18f27j13.h: 12446: };
[; ;pic18f27j13.h: 12447: struct {
[; ;pic18f27j13.h: 12448: unsigned :2;
[; ;pic18f27j13.h: 12449: unsigned PEN1 :1;
[; ;pic18f27j13.h: 12450: };
[; ;pic18f27j13.h: 12451: struct {
[; ;pic18f27j13.h: 12452: unsigned :3;
[; ;pic18f27j13.h: 12453: unsigned RCEN1 :1;
[; ;pic18f27j13.h: 12454: };
[; ;pic18f27j13.h: 12455: struct {
[; ;pic18f27j13.h: 12456: unsigned :1;
[; ;pic18f27j13.h: 12457: unsigned RSEN1 :1;
[; ;pic18f27j13.h: 12458: };
[; ;pic18f27j13.h: 12459: struct {
[; ;pic18f27j13.h: 12460: unsigned SEN1 :1;
[; ;pic18f27j13.h: 12461: };
[; ;pic18f27j13.h: 12462: } SSPCON2bits_t;
[; ;pic18f27j13.h: 12463: extern volatile SSPCON2bits_t SSPCON2bits @ 0xFC5;
[; ;pic18f27j13.h: 12597: extern volatile unsigned char SSP1CON1 @ 0xFC6;
"12599
[; ;pic18f27j13.h: 12599: asm("SSP1CON1 equ 0FC6h");
[; <" SSP1CON1 equ 0FC6h ;# ">
[; ;pic18f27j13.h: 12602: extern volatile unsigned char SSPCON1 @ 0xFC6;
"12604
[; ;pic18f27j13.h: 12604: asm("SSPCON1 equ 0FC6h");
[; <" SSPCON1 equ 0FC6h ;# ">
[; ;pic18f27j13.h: 12607: typedef union {
[; ;pic18f27j13.h: 12608: struct {
[; ;pic18f27j13.h: 12609: unsigned SSPM :4;
[; ;pic18f27j13.h: 12610: unsigned CKP :1;
[; ;pic18f27j13.h: 12611: unsigned SSPEN :1;
[; ;pic18f27j13.h: 12612: unsigned SSPOV :1;
[; ;pic18f27j13.h: 12613: unsigned WCOL :1;
[; ;pic18f27j13.h: 12614: };
[; ;pic18f27j13.h: 12615: struct {
[; ;pic18f27j13.h: 12616: unsigned SSPM0 :1;
[; ;pic18f27j13.h: 12617: unsigned SSPM1 :1;
[; ;pic18f27j13.h: 12618: unsigned SSPM2 :1;
[; ;pic18f27j13.h: 12619: unsigned SSPM3 :1;
[; ;pic18f27j13.h: 12620: };
[; ;pic18f27j13.h: 12621: struct {
[; ;pic18f27j13.h: 12622: unsigned :4;
[; ;pic18f27j13.h: 12623: unsigned CKP1 :1;
[; ;pic18f27j13.h: 12624: };
[; ;pic18f27j13.h: 12625: struct {
[; ;pic18f27j13.h: 12626: unsigned :5;
[; ;pic18f27j13.h: 12627: unsigned SSPEN1 :1;
[; ;pic18f27j13.h: 12628: };
[; ;pic18f27j13.h: 12629: struct {
[; ;pic18f27j13.h: 12630: unsigned SSPM01 :1;
[; ;pic18f27j13.h: 12631: };
[; ;pic18f27j13.h: 12632: struct {
[; ;pic18f27j13.h: 12633: unsigned :1;
[; ;pic18f27j13.h: 12634: unsigned SSPM11 :1;
[; ;pic18f27j13.h: 12635: };
[; ;pic18f27j13.h: 12636: struct {
[; ;pic18f27j13.h: 12637: unsigned :2;
[; ;pic18f27j13.h: 12638: unsigned SSPM21 :1;
[; ;pic18f27j13.h: 12639: };
[; ;pic18f27j13.h: 12640: struct {
[; ;pic18f27j13.h: 12641: unsigned :3;
[; ;pic18f27j13.h: 12642: unsigned SSPM31 :1;
[; ;pic18f27j13.h: 12643: };
[; ;pic18f27j13.h: 12644: struct {
[; ;pic18f27j13.h: 12645: unsigned :6;
[; ;pic18f27j13.h: 12646: unsigned SSPOV1 :1;
[; ;pic18f27j13.h: 12647: };
[; ;pic18f27j13.h: 12648: struct {
[; ;pic18f27j13.h: 12649: unsigned :7;
[; ;pic18f27j13.h: 12650: unsigned WCOL1 :1;
[; ;pic18f27j13.h: 12651: };
[; ;pic18f27j13.h: 12652: } SSP1CON1bits_t;
[; ;pic18f27j13.h: 12653: extern volatile SSP1CON1bits_t SSP1CON1bits @ 0xFC6;
[; ;pic18f27j13.h: 12741: typedef union {
[; ;pic18f27j13.h: 12742: struct {
[; ;pic18f27j13.h: 12743: unsigned SSPM :4;
[; ;pic18f27j13.h: 12744: unsigned CKP :1;
[; ;pic18f27j13.h: 12745: unsigned SSPEN :1;
[; ;pic18f27j13.h: 12746: unsigned SSPOV :1;
[; ;pic18f27j13.h: 12747: unsigned WCOL :1;
[; ;pic18f27j13.h: 12748: };
[; ;pic18f27j13.h: 12749: struct {
[; ;pic18f27j13.h: 12750: unsigned SSPM0 :1;
[; ;pic18f27j13.h: 12751: unsigned SSPM1 :1;
[; ;pic18f27j13.h: 12752: unsigned SSPM2 :1;
[; ;pic18f27j13.h: 12753: unsigned SSPM3 :1;
[; ;pic18f27j13.h: 12754: };
[; ;pic18f27j13.h: 12755: struct {
[; ;pic18f27j13.h: 12756: unsigned :4;
[; ;pic18f27j13.h: 12757: unsigned CKP1 :1;
[; ;pic18f27j13.h: 12758: };
[; ;pic18f27j13.h: 12759: struct {
[; ;pic18f27j13.h: 12760: unsigned :5;
[; ;pic18f27j13.h: 12761: unsigned SSPEN1 :1;
[; ;pic18f27j13.h: 12762: };
[; ;pic18f27j13.h: 12763: struct {
[; ;pic18f27j13.h: 12764: unsigned SSPM01 :1;
[; ;pic18f27j13.h: 12765: };
[; ;pic18f27j13.h: 12766: struct {
[; ;pic18f27j13.h: 12767: unsigned :1;
[; ;pic18f27j13.h: 12768: unsigned SSPM11 :1;
[; ;pic18f27j13.h: 12769: };
[; ;pic18f27j13.h: 12770: struct {
[; ;pic18f27j13.h: 12771: unsigned :2;
[; ;pic18f27j13.h: 12772: unsigned SSPM21 :1;
[; ;pic18f27j13.h: 12773: };
[; ;pic18f27j13.h: 12774: struct {
[; ;pic18f27j13.h: 12775: unsigned :3;
[; ;pic18f27j13.h: 12776: unsigned SSPM31 :1;
[; ;pic18f27j13.h: 12777: };
[; ;pic18f27j13.h: 12778: struct {
[; ;pic18f27j13.h: 12779: unsigned :6;
[; ;pic18f27j13.h: 12780: unsigned SSPOV1 :1;
[; ;pic18f27j13.h: 12781: };
[; ;pic18f27j13.h: 12782: struct {
[; ;pic18f27j13.h: 12783: unsigned :7;
[; ;pic18f27j13.h: 12784: unsigned WCOL1 :1;
[; ;pic18f27j13.h: 12785: };
[; ;pic18f27j13.h: 12786: } SSPCON1bits_t;
[; ;pic18f27j13.h: 12787: extern volatile SSPCON1bits_t SSPCON1bits @ 0xFC6;
[; ;pic18f27j13.h: 12876: extern volatile unsigned char SSP1STAT @ 0xFC7;
"12878
[; ;pic18f27j13.h: 12878: asm("SSP1STAT equ 0FC7h");
[; <" SSP1STAT equ 0FC7h ;# ">
[; ;pic18f27j13.h: 12881: extern volatile unsigned char SSPSTAT @ 0xFC7;
"12883
[; ;pic18f27j13.h: 12883: asm("SSPSTAT equ 0FC7h");
[; <" SSPSTAT equ 0FC7h ;# ">
[; ;pic18f27j13.h: 12886: typedef union {
[; ;pic18f27j13.h: 12887: struct {
[; ;pic18f27j13.h: 12888: unsigned :2;
[; ;pic18f27j13.h: 12889: unsigned R_NOT_W :1;
[; ;pic18f27j13.h: 12890: };
[; ;pic18f27j13.h: 12891: struct {
[; ;pic18f27j13.h: 12892: unsigned :5;
[; ;pic18f27j13.h: 12893: unsigned D_NOT_A :1;
[; ;pic18f27j13.h: 12894: };
[; ;pic18f27j13.h: 12895: struct {
[; ;pic18f27j13.h: 12896: unsigned BF :1;
[; ;pic18f27j13.h: 12897: unsigned UA :1;
[; ;pic18f27j13.h: 12898: unsigned R_nW :1;
[; ;pic18f27j13.h: 12899: unsigned S :1;
[; ;pic18f27j13.h: 12900: unsigned P :1;
[; ;pic18f27j13.h: 12901: unsigned D_nA :1;
[; ;pic18f27j13.h: 12902: unsigned CKE :1;
[; ;pic18f27j13.h: 12903: unsigned SMP :1;
[; ;pic18f27j13.h: 12904: };
[; ;pic18f27j13.h: 12905: struct {
[; ;pic18f27j13.h: 12906: unsigned :2;
[; ;pic18f27j13.h: 12907: unsigned R :1;
[; ;pic18f27j13.h: 12908: unsigned :2;
[; ;pic18f27j13.h: 12909: unsigned D :1;
[; ;pic18f27j13.h: 12910: };
[; ;pic18f27j13.h: 12911: struct {
[; ;pic18f27j13.h: 12912: unsigned :2;
[; ;pic18f27j13.h: 12913: unsigned R_W :1;
[; ;pic18f27j13.h: 12914: unsigned :2;
[; ;pic18f27j13.h: 12915: unsigned D_A :1;
[; ;pic18f27j13.h: 12916: };
[; ;pic18f27j13.h: 12917: struct {
[; ;pic18f27j13.h: 12918: unsigned :2;
[; ;pic18f27j13.h: 12919: unsigned nW :1;
[; ;pic18f27j13.h: 12920: unsigned :2;
[; ;pic18f27j13.h: 12921: unsigned nA :1;
[; ;pic18f27j13.h: 12922: };
[; ;pic18f27j13.h: 12923: struct {
[; ;pic18f27j13.h: 12924: unsigned :2;
[; ;pic18f27j13.h: 12925: unsigned NOT_WRITE :1;
[; ;pic18f27j13.h: 12926: };
[; ;pic18f27j13.h: 12927: struct {
[; ;pic18f27j13.h: 12928: unsigned :5;
[; ;pic18f27j13.h: 12929: unsigned NOT_ADDRESS :1;
[; ;pic18f27j13.h: 12930: };
[; ;pic18f27j13.h: 12931: struct {
[; ;pic18f27j13.h: 12932: unsigned :2;
[; ;pic18f27j13.h: 12933: unsigned nWRITE :1;
[; ;pic18f27j13.h: 12934: unsigned :2;
[; ;pic18f27j13.h: 12935: unsigned nADDRESS :1;
[; ;pic18f27j13.h: 12936: };
[; ;pic18f27j13.h: 12937: struct {
[; ;pic18f27j13.h: 12938: unsigned :2;
[; ;pic18f27j13.h: 12939: unsigned READ_WRITE :1;
[; ;pic18f27j13.h: 12940: unsigned :2;
[; ;pic18f27j13.h: 12941: unsigned DATA_ADDRESS :1;
[; ;pic18f27j13.h: 12942: };
[; ;pic18f27j13.h: 12943: struct {
[; ;pic18f27j13.h: 12944: unsigned :2;
[; ;pic18f27j13.h: 12945: unsigned I2C_READ :1;
[; ;pic18f27j13.h: 12946: unsigned I2C_START :1;
[; ;pic18f27j13.h: 12947: unsigned I2C_STOP :1;
[; ;pic18f27j13.h: 12948: unsigned I2C_DAT :1;
[; ;pic18f27j13.h: 12949: };
[; ;pic18f27j13.h: 12950: struct {
[; ;pic18f27j13.h: 12951: unsigned BF1 :1;
[; ;pic18f27j13.h: 12952: };
[; ;pic18f27j13.h: 12953: struct {
[; ;pic18f27j13.h: 12954: unsigned :6;
[; ;pic18f27j13.h: 12955: unsigned CKE1 :1;
[; ;pic18f27j13.h: 12956: };
[; ;pic18f27j13.h: 12957: struct {
[; ;pic18f27j13.h: 12958: unsigned :5;
[; ;pic18f27j13.h: 12959: unsigned DA :1;
[; ;pic18f27j13.h: 12960: };
[; ;pic18f27j13.h: 12961: struct {
[; ;pic18f27j13.h: 12962: unsigned :5;
[; ;pic18f27j13.h: 12963: unsigned DA1 :1;
[; ;pic18f27j13.h: 12964: };
[; ;pic18f27j13.h: 12965: struct {
[; ;pic18f27j13.h: 12966: unsigned :2;
[; ;pic18f27j13.h: 12967: unsigned RW :1;
[; ;pic18f27j13.h: 12968: };
[; ;pic18f27j13.h: 12969: struct {
[; ;pic18f27j13.h: 12970: unsigned :2;
[; ;pic18f27j13.h: 12971: unsigned RW1 :1;
[; ;pic18f27j13.h: 12972: };
[; ;pic18f27j13.h: 12973: struct {
[; ;pic18f27j13.h: 12974: unsigned :7;
[; ;pic18f27j13.h: 12975: unsigned SMP1 :1;
[; ;pic18f27j13.h: 12976: };
[; ;pic18f27j13.h: 12977: struct {
[; ;pic18f27j13.h: 12978: unsigned :3;
[; ;pic18f27j13.h: 12979: unsigned START :1;
[; ;pic18f27j13.h: 12980: };
[; ;pic18f27j13.h: 12981: struct {
[; ;pic18f27j13.h: 12982: unsigned :3;
[; ;pic18f27j13.h: 12983: unsigned START1 :1;
[; ;pic18f27j13.h: 12984: };
[; ;pic18f27j13.h: 12985: struct {
[; ;pic18f27j13.h: 12986: unsigned :4;
[; ;pic18f27j13.h: 12987: unsigned STOP :1;
[; ;pic18f27j13.h: 12988: };
[; ;pic18f27j13.h: 12989: struct {
[; ;pic18f27j13.h: 12990: unsigned :4;
[; ;pic18f27j13.h: 12991: unsigned STOP1 :1;
[; ;pic18f27j13.h: 12992: };
[; ;pic18f27j13.h: 12993: struct {
[; ;pic18f27j13.h: 12994: unsigned :1;
[; ;pic18f27j13.h: 12995: unsigned UA1 :1;
[; ;pic18f27j13.h: 12996: };
[; ;pic18f27j13.h: 12997: struct {
[; ;pic18f27j13.h: 12998: unsigned :2;
[; ;pic18f27j13.h: 12999: unsigned NOT_W :1;
[; ;pic18f27j13.h: 13000: };
[; ;pic18f27j13.h: 13001: struct {
[; ;pic18f27j13.h: 13002: unsigned :5;
[; ;pic18f27j13.h: 13003: unsigned NOT_A :1;
[; ;pic18f27j13.h: 13004: };
[; ;pic18f27j13.h: 13005: } SSP1STATbits_t;
[; ;pic18f27j13.h: 13006: extern volatile SSP1STATbits_t SSP1STATbits @ 0xFC7;
[; ;pic18f27j13.h: 13209: typedef union {
[; ;pic18f27j13.h: 13210: struct {
[; ;pic18f27j13.h: 13211: unsigned :2;
[; ;pic18f27j13.h: 13212: unsigned R_NOT_W :1;
[; ;pic18f27j13.h: 13213: };
[; ;pic18f27j13.h: 13214: struct {
[; ;pic18f27j13.h: 13215: unsigned :5;
[; ;pic18f27j13.h: 13216: unsigned D_NOT_A :1;
[; ;pic18f27j13.h: 13217: };
[; ;pic18f27j13.h: 13218: struct {
[; ;pic18f27j13.h: 13219: unsigned BF :1;
[; ;pic18f27j13.h: 13220: unsigned UA :1;
[; ;pic18f27j13.h: 13221: unsigned R_nW :1;
[; ;pic18f27j13.h: 13222: unsigned S :1;
[; ;pic18f27j13.h: 13223: unsigned P :1;
[; ;pic18f27j13.h: 13224: unsigned D_nA :1;
[; ;pic18f27j13.h: 13225: unsigned CKE :1;
[; ;pic18f27j13.h: 13226: unsigned SMP :1;
[; ;pic18f27j13.h: 13227: };
[; ;pic18f27j13.h: 13228: struct {
[; ;pic18f27j13.h: 13229: unsigned :2;
[; ;pic18f27j13.h: 13230: unsigned R :1;
[; ;pic18f27j13.h: 13231: unsigned :2;
[; ;pic18f27j13.h: 13232: unsigned D :1;
[; ;pic18f27j13.h: 13233: };
[; ;pic18f27j13.h: 13234: struct {
[; ;pic18f27j13.h: 13235: unsigned :2;
[; ;pic18f27j13.h: 13236: unsigned R_W :1;
[; ;pic18f27j13.h: 13237: unsigned :2;
[; ;pic18f27j13.h: 13238: unsigned D_A :1;
[; ;pic18f27j13.h: 13239: };
[; ;pic18f27j13.h: 13240: struct {
[; ;pic18f27j13.h: 13241: unsigned :2;
[; ;pic18f27j13.h: 13242: unsigned nW :1;
[; ;pic18f27j13.h: 13243: unsigned :2;
[; ;pic18f27j13.h: 13244: unsigned nA :1;
[; ;pic18f27j13.h: 13245: };
[; ;pic18f27j13.h: 13246: struct {
[; ;pic18f27j13.h: 13247: unsigned :2;
[; ;pic18f27j13.h: 13248: unsigned NOT_WRITE :1;
[; ;pic18f27j13.h: 13249: };
[; ;pic18f27j13.h: 13250: struct {
[; ;pic18f27j13.h: 13251: unsigned :5;
[; ;pic18f27j13.h: 13252: unsigned NOT_ADDRESS :1;
[; ;pic18f27j13.h: 13253: };
[; ;pic18f27j13.h: 13254: struct {
[; ;pic18f27j13.h: 13255: unsigned :2;
[; ;pic18f27j13.h: 13256: unsigned nWRITE :1;
[; ;pic18f27j13.h: 13257: unsigned :2;
[; ;pic18f27j13.h: 13258: unsigned nADDRESS :1;
[; ;pic18f27j13.h: 13259: };
[; ;pic18f27j13.h: 13260: struct {
[; ;pic18f27j13.h: 13261: unsigned :2;
[; ;pic18f27j13.h: 13262: unsigned READ_WRITE :1;
[; ;pic18f27j13.h: 13263: unsigned :2;
[; ;pic18f27j13.h: 13264: unsigned DATA_ADDRESS :1;
[; ;pic18f27j13.h: 13265: };
[; ;pic18f27j13.h: 13266: struct {
[; ;pic18f27j13.h: 13267: unsigned :2;
[; ;pic18f27j13.h: 13268: unsigned I2C_READ :1;
[; ;pic18f27j13.h: 13269: unsigned I2C_START :1;
[; ;pic18f27j13.h: 13270: unsigned I2C_STOP :1;
[; ;pic18f27j13.h: 13271: unsigned I2C_DAT :1;
[; ;pic18f27j13.h: 13272: };
[; ;pic18f27j13.h: 13273: struct {
[; ;pic18f27j13.h: 13274: unsigned BF1 :1;
[; ;pic18f27j13.h: 13275: };
[; ;pic18f27j13.h: 13276: struct {
[; ;pic18f27j13.h: 13277: unsigned :6;
[; ;pic18f27j13.h: 13278: unsigned CKE1 :1;
[; ;pic18f27j13.h: 13279: };
[; ;pic18f27j13.h: 13280: struct {
[; ;pic18f27j13.h: 13281: unsigned :5;
[; ;pic18f27j13.h: 13282: unsigned DA :1;
[; ;pic18f27j13.h: 13283: };
[; ;pic18f27j13.h: 13284: struct {
[; ;pic18f27j13.h: 13285: unsigned :5;
[; ;pic18f27j13.h: 13286: unsigned DA1 :1;
[; ;pic18f27j13.h: 13287: };
[; ;pic18f27j13.h: 13288: struct {
[; ;pic18f27j13.h: 13289: unsigned :2;
[; ;pic18f27j13.h: 13290: unsigned RW :1;
[; ;pic18f27j13.h: 13291: };
[; ;pic18f27j13.h: 13292: struct {
[; ;pic18f27j13.h: 13293: unsigned :2;
[; ;pic18f27j13.h: 13294: unsigned RW1 :1;
[; ;pic18f27j13.h: 13295: };
[; ;pic18f27j13.h: 13296: struct {
[; ;pic18f27j13.h: 13297: unsigned :7;
[; ;pic18f27j13.h: 13298: unsigned SMP1 :1;
[; ;pic18f27j13.h: 13299: };
[; ;pic18f27j13.h: 13300: struct {
[; ;pic18f27j13.h: 13301: unsigned :3;
[; ;pic18f27j13.h: 13302: unsigned START :1;
[; ;pic18f27j13.h: 13303: };
[; ;pic18f27j13.h: 13304: struct {
[; ;pic18f27j13.h: 13305: unsigned :3;
[; ;pic18f27j13.h: 13306: unsigned START1 :1;
[; ;pic18f27j13.h: 13307: };
[; ;pic18f27j13.h: 13308: struct {
[; ;pic18f27j13.h: 13309: unsigned :4;
[; ;pic18f27j13.h: 13310: unsigned STOP :1;
[; ;pic18f27j13.h: 13311: };
[; ;pic18f27j13.h: 13312: struct {
[; ;pic18f27j13.h: 13313: unsigned :4;
[; ;pic18f27j13.h: 13314: unsigned STOP1 :1;
[; ;pic18f27j13.h: 13315: };
[; ;pic18f27j13.h: 13316: struct {
[; ;pic18f27j13.h: 13317: unsigned :1;
[; ;pic18f27j13.h: 13318: unsigned UA1 :1;
[; ;pic18f27j13.h: 13319: };
[; ;pic18f27j13.h: 13320: struct {
[; ;pic18f27j13.h: 13321: unsigned :2;
[; ;pic18f27j13.h: 13322: unsigned NOT_W :1;
[; ;pic18f27j13.h: 13323: };
[; ;pic18f27j13.h: 13324: struct {
[; ;pic18f27j13.h: 13325: unsigned :5;
[; ;pic18f27j13.h: 13326: unsigned NOT_A :1;
[; ;pic18f27j13.h: 13327: };
[; ;pic18f27j13.h: 13328: } SSPSTATbits_t;
[; ;pic18f27j13.h: 13329: extern volatile SSPSTATbits_t SSPSTATbits @ 0xFC7;
[; ;pic18f27j13.h: 13533: extern volatile unsigned char SSP1ADD @ 0xFC8;
"13535
[; ;pic18f27j13.h: 13535: asm("SSP1ADD equ 0FC8h");
[; <" SSP1ADD equ 0FC8h ;# ">
[; ;pic18f27j13.h: 13538: extern volatile unsigned char SSPADD @ 0xFC8;
"13540
[; ;pic18f27j13.h: 13540: asm("SSPADD equ 0FC8h");
[; <" SSPADD equ 0FC8h ;# ">
[; ;pic18f27j13.h: 13543: typedef union {
[; ;pic18f27j13.h: 13544: struct {
[; ;pic18f27j13.h: 13545: unsigned SSPADD :8;
[; ;pic18f27j13.h: 13546: };
[; ;pic18f27j13.h: 13547: struct {
[; ;pic18f27j13.h: 13548: unsigned MSK0 :1;
[; ;pic18f27j13.h: 13549: };
[; ;pic18f27j13.h: 13550: struct {
[; ;pic18f27j13.h: 13551: unsigned MSK01 :1;
[; ;pic18f27j13.h: 13552: };
[; ;pic18f27j13.h: 13553: struct {
[; ;pic18f27j13.h: 13554: unsigned :1;
[; ;pic18f27j13.h: 13555: unsigned MSK1 :1;
[; ;pic18f27j13.h: 13556: };
[; ;pic18f27j13.h: 13557: struct {
[; ;pic18f27j13.h: 13558: unsigned :1;
[; ;pic18f27j13.h: 13559: unsigned MSK11 :1;
[; ;pic18f27j13.h: 13560: };
[; ;pic18f27j13.h: 13561: struct {
[; ;pic18f27j13.h: 13562: unsigned :2;
[; ;pic18f27j13.h: 13563: unsigned MSK2 :1;
[; ;pic18f27j13.h: 13564: };
[; ;pic18f27j13.h: 13565: struct {
[; ;pic18f27j13.h: 13566: unsigned :2;
[; ;pic18f27j13.h: 13567: unsigned MSK21 :1;
[; ;pic18f27j13.h: 13568: };
[; ;pic18f27j13.h: 13569: struct {
[; ;pic18f27j13.h: 13570: unsigned :3;
[; ;pic18f27j13.h: 13571: unsigned MSK3 :1;
[; ;pic18f27j13.h: 13572: };
[; ;pic18f27j13.h: 13573: struct {
[; ;pic18f27j13.h: 13574: unsigned :3;
[; ;pic18f27j13.h: 13575: unsigned MSK31 :1;
[; ;pic18f27j13.h: 13576: };
[; ;pic18f27j13.h: 13577: struct {
[; ;pic18f27j13.h: 13578: unsigned :4;
[; ;pic18f27j13.h: 13579: unsigned MSK4 :1;
[; ;pic18f27j13.h: 13580: };
[; ;pic18f27j13.h: 13581: struct {
[; ;pic18f27j13.h: 13582: unsigned :4;
[; ;pic18f27j13.h: 13583: unsigned MSK41 :1;
[; ;pic18f27j13.h: 13584: };
[; ;pic18f27j13.h: 13585: struct {
[; ;pic18f27j13.h: 13586: unsigned :5;
[; ;pic18f27j13.h: 13587: unsigned MSK5 :1;
[; ;pic18f27j13.h: 13588: };
[; ;pic18f27j13.h: 13589: struct {
[; ;pic18f27j13.h: 13590: unsigned :5;
[; ;pic18f27j13.h: 13591: unsigned MSK51 :1;
[; ;pic18f27j13.h: 13592: };
[; ;pic18f27j13.h: 13593: struct {
[; ;pic18f27j13.h: 13594: unsigned :6;
[; ;pic18f27j13.h: 13595: unsigned MSK6 :1;
[; ;pic18f27j13.h: 13596: };
[; ;pic18f27j13.h: 13597: struct {
[; ;pic18f27j13.h: 13598: unsigned :6;
[; ;pic18f27j13.h: 13599: unsigned MSK61 :1;
[; ;pic18f27j13.h: 13600: };
[; ;pic18f27j13.h: 13601: struct {
[; ;pic18f27j13.h: 13602: unsigned :7;
[; ;pic18f27j13.h: 13603: unsigned MSK7 :1;
[; ;pic18f27j13.h: 13604: };
[; ;pic18f27j13.h: 13605: struct {
[; ;pic18f27j13.h: 13606: unsigned :7;
[; ;pic18f27j13.h: 13607: unsigned MSK71 :1;
[; ;pic18f27j13.h: 13608: };
[; ;pic18f27j13.h: 13609: } SSP1ADDbits_t;
[; ;pic18f27j13.h: 13610: extern volatile SSP1ADDbits_t SSP1ADDbits @ 0xFC8;
[; ;pic18f27j13.h: 13698: typedef union {
[; ;pic18f27j13.h: 13699: struct {
[; ;pic18f27j13.h: 13700: unsigned SSPADD :8;
[; ;pic18f27j13.h: 13701: };
[; ;pic18f27j13.h: 13702: struct {
[; ;pic18f27j13.h: 13703: unsigned MSK0 :1;
[; ;pic18f27j13.h: 13704: };
[; ;pic18f27j13.h: 13705: struct {
[; ;pic18f27j13.h: 13706: unsigned MSK01 :1;
[; ;pic18f27j13.h: 13707: };
[; ;pic18f27j13.h: 13708: struct {
[; ;pic18f27j13.h: 13709: unsigned :1;
[; ;pic18f27j13.h: 13710: unsigned MSK1 :1;
[; ;pic18f27j13.h: 13711: };
[; ;pic18f27j13.h: 13712: struct {
[; ;pic18f27j13.h: 13713: unsigned :1;
[; ;pic18f27j13.h: 13714: unsigned MSK11 :1;
[; ;pic18f27j13.h: 13715: };
[; ;pic18f27j13.h: 13716: struct {
[; ;pic18f27j13.h: 13717: unsigned :2;
[; ;pic18f27j13.h: 13718: unsigned MSK2 :1;
[; ;pic18f27j13.h: 13719: };
[; ;pic18f27j13.h: 13720: struct {
[; ;pic18f27j13.h: 13721: unsigned :2;
[; ;pic18f27j13.h: 13722: unsigned MSK21 :1;
[; ;pic18f27j13.h: 13723: };
[; ;pic18f27j13.h: 13724: struct {
[; ;pic18f27j13.h: 13725: unsigned :3;
[; ;pic18f27j13.h: 13726: unsigned MSK3 :1;
[; ;pic18f27j13.h: 13727: };
[; ;pic18f27j13.h: 13728: struct {
[; ;pic18f27j13.h: 13729: unsigned :3;
[; ;pic18f27j13.h: 13730: unsigned MSK31 :1;
[; ;pic18f27j13.h: 13731: };
[; ;pic18f27j13.h: 13732: struct {
[; ;pic18f27j13.h: 13733: unsigned :4;
[; ;pic18f27j13.h: 13734: unsigned MSK4 :1;
[; ;pic18f27j13.h: 13735: };
[; ;pic18f27j13.h: 13736: struct {
[; ;pic18f27j13.h: 13737: unsigned :4;
[; ;pic18f27j13.h: 13738: unsigned MSK41 :1;
[; ;pic18f27j13.h: 13739: };
[; ;pic18f27j13.h: 13740: struct {
[; ;pic18f27j13.h: 13741: unsigned :5;
[; ;pic18f27j13.h: 13742: unsigned MSK5 :1;
[; ;pic18f27j13.h: 13743: };
[; ;pic18f27j13.h: 13744: struct {
[; ;pic18f27j13.h: 13745: unsigned :5;
[; ;pic18f27j13.h: 13746: unsigned MSK51 :1;
[; ;pic18f27j13.h: 13747: };
[; ;pic18f27j13.h: 13748: struct {
[; ;pic18f27j13.h: 13749: unsigned :6;
[; ;pic18f27j13.h: 13750: unsigned MSK6 :1;
[; ;pic18f27j13.h: 13751: };
[; ;pic18f27j13.h: 13752: struct {
[; ;pic18f27j13.h: 13753: unsigned :6;
[; ;pic18f27j13.h: 13754: unsigned MSK61 :1;
[; ;pic18f27j13.h: 13755: };
[; ;pic18f27j13.h: 13756: struct {
[; ;pic18f27j13.h: 13757: unsigned :7;
[; ;pic18f27j13.h: 13758: unsigned MSK7 :1;
[; ;pic18f27j13.h: 13759: };
[; ;pic18f27j13.h: 13760: struct {
[; ;pic18f27j13.h: 13761: unsigned :7;
[; ;pic18f27j13.h: 13762: unsigned MSK71 :1;
[; ;pic18f27j13.h: 13763: };
[; ;pic18f27j13.h: 13764: } SSPADDbits_t;
[; ;pic18f27j13.h: 13765: extern volatile SSPADDbits_t SSPADDbits @ 0xFC8;
[; ;pic18f27j13.h: 13854: extern volatile unsigned char SSP1MSK @ 0xFC8;
"13856
[; ;pic18f27j13.h: 13856: asm("SSP1MSK equ 0FC8h");
[; <" SSP1MSK equ 0FC8h ;# ">
[; ;pic18f27j13.h: 13859: typedef union {
[; ;pic18f27j13.h: 13860: struct {
[; ;pic18f27j13.h: 13861: unsigned MSK0 :1;
[; ;pic18f27j13.h: 13862: unsigned MSK1 :1;
[; ;pic18f27j13.h: 13863: unsigned MSK2 :1;
[; ;pic18f27j13.h: 13864: unsigned MSK3 :1;
[; ;pic18f27j13.h: 13865: unsigned MSK4 :1;
[; ;pic18f27j13.h: 13866: unsigned MSK5 :1;
[; ;pic18f27j13.h: 13867: unsigned MSK6 :1;
[; ;pic18f27j13.h: 13868: unsigned MSK7 :1;
[; ;pic18f27j13.h: 13869: };
[; ;pic18f27j13.h: 13870: } SSP1MSKbits_t;
[; ;pic18f27j13.h: 13871: extern volatile SSP1MSKbits_t SSP1MSKbits @ 0xFC8;
[; ;pic18f27j13.h: 13915: extern volatile unsigned char SSP1BUF @ 0xFC9;
"13917
[; ;pic18f27j13.h: 13917: asm("SSP1BUF equ 0FC9h");
[; <" SSP1BUF equ 0FC9h ;# ">
[; ;pic18f27j13.h: 13920: extern volatile unsigned char SSPBUF @ 0xFC9;
"13922
[; ;pic18f27j13.h: 13922: asm("SSPBUF equ 0FC9h");
[; <" SSPBUF equ 0FC9h ;# ">
[; ;pic18f27j13.h: 13925: typedef union {
[; ;pic18f27j13.h: 13926: struct {
[; ;pic18f27j13.h: 13927: unsigned SSPBUF :8;
[; ;pic18f27j13.h: 13928: };
[; ;pic18f27j13.h: 13929: } SSP1BUFbits_t;
[; ;pic18f27j13.h: 13930: extern volatile SSP1BUFbits_t SSP1BUFbits @ 0xFC9;
[; ;pic18f27j13.h: 13938: typedef union {
[; ;pic18f27j13.h: 13939: struct {
[; ;pic18f27j13.h: 13940: unsigned SSPBUF :8;
[; ;pic18f27j13.h: 13941: };
[; ;pic18f27j13.h: 13942: } SSPBUFbits_t;
[; ;pic18f27j13.h: 13943: extern volatile SSPBUFbits_t SSPBUFbits @ 0xFC9;
[; ;pic18f27j13.h: 13952: extern volatile unsigned char T2CON @ 0xFCA;
"13954
[; ;pic18f27j13.h: 13954: asm("T2CON equ 0FCAh");
[; <" T2CON equ 0FCAh ;# ">
[; ;pic18f27j13.h: 13957: typedef union {
[; ;pic18f27j13.h: 13958: struct {
[; ;pic18f27j13.h: 13959: unsigned T2CKPS :2;
[; ;pic18f27j13.h: 13960: unsigned TMR2ON :1;
[; ;pic18f27j13.h: 13961: unsigned T2OUTPS :4;
[; ;pic18f27j13.h: 13962: };
[; ;pic18f27j13.h: 13963: struct {
[; ;pic18f27j13.h: 13964: unsigned T2CKPS0 :1;
[; ;pic18f27j13.h: 13965: unsigned T2CKPS1 :1;
[; ;pic18f27j13.h: 13966: unsigned :1;
[; ;pic18f27j13.h: 13967: unsigned T2OUTPS0 :1;
[; ;pic18f27j13.h: 13968: unsigned T2OUTPS1 :1;
[; ;pic18f27j13.h: 13969: unsigned T2OUTPS2 :1;
[; ;pic18f27j13.h: 13970: unsigned T2OUTPS3 :1;
[; ;pic18f27j13.h: 13971: };
[; ;pic18f27j13.h: 13972: } T2CONbits_t;
[; ;pic18f27j13.h: 13973: extern volatile T2CONbits_t T2CONbits @ 0xFCA;
[; ;pic18f27j13.h: 14022: extern volatile unsigned char PR2 @ 0xFCB;
"14024
[; ;pic18f27j13.h: 14024: asm("PR2 equ 0FCBh");
[; <" PR2 equ 0FCBh ;# ">
[; ;pic18f27j13.h: 14027: extern volatile unsigned char MEMCON @ 0xFCB;
"14029
[; ;pic18f27j13.h: 14029: asm("MEMCON equ 0FCBh");
[; <" MEMCON equ 0FCBh ;# ">
[; ;pic18f27j13.h: 14032: typedef union {
[; ;pic18f27j13.h: 14033: struct {
[; ;pic18f27j13.h: 14034: unsigned PR2 :8;
[; ;pic18f27j13.h: 14035: };
[; ;pic18f27j13.h: 14036: } PR2bits_t;
[; ;pic18f27j13.h: 14037: extern volatile PR2bits_t PR2bits @ 0xFCB;
[; ;pic18f27j13.h: 14045: typedef union {
[; ;pic18f27j13.h: 14046: struct {
[; ;pic18f27j13.h: 14047: unsigned PR2 :8;
[; ;pic18f27j13.h: 14048: };
[; ;pic18f27j13.h: 14049: } MEMCONbits_t;
[; ;pic18f27j13.h: 14050: extern volatile MEMCONbits_t MEMCONbits @ 0xFCB;
[; ;pic18f27j13.h: 14059: extern volatile unsigned char TMR2 @ 0xFCC;
"14061
[; ;pic18f27j13.h: 14061: asm("TMR2 equ 0FCCh");
[; <" TMR2 equ 0FCCh ;# ">
[; ;pic18f27j13.h: 14064: typedef union {
[; ;pic18f27j13.h: 14065: struct {
[; ;pic18f27j13.h: 14066: unsigned TMR2 :8;
[; ;pic18f27j13.h: 14067: };
[; ;pic18f27j13.h: 14068: } TMR2bits_t;
[; ;pic18f27j13.h: 14069: extern volatile TMR2bits_t TMR2bits @ 0xFCC;
[; ;pic18f27j13.h: 14078: extern volatile unsigned char T1CON @ 0xFCD;
"14080
[; ;pic18f27j13.h: 14080: asm("T1CON equ 0FCDh");
[; <" T1CON equ 0FCDh ;# ">
[; ;pic18f27j13.h: 14083: typedef union {
[; ;pic18f27j13.h: 14084: struct {
[; ;pic18f27j13.h: 14085: unsigned :2;
[; ;pic18f27j13.h: 14086: unsigned NOT_T1SYNC :1;
[; ;pic18f27j13.h: 14087: };
[; ;pic18f27j13.h: 14088: struct {
[; ;pic18f27j13.h: 14089: unsigned TMR1ON :1;
[; ;pic18f27j13.h: 14090: unsigned RD16 :1;
[; ;pic18f27j13.h: 14091: unsigned nT1SYNC :1;
[; ;pic18f27j13.h: 14092: unsigned T1OSCEN :1;
[; ;pic18f27j13.h: 14093: unsigned T1CKPS :2;
[; ;pic18f27j13.h: 14094: unsigned TMR1CS :2;
[; ;pic18f27j13.h: 14095: };
[; ;pic18f27j13.h: 14096: struct {
[; ;pic18f27j13.h: 14097: unsigned :4;
[; ;pic18f27j13.h: 14098: unsigned T1CKPS0 :1;
[; ;pic18f27j13.h: 14099: unsigned T1CKPS1 :1;
[; ;pic18f27j13.h: 14100: unsigned TMR1CS0 :1;
[; ;pic18f27j13.h: 14101: unsigned TMR1CS1 :1;
[; ;pic18f27j13.h: 14102: };
[; ;pic18f27j13.h: 14103: struct {
[; ;pic18f27j13.h: 14104: unsigned :3;
[; ;pic18f27j13.h: 14105: unsigned SOSCEN :1;
[; ;pic18f27j13.h: 14106: };
[; ;pic18f27j13.h: 14107: struct {
[; ;pic18f27j13.h: 14108: unsigned :7;
[; ;pic18f27j13.h: 14109: unsigned T1RD16 :1;
[; ;pic18f27j13.h: 14110: };
[; ;pic18f27j13.h: 14111: } T1CONbits_t;
[; ;pic18f27j13.h: 14112: extern volatile T1CONbits_t T1CONbits @ 0xFCD;
[; ;pic18f27j13.h: 14181: extern volatile unsigned short TMR1 @ 0xFCE;
"14183
[; ;pic18f27j13.h: 14183: asm("TMR1 equ 0FCEh");
[; <" TMR1 equ 0FCEh ;# ">
[; ;pic18f27j13.h: 14187: extern volatile unsigned char TMR1L @ 0xFCE;
"14189
[; ;pic18f27j13.h: 14189: asm("TMR1L equ 0FCEh");
[; <" TMR1L equ 0FCEh ;# ">
[; ;pic18f27j13.h: 14192: typedef union {
[; ;pic18f27j13.h: 14193: struct {
[; ;pic18f27j13.h: 14194: unsigned TMR1L :8;
[; ;pic18f27j13.h: 14195: };
[; ;pic18f27j13.h: 14196: } TMR1Lbits_t;
[; ;pic18f27j13.h: 14197: extern volatile TMR1Lbits_t TMR1Lbits @ 0xFCE;
[; ;pic18f27j13.h: 14206: extern volatile unsigned char TMR1H @ 0xFCF;
"14208
[; ;pic18f27j13.h: 14208: asm("TMR1H equ 0FCFh");
[; <" TMR1H equ 0FCFh ;# ">
[; ;pic18f27j13.h: 14211: typedef union {
[; ;pic18f27j13.h: 14212: struct {
[; ;pic18f27j13.h: 14213: unsigned TMR1H :8;
[; ;pic18f27j13.h: 14214: };
[; ;pic18f27j13.h: 14215: } TMR1Hbits_t;
[; ;pic18f27j13.h: 14216: extern volatile TMR1Hbits_t TMR1Hbits @ 0xFCF;
[; ;pic18f27j13.h: 14225: extern volatile unsigned char RCON @ 0xFD0;
"14227
[; ;pic18f27j13.h: 14227: asm("RCON equ 0FD0h");
[; <" RCON equ 0FD0h ;# ">
[; ;pic18f27j13.h: 14230: typedef union {
[; ;pic18f27j13.h: 14231: struct {
[; ;pic18f27j13.h: 14232: unsigned NOT_BOR :1;
[; ;pic18f27j13.h: 14233: };
[; ;pic18f27j13.h: 14234: struct {
[; ;pic18f27j13.h: 14235: unsigned :1;
[; ;pic18f27j13.h: 14236: unsigned NOT_POR :1;
[; ;pic18f27j13.h: 14237: };
[; ;pic18f27j13.h: 14238: struct {
[; ;pic18f27j13.h: 14239: unsigned :2;
[; ;pic18f27j13.h: 14240: unsigned NOT_PD :1;
[; ;pic18f27j13.h: 14241: };
[; ;pic18f27j13.h: 14242: struct {
[; ;pic18f27j13.h: 14243: unsigned :3;
[; ;pic18f27j13.h: 14244: unsigned NOT_TO :1;
[; ;pic18f27j13.h: 14245: };
[; ;pic18f27j13.h: 14246: struct {
[; ;pic18f27j13.h: 14247: unsigned :4;
[; ;pic18f27j13.h: 14248: unsigned NOT_RI :1;
[; ;pic18f27j13.h: 14249: };
[; ;pic18f27j13.h: 14250: struct {
[; ;pic18f27j13.h: 14251: unsigned :5;
[; ;pic18f27j13.h: 14252: unsigned NOT_CM :1;
[; ;pic18f27j13.h: 14253: };
[; ;pic18f27j13.h: 14254: struct {
[; ;pic18f27j13.h: 14255: unsigned nBOR :1;
[; ;pic18f27j13.h: 14256: unsigned nPOR :1;
[; ;pic18f27j13.h: 14257: unsigned nPD :1;
[; ;pic18f27j13.h: 14258: unsigned nTO :1;
[; ;pic18f27j13.h: 14259: unsigned nRI :1;
[; ;pic18f27j13.h: 14260: unsigned nCM :1;
[; ;pic18f27j13.h: 14261: unsigned :1;
[; ;pic18f27j13.h: 14262: unsigned IPEN :1;
[; ;pic18f27j13.h: 14263: };
[; ;pic18f27j13.h: 14264: struct {
[; ;pic18f27j13.h: 14265: unsigned BOR :1;
[; ;pic18f27j13.h: 14266: unsigned POR :1;
[; ;pic18f27j13.h: 14267: unsigned PD :1;
[; ;pic18f27j13.h: 14268: unsigned TO :1;
[; ;pic18f27j13.h: 14269: unsigned RI :1;
[; ;pic18f27j13.h: 14270: unsigned CM :1;
[; ;pic18f27j13.h: 14271: };
[; ;pic18f27j13.h: 14272: } RCONbits_t;
[; ;pic18f27j13.h: 14273: extern volatile RCONbits_t RCONbits @ 0xFD0;
[; ;pic18f27j13.h: 14372: extern volatile unsigned char CM2CON @ 0xFD1;
"14374
[; ;pic18f27j13.h: 14374: asm("CM2CON equ 0FD1h");
[; <" CM2CON equ 0FD1h ;# ">
[; ;pic18f27j13.h: 14377: extern volatile unsigned char CM2CON1 @ 0xFD1;
"14379
[; ;pic18f27j13.h: 14379: asm("CM2CON1 equ 0FD1h");
[; <" CM2CON1 equ 0FD1h ;# ">
[; ;pic18f27j13.h: 14382: typedef union {
[; ;pic18f27j13.h: 14383: struct {
[; ;pic18f27j13.h: 14384: unsigned CCH :2;
[; ;pic18f27j13.h: 14385: unsigned CREF :1;
[; ;pic18f27j13.h: 14386: unsigned EVPOL :2;
[; ;pic18f27j13.h: 14387: unsigned CPOL :1;
[; ;pic18f27j13.h: 14388: unsigned COE :1;
[; ;pic18f27j13.h: 14389: unsigned CON :1;
[; ;pic18f27j13.h: 14390: };
[; ;pic18f27j13.h: 14391: struct {
[; ;pic18f27j13.h: 14392: unsigned CCH0 :1;
[; ;pic18f27j13.h: 14393: unsigned CCH1 :1;
[; ;pic18f27j13.h: 14394: unsigned :1;
[; ;pic18f27j13.h: 14395: unsigned EVPOL0 :1;
[; ;pic18f27j13.h: 14396: unsigned EVPOL1 :1;
[; ;pic18f27j13.h: 14397: };
[; ;pic18f27j13.h: 14398: struct {
[; ;pic18f27j13.h: 14399: unsigned CCH02 :1;
[; ;pic18f27j13.h: 14400: };
[; ;pic18f27j13.h: 14401: struct {
[; ;pic18f27j13.h: 14402: unsigned :1;
[; ;pic18f27j13.h: 14403: unsigned CCH12 :1;
[; ;pic18f27j13.h: 14404: };
[; ;pic18f27j13.h: 14405: struct {
[; ;pic18f27j13.h: 14406: unsigned :6;
[; ;pic18f27j13.h: 14407: unsigned COE2 :1;
[; ;pic18f27j13.h: 14408: };
[; ;pic18f27j13.h: 14409: struct {
[; ;pic18f27j13.h: 14410: unsigned :7;
[; ;pic18f27j13.h: 14411: unsigned CON2 :1;
[; ;pic18f27j13.h: 14412: };
[; ;pic18f27j13.h: 14413: struct {
[; ;pic18f27j13.h: 14414: unsigned :5;
[; ;pic18f27j13.h: 14415: unsigned CPOL2 :1;
[; ;pic18f27j13.h: 14416: };
[; ;pic18f27j13.h: 14417: struct {
[; ;pic18f27j13.h: 14418: unsigned :2;
[; ;pic18f27j13.h: 14419: unsigned CREF2 :1;
[; ;pic18f27j13.h: 14420: };
[; ;pic18f27j13.h: 14421: struct {
[; ;pic18f27j13.h: 14422: unsigned :3;
[; ;pic18f27j13.h: 14423: unsigned EVPOL02 :1;
[; ;pic18f27j13.h: 14424: };
[; ;pic18f27j13.h: 14425: struct {
[; ;pic18f27j13.h: 14426: unsigned :4;
[; ;pic18f27j13.h: 14427: unsigned EVPOL12 :1;
[; ;pic18f27j13.h: 14428: };
[; ;pic18f27j13.h: 14429: } CM2CONbits_t;
[; ;pic18f27j13.h: 14430: extern volatile CM2CONbits_t CM2CONbits @ 0xFD1;
[; ;pic18f27j13.h: 14523: typedef union {
[; ;pic18f27j13.h: 14524: struct {
[; ;pic18f27j13.h: 14525: unsigned CCH :2;
[; ;pic18f27j13.h: 14526: unsigned CREF :1;
[; ;pic18f27j13.h: 14527: unsigned EVPOL :2;
[; ;pic18f27j13.h: 14528: unsigned CPOL :1;
[; ;pic18f27j13.h: 14529: unsigned COE :1;
[; ;pic18f27j13.h: 14530: unsigned CON :1;
[; ;pic18f27j13.h: 14531: };
[; ;pic18f27j13.h: 14532: struct {
[; ;pic18f27j13.h: 14533: unsigned CCH0 :1;
[; ;pic18f27j13.h: 14534: unsigned CCH1 :1;
[; ;pic18f27j13.h: 14535: unsigned :1;
[; ;pic18f27j13.h: 14536: unsigned EVPOL0 :1;
[; ;pic18f27j13.h: 14537: unsigned EVPOL1 :1;
[; ;pic18f27j13.h: 14538: };
[; ;pic18f27j13.h: 14539: struct {
[; ;pic18f27j13.h: 14540: unsigned CCH02 :1;
[; ;pic18f27j13.h: 14541: };
[; ;pic18f27j13.h: 14542: struct {
[; ;pic18f27j13.h: 14543: unsigned :1;
[; ;pic18f27j13.h: 14544: unsigned CCH12 :1;
[; ;pic18f27j13.h: 14545: };
[; ;pic18f27j13.h: 14546: struct {
[; ;pic18f27j13.h: 14547: unsigned :6;
[; ;pic18f27j13.h: 14548: unsigned COE2 :1;
[; ;pic18f27j13.h: 14549: };
[; ;pic18f27j13.h: 14550: struct {
[; ;pic18f27j13.h: 14551: unsigned :7;
[; ;pic18f27j13.h: 14552: unsigned CON2 :1;
[; ;pic18f27j13.h: 14553: };
[; ;pic18f27j13.h: 14554: struct {
[; ;pic18f27j13.h: 14555: unsigned :5;
[; ;pic18f27j13.h: 14556: unsigned CPOL2 :1;
[; ;pic18f27j13.h: 14557: };
[; ;pic18f27j13.h: 14558: struct {
[; ;pic18f27j13.h: 14559: unsigned :2;
[; ;pic18f27j13.h: 14560: unsigned CREF2 :1;
[; ;pic18f27j13.h: 14561: };
[; ;pic18f27j13.h: 14562: struct {
[; ;pic18f27j13.h: 14563: unsigned :3;
[; ;pic18f27j13.h: 14564: unsigned EVPOL02 :1;
[; ;pic18f27j13.h: 14565: };
[; ;pic18f27j13.h: 14566: struct {
[; ;pic18f27j13.h: 14567: unsigned :4;
[; ;pic18f27j13.h: 14568: unsigned EVPOL12 :1;
[; ;pic18f27j13.h: 14569: };
[; ;pic18f27j13.h: 14570: } CM2CON1bits_t;
[; ;pic18f27j13.h: 14571: extern volatile CM2CON1bits_t CM2CON1bits @ 0xFD1;
[; ;pic18f27j13.h: 14665: extern volatile unsigned char CM1CON @ 0xFD2;
"14667
[; ;pic18f27j13.h: 14667: asm("CM1CON equ 0FD2h");
[; <" CM1CON equ 0FD2h ;# ">
[; ;pic18f27j13.h: 14670: extern volatile unsigned char CM1CON1 @ 0xFD2;
"14672
[; ;pic18f27j13.h: 14672: asm("CM1CON1 equ 0FD2h");
[; <" CM1CON1 equ 0FD2h ;# ">
[; ;pic18f27j13.h: 14675: typedef union {
[; ;pic18f27j13.h: 14676: struct {
[; ;pic18f27j13.h: 14677: unsigned CCH :2;
[; ;pic18f27j13.h: 14678: unsigned CREF :1;
[; ;pic18f27j13.h: 14679: unsigned EVPOL :2;
[; ;pic18f27j13.h: 14680: unsigned CPOL :1;
[; ;pic18f27j13.h: 14681: unsigned COE :1;
[; ;pic18f27j13.h: 14682: unsigned CON :1;
[; ;pic18f27j13.h: 14683: };
[; ;pic18f27j13.h: 14684: struct {
[; ;pic18f27j13.h: 14685: unsigned CCH0 :1;
[; ;pic18f27j13.h: 14686: unsigned CCH1 :1;
[; ;pic18f27j13.h: 14687: unsigned :1;
[; ;pic18f27j13.h: 14688: unsigned EVPOL0 :1;
[; ;pic18f27j13.h: 14689: unsigned EVPOL1 :1;
[; ;pic18f27j13.h: 14690: };
[; ;pic18f27j13.h: 14691: struct {
[; ;pic18f27j13.h: 14692: unsigned C1CH0 :1;
[; ;pic18f27j13.h: 14693: };
[; ;pic18f27j13.h: 14694: struct {
[; ;pic18f27j13.h: 14695: unsigned :1;
[; ;pic18f27j13.h: 14696: unsigned C1CH1 :1;
[; ;pic18f27j13.h: 14697: };
[; ;pic18f27j13.h: 14698: struct {
[; ;pic18f27j13.h: 14699: unsigned CCH01 :1;
[; ;pic18f27j13.h: 14700: };
[; ;pic18f27j13.h: 14701: struct {
[; ;pic18f27j13.h: 14702: unsigned :1;
[; ;pic18f27j13.h: 14703: unsigned CCH11 :1;
[; ;pic18f27j13.h: 14704: };
[; ;pic18f27j13.h: 14705: struct {
[; ;pic18f27j13.h: 14706: unsigned :6;
[; ;pic18f27j13.h: 14707: unsigned COE1 :1;
[; ;pic18f27j13.h: 14708: };
[; ;pic18f27j13.h: 14709: struct {
[; ;pic18f27j13.h: 14710: unsigned :7;
[; ;pic18f27j13.h: 14711: unsigned CON1 :1;
[; ;pic18f27j13.h: 14712: };
[; ;pic18f27j13.h: 14713: struct {
[; ;pic18f27j13.h: 14714: unsigned :5;
[; ;pic18f27j13.h: 14715: unsigned CPOL1 :1;
[; ;pic18f27j13.h: 14716: };
[; ;pic18f27j13.h: 14717: struct {
[; ;pic18f27j13.h: 14718: unsigned :2;
[; ;pic18f27j13.h: 14719: unsigned CREF1 :1;
[; ;pic18f27j13.h: 14720: };
[; ;pic18f27j13.h: 14721: struct {
[; ;pic18f27j13.h: 14722: unsigned :3;
[; ;pic18f27j13.h: 14723: unsigned EVPOL01 :1;
[; ;pic18f27j13.h: 14724: };
[; ;pic18f27j13.h: 14725: struct {
[; ;pic18f27j13.h: 14726: unsigned :4;
[; ;pic18f27j13.h: 14727: unsigned EVPOL11 :1;
[; ;pic18f27j13.h: 14728: };
[; ;pic18f27j13.h: 14729: } CM1CONbits_t;
[; ;pic18f27j13.h: 14730: extern volatile CM1CONbits_t CM1CONbits @ 0xFD2;
[; ;pic18f27j13.h: 14833: typedef union {
[; ;pic18f27j13.h: 14834: struct {
[; ;pic18f27j13.h: 14835: unsigned CCH :2;
[; ;pic18f27j13.h: 14836: unsigned CREF :1;
[; ;pic18f27j13.h: 14837: unsigned EVPOL :2;
[; ;pic18f27j13.h: 14838: unsigned CPOL :1;
[; ;pic18f27j13.h: 14839: unsigned COE :1;
[; ;pic18f27j13.h: 14840: unsigned CON :1;
[; ;pic18f27j13.h: 14841: };
[; ;pic18f27j13.h: 14842: struct {
[; ;pic18f27j13.h: 14843: unsigned CCH0 :1;
[; ;pic18f27j13.h: 14844: unsigned CCH1 :1;
[; ;pic18f27j13.h: 14845: unsigned :1;
[; ;pic18f27j13.h: 14846: unsigned EVPOL0 :1;
[; ;pic18f27j13.h: 14847: unsigned EVPOL1 :1;
[; ;pic18f27j13.h: 14848: };
[; ;pic18f27j13.h: 14849: struct {
[; ;pic18f27j13.h: 14850: unsigned C1CH0 :1;
[; ;pic18f27j13.h: 14851: };
[; ;pic18f27j13.h: 14852: struct {
[; ;pic18f27j13.h: 14853: unsigned :1;
[; ;pic18f27j13.h: 14854: unsigned C1CH1 :1;
[; ;pic18f27j13.h: 14855: };
[; ;pic18f27j13.h: 14856: struct {
[; ;pic18f27j13.h: 14857: unsigned CCH01 :1;
[; ;pic18f27j13.h: 14858: };
[; ;pic18f27j13.h: 14859: struct {
[; ;pic18f27j13.h: 14860: unsigned :1;
[; ;pic18f27j13.h: 14861: unsigned CCH11 :1;
[; ;pic18f27j13.h: 14862: };
[; ;pic18f27j13.h: 14863: struct {
[; ;pic18f27j13.h: 14864: unsigned :6;
[; ;pic18f27j13.h: 14865: unsigned COE1 :1;
[; ;pic18f27j13.h: 14866: };
[; ;pic18f27j13.h: 14867: struct {
[; ;pic18f27j13.h: 14868: unsigned :7;
[; ;pic18f27j13.h: 14869: unsigned CON1 :1;
[; ;pic18f27j13.h: 14870: };
[; ;pic18f27j13.h: 14871: struct {
[; ;pic18f27j13.h: 14872: unsigned :5;
[; ;pic18f27j13.h: 14873: unsigned CPOL1 :1;
[; ;pic18f27j13.h: 14874: };
[; ;pic18f27j13.h: 14875: struct {
[; ;pic18f27j13.h: 14876: unsigned :2;
[; ;pic18f27j13.h: 14877: unsigned CREF1 :1;
[; ;pic18f27j13.h: 14878: };
[; ;pic18f27j13.h: 14879: struct {
[; ;pic18f27j13.h: 14880: unsigned :3;
[; ;pic18f27j13.h: 14881: unsigned EVPOL01 :1;
[; ;pic18f27j13.h: 14882: };
[; ;pic18f27j13.h: 14883: struct {
[; ;pic18f27j13.h: 14884: unsigned :4;
[; ;pic18f27j13.h: 14885: unsigned EVPOL11 :1;
[; ;pic18f27j13.h: 14886: };
[; ;pic18f27j13.h: 14887: } CM1CON1bits_t;
[; ;pic18f27j13.h: 14888: extern volatile CM1CON1bits_t CM1CON1bits @ 0xFD2;
[; ;pic18f27j13.h: 14992: extern volatile unsigned char OSCCON @ 0xFD3;
"14994
[; ;pic18f27j13.h: 14994: asm("OSCCON equ 0FD3h");
[; <" OSCCON equ 0FD3h ;# ">
[; ;pic18f27j13.h: 14997: typedef union {
[; ;pic18f27j13.h: 14998: struct {
[; ;pic18f27j13.h: 14999: unsigned SCS :2;
[; ;pic18f27j13.h: 15000: unsigned :1;
[; ;pic18f27j13.h: 15001: unsigned OSTS :1;
[; ;pic18f27j13.h: 15002: unsigned IRCF :3;
[; ;pic18f27j13.h: 15003: unsigned IDLEN :1;
[; ;pic18f27j13.h: 15004: };
[; ;pic18f27j13.h: 15005: struct {
[; ;pic18f27j13.h: 15006: unsigned SCS0 :1;
[; ;pic18f27j13.h: 15007: unsigned SCS1 :1;
[; ;pic18f27j13.h: 15008: unsigned :2;
[; ;pic18f27j13.h: 15009: unsigned IRCF0 :1;
[; ;pic18f27j13.h: 15010: unsigned IRCF1 :1;
[; ;pic18f27j13.h: 15011: unsigned IRCF2 :1;
[; ;pic18f27j13.h: 15012: };
[; ;pic18f27j13.h: 15013: } OSCCONbits_t;
[; ;pic18f27j13.h: 15014: extern volatile OSCCONbits_t OSCCONbits @ 0xFD3;
[; ;pic18f27j13.h: 15063: extern volatile unsigned char T0CON @ 0xFD5;
"15065
[; ;pic18f27j13.h: 15065: asm("T0CON equ 0FD5h");
[; <" T0CON equ 0FD5h ;# ">
[; ;pic18f27j13.h: 15068: typedef union {
[; ;pic18f27j13.h: 15069: struct {
[; ;pic18f27j13.h: 15070: unsigned T0PS :3;
[; ;pic18f27j13.h: 15071: unsigned PSA :1;
[; ;pic18f27j13.h: 15072: unsigned T0SE :1;
[; ;pic18f27j13.h: 15073: unsigned T0CS :1;
[; ;pic18f27j13.h: 15074: unsigned T08BIT :1;
[; ;pic18f27j13.h: 15075: unsigned TMR0ON :1;
[; ;pic18f27j13.h: 15076: };
[; ;pic18f27j13.h: 15077: struct {
[; ;pic18f27j13.h: 15078: unsigned T0PS0 :1;
[; ;pic18f27j13.h: 15079: unsigned T0PS1 :1;
[; ;pic18f27j13.h: 15080: unsigned T0PS2 :1;
[; ;pic18f27j13.h: 15081: };
[; ;pic18f27j13.h: 15082: } T0CONbits_t;
[; ;pic18f27j13.h: 15083: extern volatile T0CONbits_t T0CONbits @ 0xFD5;
[; ;pic18f27j13.h: 15132: extern volatile unsigned short TMR0 @ 0xFD6;
"15134
[; ;pic18f27j13.h: 15134: asm("TMR0 equ 0FD6h");
[; <" TMR0 equ 0FD6h ;# ">
[; ;pic18f27j13.h: 15138: extern volatile unsigned char TMR0L @ 0xFD6;
"15140
[; ;pic18f27j13.h: 15140: asm("TMR0L equ 0FD6h");
[; <" TMR0L equ 0FD6h ;# ">
[; ;pic18f27j13.h: 15143: typedef union {
[; ;pic18f27j13.h: 15144: struct {
[; ;pic18f27j13.h: 15145: unsigned TMR0L :8;
[; ;pic18f27j13.h: 15146: };
[; ;pic18f27j13.h: 15147: } TMR0Lbits_t;
[; ;pic18f27j13.h: 15148: extern volatile TMR0Lbits_t TMR0Lbits @ 0xFD6;
[; ;pic18f27j13.h: 15157: extern volatile unsigned char TMR0H @ 0xFD7;
"15159
[; ;pic18f27j13.h: 15159: asm("TMR0H equ 0FD7h");
[; <" TMR0H equ 0FD7h ;# ">
[; ;pic18f27j13.h: 15162: typedef union {
[; ;pic18f27j13.h: 15163: struct {
[; ;pic18f27j13.h: 15164: unsigned TMR0H :8;
[; ;pic18f27j13.h: 15165: };
[; ;pic18f27j13.h: 15166: } TMR0Hbits_t;
[; ;pic18f27j13.h: 15167: extern volatile TMR0Hbits_t TMR0Hbits @ 0xFD7;
[; ;pic18f27j13.h: 15176: extern volatile unsigned char STATUS @ 0xFD8;
"15178
[; ;pic18f27j13.h: 15178: asm("STATUS equ 0FD8h");
[; <" STATUS equ 0FD8h ;# ">
[; ;pic18f27j13.h: 15181: typedef union {
[; ;pic18f27j13.h: 15182: struct {
[; ;pic18f27j13.h: 15183: unsigned C :1;
[; ;pic18f27j13.h: 15184: unsigned DC :1;
[; ;pic18f27j13.h: 15185: unsigned Z :1;
[; ;pic18f27j13.h: 15186: unsigned OV :1;
[; ;pic18f27j13.h: 15187: unsigned N :1;
[; ;pic18f27j13.h: 15188: };
[; ;pic18f27j13.h: 15189: struct {
[; ;pic18f27j13.h: 15190: unsigned CARRY :1;
[; ;pic18f27j13.h: 15191: };
[; ;pic18f27j13.h: 15192: struct {
[; ;pic18f27j13.h: 15193: unsigned :4;
[; ;pic18f27j13.h: 15194: unsigned NEGATIVE :1;
[; ;pic18f27j13.h: 15195: };
[; ;pic18f27j13.h: 15196: struct {
[; ;pic18f27j13.h: 15197: unsigned :3;
[; ;pic18f27j13.h: 15198: unsigned OVERFLOW :1;
[; ;pic18f27j13.h: 15199: };
[; ;pic18f27j13.h: 15200: struct {
[; ;pic18f27j13.h: 15201: unsigned :2;
[; ;pic18f27j13.h: 15202: unsigned ZERO :1;
[; ;pic18f27j13.h: 15203: };
[; ;pic18f27j13.h: 15204: } STATUSbits_t;
[; ;pic18f27j13.h: 15205: extern volatile STATUSbits_t STATUSbits @ 0xFD8;
[; ;pic18f27j13.h: 15254: extern volatile unsigned short FSR2 @ 0xFD9;
"15256
[; ;pic18f27j13.h: 15256: asm("FSR2 equ 0FD9h");
[; <" FSR2 equ 0FD9h ;# ">
[; ;pic18f27j13.h: 15260: extern volatile unsigned char FSR2L @ 0xFD9;
"15262
[; ;pic18f27j13.h: 15262: asm("FSR2L equ 0FD9h");
[; <" FSR2L equ 0FD9h ;# ">
[; ;pic18f27j13.h: 15265: typedef union {
[; ;pic18f27j13.h: 15266: struct {
[; ;pic18f27j13.h: 15267: unsigned FSR2L :8;
[; ;pic18f27j13.h: 15268: };
[; ;pic18f27j13.h: 15269: } FSR2Lbits_t;
[; ;pic18f27j13.h: 15270: extern volatile FSR2Lbits_t FSR2Lbits @ 0xFD9;
[; ;pic18f27j13.h: 15279: extern volatile unsigned char FSR2H @ 0xFDA;
"15281
[; ;pic18f27j13.h: 15281: asm("FSR2H equ 0FDAh");
[; <" FSR2H equ 0FDAh ;# ">
[; ;pic18f27j13.h: 15285: extern volatile unsigned char PLUSW2 @ 0xFDB;
"15287
[; ;pic18f27j13.h: 15287: asm("PLUSW2 equ 0FDBh");
[; <" PLUSW2 equ 0FDBh ;# ">
[; ;pic18f27j13.h: 15290: typedef union {
[; ;pic18f27j13.h: 15291: struct {
[; ;pic18f27j13.h: 15292: unsigned PLUSW2 :8;
[; ;pic18f27j13.h: 15293: };
[; ;pic18f27j13.h: 15294: } PLUSW2bits_t;
[; ;pic18f27j13.h: 15295: extern volatile PLUSW2bits_t PLUSW2bits @ 0xFDB;
[; ;pic18f27j13.h: 15304: extern volatile unsigned char PREINC2 @ 0xFDC;
"15306
[; ;pic18f27j13.h: 15306: asm("PREINC2 equ 0FDCh");
[; <" PREINC2 equ 0FDCh ;# ">
[; ;pic18f27j13.h: 15309: typedef union {
[; ;pic18f27j13.h: 15310: struct {
[; ;pic18f27j13.h: 15311: unsigned PREINC2 :8;
[; ;pic18f27j13.h: 15312: };
[; ;pic18f27j13.h: 15313: } PREINC2bits_t;
[; ;pic18f27j13.h: 15314: extern volatile PREINC2bits_t PREINC2bits @ 0xFDC;
[; ;pic18f27j13.h: 15323: extern volatile unsigned char POSTDEC2 @ 0xFDD;
"15325
[; ;pic18f27j13.h: 15325: asm("POSTDEC2 equ 0FDDh");
[; <" POSTDEC2 equ 0FDDh ;# ">
[; ;pic18f27j13.h: 15328: typedef union {
[; ;pic18f27j13.h: 15329: struct {
[; ;pic18f27j13.h: 15330: unsigned POSTDEC2 :8;
[; ;pic18f27j13.h: 15331: };
[; ;pic18f27j13.h: 15332: } POSTDEC2bits_t;
[; ;pic18f27j13.h: 15333: extern volatile POSTDEC2bits_t POSTDEC2bits @ 0xFDD;
[; ;pic18f27j13.h: 15342: extern volatile unsigned char POSTINC2 @ 0xFDE;
"15344
[; ;pic18f27j13.h: 15344: asm("POSTINC2 equ 0FDEh");
[; <" POSTINC2 equ 0FDEh ;# ">
[; ;pic18f27j13.h: 15347: typedef union {
[; ;pic18f27j13.h: 15348: struct {
[; ;pic18f27j13.h: 15349: unsigned POSTINC2 :8;
[; ;pic18f27j13.h: 15350: };
[; ;pic18f27j13.h: 15351: } POSTINC2bits_t;
[; ;pic18f27j13.h: 15352: extern volatile POSTINC2bits_t POSTINC2bits @ 0xFDE;
[; ;pic18f27j13.h: 15361: extern volatile unsigned char INDF2 @ 0xFDF;
"15363
[; ;pic18f27j13.h: 15363: asm("INDF2 equ 0FDFh");
[; <" INDF2 equ 0FDFh ;# ">
[; ;pic18f27j13.h: 15366: typedef union {
[; ;pic18f27j13.h: 15367: struct {
[; ;pic18f27j13.h: 15368: unsigned INDF2 :8;
[; ;pic18f27j13.h: 15369: };
[; ;pic18f27j13.h: 15370: } INDF2bits_t;
[; ;pic18f27j13.h: 15371: extern volatile INDF2bits_t INDF2bits @ 0xFDF;
[; ;pic18f27j13.h: 15380: extern volatile unsigned char BSR @ 0xFE0;
"15382
[; ;pic18f27j13.h: 15382: asm("BSR equ 0FE0h");
[; <" BSR equ 0FE0h ;# ">
[; ;pic18f27j13.h: 15386: extern volatile unsigned short FSR1 @ 0xFE1;
"15388
[; ;pic18f27j13.h: 15388: asm("FSR1 equ 0FE1h");
[; <" FSR1 equ 0FE1h ;# ">
[; ;pic18f27j13.h: 15392: extern volatile unsigned char FSR1L @ 0xFE1;
"15394
[; ;pic18f27j13.h: 15394: asm("FSR1L equ 0FE1h");
[; <" FSR1L equ 0FE1h ;# ">
[; ;pic18f27j13.h: 15397: typedef union {
[; ;pic18f27j13.h: 15398: struct {
[; ;pic18f27j13.h: 15399: unsigned FSR1L :8;
[; ;pic18f27j13.h: 15400: };
[; ;pic18f27j13.h: 15401: } FSR1Lbits_t;
[; ;pic18f27j13.h: 15402: extern volatile FSR1Lbits_t FSR1Lbits @ 0xFE1;
[; ;pic18f27j13.h: 15411: extern volatile unsigned char FSR1H @ 0xFE2;
"15413
[; ;pic18f27j13.h: 15413: asm("FSR1H equ 0FE2h");
[; <" FSR1H equ 0FE2h ;# ">
[; ;pic18f27j13.h: 15417: extern volatile unsigned char PLUSW1 @ 0xFE3;
"15419
[; ;pic18f27j13.h: 15419: asm("PLUSW1 equ 0FE3h");
[; <" PLUSW1 equ 0FE3h ;# ">
[; ;pic18f27j13.h: 15422: typedef union {
[; ;pic18f27j13.h: 15423: struct {
[; ;pic18f27j13.h: 15424: unsigned PLUSW1 :8;
[; ;pic18f27j13.h: 15425: };
[; ;pic18f27j13.h: 15426: } PLUSW1bits_t;
[; ;pic18f27j13.h: 15427: extern volatile PLUSW1bits_t PLUSW1bits @ 0xFE3;
[; ;pic18f27j13.h: 15436: extern volatile unsigned char PREINC1 @ 0xFE4;
"15438
[; ;pic18f27j13.h: 15438: asm("PREINC1 equ 0FE4h");
[; <" PREINC1 equ 0FE4h ;# ">
[; ;pic18f27j13.h: 15441: typedef union {
[; ;pic18f27j13.h: 15442: struct {
[; ;pic18f27j13.h: 15443: unsigned PREINC1 :8;
[; ;pic18f27j13.h: 15444: };
[; ;pic18f27j13.h: 15445: } PREINC1bits_t;
[; ;pic18f27j13.h: 15446: extern volatile PREINC1bits_t PREINC1bits @ 0xFE4;
[; ;pic18f27j13.h: 15455: extern volatile unsigned char POSTDEC1 @ 0xFE5;
"15457
[; ;pic18f27j13.h: 15457: asm("POSTDEC1 equ 0FE5h");
[; <" POSTDEC1 equ 0FE5h ;# ">
[; ;pic18f27j13.h: 15460: typedef union {
[; ;pic18f27j13.h: 15461: struct {
[; ;pic18f27j13.h: 15462: unsigned POSTDEC1 :8;
[; ;pic18f27j13.h: 15463: };
[; ;pic18f27j13.h: 15464: } POSTDEC1bits_t;
[; ;pic18f27j13.h: 15465: extern volatile POSTDEC1bits_t POSTDEC1bits @ 0xFE5;
[; ;pic18f27j13.h: 15474: extern volatile unsigned char POSTINC1 @ 0xFE6;
"15476
[; ;pic18f27j13.h: 15476: asm("POSTINC1 equ 0FE6h");
[; <" POSTINC1 equ 0FE6h ;# ">
[; ;pic18f27j13.h: 15479: typedef union {
[; ;pic18f27j13.h: 15480: struct {
[; ;pic18f27j13.h: 15481: unsigned POSTINC1 :8;
[; ;pic18f27j13.h: 15482: };
[; ;pic18f27j13.h: 15483: } POSTINC1bits_t;
[; ;pic18f27j13.h: 15484: extern volatile POSTINC1bits_t POSTINC1bits @ 0xFE6;
[; ;pic18f27j13.h: 15493: extern volatile unsigned char INDF1 @ 0xFE7;
"15495
[; ;pic18f27j13.h: 15495: asm("INDF1 equ 0FE7h");
[; <" INDF1 equ 0FE7h ;# ">
[; ;pic18f27j13.h: 15498: typedef union {
[; ;pic18f27j13.h: 15499: struct {
[; ;pic18f27j13.h: 15500: unsigned INDF1 :8;
[; ;pic18f27j13.h: 15501: };
[; ;pic18f27j13.h: 15502: } INDF1bits_t;
[; ;pic18f27j13.h: 15503: extern volatile INDF1bits_t INDF1bits @ 0xFE7;
[; ;pic18f27j13.h: 15512: extern volatile unsigned char WREG @ 0xFE8;
"15514
[; ;pic18f27j13.h: 15514: asm("WREG equ 0FE8h");
[; <" WREG equ 0FE8h ;# ">
[; ;pic18f27j13.h: 15517: typedef union {
[; ;pic18f27j13.h: 15518: struct {
[; ;pic18f27j13.h: 15519: unsigned WREG :8;
[; ;pic18f27j13.h: 15520: };
[; ;pic18f27j13.h: 15521: } WREGbits_t;
[; ;pic18f27j13.h: 15522: extern volatile WREGbits_t WREGbits @ 0xFE8;
[; ;pic18f27j13.h: 15531: extern volatile unsigned short FSR0 @ 0xFE9;
"15533
[; ;pic18f27j13.h: 15533: asm("FSR0 equ 0FE9h");
[; <" FSR0 equ 0FE9h ;# ">
[; ;pic18f27j13.h: 15537: extern volatile unsigned char FSR0L @ 0xFE9;
"15539
[; ;pic18f27j13.h: 15539: asm("FSR0L equ 0FE9h");
[; <" FSR0L equ 0FE9h ;# ">
[; ;pic18f27j13.h: 15542: typedef union {
[; ;pic18f27j13.h: 15543: struct {
[; ;pic18f27j13.h: 15544: unsigned FSR0L :8;
[; ;pic18f27j13.h: 15545: };
[; ;pic18f27j13.h: 15546: } FSR0Lbits_t;
[; ;pic18f27j13.h: 15547: extern volatile FSR0Lbits_t FSR0Lbits @ 0xFE9;
[; ;pic18f27j13.h: 15556: extern volatile unsigned char FSR0H @ 0xFEA;
"15558
[; ;pic18f27j13.h: 15558: asm("FSR0H equ 0FEAh");
[; <" FSR0H equ 0FEAh ;# ">
[; ;pic18f27j13.h: 15562: extern volatile unsigned char PLUSW0 @ 0xFEB;
"15564
[; ;pic18f27j13.h: 15564: asm("PLUSW0 equ 0FEBh");
[; <" PLUSW0 equ 0FEBh ;# ">
[; ;pic18f27j13.h: 15567: typedef union {
[; ;pic18f27j13.h: 15568: struct {
[; ;pic18f27j13.h: 15569: unsigned PLUSW0 :8;
[; ;pic18f27j13.h: 15570: };
[; ;pic18f27j13.h: 15571: } PLUSW0bits_t;
[; ;pic18f27j13.h: 15572: extern volatile PLUSW0bits_t PLUSW0bits @ 0xFEB;
[; ;pic18f27j13.h: 15581: extern volatile unsigned char PREINC0 @ 0xFEC;
"15583
[; ;pic18f27j13.h: 15583: asm("PREINC0 equ 0FECh");
[; <" PREINC0 equ 0FECh ;# ">
[; ;pic18f27j13.h: 15586: typedef union {
[; ;pic18f27j13.h: 15587: struct {
[; ;pic18f27j13.h: 15588: unsigned PREINC0 :8;
[; ;pic18f27j13.h: 15589: };
[; ;pic18f27j13.h: 15590: } PREINC0bits_t;
[; ;pic18f27j13.h: 15591: extern volatile PREINC0bits_t PREINC0bits @ 0xFEC;
[; ;pic18f27j13.h: 15600: extern volatile unsigned char POSTDEC0 @ 0xFED;
"15602
[; ;pic18f27j13.h: 15602: asm("POSTDEC0 equ 0FEDh");
[; <" POSTDEC0 equ 0FEDh ;# ">
[; ;pic18f27j13.h: 15605: typedef union {
[; ;pic18f27j13.h: 15606: struct {
[; ;pic18f27j13.h: 15607: unsigned POSTDEC0 :8;
[; ;pic18f27j13.h: 15608: };
[; ;pic18f27j13.h: 15609: } POSTDEC0bits_t;
[; ;pic18f27j13.h: 15610: extern volatile POSTDEC0bits_t POSTDEC0bits @ 0xFED;
[; ;pic18f27j13.h: 15619: extern volatile unsigned char POSTINC0 @ 0xFEE;
"15621
[; ;pic18f27j13.h: 15621: asm("POSTINC0 equ 0FEEh");
[; <" POSTINC0 equ 0FEEh ;# ">
[; ;pic18f27j13.h: 15624: typedef union {
[; ;pic18f27j13.h: 15625: struct {
[; ;pic18f27j13.h: 15626: unsigned POSTINC0 :8;
[; ;pic18f27j13.h: 15627: };
[; ;pic18f27j13.h: 15628: } POSTINC0bits_t;
[; ;pic18f27j13.h: 15629: extern volatile POSTINC0bits_t POSTINC0bits @ 0xFEE;
[; ;pic18f27j13.h: 15638: extern volatile unsigned char INDF0 @ 0xFEF;
"15640
[; ;pic18f27j13.h: 15640: asm("INDF0 equ 0FEFh");
[; <" INDF0 equ 0FEFh ;# ">
[; ;pic18f27j13.h: 15643: typedef union {
[; ;pic18f27j13.h: 15644: struct {
[; ;pic18f27j13.h: 15645: unsigned INDF0 :8;
[; ;pic18f27j13.h: 15646: };
[; ;pic18f27j13.h: 15647: } INDF0bits_t;
[; ;pic18f27j13.h: 15648: extern volatile INDF0bits_t INDF0bits @ 0xFEF;
[; ;pic18f27j13.h: 15657: extern volatile unsigned char INTCON3 @ 0xFF0;
"15659
[; ;pic18f27j13.h: 15659: asm("INTCON3 equ 0FF0h");
[; <" INTCON3 equ 0FF0h ;# ">
[; ;pic18f27j13.h: 15662: typedef union {
[; ;pic18f27j13.h: 15663: struct {
[; ;pic18f27j13.h: 15664: unsigned INT1IF :1;
[; ;pic18f27j13.h: 15665: unsigned INT2IF :1;
[; ;pic18f27j13.h: 15666: unsigned INT3IF :1;
[; ;pic18f27j13.h: 15667: unsigned INT1IE :1;
[; ;pic18f27j13.h: 15668: unsigned INT2IE :1;
[; ;pic18f27j13.h: 15669: unsigned INT3IE :1;
[; ;pic18f27j13.h: 15670: unsigned INT1IP :1;
[; ;pic18f27j13.h: 15671: unsigned INT2IP :1;
[; ;pic18f27j13.h: 15672: };
[; ;pic18f27j13.h: 15673: struct {
[; ;pic18f27j13.h: 15674: unsigned INT1F :1;
[; ;pic18f27j13.h: 15675: unsigned INT2F :1;
[; ;pic18f27j13.h: 15676: unsigned INT3F :1;
[; ;pic18f27j13.h: 15677: unsigned INT1E :1;
[; ;pic18f27j13.h: 15678: unsigned INT2E :1;
[; ;pic18f27j13.h: 15679: unsigned INT3E :1;
[; ;pic18f27j13.h: 15680: unsigned INT1P :1;
[; ;pic18f27j13.h: 15681: unsigned INT2P :1;
[; ;pic18f27j13.h: 15682: };
[; ;pic18f27j13.h: 15683: } INTCON3bits_t;
[; ;pic18f27j13.h: 15684: extern volatile INTCON3bits_t INTCON3bits @ 0xFF0;
[; ;pic18f27j13.h: 15768: extern volatile unsigned char INTCON2 @ 0xFF1;
"15770
[; ;pic18f27j13.h: 15770: asm("INTCON2 equ 0FF1h");
[; <" INTCON2 equ 0FF1h ;# ">
[; ;pic18f27j13.h: 15773: typedef union {
[; ;pic18f27j13.h: 15774: struct {
[; ;pic18f27j13.h: 15775: unsigned :7;
[; ;pic18f27j13.h: 15776: unsigned NOT_RBPU :1;
[; ;pic18f27j13.h: 15777: };
[; ;pic18f27j13.h: 15778: struct {
[; ;pic18f27j13.h: 15779: unsigned RBIP :1;
[; ;pic18f27j13.h: 15780: unsigned INT3IP :1;
[; ;pic18f27j13.h: 15781: unsigned TMR0IP :1;
[; ;pic18f27j13.h: 15782: unsigned INTEDG3 :1;
[; ;pic18f27j13.h: 15783: unsigned INTEDG2 :1;
[; ;pic18f27j13.h: 15784: unsigned INTEDG1 :1;
[; ;pic18f27j13.h: 15785: unsigned INTEDG0 :1;
[; ;pic18f27j13.h: 15786: unsigned nRBPU :1;
[; ;pic18f27j13.h: 15787: };
[; ;pic18f27j13.h: 15788: struct {
[; ;pic18f27j13.h: 15789: unsigned :1;
[; ;pic18f27j13.h: 15790: unsigned INT3P :1;
[; ;pic18f27j13.h: 15791: unsigned T0IP :1;
[; ;pic18f27j13.h: 15792: unsigned :4;
[; ;pic18f27j13.h: 15793: unsigned RBPU :1;
[; ;pic18f27j13.h: 15794: };
[; ;pic18f27j13.h: 15795: } INTCON2bits_t;
[; ;pic18f27j13.h: 15796: extern volatile INTCON2bits_t INTCON2bits @ 0xFF1;
[; ;pic18f27j13.h: 15860: extern volatile unsigned char INTCON @ 0xFF2;
"15862
[; ;pic18f27j13.h: 15862: asm("INTCON equ 0FF2h");
[; <" INTCON equ 0FF2h ;# ">
[; ;pic18f27j13.h: 15865: typedef union {
[; ;pic18f27j13.h: 15866: struct {
[; ;pic18f27j13.h: 15867: unsigned RBIF :1;
[; ;pic18f27j13.h: 15868: unsigned INT0IF :1;
[; ;pic18f27j13.h: 15869: unsigned TMR0IF :1;
[; ;pic18f27j13.h: 15870: unsigned RBIE :1;
[; ;pic18f27j13.h: 15871: unsigned INT0IE :1;
[; ;pic18f27j13.h: 15872: unsigned TMR0IE :1;
[; ;pic18f27j13.h: 15873: unsigned PEIE_GIEL :1;
[; ;pic18f27j13.h: 15874: unsigned GIE_GIEH :1;
[; ;pic18f27j13.h: 15875: };
[; ;pic18f27j13.h: 15876: struct {
[; ;pic18f27j13.h: 15877: unsigned :1;
[; ;pic18f27j13.h: 15878: unsigned INT0F :1;
[; ;pic18f27j13.h: 15879: unsigned T0IF :1;
[; ;pic18f27j13.h: 15880: unsigned :1;
[; ;pic18f27j13.h: 15881: unsigned INT0E :1;
[; ;pic18f27j13.h: 15882: unsigned T0IE :1;
[; ;pic18f27j13.h: 15883: unsigned PEIE :1;
[; ;pic18f27j13.h: 15884: unsigned GIE :1;
[; ;pic18f27j13.h: 15885: };
[; ;pic18f27j13.h: 15886: struct {
[; ;pic18f27j13.h: 15887: unsigned :6;
[; ;pic18f27j13.h: 15888: unsigned GIEL :1;
[; ;pic18f27j13.h: 15889: unsigned GIEH :1;
[; ;pic18f27j13.h: 15890: };
[; ;pic18f27j13.h: 15891: struct {
[; ;pic18f27j13.h: 15892: unsigned :1;
[; ;pic18f27j13.h: 15893: unsigned INT0F :1;
[; ;pic18f27j13.h: 15894: unsigned T0IF :1;
[; ;pic18f27j13.h: 15895: unsigned :1;
[; ;pic18f27j13.h: 15896: unsigned INT0E :1;
[; ;pic18f27j13.h: 15897: unsigned T0IE :1;
[; ;pic18f27j13.h: 15898: unsigned PEIE :1;
[; ;pic18f27j13.h: 15899: unsigned GIE :1;
[; ;pic18f27j13.h: 15900: };
[; ;pic18f27j13.h: 15901: struct {
[; ;pic18f27j13.h: 15902: unsigned :6;
[; ;pic18f27j13.h: 15903: unsigned GIEL :1;
[; ;pic18f27j13.h: 15904: unsigned GIEH :1;
[; ;pic18f27j13.h: 15905: };
[; ;pic18f27j13.h: 15906: } INTCONbits_t;
[; ;pic18f27j13.h: 15907: extern volatile INTCONbits_t INTCONbits @ 0xFF2;
[; ;pic18f27j13.h: 15991: extern volatile unsigned short PROD @ 0xFF3;
"15993
[; ;pic18f27j13.h: 15993: asm("PROD equ 0FF3h");
[; <" PROD equ 0FF3h ;# ">
[; ;pic18f27j13.h: 15997: extern volatile unsigned char PRODL @ 0xFF3;
"15999
[; ;pic18f27j13.h: 15999: asm("PRODL equ 0FF3h");
[; <" PRODL equ 0FF3h ;# ">
[; ;pic18f27j13.h: 16002: typedef union {
[; ;pic18f27j13.h: 16003: struct {
[; ;pic18f27j13.h: 16004: unsigned PRODL :8;
[; ;pic18f27j13.h: 16005: };
[; ;pic18f27j13.h: 16006: } PRODLbits_t;
[; ;pic18f27j13.h: 16007: extern volatile PRODLbits_t PRODLbits @ 0xFF3;
[; ;pic18f27j13.h: 16016: extern volatile unsigned char PRODH @ 0xFF4;
"16018
[; ;pic18f27j13.h: 16018: asm("PRODH equ 0FF4h");
[; <" PRODH equ 0FF4h ;# ">
[; ;pic18f27j13.h: 16021: typedef union {
[; ;pic18f27j13.h: 16022: struct {
[; ;pic18f27j13.h: 16023: unsigned PRODH :8;
[; ;pic18f27j13.h: 16024: };
[; ;pic18f27j13.h: 16025: } PRODHbits_t;
[; ;pic18f27j13.h: 16026: extern volatile PRODHbits_t PRODHbits @ 0xFF4;
[; ;pic18f27j13.h: 16035: extern volatile unsigned char TABLAT @ 0xFF5;
"16037
[; ;pic18f27j13.h: 16037: asm("TABLAT equ 0FF5h");
[; <" TABLAT equ 0FF5h ;# ">
[; ;pic18f27j13.h: 16040: typedef union {
[; ;pic18f27j13.h: 16041: struct {
[; ;pic18f27j13.h: 16042: unsigned TABLAT :8;
[; ;pic18f27j13.h: 16043: };
[; ;pic18f27j13.h: 16044: } TABLATbits_t;
[; ;pic18f27j13.h: 16045: extern volatile TABLATbits_t TABLATbits @ 0xFF5;
[; ;pic18f27j13.h: 16055: extern volatile unsigned short long TBLPTR @ 0xFF6;
"16058
[; ;pic18f27j13.h: 16058: asm("TBLPTR equ 0FF6h");
[; <" TBLPTR equ 0FF6h ;# ">
[; ;pic18f27j13.h: 16062: extern volatile unsigned char TBLPTRL @ 0xFF6;
"16064
[; ;pic18f27j13.h: 16064: asm("TBLPTRL equ 0FF6h");
[; <" TBLPTRL equ 0FF6h ;# ">
[; ;pic18f27j13.h: 16067: typedef union {
[; ;pic18f27j13.h: 16068: struct {
[; ;pic18f27j13.h: 16069: unsigned TBLPTRL :8;
[; ;pic18f27j13.h: 16070: };
[; ;pic18f27j13.h: 16071: } TBLPTRLbits_t;
[; ;pic18f27j13.h: 16072: extern volatile TBLPTRLbits_t TBLPTRLbits @ 0xFF6;
[; ;pic18f27j13.h: 16081: extern volatile unsigned char TBLPTRH @ 0xFF7;
"16083
[; ;pic18f27j13.h: 16083: asm("TBLPTRH equ 0FF7h");
[; <" TBLPTRH equ 0FF7h ;# ">
[; ;pic18f27j13.h: 16086: typedef union {
[; ;pic18f27j13.h: 16087: struct {
[; ;pic18f27j13.h: 16088: unsigned TBLPTRH :8;
[; ;pic18f27j13.h: 16089: };
[; ;pic18f27j13.h: 16090: } TBLPTRHbits_t;
[; ;pic18f27j13.h: 16091: extern volatile TBLPTRHbits_t TBLPTRHbits @ 0xFF7;
[; ;pic18f27j13.h: 16100: extern volatile unsigned char TBLPTRU @ 0xFF8;
"16102
[; ;pic18f27j13.h: 16102: asm("TBLPTRU equ 0FF8h");
[; <" TBLPTRU equ 0FF8h ;# ">
[; ;pic18f27j13.h: 16107: extern volatile unsigned short long PCLAT @ 0xFF9;
"16110
[; ;pic18f27j13.h: 16110: asm("PCLAT equ 0FF9h");
[; <" PCLAT equ 0FF9h ;# ">
[; ;pic18f27j13.h: 16114: extern volatile unsigned short long PC @ 0xFF9;
"16117
[; ;pic18f27j13.h: 16117: asm("PC equ 0FF9h");
[; <" PC equ 0FF9h ;# ">
[; ;pic18f27j13.h: 16121: extern volatile unsigned char PCL @ 0xFF9;
"16123
[; ;pic18f27j13.h: 16123: asm("PCL equ 0FF9h");
[; <" PCL equ 0FF9h ;# ">
[; ;pic18f27j13.h: 16126: typedef union {
[; ;pic18f27j13.h: 16127: struct {
[; ;pic18f27j13.h: 16128: unsigned PCL :8;
[; ;pic18f27j13.h: 16129: };
[; ;pic18f27j13.h: 16130: } PCLbits_t;
[; ;pic18f27j13.h: 16131: extern volatile PCLbits_t PCLbits @ 0xFF9;
[; ;pic18f27j13.h: 16140: extern volatile unsigned char PCLATH @ 0xFFA;
"16142
[; ;pic18f27j13.h: 16142: asm("PCLATH equ 0FFAh");
[; <" PCLATH equ 0FFAh ;# ">
[; ;pic18f27j13.h: 16145: typedef union {
[; ;pic18f27j13.h: 16146: struct {
[; ;pic18f27j13.h: 16147: unsigned PCH :8;
[; ;pic18f27j13.h: 16148: };
[; ;pic18f27j13.h: 16149: } PCLATHbits_t;
[; ;pic18f27j13.h: 16150: extern volatile PCLATHbits_t PCLATHbits @ 0xFFA;
[; ;pic18f27j13.h: 16159: extern volatile unsigned char PCLATU @ 0xFFB;
"16161
[; ;pic18f27j13.h: 16161: asm("PCLATU equ 0FFBh");
[; <" PCLATU equ 0FFBh ;# ">
[; ;pic18f27j13.h: 16165: extern volatile unsigned char STKPTR @ 0xFFC;
"16167
[; ;pic18f27j13.h: 16167: asm("STKPTR equ 0FFCh");
[; <" STKPTR equ 0FFCh ;# ">
[; ;pic18f27j13.h: 16170: typedef union {
[; ;pic18f27j13.h: 16171: struct {
[; ;pic18f27j13.h: 16172: unsigned STKPTR :5;
[; ;pic18f27j13.h: 16173: unsigned :1;
[; ;pic18f27j13.h: 16174: unsigned STKUNF :1;
[; ;pic18f27j13.h: 16175: unsigned STKFUL :1;
[; ;pic18f27j13.h: 16176: };
[; ;pic18f27j13.h: 16177: struct {
[; ;pic18f27j13.h: 16178: unsigned SP0 :1;
[; ;pic18f27j13.h: 16179: unsigned SP1 :1;
[; ;pic18f27j13.h: 16180: unsigned SP2 :1;
[; ;pic18f27j13.h: 16181: unsigned SP3 :1;
[; ;pic18f27j13.h: 16182: unsigned SP4 :1;
[; ;pic18f27j13.h: 16183: unsigned :2;
[; ;pic18f27j13.h: 16184: unsigned STKOVF :1;
[; ;pic18f27j13.h: 16185: };
[; ;pic18f27j13.h: 16186: } STKPTRbits_t;
[; ;pic18f27j13.h: 16187: extern volatile STKPTRbits_t STKPTRbits @ 0xFFC;
[; ;pic18f27j13.h: 16237: extern volatile unsigned short long TOS @ 0xFFD;
"16240
[; ;pic18f27j13.h: 16240: asm("TOS equ 0FFDh");
[; <" TOS equ 0FFDh ;# ">
[; ;pic18f27j13.h: 16244: extern volatile unsigned char TOSL @ 0xFFD;
"16246
[; ;pic18f27j13.h: 16246: asm("TOSL equ 0FFDh");
[; <" TOSL equ 0FFDh ;# ">
[; ;pic18f27j13.h: 16249: typedef union {
[; ;pic18f27j13.h: 16250: struct {
[; ;pic18f27j13.h: 16251: unsigned TOSL :8;
[; ;pic18f27j13.h: 16252: };
[; ;pic18f27j13.h: 16253: } TOSLbits_t;
[; ;pic18f27j13.h: 16254: extern volatile TOSLbits_t TOSLbits @ 0xFFD;
[; ;pic18f27j13.h: 16263: extern volatile unsigned char TOSH @ 0xFFE;
"16265
[; ;pic18f27j13.h: 16265: asm("TOSH equ 0FFEh");
[; <" TOSH equ 0FFEh ;# ">
[; ;pic18f27j13.h: 16268: typedef union {
[; ;pic18f27j13.h: 16269: struct {
[; ;pic18f27j13.h: 16270: unsigned TOSH :8;
[; ;pic18f27j13.h: 16271: };
[; ;pic18f27j13.h: 16272: } TOSHbits_t;
[; ;pic18f27j13.h: 16273: extern volatile TOSHbits_t TOSHbits @ 0xFFE;
[; ;pic18f27j13.h: 16282: extern volatile unsigned char TOSU @ 0xFFF;
"16284
[; ;pic18f27j13.h: 16284: asm("TOSU equ 0FFFh");
[; <" TOSU equ 0FFFh ;# ">
[; ;pic18f27j13.h: 16294: extern volatile __bit ABDEN1 @ (((unsigned) &BAUDCON1)*8) + 0;
[; ;pic18f27j13.h: 16296: extern volatile __bit ABDEN2 @ (((unsigned) &BAUDCON2)*8) + 0;
[; ;pic18f27j13.h: 16298: extern volatile __bit ABDOVF1 @ (((unsigned) &BAUDCON1)*8) + 7;
[; ;pic18f27j13.h: 16300: extern volatile __bit ABDOVF2 @ (((unsigned) &BAUDCON2)*8) + 7;
[; ;pic18f27j13.h: 16302: extern volatile __bit ACKDT1 @ (((unsigned) &SSP1CON2)*8) + 5;
[; ;pic18f27j13.h: 16304: extern volatile __bit ACKDT2 @ (((unsigned) &SSP2CON2)*8) + 5;
[; ;pic18f27j13.h: 16306: extern volatile __bit ACKEN1 @ (((unsigned) &SSP1CON2)*8) + 4;
[; ;pic18f27j13.h: 16308: extern volatile __bit ACKEN2 @ (((unsigned) &SSP2CON2)*8) + 4;
[; ;pic18f27j13.h: 16310: extern volatile __bit ACKSTAT1 @ (((unsigned) &SSP1CON2)*8) + 6;
[; ;pic18f27j13.h: 16312: extern volatile __bit ACKSTAT2 @ (((unsigned) &SSP2CON2)*8) + 6;
[; ;pic18f27j13.h: 16314: extern volatile __bit ACQT0 @ (((unsigned) &ADCON1)*8) + 3;
[; ;pic18f27j13.h: 16316: extern volatile __bit ACQT1 @ (((unsigned) &ADCON1)*8) + 4;
[; ;pic18f27j13.h: 16318: extern volatile __bit ACQT2 @ (((unsigned) &ADCON1)*8) + 5;
[; ;pic18f27j13.h: 16320: extern volatile __bit __attribute__((__deprecated__)) ADCAL @ (((unsigned) &ADCON1)*8) + 6;
[; ;pic18f27j13.h: 16322: extern volatile __bit ADCMD @ (((unsigned) &PMDIS0)*8) + 0;
[; ;pic18f27j13.h: 16324: extern volatile __bit ADCS0 @ (((unsigned) &ADCON1)*8) + 0;
[; ;pic18f27j13.h: 16326: extern volatile __bit ADCS1 @ (((unsigned) &ADCON1)*8) + 1;
[; ;pic18f27j13.h: 16328: extern volatile __bit ADCS2 @ (((unsigned) &ADCON1)*8) + 2;
[; ;pic18f27j13.h: 16330: extern volatile __bit ADDEN1 @ (((unsigned) &RCSTA1)*8) + 3;
[; ;pic18f27j13.h: 16332: extern volatile __bit ADDEN2 @ (((unsigned) &RCSTA2)*8) + 3;
[; ;pic18f27j13.h: 16334: extern volatile __bit ADEN @ (((unsigned) &RCSTA1)*8) + 3;
[; ;pic18f27j13.h: 16336: extern volatile __bit ADFM @ (((unsigned) &ADCON1)*8) + 7;
[; ;pic18f27j13.h: 16338: extern volatile __bit ADIE @ (((unsigned) &PIE1)*8) + 6;
[; ;pic18f27j13.h: 16340: extern volatile __bit ADIF @ (((unsigned) &PIR1)*8) + 6;
[; ;pic18f27j13.h: 16342: extern volatile __bit ADIP @ (((unsigned) &IPR1)*8) + 6;
[; ;pic18f27j13.h: 16344: extern volatile __bit ADMSK11 @ (((unsigned) &SSP1CON2)*8) + 1;
[; ;pic18f27j13.h: 16346: extern volatile __bit ADMSK12 @ (((unsigned) &SSP2CON2)*8) + 1;
[; ;pic18f27j13.h: 16348: extern volatile __bit ADMSK21 @ (((unsigned) &SSP1CON2)*8) + 2;
[; ;pic18f27j13.h: 16350: extern volatile __bit ADMSK22 @ (((unsigned) &SSP2CON2)*8) + 2;
[; ;pic18f27j13.h: 16352: extern volatile __bit ADMSK31 @ (((unsigned) &SSP1CON2)*8) + 3;
[; ;pic18f27j13.h: 16354: extern volatile __bit ADMSK32 @ (((unsigned) &SSP2CON2)*8) + 3;
[; ;pic18f27j13.h: 16356: extern volatile __bit ADMSK41 @ (((unsigned) &SSP1CON2)*8) + 4;
[; ;pic18f27j13.h: 16358: extern volatile __bit ADMSK42 @ (((unsigned) &SSP2CON2)*8) + 4;
[; ;pic18f27j13.h: 16360: extern volatile __bit ADMSK51 @ (((unsigned) &SSP1CON2)*8) + 5;
[; ;pic18f27j13.h: 16362: extern volatile __bit ADMSK52 @ (((unsigned) &SSP2CON2)*8) + 5;
[; ;pic18f27j13.h: 16364: extern volatile __bit ADON @ (((unsigned) &ADCON0)*8) + 0;
[; ;pic18f27j13.h: 16366: extern volatile __bit ALRMEN @ (((unsigned) &ALRMCFG)*8) + 7;
[; ;pic18f27j13.h: 16368: extern volatile __bit ALRMPTR0 @ (((unsigned) &ALRMCFG)*8) + 0;
[; ;pic18f27j13.h: 16370: extern volatile __bit ALRMPTR1 @ (((unsigned) &ALRMCFG)*8) + 1;
[; ;pic18f27j13.h: 16372: extern volatile __bit AMASK0 @ (((unsigned) &ALRMCFG)*8) + 2;
[; ;pic18f27j13.h: 16374: extern volatile __bit AMASK1 @ (((unsigned) &ALRMCFG)*8) + 3;
[; ;pic18f27j13.h: 16376: extern volatile __bit AMASK2 @ (((unsigned) &ALRMCFG)*8) + 4;
[; ;pic18f27j13.h: 16378: extern volatile __bit AMASK3 @ (((unsigned) &ALRMCFG)*8) + 5;
[; ;pic18f27j13.h: 16380: extern volatile __bit AN0 @ (((unsigned) &PORTA)*8) + 0;
[; ;pic18f27j13.h: 16382: extern volatile __bit AN1 @ (((unsigned) &PORTA)*8) + 1;
[; ;pic18f27j13.h: 16384: extern volatile __bit AN10 @ (((unsigned) &PORTB)*8) + 1;
[; ;pic18f27j13.h: 16386: extern volatile __bit AN11 @ (((unsigned) &PORTC)*8) + 2;
[; ;pic18f27j13.h: 16388: extern volatile __bit AN12 @ (((unsigned) &PORTB)*8) + 0;
[; ;pic18f27j13.h: 16390: extern volatile __bit AN2 @ (((unsigned) &PORTA)*8) + 2;
[; ;pic18f27j13.h: 16392: extern volatile __bit AN3 @ (((unsigned) &PORTA)*8) + 3;
[; ;pic18f27j13.h: 16394: extern volatile __bit AN4 @ (((unsigned) &PORTA)*8) + 5;
[; ;pic18f27j13.h: 16396: extern volatile __bit AN8 @ (((unsigned) &PORTB)*8) + 2;
[; ;pic18f27j13.h: 16398: extern volatile __bit AN9 @ (((unsigned) &PORTB)*8) + 3;
[; ;pic18f27j13.h: 16400: extern volatile __bit ARPT0 @ (((unsigned) &ALRMRPT)*8) + 0;
[; ;pic18f27j13.h: 16402: extern volatile __bit ARPT1 @ (((unsigned) &ALRMRPT)*8) + 1;
[; ;pic18f27j13.h: 16404: extern volatile __bit ARPT2 @ (((unsigned) &ALRMRPT)*8) + 2;
[; ;pic18f27j13.h: 16406: extern volatile __bit ARPT3 @ (((unsigned) &ALRMRPT)*8) + 3;
[; ;pic18f27j13.h: 16408: extern volatile __bit ARPT4 @ (((unsigned) &ALRMRPT)*8) + 4;
[; ;pic18f27j13.h: 16410: extern volatile __bit ARPT5 @ (((unsigned) &ALRMRPT)*8) + 5;
[; ;pic18f27j13.h: 16412: extern volatile __bit ARPT6 @ (((unsigned) &ALRMRPT)*8) + 6;
[; ;pic18f27j13.h: 16414: extern volatile __bit ARPT7 @ (((unsigned) &ALRMRPT)*8) + 7;
[; ;pic18f27j13.h: 16416: extern volatile __bit BCL1IE @ (((unsigned) &PIE2)*8) + 3;
[; ;pic18f27j13.h: 16418: extern volatile __bit BCL1IF @ (((unsigned) &PIR2)*8) + 3;
[; ;pic18f27j13.h: 16420: extern volatile __bit BCL1IP @ (((unsigned) &IPR2)*8) + 3;
[; ;pic18f27j13.h: 16422: extern volatile __bit BCL2IE @ (((unsigned) &PIE3)*8) + 6;
[; ;pic18f27j13.h: 16424: extern volatile __bit BCL2IF @ (((unsigned) &PIR3)*8) + 6;
[; ;pic18f27j13.h: 16426: extern volatile __bit BCL2IP @ (((unsigned) &IPR3)*8) + 6;
[; ;pic18f27j13.h: 16428: extern volatile __bit BCLIE @ (((unsigned) &PIE2)*8) + 3;
[; ;pic18f27j13.h: 16430: extern volatile __bit BCLIF @ (((unsigned) &PIR2)*8) + 3;
[; ;pic18f27j13.h: 16432: extern volatile __bit BCLIP @ (((unsigned) &IPR2)*8) + 3;
[; ;pic18f27j13.h: 16434: extern volatile __bit BF1 @ (((unsigned) &SSP1STAT)*8) + 0;
[; ;pic18f27j13.h: 16436: extern volatile __bit BF2 @ (((unsigned) &SSP2STAT)*8) + 0;
[; ;pic18f27j13.h: 16438: extern volatile __bit BGVST @ (((unsigned) &HLVDCON)*8) + 6;
[; ;pic18f27j13.h: 16440: extern volatile __bit BOR @ (((unsigned) &RCON)*8) + 0;
[; ;pic18f27j13.h: 16442: extern volatile __bit BRG161 @ (((unsigned) &BAUDCON1)*8) + 3;
[; ;pic18f27j13.h: 16444: extern volatile __bit BRG162 @ (((unsigned) &BAUDCON2)*8) + 3;
[; ;pic18f27j13.h: 16446: extern volatile __bit BRGH1 @ (((unsigned) &TXSTA1)*8) + 2;
[; ;pic18f27j13.h: 16448: extern volatile __bit BRGH2 @ (((unsigned) &TXSTA2)*8) + 2;
[; ;pic18f27j13.h: 16450: extern volatile __bit C10TSEL0 @ (((unsigned) &CCPTMRS2)*8) + 4;
[; ;pic18f27j13.h: 16452: extern volatile __bit C1CH0 @ (((unsigned) &CM1CON)*8) + 0;
[; ;pic18f27j13.h: 16454: extern volatile __bit C1CH1 @ (((unsigned) &CM1CON)*8) + 1;
[; ;pic18f27j13.h: 16456: extern volatile __bit C1INA @ (((unsigned) &PORTA)*8) + 0;
[; ;pic18f27j13.h: 16458: extern volatile __bit C1INB @ (((unsigned) &PORTA)*8) + 3;
[; ;pic18f27j13.h: 16460: extern volatile __bit C1INC @ (((unsigned) &PORTA)*8) + 5;
[; ;pic18f27j13.h: 16462: extern volatile __bit C1IND @ (((unsigned) &PORTA)*8) + 2;
[; ;pic18f27j13.h: 16464: extern volatile __bit C1TSEL0 @ (((unsigned) &CCPTMRS0)*8) + 0;
[; ;pic18f27j13.h: 16466: extern volatile __bit C1TSEL1 @ (((unsigned) &CCPTMRS0)*8) + 1;
[; ;pic18f27j13.h: 16468: extern volatile __bit C1TSEL2 @ (((unsigned) &CCPTMRS0)*8) + 2;
[; ;pic18f27j13.h: 16470: extern volatile __bit C2INA @ (((unsigned) &PORTA)*8) + 1;
[; ;pic18f27j13.h: 16472: extern volatile __bit C2INB @ (((unsigned) &PORTA)*8) + 2;
[; ;pic18f27j13.h: 16474: extern volatile __bit C2INC @ (((unsigned) &PORTB)*8) + 2;
[; ;pic18f27j13.h: 16476: extern volatile __bit C2IND @ (((unsigned) &PORTC)*8) + 2;
[; ;pic18f27j13.h: 16478: extern volatile __bit C2TSEL0 @ (((unsigned) &CCPTMRS0)*8) + 3;
[; ;pic18f27j13.h: 16480: extern volatile __bit C2TSEL1 @ (((unsigned) &CCPTMRS0)*8) + 4;
[; ;pic18f27j13.h: 16482: extern volatile __bit C2TSEL2 @ (((unsigned) &CCPTMRS0)*8) + 5;
[; ;pic18f27j13.h: 16484: extern volatile __bit C3INA @ (((unsigned) &PORTB)*8) + 3;
[; ;pic18f27j13.h: 16486: extern volatile __bit C3INB @ (((unsigned) &PORTA)*8) + 2;
[; ;pic18f27j13.h: 16488: extern volatile __bit C3INC @ (((unsigned) &PORTB)*8) + 1;
[; ;pic18f27j13.h: 16490: extern volatile __bit C3IND @ (((unsigned) &PORTB)*8) + 0;
[; ;pic18f27j13.h: 16492: extern volatile __bit C3TSEL0 @ (((unsigned) &CCPTMRS0)*8) + 6;
[; ;pic18f27j13.h: 16494: extern volatile __bit C3TSEL1 @ (((unsigned) &CCPTMRS0)*8) + 7;
[; ;pic18f27j13.h: 16496: extern volatile __bit C4TSEL0 @ (((unsigned) &CCPTMRS1)*8) + 0;
[; ;pic18f27j13.h: 16498: extern volatile __bit C4TSEL1 @ (((unsigned) &CCPTMRS1)*8) + 1;
[; ;pic18f27j13.h: 16500: extern volatile __bit C5TSEL0 @ (((unsigned) &CCPTMRS1)*8) + 2;
[; ;pic18f27j13.h: 16502: extern volatile __bit C6TSEL0 @ (((unsigned) &CCPTMRS1)*8) + 4;
[; ;pic18f27j13.h: 16504: extern volatile __bit C7TSEL0 @ (((unsigned) &CCPTMRS1)*8) + 6;
[; ;pic18f27j13.h: 16506: extern volatile __bit C7TSEL1 @ (((unsigned) &CCPTMRS1)*8) + 7;
[; ;pic18f27j13.h: 16508: extern volatile __bit C8TSEL0 @ (((unsigned) &CCPTMRS2)*8) + 0;
[; ;pic18f27j13.h: 16510: extern volatile __bit C8TSEL1 @ (((unsigned) &CCPTMRS2)*8) + 1;
[; ;pic18f27j13.h: 16512: extern volatile __bit C9TSEL0 @ (((unsigned) &CCPTMRS2)*8) + 2;
[; ;pic18f27j13.h: 16514: extern volatile __bit CAL0 @ (((unsigned) &RTCCAL)*8) + 0;
[; ;pic18f27j13.h: 16516: extern volatile __bit CAL1 @ (((unsigned) &RTCCAL)*8) + 1;
[; ;pic18f27j13.h: 16518: extern volatile __bit CAL2 @ (((unsigned) &RTCCAL)*8) + 2;
[; ;pic18f27j13.h: 16520: extern volatile __bit CAL3 @ (((unsigned) &RTCCAL)*8) + 3;
[; ;pic18f27j13.h: 16522: extern volatile __bit CAL4 @ (((unsigned) &RTCCAL)*8) + 4;
[; ;pic18f27j13.h: 16524: extern volatile __bit CAL5 @ (((unsigned) &RTCCAL)*8) + 5;
[; ;pic18f27j13.h: 16526: extern volatile __bit CAL6 @ (((unsigned) &RTCCAL)*8) + 6;
[; ;pic18f27j13.h: 16528: extern volatile __bit CAL7 @ (((unsigned) &RTCCAL)*8) + 7;
[; ;pic18f27j13.h: 16530: extern volatile __bit CARRY @ (((unsigned) &STATUS)*8) + 0;
[; ;pic18f27j13.h: 16532: extern volatile __bit CCH01 @ (((unsigned) &CM1CON)*8) + 0;
[; ;pic18f27j13.h: 16534: extern volatile __bit CCH02 @ (((unsigned) &CM2CON)*8) + 0;
[; ;pic18f27j13.h: 16536: extern volatile __bit CCH03 @ (((unsigned) &CM3CON)*8) + 0;
[; ;pic18f27j13.h: 16538: extern volatile __bit CCH05 @ (((unsigned) &IPR5)*8) + 0;
[; ;pic18f27j13.h: 16540: extern volatile __bit CCH11 @ (((unsigned) &CM1CON)*8) + 1;
[; ;pic18f27j13.h: 16542: extern volatile __bit CCH12 @ (((unsigned) &CM2CON)*8) + 1;
[; ;pic18f27j13.h: 16544: extern volatile __bit CCH13 @ (((unsigned) &CM3CON)*8) + 1;
[; ;pic18f27j13.h: 16546: extern volatile __bit CCH15 @ (((unsigned) &IPR5)*8) + 1;
[; ;pic18f27j13.h: 16548: extern volatile __bit CCIP3IP @ (((unsigned) &IPR4)*8) + 0;
[; ;pic18f27j13.h: 16550: extern volatile __bit CCP10 @ (((unsigned) &PORTC)*8) + 7;
[; ;pic18f27j13.h: 16552: extern volatile __bit CCP10IE @ (((unsigned) &PIE4)*8) + 7;
[; ;pic18f27j13.h: 16554: extern volatile __bit CCP10IF @ (((unsigned) &PIR4)*8) + 7;
[; ;pic18f27j13.h: 16556: extern volatile __bit CCP10IP @ (((unsigned) &IPR4)*8) + 7;
[; ;pic18f27j13.h: 16558: extern volatile __bit CCP10M0 @ (((unsigned) &CCP10CON)*8) + 0;
[; ;pic18f27j13.h: 16560: extern volatile __bit CCP10M1 @ (((unsigned) &CCP10CON)*8) + 1;
[; ;pic18f27j13.h: 16562: extern volatile __bit CCP10M2 @ (((unsigned) &CCP10CON)*8) + 2;
[; ;pic18f27j13.h: 16564: extern volatile __bit CCP10M3 @ (((unsigned) &CCP10CON)*8) + 3;
[; ;pic18f27j13.h: 16566: extern volatile __bit CCP10MD @ (((unsigned) &PMDIS3)*8) + 7;
[; ;pic18f27j13.h: 16568: extern volatile __bit CCP10OD @ (((unsigned) &ODCON2)*8) + 3;
[; ;pic18f27j13.h: 16570: extern volatile __bit CCP1IE @ (((unsigned) &PIE1)*8) + 2;
[; ;pic18f27j13.h: 16572: extern volatile __bit CCP1IF @ (((unsigned) &PIR1)*8) + 2;
[; ;pic18f27j13.h: 16574: extern volatile __bit CCP1IP @ (((unsigned) &IPR1)*8) + 2;
[; ;pic18f27j13.h: 16576: extern volatile __bit CCP1M0 @ (((unsigned) &CCP1CON)*8) + 0;
[; ;pic18f27j13.h: 16578: extern volatile __bit CCP1M1 @ (((unsigned) &CCP1CON)*8) + 1;
[; ;pic18f27j13.h: 16580: extern volatile __bit CCP1M2 @ (((unsigned) &CCP1CON)*8) + 2;
[; ;pic18f27j13.h: 16582: extern volatile __bit CCP1M3 @ (((unsigned) &CCP1CON)*8) + 3;
[; ;pic18f27j13.h: 16584: extern volatile __bit CCP1X @ (((unsigned) &CCP1CON)*8) + 5;
[; ;pic18f27j13.h: 16586: extern volatile __bit CCP1Y @ (((unsigned) &CCP1CON)*8) + 4;
[; ;pic18f27j13.h: 16588: extern volatile __bit CCP2 @ (((unsigned) &PORTC)*8) + 1;
[; ;pic18f27j13.h: 16590: extern volatile __bit CCP2IE @ (((unsigned) &PIE2)*8) + 0;
[; ;pic18f27j13.h: 16592: extern volatile __bit CCP2IF @ (((unsigned) &PIR2)*8) + 0;
[; ;pic18f27j13.h: 16594: extern volatile __bit CCP2IP @ (((unsigned) &IPR2)*8) + 0;
[; ;pic18f27j13.h: 16596: extern volatile __bit CCP2M0 @ (((unsigned) &CCP2CON)*8) + 0;
[; ;pic18f27j13.h: 16598: extern volatile __bit CCP2M1 @ (((unsigned) &CCP2CON)*8) + 1;
[; ;pic18f27j13.h: 16600: extern volatile __bit CCP2M2 @ (((unsigned) &CCP2CON)*8) + 2;
[; ;pic18f27j13.h: 16602: extern volatile __bit CCP2M3 @ (((unsigned) &CCP2CON)*8) + 3;
[; ;pic18f27j13.h: 16604: extern volatile __bit CCP2X @ (((unsigned) &CCP2CON)*8) + 5;
[; ;pic18f27j13.h: 16606: extern volatile __bit CCP2Y @ (((unsigned) &CCP2CON)*8) + 4;
[; ;pic18f27j13.h: 16608: extern volatile __bit CCP2_PA2 @ (((unsigned) &PORTB)*8) + 3;
[; ;pic18f27j13.h: 16610: extern volatile __bit CCP3IE @ (((unsigned) &PIE4)*8) + 0;
[; ;pic18f27j13.h: 16612: extern volatile __bit CCP3IF @ (((unsigned) &PIR4)*8) + 0;
[; ;pic18f27j13.h: 16614: extern volatile __bit CCP3IP @ (((unsigned) &IPR4)*8) + 0;
[; ;pic18f27j13.h: 16616: extern volatile __bit CCP3M0 @ (((unsigned) &CCP3CON)*8) + 0;
[; ;pic18f27j13.h: 16618: extern volatile __bit CCP3M1 @ (((unsigned) &CCP3CON)*8) + 1;
[; ;pic18f27j13.h: 16620: extern volatile __bit CCP3M2 @ (((unsigned) &CCP3CON)*8) + 2;
[; ;pic18f27j13.h: 16622: extern volatile __bit CCP3M3 @ (((unsigned) &CCP3CON)*8) + 3;
[; ;pic18f27j13.h: 16624: extern volatile __bit CCP4 @ (((unsigned) &PORTB)*8) + 4;
[; ;pic18f27j13.h: 16626: extern volatile __bit CCP4IE @ (((unsigned) &PIE4)*8) + 1;
[; ;pic18f27j13.h: 16628: extern volatile __bit CCP4IF @ (((unsigned) &PIR4)*8) + 1;
[; ;pic18f27j13.h: 16630: extern volatile __bit CCP4IP @ (((unsigned) &IPR4)*8) + 1;
[; ;pic18f27j13.h: 16632: extern volatile __bit CCP4M0 @ (((unsigned) &CCP4CON)*8) + 0;
[; ;pic18f27j13.h: 16634: extern volatile __bit CCP4M1 @ (((unsigned) &CCP4CON)*8) + 1;
[; ;pic18f27j13.h: 16636: extern volatile __bit CCP4M2 @ (((unsigned) &CCP4CON)*8) + 2;
[; ;pic18f27j13.h: 16638: extern volatile __bit CCP4M3 @ (((unsigned) &CCP4CON)*8) + 3;
[; ;pic18f27j13.h: 16640: extern volatile __bit CCP4MD @ (((unsigned) &PMDIS3)*8) + 1;
[; ;pic18f27j13.h: 16642: extern volatile __bit CCP4OD @ (((unsigned) &ODCON1)*8) + 3;
[; ;pic18f27j13.h: 16644: extern volatile __bit CCP5 @ (((unsigned) &PORTB)*8) + 5;
[; ;pic18f27j13.h: 16646: extern volatile __bit CCP5IE @ (((unsigned) &PIE4)*8) + 2;
[; ;pic18f27j13.h: 16648: extern volatile __bit CCP5IF @ (((unsigned) &PIR4)*8) + 2;
[; ;pic18f27j13.h: 16650: extern volatile __bit CCP5IP @ (((unsigned) &IPR4)*8) + 2;
[; ;pic18f27j13.h: 16652: extern volatile __bit CCP5M0 @ (((unsigned) &CCP5CON)*8) + 0;
[; ;pic18f27j13.h: 16654: extern volatile __bit CCP5M1 @ (((unsigned) &CCP5CON)*8) + 1;
[; ;pic18f27j13.h: 16656: extern volatile __bit CCP5M2 @ (((unsigned) &CCP5CON)*8) + 2;
[; ;pic18f27j13.h: 16658: extern volatile __bit CCP5M3 @ (((unsigned) &CCP5CON)*8) + 3;
[; ;pic18f27j13.h: 16660: extern volatile __bit CCP5MD @ (((unsigned) &PMDIS3)*8) + 2;
[; ;pic18f27j13.h: 16662: extern volatile __bit CCP5OD @ (((unsigned) &ODCON1)*8) + 4;
[; ;pic18f27j13.h: 16664: extern volatile __bit CCP6 @ (((unsigned) &PORTB)*8) + 6;
[; ;pic18f27j13.h: 16666: extern volatile __bit CCP6IE @ (((unsigned) &PIE4)*8) + 3;
[; ;pic18f27j13.h: 16668: extern volatile __bit CCP6IF @ (((unsigned) &PIR4)*8) + 3;
[; ;pic18f27j13.h: 16670: extern volatile __bit CCP6IP @ (((unsigned) &IPR4)*8) + 3;
[; ;pic18f27j13.h: 16672: extern volatile __bit CCP6M0 @ (((unsigned) &CCP6CON)*8) + 0;
[; ;pic18f27j13.h: 16674: extern volatile __bit CCP6M1 @ (((unsigned) &CCP6CON)*8) + 1;
[; ;pic18f27j13.h: 16676: extern volatile __bit CCP6M2 @ (((unsigned) &CCP6CON)*8) + 2;
[; ;pic18f27j13.h: 16678: extern volatile __bit CCP6M3 @ (((unsigned) &CCP6CON)*8) + 3;
[; ;pic18f27j13.h: 16680: extern volatile __bit CCP6MD @ (((unsigned) &PMDIS3)*8) + 3;
[; ;pic18f27j13.h: 16682: extern volatile __bit CCP6OD @ (((unsigned) &ODCON1)*8) + 5;
[; ;pic18f27j13.h: 16684: extern volatile __bit CCP7 @ (((unsigned) &PORTB)*8) + 7;
[; ;pic18f27j13.h: 16686: extern volatile __bit CCP7IE @ (((unsigned) &PIE4)*8) + 4;
[; ;pic18f27j13.h: 16688: extern volatile __bit CCP7IF @ (((unsigned) &PIR4)*8) + 4;
[; ;pic18f27j13.h: 16690: extern volatile __bit CCP7IP @ (((unsigned) &IPR4)*8) + 4;
[; ;pic18f27j13.h: 16692: extern volatile __bit CCP7M0 @ (((unsigned) &CCP7CON)*8) + 0;
[; ;pic18f27j13.h: 16694: extern volatile __bit CCP7M1 @ (((unsigned) &CCP7CON)*8) + 1;
[; ;pic18f27j13.h: 16696: extern volatile __bit CCP7M2 @ (((unsigned) &CCP7CON)*8) + 2;
[; ;pic18f27j13.h: 16698: extern volatile __bit CCP7M3 @ (((unsigned) &CCP7CON)*8) + 3;
[; ;pic18f27j13.h: 16700: extern volatile __bit CCP7MD @ (((unsigned) &PMDIS3)*8) + 4;
[; ;pic18f27j13.h: 16702: extern volatile __bit CCP7OD @ (((unsigned) &ODCON1)*8) + 6;
[; ;pic18f27j13.h: 16704: extern volatile __bit CCP8 @ (((unsigned) &PORTC)*8) + 1;
[; ;pic18f27j13.h: 16706: extern volatile __bit CCP8IE @ (((unsigned) &PIE4)*8) + 5;
[; ;pic18f27j13.h: 16708: extern volatile __bit CCP8IF @ (((unsigned) &PIR4)*8) + 5;
[; ;pic18f27j13.h: 16710: extern volatile __bit CCP8IP @ (((unsigned) &IPR4)*8) + 5;
[; ;pic18f27j13.h: 16712: extern volatile __bit CCP8M0 @ (((unsigned) &CCP8CON)*8) + 0;
[; ;pic18f27j13.h: 16714: extern volatile __bit CCP8M1 @ (((unsigned) &CCP8CON)*8) + 1;
[; ;pic18f27j13.h: 16716: extern volatile __bit CCP8M2 @ (((unsigned) &CCP8CON)*8) + 2;
[; ;pic18f27j13.h: 16718: extern volatile __bit CCP8M3 @ (((unsigned) &CCP8CON)*8) + 3;
[; ;pic18f27j13.h: 16720: extern volatile __bit CCP8MD @ (((unsigned) &PMDIS3)*8) + 5;
[; ;pic18f27j13.h: 16722: extern volatile __bit CCP8OD @ (((unsigned) &ODCON1)*8) + 7;
[; ;pic18f27j13.h: 16724: extern volatile __bit CCP9 @ (((unsigned) &PORTC)*8) + 6;
[; ;pic18f27j13.h: 16726: extern volatile __bit CCP9IE @ (((unsigned) &PIE4)*8) + 6;
[; ;pic18f27j13.h: 16728: extern volatile __bit CCP9IF @ (((unsigned) &PIR4)*8) + 6;
[; ;pic18f27j13.h: 16730: extern volatile __bit CCP9IP @ (((unsigned) &IPR4)*8) + 6;
[; ;pic18f27j13.h: 16732: extern volatile __bit CCP9M0 @ (((unsigned) &CCP9CON)*8) + 0;
[; ;pic18f27j13.h: 16734: extern volatile __bit CCP9M1 @ (((unsigned) &CCP9CON)*8) + 1;
[; ;pic18f27j13.h: 16736: extern volatile __bit CCP9M2 @ (((unsigned) &CCP9CON)*8) + 2;
[; ;pic18f27j13.h: 16738: extern volatile __bit CCP9M3 @ (((unsigned) &CCP9CON)*8) + 3;
[; ;pic18f27j13.h: 16740: extern volatile __bit CCP9MD @ (((unsigned) &PMDIS3)*8) + 6;
[; ;pic18f27j13.h: 16742: extern volatile __bit CCP9OD @ (((unsigned) &ODCON2)*8) + 2;
[; ;pic18f27j13.h: 16744: extern volatile __bit CHIME @ (((unsigned) &ALRMCFG)*8) + 6;
[; ;pic18f27j13.h: 16746: extern volatile __bit CHS0 @ (((unsigned) &ADCON0)*8) + 2;
[; ;pic18f27j13.h: 16748: extern volatile __bit CHS1 @ (((unsigned) &ADCON0)*8) + 3;
[; ;pic18f27j13.h: 16750: extern volatile __bit CHS2 @ (((unsigned) &ADCON0)*8) + 4;
[; ;pic18f27j13.h: 16752: extern volatile __bit CHS3 @ (((unsigned) &ADCON0)*8) + 5;
[; ;pic18f27j13.h: 16754: extern volatile __bit CHSN3 @ (((unsigned) &ADCON1)*8) + 3;
[; ;pic18f27j13.h: 16756: extern volatile __bit CK1 @ (((unsigned) &PORTC)*8) + 6;
[; ;pic18f27j13.h: 16758: extern volatile __bit CKE1 @ (((unsigned) &SSP1STAT)*8) + 6;
[; ;pic18f27j13.h: 16760: extern volatile __bit CKE2 @ (((unsigned) &SSP2STAT)*8) + 6;
[; ;pic18f27j13.h: 16762: extern volatile __bit CKP1 @ (((unsigned) &SSP1CON1)*8) + 4;
[; ;pic18f27j13.h: 16764: extern volatile __bit CKP2 @ (((unsigned) &SSP2CON1)*8) + 4;
[; ;pic18f27j13.h: 16766: extern volatile __bit CKTXP @ (((unsigned) &BAUDCON1)*8) + 4;
[; ;pic18f27j13.h: 16768: extern volatile __bit CLKI @ (((unsigned) &PORTA)*8) + 7;
[; ;pic18f27j13.h: 16770: extern volatile __bit CLKO @ (((unsigned) &PORTA)*8) + 6;
[; ;pic18f27j13.h: 16772: extern volatile __bit CM @ (((unsigned) &RCON)*8) + 5;
[; ;pic18f27j13.h: 16774: extern volatile __bit CM1IE @ (((unsigned) &PIE2)*8) + 5;
[; ;pic18f27j13.h: 16776: extern volatile __bit CM1IF @ (((unsigned) &PIR2)*8) + 5;
[; ;pic18f27j13.h: 16778: extern volatile __bit CM1IP @ (((unsigned) &IPR2)*8) + 5;
[; ;pic18f27j13.h: 16780: extern volatile __bit CM2IE @ (((unsigned) &PIE2)*8) + 6;
[; ;pic18f27j13.h: 16782: extern volatile __bit CM2IF @ (((unsigned) &PIR2)*8) + 6;
[; ;pic18f27j13.h: 16784: extern volatile __bit CM2IP @ (((unsigned) &IPR2)*8) + 6;
[; ;pic18f27j13.h: 16786: extern volatile __bit CM3IE @ (((unsigned) &PIE5)*8) + 5;
[; ;pic18f27j13.h: 16788: extern volatile __bit CM3IF @ (((unsigned) &PIR5)*8) + 5;
[; ;pic18f27j13.h: 16790: extern volatile __bit CM3IP @ (((unsigned) &IPR5)*8) + 5;
[; ;pic18f27j13.h: 16792: extern volatile __bit CMIE @ (((unsigned) &PIE2)*8) + 6;
[; ;pic18f27j13.h: 16794: extern volatile __bit CMIF @ (((unsigned) &PIR2)*8) + 6;
[; ;pic18f27j13.h: 16796: extern volatile __bit CMIP @ (((unsigned) &IPR2)*8) + 6;
[; ;pic18f27j13.h: 16798: extern volatile __bit CMP1MD @ (((unsigned) &PMDIS2)*8) + 0;
[; ;pic18f27j13.h: 16800: extern volatile __bit CMP2MD @ (((unsigned) &PMDIS2)*8) + 1;
[; ;pic18f27j13.h: 16802: extern volatile __bit CMP3MD @ (((unsigned) &PMDIS2)*8) + 2;
[; ;pic18f27j13.h: 16804: extern volatile __bit CMPL02 @ (((unsigned) &PSTR2CON)*8) + 6;
[; ;pic18f27j13.h: 16806: extern volatile __bit CMPL03 @ (((unsigned) &PSTR3CON)*8) + 6;
[; ;pic18f27j13.h: 16808: extern volatile __bit CMPL12 @ (((unsigned) &PSTR2CON)*8) + 7;
[; ;pic18f27j13.h: 16810: extern volatile __bit CMPL13 @ (((unsigned) &PSTR3CON)*8) + 7;
[; ;pic18f27j13.h: 16812: extern volatile __bit COE1 @ (((unsigned) &CM1CON)*8) + 6;
[; ;pic18f27j13.h: 16814: extern volatile __bit COE2 @ (((unsigned) &CM2CON)*8) + 6;
[; ;pic18f27j13.h: 16816: extern volatile __bit COE3 @ (((unsigned) &CM3CON)*8) + 6;
[; ;pic18f27j13.h: 16818: extern volatile __bit CON1 @ (((unsigned) &CM1CON)*8) + 7;
[; ;pic18f27j13.h: 16820: extern volatile __bit CON2 @ (((unsigned) &CM2CON)*8) + 7;
[; ;pic18f27j13.h: 16822: extern volatile __bit CON3 @ (((unsigned) &CM3CON)*8) + 7;
[; ;pic18f27j13.h: 16824: extern volatile __bit COUT1 @ (((unsigned) &CMSTAT)*8) + 0;
[; ;pic18f27j13.h: 16826: extern volatile __bit COUT2 @ (((unsigned) &CMSTAT)*8) + 1;
[; ;pic18f27j13.h: 16828: extern volatile __bit COUT3 @ (((unsigned) &CMSTAT)*8) + 2;
[; ;pic18f27j13.h: 16830: extern volatile __bit CPOL1 @ (((unsigned) &CM1CON)*8) + 5;
[; ;pic18f27j13.h: 16832: extern volatile __bit CPOL2 @ (((unsigned) &CM2CON)*8) + 5;
[; ;pic18f27j13.h: 16834: extern volatile __bit CPOL3 @ (((unsigned) &CM3CON)*8) + 5;
[; ;pic18f27j13.h: 16836: extern volatile __bit CREF1 @ (((unsigned) &CM1CON)*8) + 2;
[; ;pic18f27j13.h: 16838: extern volatile __bit CREF2 @ (((unsigned) &CM2CON)*8) + 2;
[; ;pic18f27j13.h: 16840: extern volatile __bit CREF3 @ (((unsigned) &CM3CON)*8) + 2;
[; ;pic18f27j13.h: 16842: extern volatile __bit CREN1 @ (((unsigned) &RCSTA1)*8) + 4;
[; ;pic18f27j13.h: 16844: extern volatile __bit CREN2 @ (((unsigned) &RCSTA2)*8) + 4;
[; ;pic18f27j13.h: 16846: extern volatile __bit CSRC1 @ (((unsigned) &TXSTA1)*8) + 7;
[; ;pic18f27j13.h: 16848: extern volatile __bit CSRC2 @ (((unsigned) &TXSTA2)*8) + 7;
[; ;pic18f27j13.h: 16850: extern volatile __bit CTED1 @ (((unsigned) &PORTB)*8) + 2;
[; ;pic18f27j13.h: 16852: extern volatile __bit CTED2 @ (((unsigned) &PORTB)*8) + 3;
[; ;pic18f27j13.h: 16854: extern volatile __bit CTMUDS @ (((unsigned) &ODCON3)*8) + 7;
[; ;pic18f27j13.h: 16856: extern volatile __bit CTMUEN @ (((unsigned) &CTMUCONH)*8) + 7;
[; ;pic18f27j13.h: 16858: extern volatile __bit CTMUIE @ (((unsigned) &PIE3)*8) + 2;
[; ;pic18f27j13.h: 16860: extern volatile __bit CTMUIF @ (((unsigned) &PIR3)*8) + 2;
[; ;pic18f27j13.h: 16862: extern volatile __bit CTMUIP @ (((unsigned) &IPR3)*8) + 2;
[; ;pic18f27j13.h: 16864: extern volatile __bit CTMUMD @ (((unsigned) &PMDIS1)*8) + 6;
[; ;pic18f27j13.h: 16866: extern volatile __bit CTMUSIDL @ (((unsigned) &CTMUCONH)*8) + 5;
[; ;pic18f27j13.h: 16868: extern volatile __bit CTPLS @ (((unsigned) &PORTC)*8) + 2;
[; ;pic18f27j13.h: 16870: extern volatile __bit CTTRIG @ (((unsigned) &CTMUCONH)*8) + 0;
[; ;pic18f27j13.h: 16872: extern volatile __bit CVR0 @ (((unsigned) &CVRCON)*8) + 0;
[; ;pic18f27j13.h: 16874: extern volatile __bit CVR1 @ (((unsigned) &CVRCON)*8) + 1;
[; ;pic18f27j13.h: 16876: extern volatile __bit CVR2 @ (((unsigned) &CVRCON)*8) + 2;
[; ;pic18f27j13.h: 16878: extern volatile __bit CVR3 @ (((unsigned) &CVRCON)*8) + 3;
[; ;pic18f27j13.h: 16880: extern volatile __bit CVREF @ (((unsigned) &PORTA)*8) + 2;
[; ;pic18f27j13.h: 16882: extern volatile __bit CVREN @ (((unsigned) &CVRCON)*8) + 7;
[; ;pic18f27j13.h: 16884: extern volatile __bit CVROE @ (((unsigned) &CVRCON)*8) + 6;
[; ;pic18f27j13.h: 16886: extern volatile __bit CVROEN @ (((unsigned) &CVRCON)*8) + 6;
[; ;pic18f27j13.h: 16888: extern volatile __bit CVRR @ (((unsigned) &CVRCON)*8) + 5;
[; ;pic18f27j13.h: 16890: extern volatile __bit CVRSS @ (((unsigned) &CVRCON)*8) + 4;
[; ;pic18f27j13.h: 16892: extern volatile __bit DA @ (((unsigned) &SSP1STAT)*8) + 5;
[; ;pic18f27j13.h: 16894: extern volatile __bit DA1 @ (((unsigned) &SSP1STAT)*8) + 5;
[; ;pic18f27j13.h: 16896: extern volatile __bit DA2 @ (((unsigned) &SSP2STAT)*8) + 5;
[; ;pic18f27j13.h: 16898: extern volatile __bit DATA_ADDRESS @ (((unsigned) &SSP1STAT)*8) + 5;
[; ;pic18f27j13.h: 16900: extern volatile __bit DATA_ADDRESS2 @ (((unsigned) &SSP2STAT)*8) + 5;
[; ;pic18f27j13.h: 16902: extern volatile __bit DC @ (((unsigned) &STATUS)*8) + 1;
[; ;pic18f27j13.h: 16904: extern volatile __bit DC10B0 @ (((unsigned) &CCP10CON)*8) + 4;
[; ;pic18f27j13.h: 16906: extern volatile __bit DC10B1 @ (((unsigned) &CCP10CON)*8) + 5;
[; ;pic18f27j13.h: 16908: extern volatile __bit DC1B0 @ (((unsigned) &CCP1CON)*8) + 4;
[; ;pic18f27j13.h: 16910: extern volatile __bit DC1B1 @ (((unsigned) &CCP1CON)*8) + 5;
[; ;pic18f27j13.h: 16912: extern volatile __bit DC2B0 @ (((unsigned) &CCP2CON)*8) + 4;
[; ;pic18f27j13.h: 16914: extern volatile __bit DC2B1 @ (((unsigned) &CCP2CON)*8) + 5;
[; ;pic18f27j13.h: 16916: extern volatile __bit DC3B0 @ (((unsigned) &CCP3CON)*8) + 4;
[; ;pic18f27j13.h: 16918: extern volatile __bit DC3B1 @ (((unsigned) &CCP3CON)*8) + 5;
[; ;pic18f27j13.h: 16920: extern volatile __bit DC4B0 @ (((unsigned) &CCP4CON)*8) + 4;
[; ;pic18f27j13.h: 16922: extern volatile __bit DC4B1 @ (((unsigned) &CCP4CON)*8) + 5;
[; ;pic18f27j13.h: 16924: extern volatile __bit DC5B0 @ (((unsigned) &CCP5CON)*8) + 4;
[; ;pic18f27j13.h: 16926: extern volatile __bit DC5B1 @ (((unsigned) &CCP5CON)*8) + 5;
[; ;pic18f27j13.h: 16928: extern volatile __bit DC6B0 @ (((unsigned) &CCP6CON)*8) + 4;
[; ;pic18f27j13.h: 16930: extern volatile __bit DC6B1 @ (((unsigned) &CCP6CON)*8) + 5;
[; ;pic18f27j13.h: 16932: extern volatile __bit DC7B0 @ (((unsigned) &CCP7CON)*8) + 4;
[; ;pic18f27j13.h: 16934: extern volatile __bit DC7B1 @ (((unsigned) &CCP7CON)*8) + 5;
[; ;pic18f27j13.h: 16936: extern volatile __bit DC8B0 @ (((unsigned) &CCP8CON)*8) + 4;
[; ;pic18f27j13.h: 16938: extern volatile __bit DC8B1 @ (((unsigned) &CCP8CON)*8) + 5;
[; ;pic18f27j13.h: 16940: extern volatile __bit DC9B0 @ (((unsigned) &CCP9CON)*8) + 4;
[; ;pic18f27j13.h: 16942: extern volatile __bit DC9B1 @ (((unsigned) &CCP9CON)*8) + 5;
[; ;pic18f27j13.h: 16944: extern volatile __bit DLYCYC0 @ (((unsigned) &DMACON2)*8) + 4;
[; ;pic18f27j13.h: 16946: extern volatile __bit DLYCYC1 @ (((unsigned) &DMACON2)*8) + 5;
[; ;pic18f27j13.h: 16948: extern volatile __bit DLYCYC2 @ (((unsigned) &DMACON2)*8) + 6;
[; ;pic18f27j13.h: 16950: extern volatile __bit DLYCYC3 @ (((unsigned) &DMACON2)*8) + 7;
[; ;pic18f27j13.h: 16952: extern volatile __bit DLYINTEN @ (((unsigned) &DMACON1)*8) + 1;
[; ;pic18f27j13.h: 16954: extern volatile __bit DMAEN @ (((unsigned) &DMACON1)*8) + 0;
[; ;pic18f27j13.h: 16956: extern volatile __bit DONE @ (((unsigned) &ADCON0)*8) + 1;
[; ;pic18f27j13.h: 16958: extern volatile __bit DS @ (((unsigned) &WDTCON)*8) + 3;
[; ;pic18f27j13.h: 16960: extern volatile __bit DSBOR @ (((unsigned) &DSCONL)*8) + 1;
[; ;pic18f27j13.h: 16962: extern volatile __bit DSEN @ (((unsigned) &DSCONH)*8) + 7;
[; ;pic18f27j13.h: 16964: extern volatile __bit DSFLT @ (((unsigned) &DSWAKEL)*8) + 7;
[; ;pic18f27j13.h: 16966: extern volatile __bit DSINT0 @ (((unsigned) &DSWAKEH)*8) + 0;
[; ;pic18f27j13.h: 16968: extern volatile __bit DSMCLR @ (((unsigned) &DSWAKEL)*8) + 2;
[; ;pic18f27j13.h: 16970: extern volatile __bit DSPOR @ (((unsigned) &DSWAKEL)*8) + 0;
[; ;pic18f27j13.h: 16972: extern volatile __bit DSRTC @ (((unsigned) &DSWAKEL)*8) + 3;
[; ;pic18f27j13.h: 16974: extern volatile __bit DSULP @ (((unsigned) &DSWAKEL)*8) + 5;
[; ;pic18f27j13.h: 16976: extern volatile __bit DSULPEN @ (((unsigned) &DSCONH)*8) + 1;
[; ;pic18f27j13.h: 16978: extern volatile __bit DSWDT @ (((unsigned) &DSWAKEL)*8) + 4;
[; ;pic18f27j13.h: 16980: extern volatile __bit DT1 @ (((unsigned) &PORTC)*8) + 7;
[; ;pic18f27j13.h: 16982: extern volatile __bit DTRXP @ (((unsigned) &BAUDCON1)*8) + 5;
[; ;pic18f27j13.h: 16984: extern volatile __bit DTRXP1 @ (((unsigned) &BAUDCON1)*8) + 5;
[; ;pic18f27j13.h: 16986: extern volatile __bit DTRXP2 @ (((unsigned) &BAUDCON2)*8) + 5;
[; ;pic18f27j13.h: 16988: extern volatile __bit DUPLEX0 @ (((unsigned) &DMACON1)*8) + 2;
[; ;pic18f27j13.h: 16990: extern volatile __bit DUPLEX1 @ (((unsigned) &DMACON1)*8) + 3;
[; ;pic18f27j13.h: 16992: extern volatile __bit D_A @ (((unsigned) &SSP1STAT)*8) + 5;
[; ;pic18f27j13.h: 16994: extern volatile __bit D_A2 @ (((unsigned) &SSP2STAT)*8) + 5;
[; ;pic18f27j13.h: 16996: extern volatile __bit D_nA2 @ (((unsigned) &SSP2STAT)*8) + 5;
[; ;pic18f27j13.h: 16998: extern volatile __bit ECCP1AS0 @ (((unsigned) &ECCP1AS)*8) + 4;
[; ;pic18f27j13.h: 17000: extern volatile __bit ECCP1AS1 @ (((unsigned) &ECCP1AS)*8) + 5;
[; ;pic18f27j13.h: 17002: extern volatile __bit ECCP1AS2 @ (((unsigned) &ECCP1AS)*8) + 6;
[; ;pic18f27j13.h: 17004: extern volatile __bit ECCP1ASE @ (((unsigned) &ECCP1AS)*8) + 7;
[; ;pic18f27j13.h: 17006: extern volatile __bit ECCP1MD @ (((unsigned) &PMDIS0)*8) + 5;
[; ;pic18f27j13.h: 17008: extern volatile __bit ECCP1OD @ (((unsigned) &ODCON1)*8) + 0;
[; ;pic18f27j13.h: 17010: extern volatile __bit ECCP2AS0 @ (((unsigned) &ECCP2AS)*8) + 4;
[; ;pic18f27j13.h: 17012: extern volatile __bit ECCP2AS1 @ (((unsigned) &ECCP2AS)*8) + 5;
[; ;pic18f27j13.h: 17014: extern volatile __bit ECCP2AS2 @ (((unsigned) &ECCP2AS)*8) + 6;
[; ;pic18f27j13.h: 17016: extern volatile __bit ECCP2ASE @ (((unsigned) &ECCP2AS)*8) + 7;
[; ;pic18f27j13.h: 17018: extern volatile __bit ECCP2MD @ (((unsigned) &PMDIS0)*8) + 6;
[; ;pic18f27j13.h: 17020: extern volatile __bit ECCP2OD @ (((unsigned) &ODCON1)*8) + 1;
[; ;pic18f27j13.h: 17022: extern volatile __bit ECCP3AS0 @ (((unsigned) &ECCP3AS)*8) + 4;
[; ;pic18f27j13.h: 17024: extern volatile __bit ECCP3AS1 @ (((unsigned) &ECCP3AS)*8) + 5;
[; ;pic18f27j13.h: 17026: extern volatile __bit ECCP3AS2 @ (((unsigned) &ECCP3AS)*8) + 6;
[; ;pic18f27j13.h: 17028: extern volatile __bit ECCP3ASE @ (((unsigned) &ECCP3AS)*8) + 7;
[; ;pic18f27j13.h: 17030: extern volatile __bit ECCP3MD @ (((unsigned) &PMDIS0)*8) + 7;
[; ;pic18f27j13.h: 17032: extern volatile __bit ECCP3OD @ (((unsigned) &ODCON1)*8) + 2;
[; ;pic18f27j13.h: 17034: extern volatile __bit EDG1POL @ (((unsigned) &CTMUCONL)*8) + 4;
[; ;pic18f27j13.h: 17036: extern volatile __bit EDG1SEL0 @ (((unsigned) &CTMUCONL)*8) + 2;
[; ;pic18f27j13.h: 17038: extern volatile __bit EDG1SEL1 @ (((unsigned) &CTMUCONL)*8) + 3;
[; ;pic18f27j13.h: 17040: extern volatile __bit EDG1STAT @ (((unsigned) &CTMUCONL)*8) + 0;
[; ;pic18f27j13.h: 17042: extern volatile __bit EDG2POL @ (((unsigned) &CTMUCONL)*8) + 7;
[; ;pic18f27j13.h: 17044: extern volatile __bit EDG2SEL0 @ (((unsigned) &CTMUCONL)*8) + 5;
[; ;pic18f27j13.h: 17046: extern volatile __bit EDG2SEL1 @ (((unsigned) &CTMUCONL)*8) + 6;
[; ;pic18f27j13.h: 17048: extern volatile __bit EDG2STAT @ (((unsigned) &CTMUCONL)*8) + 1;
[; ;pic18f27j13.h: 17050: extern volatile __bit EDGEN @ (((unsigned) &CTMUCONH)*8) + 3;
[; ;pic18f27j13.h: 17052: extern volatile __bit EDGSEQEN @ (((unsigned) &CTMUCONH)*8) + 2;
[; ;pic18f27j13.h: 17054: extern volatile __bit EVPOL01 @ (((unsigned) &CM1CON)*8) + 3;
[; ;pic18f27j13.h: 17056: extern volatile __bit EVPOL02 @ (((unsigned) &CM2CON)*8) + 3;
[; ;pic18f27j13.h: 17058: extern volatile __bit EVPOL03 @ (((unsigned) &CM3CON)*8) + 3;
[; ;pic18f27j13.h: 17060: extern volatile __bit EVPOL05 @ (((unsigned) &IPR5)*8) + 3;
[; ;pic18f27j13.h: 17062: extern volatile __bit EVPOL11 @ (((unsigned) &CM1CON)*8) + 4;
[; ;pic18f27j13.h: 17064: extern volatile __bit EVPOL12 @ (((unsigned) &CM2CON)*8) + 4;
[; ;pic18f27j13.h: 17066: extern volatile __bit EVPOL13 @ (((unsigned) &CM3CON)*8) + 4;
[; ;pic18f27j13.h: 17068: extern volatile __bit EVPOL15 @ (((unsigned) &IPR5)*8) + 4;
[; ;pic18f27j13.h: 17070: extern volatile __bit FERR1 @ (((unsigned) &RCSTA1)*8) + 2;
[; ;pic18f27j13.h: 17072: extern volatile __bit FERR2 @ (((unsigned) &RCSTA2)*8) + 2;
[; ;pic18f27j13.h: 17074: extern volatile __bit FREE @ (((unsigned) &EECON1)*8) + 4;
[; ;pic18f27j13.h: 17076: extern volatile __bit GCEN1 @ (((unsigned) &SSP1CON2)*8) + 7;
[; ;pic18f27j13.h: 17078: extern volatile __bit GCEN2 @ (((unsigned) &SSP2CON2)*8) + 7;
[; ;pic18f27j13.h: 17080: extern volatile __bit GIE @ (((unsigned) &INTCON)*8) + 7;
[; ;pic18f27j13.h: 17082: extern volatile __bit GIEH @ (((unsigned) &INTCON)*8) + 7;
[; ;pic18f27j13.h: 17084: extern volatile __bit GIEL @ (((unsigned) &INTCON)*8) + 6;
[; ;pic18f27j13.h: 17086: extern volatile __bit GIE_GIEH @ (((unsigned) &INTCON)*8) + 7;
[; ;pic18f27j13.h: 17088: extern volatile __bit GO @ (((unsigned) &ADCON0)*8) + 1;
[; ;pic18f27j13.h: 17090: extern volatile __bit GODONE @ (((unsigned) &ADCON0)*8) + 1;
[; ;pic18f27j13.h: 17092: extern volatile __bit GO_DONE @ (((unsigned) &ADCON0)*8) + 1;
[; ;pic18f27j13.h: 17094: extern volatile __bit GO_NOT_DONE @ (((unsigned) &ADCON0)*8) + 1;
[; ;pic18f27j13.h: 17096: extern volatile __bit GO_nDONE @ (((unsigned) &ADCON0)*8) + 1;
[; ;pic18f27j13.h: 17098: extern volatile __bit HALFSEC @ (((unsigned) &RTCCFG)*8) + 3;
[; ;pic18f27j13.h: 17100: extern volatile __bit HLVDEN @ (((unsigned) &HLVDCON)*8) + 4;
[; ;pic18f27j13.h: 17102: extern volatile __bit HLVDIE @ (((unsigned) &PIE2)*8) + 2;
[; ;pic18f27j13.h: 17104: extern volatile __bit HLVDIF @ (((unsigned) &PIR2)*8) + 2;
[; ;pic18f27j13.h: 17106: extern volatile __bit HLVDIN @ (((unsigned) &PORTA)*8) + 5;
[; ;pic18f27j13.h: 17108: extern volatile __bit HLVDIP @ (((unsigned) &IPR2)*8) + 2;
[; ;pic18f27j13.h: 17110: extern volatile __bit HLVDL0 @ (((unsigned) &HLVDCON)*8) + 0;
[; ;pic18f27j13.h: 17112: extern volatile __bit HLVDL1 @ (((unsigned) &HLVDCON)*8) + 1;
[; ;pic18f27j13.h: 17114: extern volatile __bit HLVDL2 @ (((unsigned) &HLVDCON)*8) + 2;
[; ;pic18f27j13.h: 17116: extern volatile __bit HLVDL3 @ (((unsigned) &HLVDCON)*8) + 3;
[; ;pic18f27j13.h: 17118: extern volatile __bit I2C_DAT @ (((unsigned) &SSP1STAT)*8) + 5;
[; ;pic18f27j13.h: 17120: extern volatile __bit I2C_DAT2 @ (((unsigned) &SSP2STAT)*8) + 5;
[; ;pic18f27j13.h: 17122: extern volatile __bit I2C_READ @ (((unsigned) &SSP1STAT)*8) + 2;
[; ;pic18f27j13.h: 17124: extern volatile __bit I2C_READ2 @ (((unsigned) &SSP2STAT)*8) + 2;
[; ;pic18f27j13.h: 17126: extern volatile __bit I2C_START @ (((unsigned) &SSP1STAT)*8) + 3;
[; ;pic18f27j13.h: 17128: extern volatile __bit I2C_START2 @ (((unsigned) &SSP2STAT)*8) + 3;
[; ;pic18f27j13.h: 17130: extern volatile __bit I2C_STOP @ (((unsigned) &SSP1STAT)*8) + 4;
[; ;pic18f27j13.h: 17132: extern volatile __bit I2C_STOP2 @ (((unsigned) &SSP2STAT)*8) + 4;
[; ;pic18f27j13.h: 17134: extern volatile __bit IDISSEN @ (((unsigned) &CTMUCONH)*8) + 1;
[; ;pic18f27j13.h: 17136: extern volatile __bit IDLEN @ (((unsigned) &OSCCON)*8) + 7;
[; ;pic18f27j13.h: 17138: extern volatile __bit INT0 @ (((unsigned) &PORTB)*8) + 0;
[; ;pic18f27j13.h: 17140: extern volatile __bit INT0E @ (((unsigned) &INTCON)*8) + 4;
[; ;pic18f27j13.h: 17142: extern volatile __bit INT0F @ (((unsigned) &INTCON)*8) + 1;
[; ;pic18f27j13.h: 17144: extern volatile __bit INT0IE @ (((unsigned) &INTCON)*8) + 4;
[; ;pic18f27j13.h: 17146: extern volatile __bit INT0IF @ (((unsigned) &INTCON)*8) + 1;
[; ;pic18f27j13.h: 17148: extern volatile __bit INT1E @ (((unsigned) &INTCON3)*8) + 3;
[; ;pic18f27j13.h: 17150: extern volatile __bit INT1F @ (((unsigned) &INTCON3)*8) + 0;
[; ;pic18f27j13.h: 17152: extern volatile __bit INT1IE @ (((unsigned) &INTCON3)*8) + 3;
[; ;pic18f27j13.h: 17154: extern volatile __bit INT1IF @ (((unsigned) &INTCON3)*8) + 0;
[; ;pic18f27j13.h: 17156: extern volatile __bit INT1IP @ (((unsigned) &INTCON3)*8) + 6;
[; ;pic18f27j13.h: 17158: extern volatile __bit INT1P @ (((unsigned) &INTCON3)*8) + 6;
[; ;pic18f27j13.h: 17160: extern volatile __bit INT2E @ (((unsigned) &INTCON3)*8) + 4;
[; ;pic18f27j13.h: 17162: extern volatile __bit INT2F @ (((unsigned) &INTCON3)*8) + 1;
[; ;pic18f27j13.h: 17164: extern volatile __bit INT2IE @ (((unsigned) &INTCON3)*8) + 4;
[; ;pic18f27j13.h: 17166: extern volatile __bit INT2IF @ (((unsigned) &INTCON3)*8) + 1;
[; ;pic18f27j13.h: 17168: extern volatile __bit INT2IP @ (((unsigned) &INTCON3)*8) + 7;
[; ;pic18f27j13.h: 17170: extern volatile __bit INT2P @ (((unsigned) &INTCON3)*8) + 7;
[; ;pic18f27j13.h: 17172: extern volatile __bit INT3E @ (((unsigned) &INTCON3)*8) + 5;
[; ;pic18f27j13.h: 17174: extern volatile __bit INT3F @ (((unsigned) &INTCON3)*8) + 2;
[; ;pic18f27j13.h: 17176: extern volatile __bit INT3IE @ (((unsigned) &INTCON3)*8) + 5;
[; ;pic18f27j13.h: 17178: extern volatile __bit INT3IF @ (((unsigned) &INTCON3)*8) + 2;
[; ;pic18f27j13.h: 17180: extern volatile __bit INT3IP @ (((unsigned) &INTCON2)*8) + 1;
[; ;pic18f27j13.h: 17182: extern volatile __bit INT3P @ (((unsigned) &INTCON2)*8) + 1;
[; ;pic18f27j13.h: 17184: extern volatile __bit INTEDG0 @ (((unsigned) &INTCON2)*8) + 6;
[; ;pic18f27j13.h: 17186: extern volatile __bit INTEDG1 @ (((unsigned) &INTCON2)*8) + 5;
[; ;pic18f27j13.h: 17188: extern volatile __bit INTEDG2 @ (((unsigned) &INTCON2)*8) + 4;
[; ;pic18f27j13.h: 17190: extern volatile __bit INTEDG3 @ (((unsigned) &INTCON2)*8) + 3;
[; ;pic18f27j13.h: 17192: extern volatile __bit INTLVL0 @ (((unsigned) &DMACON2)*8) + 0;
[; ;pic18f27j13.h: 17194: extern volatile __bit INTLVL1 @ (((unsigned) &DMACON2)*8) + 1;
[; ;pic18f27j13.h: 17196: extern volatile __bit INTLVL2 @ (((unsigned) &DMACON2)*8) + 2;
[; ;pic18f27j13.h: 17198: extern volatile __bit INTLVL3 @ (((unsigned) &DMACON2)*8) + 3;
[; ;pic18f27j13.h: 17200: extern volatile __bit INTSRC @ (((unsigned) &OSCTUNE)*8) + 7;
[; ;pic18f27j13.h: 17202: extern volatile __bit IOLOCK @ (((unsigned) &PPSCON)*8) + 0;
[; ;pic18f27j13.h: 17204: extern volatile __bit IPEN @ (((unsigned) &RCON)*8) + 7;
[; ;pic18f27j13.h: 17206: extern volatile __bit IRCF0 @ (((unsigned) &OSCCON)*8) + 4;
[; ;pic18f27j13.h: 17208: extern volatile __bit IRCF1 @ (((unsigned) &OSCCON)*8) + 5;
[; ;pic18f27j13.h: 17210: extern volatile __bit IRCF2 @ (((unsigned) &OSCCON)*8) + 6;
[; ;pic18f27j13.h: 17212: extern volatile __bit IRNG0 @ (((unsigned) &CTMUICON)*8) + 0;
[; ;pic18f27j13.h: 17214: extern volatile __bit IRNG1 @ (((unsigned) &CTMUICON)*8) + 1;
[; ;pic18f27j13.h: 17216: extern volatile __bit IRVST @ (((unsigned) &HLVDCON)*8) + 5;
[; ;pic18f27j13.h: 17218: extern volatile __bit ITRIM0 @ (((unsigned) &CTMUICON)*8) + 2;
[; ;pic18f27j13.h: 17220: extern volatile __bit ITRIM1 @ (((unsigned) &CTMUICON)*8) + 3;
[; ;pic18f27j13.h: 17222: extern volatile __bit ITRIM2 @ (((unsigned) &CTMUICON)*8) + 4;
[; ;pic18f27j13.h: 17224: extern volatile __bit ITRIM3 @ (((unsigned) &CTMUICON)*8) + 5;
[; ;pic18f27j13.h: 17226: extern volatile __bit ITRIM4 @ (((unsigned) &CTMUICON)*8) + 6;
[; ;pic18f27j13.h: 17228: extern volatile __bit ITRIM5 @ (((unsigned) &CTMUICON)*8) + 7;
[; ;pic18f27j13.h: 17230: extern volatile __bit KBI0 @ (((unsigned) &PORTB)*8) + 4;
[; ;pic18f27j13.h: 17232: extern volatile __bit KBI1 @ (((unsigned) &PORTB)*8) + 5;
[; ;pic18f27j13.h: 17234: extern volatile __bit KBI2 @ (((unsigned) &PORTB)*8) + 6;
[; ;pic18f27j13.h: 17236: extern volatile __bit KBI3 @ (((unsigned) &PORTB)*8) + 7;
[; ;pic18f27j13.h: 17238: extern volatile __bit LA0 @ (((unsigned) &LATA)*8) + 0;
[; ;pic18f27j13.h: 17240: extern volatile __bit LA1 @ (((unsigned) &LATA)*8) + 1;
[; ;pic18f27j13.h: 17242: extern volatile __bit LA2 @ (((unsigned) &LATA)*8) + 2;
[; ;pic18f27j13.h: 17244: extern volatile __bit LA3 @ (((unsigned) &LATA)*8) + 3;
[; ;pic18f27j13.h: 17246: extern volatile __bit LA4 @ (((unsigned) &LATA)*8) + 4;
[; ;pic18f27j13.h: 17248: extern volatile __bit LA5 @ (((unsigned) &LATA)*8) + 5;
[; ;pic18f27j13.h: 17250: extern volatile __bit LA6 @ (((unsigned) &LATA)*8) + 6;
[; ;pic18f27j13.h: 17252: extern volatile __bit LA7 @ (((unsigned) &LATA)*8) + 7;
[; ;pic18f27j13.h: 17254: extern volatile __bit LATA0 @ (((unsigned) &LATA)*8) + 0;
[; ;pic18f27j13.h: 17256: extern volatile __bit LATA1 @ (((unsigned) &LATA)*8) + 1;
[; ;pic18f27j13.h: 17258: extern volatile __bit LATA2 @ (((unsigned) &LATA)*8) + 2;
[; ;pic18f27j13.h: 17260: extern volatile __bit LATA3 @ (((unsigned) &LATA)*8) + 3;
[; ;pic18f27j13.h: 17262: extern volatile __bit LATA5 @ (((unsigned) &LATA)*8) + 5;
[; ;pic18f27j13.h: 17264: extern volatile __bit LATA6 @ (((unsigned) &LATA)*8) + 6;
[; ;pic18f27j13.h: 17266: extern volatile __bit LATA7 @ (((unsigned) &LATA)*8) + 7;
[; ;pic18f27j13.h: 17268: extern volatile __bit LATB0 @ (((unsigned) &LATB)*8) + 0;
[; ;pic18f27j13.h: 17270: extern volatile __bit LATB1 @ (((unsigned) &LATB)*8) + 1;
[; ;pic18f27j13.h: 17272: extern volatile __bit LATB2 @ (((unsigned) &LATB)*8) + 2;
[; ;pic18f27j13.h: 17274: extern volatile __bit LATB3 @ (((unsigned) &LATB)*8) + 3;
[; ;pic18f27j13.h: 17276: extern volatile __bit LATB4 @ (((unsigned) &LATB)*8) + 4;
[; ;pic18f27j13.h: 17278: extern volatile __bit LATB5 @ (((unsigned) &LATB)*8) + 5;
[; ;pic18f27j13.h: 17280: extern volatile __bit LATB6 @ (((unsigned) &LATB)*8) + 6;
[; ;pic18f27j13.h: 17282: extern volatile __bit LATB7 @ (((unsigned) &LATB)*8) + 7;
[; ;pic18f27j13.h: 17284: extern volatile __bit LATC0 @ (((unsigned) &LATC)*8) + 0;
[; ;pic18f27j13.h: 17286: extern volatile __bit LATC1 @ (((unsigned) &LATC)*8) + 1;
[; ;pic18f27j13.h: 17288: extern volatile __bit LATC2 @ (((unsigned) &LATC)*8) + 2;
[; ;pic18f27j13.h: 17290: extern volatile __bit LATC3 @ (((unsigned) &LATC)*8) + 3;
[; ;pic18f27j13.h: 17292: extern volatile __bit LATC4 @ (((unsigned) &LATC)*8) + 4;
[; ;pic18f27j13.h: 17294: extern volatile __bit LATC5 @ (((unsigned) &LATC)*8) + 5;
[; ;pic18f27j13.h: 17296: extern volatile __bit LATC6 @ (((unsigned) &LATC)*8) + 6;
[; ;pic18f27j13.h: 17298: extern volatile __bit LATC7 @ (((unsigned) &LATC)*8) + 7;
[; ;pic18f27j13.h: 17300: extern volatile __bit LB0 @ (((unsigned) &LATB)*8) + 0;
[; ;pic18f27j13.h: 17302: extern volatile __bit LB1 @ (((unsigned) &LATB)*8) + 1;
[; ;pic18f27j13.h: 17304: extern volatile __bit LB2 @ (((unsigned) &LATB)*8) + 2;
[; ;pic18f27j13.h: 17306: extern volatile __bit LB3 @ (((unsigned) &LATB)*8) + 3;
[; ;pic18f27j13.h: 17308: extern volatile __bit LB4 @ (((unsigned) &LATB)*8) + 4;
[; ;pic18f27j13.h: 17310: extern volatile __bit LB5 @ (((unsigned) &LATB)*8) + 5;
[; ;pic18f27j13.h: 17312: extern volatile __bit LB6 @ (((unsigned) &LATB)*8) + 6;
[; ;pic18f27j13.h: 17314: extern volatile __bit LB7 @ (((unsigned) &LATB)*8) + 7;
[; ;pic18f27j13.h: 17316: extern volatile __bit LC0 @ (((unsigned) &LATC)*8) + 0;
[; ;pic18f27j13.h: 17318: extern volatile __bit LC1 @ (((unsigned) &LATC)*8) + 1;
[; ;pic18f27j13.h: 17320: extern volatile __bit LC2 @ (((unsigned) &LATC)*8) + 2;
[; ;pic18f27j13.h: 17322: extern volatile __bit LC3 @ (((unsigned) &LATC)*8) + 3;
[; ;pic18f27j13.h: 17324: extern volatile __bit LC4 @ (((unsigned) &LATC)*8) + 4;
[; ;pic18f27j13.h: 17326: extern volatile __bit LC5 @ (((unsigned) &LATC)*8) + 5;
[; ;pic18f27j13.h: 17328: extern volatile __bit LC6 @ (((unsigned) &LATC)*8) + 6;
[; ;pic18f27j13.h: 17330: extern volatile __bit LC7 @ (((unsigned) &LATC)*8) + 7;
[; ;pic18f27j13.h: 17332: extern volatile __bit LVDIE @ (((unsigned) &PIE2)*8) + 2;
[; ;pic18f27j13.h: 17334: extern volatile __bit LVDIF @ (((unsigned) &PIR2)*8) + 2;
[; ;pic18f27j13.h: 17336: extern volatile __bit LVDIN @ (((unsigned) &PORTA)*8) + 5;
[; ;pic18f27j13.h: 17338: extern volatile __bit LVDIP @ (((unsigned) &IPR2)*8) + 2;
[; ;pic18f27j13.h: 17340: extern volatile __bit LVDSTAT @ (((unsigned) &WDTCON)*8) + 6;
[; ;pic18f27j13.h: 17342: extern volatile __bit MSK01 @ (((unsigned) &SSP1ADD)*8) + 0;
[; ;pic18f27j13.h: 17344: extern volatile __bit MSK02 @ (((unsigned) &SSP2ADD)*8) + 0;
[; ;pic18f27j13.h: 17346: extern volatile __bit MSK11 @ (((unsigned) &SSP1ADD)*8) + 1;
[; ;pic18f27j13.h: 17348: extern volatile __bit MSK12 @ (((unsigned) &SSP2ADD)*8) + 1;
[; ;pic18f27j13.h: 17350: extern volatile __bit MSK21 @ (((unsigned) &SSP1ADD)*8) + 2;
[; ;pic18f27j13.h: 17352: extern volatile __bit MSK22 @ (((unsigned) &SSP2ADD)*8) + 2;
[; ;pic18f27j13.h: 17354: extern volatile __bit MSK31 @ (((unsigned) &SSP1ADD)*8) + 3;
[; ;pic18f27j13.h: 17356: extern volatile __bit MSK32 @ (((unsigned) &SSP2ADD)*8) + 3;
[; ;pic18f27j13.h: 17358: extern volatile __bit MSK41 @ (((unsigned) &SSP1ADD)*8) + 4;
[; ;pic18f27j13.h: 17360: extern volatile __bit MSK42 @ (((unsigned) &SSP2ADD)*8) + 4;
[; ;pic18f27j13.h: 17362: extern volatile __bit MSK51 @ (((unsigned) &SSP1ADD)*8) + 5;
[; ;pic18f27j13.h: 17364: extern volatile __bit MSK52 @ (((unsigned) &SSP2ADD)*8) + 5;
[; ;pic18f27j13.h: 17366: extern volatile __bit MSK61 @ (((unsigned) &SSP1ADD)*8) + 6;
[; ;pic18f27j13.h: 17368: extern volatile __bit MSK62 @ (((unsigned) &SSP2ADD)*8) + 6;
[; ;pic18f27j13.h: 17370: extern volatile __bit MSK71 @ (((unsigned) &SSP1ADD)*8) + 7;
[; ;pic18f27j13.h: 17372: extern volatile __bit MSK72 @ (((unsigned) &SSP2ADD)*8) + 7;
[; ;pic18f27j13.h: 17374: extern volatile __bit NEGATIVE @ (((unsigned) &STATUS)*8) + 4;
[; ;pic18f27j13.h: 17376: extern volatile __bit NOT_A @ (((unsigned) &SSP1STAT)*8) + 5;
[; ;pic18f27j13.h: 17378: extern volatile __bit NOT_ADDRESS @ (((unsigned) &SSP1STAT)*8) + 5;
[; ;pic18f27j13.h: 17380: extern volatile __bit NOT_BOR @ (((unsigned) &RCON)*8) + 0;
[; ;pic18f27j13.h: 17382: extern volatile __bit NOT_CM @ (((unsigned) &RCON)*8) + 5;
[; ;pic18f27j13.h: 17384: extern volatile __bit NOT_DONE @ (((unsigned) &ADCON0)*8) + 1;
[; ;pic18f27j13.h: 17386: extern volatile __bit NOT_PD @ (((unsigned) &RCON)*8) + 2;
[; ;pic18f27j13.h: 17388: extern volatile __bit NOT_POR @ (((unsigned) &RCON)*8) + 1;
[; ;pic18f27j13.h: 17390: extern volatile __bit NOT_RBPU @ (((unsigned) &INTCON2)*8) + 7;
[; ;pic18f27j13.h: 17392: extern volatile __bit NOT_RC8 @ (((unsigned) &RCSTA1)*8) + 6;
[; ;pic18f27j13.h: 17394: extern volatile __bit NOT_RI @ (((unsigned) &RCON)*8) + 4;
[; ;pic18f27j13.h: 17396: extern volatile __bit NOT_SS1 @ (((unsigned) &PORTA)*8) + 5;
[; ;pic18f27j13.h: 17398: extern volatile __bit NOT_T1DONE @ (((unsigned) &T1GCON)*8) + 3;
[; ;pic18f27j13.h: 17400: extern volatile __bit NOT_T1SYNC @ (((unsigned) &T1CON)*8) + 2;
[; ;pic18f27j13.h: 17402: extern volatile __bit NOT_T3SYNC @ (((unsigned) &T3CON)*8) + 2;
[; ;pic18f27j13.h: 17404: extern volatile __bit NOT_T5DONE @ (((unsigned) &T5GCON)*8) + 3;
[; ;pic18f27j13.h: 17406: extern volatile __bit NOT_T5SYNC @ (((unsigned) &T5CON)*8) + 2;
[; ;pic18f27j13.h: 17408: extern volatile __bit NOT_TO @ (((unsigned) &RCON)*8) + 3;
[; ;pic18f27j13.h: 17410: extern volatile __bit NOT_TX8 @ (((unsigned) &TXSTA1)*8) + 6;
[; ;pic18f27j13.h: 17412: extern volatile __bit NOT_W @ (((unsigned) &SSP1STAT)*8) + 2;
[; ;pic18f27j13.h: 17414: extern volatile __bit NOT_WRITE @ (((unsigned) &SSP1STAT)*8) + 2;
[; ;pic18f27j13.h: 17416: extern volatile __bit OERR1 @ (((unsigned) &RCSTA1)*8) + 1;
[; ;pic18f27j13.h: 17418: extern volatile __bit OERR2 @ (((unsigned) &RCSTA2)*8) + 1;
[; ;pic18f27j13.h: 17420: extern volatile __bit OSC1 @ (((unsigned) &PORTA)*8) + 7;
[; ;pic18f27j13.h: 17422: extern volatile __bit OSC2 @ (((unsigned) &PORTA)*8) + 6;
[; ;pic18f27j13.h: 17424: extern volatile __bit OSCFIE @ (((unsigned) &PIE2)*8) + 7;
[; ;pic18f27j13.h: 17426: extern volatile __bit OSCFIF @ (((unsigned) &PIR2)*8) + 7;
[; ;pic18f27j13.h: 17428: extern volatile __bit OSCFIP @ (((unsigned) &IPR2)*8) + 7;
[; ;pic18f27j13.h: 17430: extern volatile __bit OSTS @ (((unsigned) &OSCCON)*8) + 3;
[; ;pic18f27j13.h: 17432: extern volatile __bit OV @ (((unsigned) &STATUS)*8) + 3;
[; ;pic18f27j13.h: 17434: extern volatile __bit OVERFLOW @ (((unsigned) &STATUS)*8) + 3;
[; ;pic18f27j13.h: 17436: extern volatile __bit P1DC0 @ (((unsigned) &ECCP1DEL)*8) + 0;
[; ;pic18f27j13.h: 17438: extern volatile __bit P1DC1 @ (((unsigned) &ECCP1DEL)*8) + 1;
[; ;pic18f27j13.h: 17440: extern volatile __bit P1DC2 @ (((unsigned) &ECCP1DEL)*8) + 2;
[; ;pic18f27j13.h: 17442: extern volatile __bit P1DC3 @ (((unsigned) &ECCP1DEL)*8) + 3;
[; ;pic18f27j13.h: 17444: extern volatile __bit P1DC4 @ (((unsigned) &ECCP1DEL)*8) + 4;
[; ;pic18f27j13.h: 17446: extern volatile __bit P1DC5 @ (((unsigned) &ECCP1DEL)*8) + 5;
[; ;pic18f27j13.h: 17448: extern volatile __bit P1DC6 @ (((unsigned) &ECCP1DEL)*8) + 6;
[; ;pic18f27j13.h: 17450: extern volatile __bit P1M0 @ (((unsigned) &CCP1CON)*8) + 6;
[; ;pic18f27j13.h: 17452: extern volatile __bit P1M1 @ (((unsigned) &CCP1CON)*8) + 7;
[; ;pic18f27j13.h: 17454: extern volatile __bit P1RSEN @ (((unsigned) &ECCP1DEL)*8) + 7;
[; ;pic18f27j13.h: 17456: extern volatile __bit P2 @ (((unsigned) &SSP2STAT)*8) + 4;
[; ;pic18f27j13.h: 17458: extern volatile __bit P2DC02 @ (((unsigned) &PSTR2CON)*8) + 0;
[; ;pic18f27j13.h: 17460: extern volatile __bit P2DC0CON @ (((unsigned) &PSTR2CON)*8) + 0;
[; ;pic18f27j13.h: 17462: extern volatile __bit P2DC12 @ (((unsigned) &PSTR2CON)*8) + 1;
[; ;pic18f27j13.h: 17464: extern volatile __bit P2DC1CON @ (((unsigned) &PSTR2CON)*8) + 1;
[; ;pic18f27j13.h: 17466: extern volatile __bit P2DC22 @ (((unsigned) &PSTR2CON)*8) + 2;
[; ;pic18f27j13.h: 17468: extern volatile __bit P2DC2CON @ (((unsigned) &PSTR2CON)*8) + 2;
[; ;pic18f27j13.h: 17470: extern volatile __bit P2DC32 @ (((unsigned) &PSTR2CON)*8) + 3;
[; ;pic18f27j13.h: 17472: extern volatile __bit P2DC3CON @ (((unsigned) &PSTR2CON)*8) + 3;
[; ;pic18f27j13.h: 17474: extern volatile __bit P2DC42 @ (((unsigned) &PSTR2CON)*8) + 4;
[; ;pic18f27j13.h: 17476: extern volatile __bit P2DC4CON @ (((unsigned) &PSTR2CON)*8) + 4;
[; ;pic18f27j13.h: 17478: extern volatile __bit P2DC52 @ (((unsigned) &PSTR2CON)*8) + 5;
[; ;pic18f27j13.h: 17480: extern volatile __bit P2DC5CON @ (((unsigned) &PSTR2CON)*8) + 5;
[; ;pic18f27j13.h: 17482: extern volatile __bit P2DC62 @ (((unsigned) &PSTR2CON)*8) + 6;
[; ;pic18f27j13.h: 17484: extern volatile __bit P2DC6CON @ (((unsigned) &PSTR2CON)*8) + 6;
[; ;pic18f27j13.h: 17486: extern volatile __bit P2M0 @ (((unsigned) &CCP2CON)*8) + 6;
[; ;pic18f27j13.h: 17488: extern volatile __bit P2M1 @ (((unsigned) &CCP2CON)*8) + 7;
[; ;pic18f27j13.h: 17490: extern volatile __bit P2RSEN @ (((unsigned) &ECCP2DEL)*8) + 7;
[; ;pic18f27j13.h: 17492: extern volatile __bit P3DC0 @ (((unsigned) &ECCP3DEL)*8) + 0;
[; ;pic18f27j13.h: 17494: extern volatile __bit P3DC1 @ (((unsigned) &ECCP3DEL)*8) + 1;
[; ;pic18f27j13.h: 17496: extern volatile __bit P3DC2 @ (((unsigned) &ECCP3DEL)*8) + 2;
[; ;pic18f27j13.h: 17498: extern volatile __bit P3DC3 @ (((unsigned) &ECCP3DEL)*8) + 3;
[; ;pic18f27j13.h: 17500: extern volatile __bit P3DC4 @ (((unsigned) &ECCP3DEL)*8) + 4;
[; ;pic18f27j13.h: 17502: extern volatile __bit P3DC5 @ (((unsigned) &ECCP3DEL)*8) + 5;
[; ;pic18f27j13.h: 17504: extern volatile __bit P3DC6 @ (((unsigned) &ECCP3DEL)*8) + 6;
[; ;pic18f27j13.h: 17506: extern volatile __bit P3M0 @ (((unsigned) &CCP3CON)*8) + 6;
[; ;pic18f27j13.h: 17508: extern volatile __bit P3M1 @ (((unsigned) &CCP3CON)*8) + 7;
[; ;pic18f27j13.h: 17510: extern volatile __bit P3RSEN @ (((unsigned) &ECCP3DEL)*8) + 7;
[; ;pic18f27j13.h: 17512: extern volatile __bit PA1 @ (((unsigned) &PORTC)*8) + 2;
[; ;pic18f27j13.h: 17514: extern volatile __bit PA2 @ (((unsigned) &PORTC)*8) + 1;
[; ;pic18f27j13.h: 17516: extern volatile __bit PCFG0 @ (((unsigned) &ANCON0)*8) + 0;
[; ;pic18f27j13.h: 17518: extern volatile __bit PCFG1 @ (((unsigned) &ANCON0)*8) + 1;
[; ;pic18f27j13.h: 17520: extern volatile __bit PCFG10 @ (((unsigned) &ANCON1)*8) + 2;
[; ;pic18f27j13.h: 17522: extern volatile __bit PCFG11 @ (((unsigned) &ANCON1)*8) + 3;
[; ;pic18f27j13.h: 17524: extern volatile __bit PCFG12 @ (((unsigned) &ANCON1)*8) + 4;
[; ;pic18f27j13.h: 17526: extern volatile __bit PCFG15 @ (((unsigned) &ANCON1)*8) + 7;
[; ;pic18f27j13.h: 17528: extern volatile __bit PCFG2 @ (((unsigned) &ANCON0)*8) + 2;
[; ;pic18f27j13.h: 17530: extern volatile __bit PCFG3 @ (((unsigned) &ANCON0)*8) + 3;
[; ;pic18f27j13.h: 17532: extern volatile __bit PCFG4 @ (((unsigned) &ANCON0)*8) + 4;
[; ;pic18f27j13.h: 17534: extern volatile __bit PCFG8 @ (((unsigned) &ANCON1)*8) + 0;
[; ;pic18f27j13.h: 17536: extern volatile __bit PCFG9 @ (((unsigned) &ANCON1)*8) + 1;
[; ;pic18f27j13.h: 17538: extern volatile __bit PD @ (((unsigned) &RCON)*8) + 2;
[; ;pic18f27j13.h: 17540: extern volatile __bit PEIE @ (((unsigned) &INTCON)*8) + 6;
[; ;pic18f27j13.h: 17542: extern volatile __bit PEIE_GIEL @ (((unsigned) &INTCON)*8) + 6;
[; ;pic18f27j13.h: 17544: extern volatile __bit PEN1 @ (((unsigned) &SSP1CON2)*8) + 2;
[; ;pic18f27j13.h: 17546: extern volatile __bit PEN2 @ (((unsigned) &SSP2CON2)*8) + 2;
[; ;pic18f27j13.h: 17548: extern volatile __bit PGC @ (((unsigned) &PORTB)*8) + 6;
[; ;pic18f27j13.h: 17550: extern volatile __bit PGD @ (((unsigned) &PORTB)*8) + 7;
[; ;pic18f27j13.h: 17552: extern volatile __bit PLLEN @ (((unsigned) &OSCTUNE)*8) + 6;
[; ;pic18f27j13.h: 17554: extern volatile __bit PMDADC @ (((unsigned) &PMDIS0)*8) + 0;
[; ;pic18f27j13.h: 17556: extern volatile __bit PMDCCP10 @ (((unsigned) &PMDIS3)*8) + 7;
[; ;pic18f27j13.h: 17558: extern volatile __bit PMDCCP4 @ (((unsigned) &PMDIS3)*8) + 1;
[; ;pic18f27j13.h: 17560: extern volatile __bit PMDCCP5 @ (((unsigned) &PMDIS3)*8) + 2;
[; ;pic18f27j13.h: 17562: extern volatile __bit PMDCCP6 @ (((unsigned) &PMDIS3)*8) + 3;
[; ;pic18f27j13.h: 17564: extern volatile __bit PMDCCP7 @ (((unsigned) &PMDIS3)*8) + 4;
[; ;pic18f27j13.h: 17566: extern volatile __bit PMDCCP8 @ (((unsigned) &PMDIS3)*8) + 5;
[; ;pic18f27j13.h: 17568: extern volatile __bit PMDCCP9 @ (((unsigned) &PMDIS3)*8) + 6;
[; ;pic18f27j13.h: 17570: extern volatile __bit PMDCMP1 @ (((unsigned) &PMDIS2)*8) + 0;
[; ;pic18f27j13.h: 17572: extern volatile __bit PMDCMP2 @ (((unsigned) &PMDIS2)*8) + 1;
[; ;pic18f27j13.h: 17574: extern volatile __bit PMDCMP3 @ (((unsigned) &PMDIS2)*8) + 2;
[; ;pic18f27j13.h: 17576: extern volatile __bit PMDCTMU @ (((unsigned) &PMDIS1)*8) + 6;
[; ;pic18f27j13.h: 17578: extern volatile __bit PMDECCP1 @ (((unsigned) &PMDIS0)*8) + 5;
[; ;pic18f27j13.h: 17580: extern volatile __bit PMDECCP2 @ (((unsigned) &PMDIS0)*8) + 6;
[; ;pic18f27j13.h: 17582: extern volatile __bit PMDECCP3 @ (((unsigned) &PMDIS0)*8) + 7;
[; ;pic18f27j13.h: 17584: extern volatile __bit PMDMSSP1 @ (((unsigned) &PMDIS0)*8) + 1;
[; ;pic18f27j13.h: 17586: extern volatile __bit PMDMSSP2 @ (((unsigned) &PMDIS0)*8) + 2;
[; ;pic18f27j13.h: 17588: extern volatile __bit PMDRTCC @ (((unsigned) &PMDIS1)*8) + 5;
[; ;pic18f27j13.h: 17590: extern volatile __bit PMDTMR1 @ (((unsigned) &PMDIS1)*8) + 1;
[; ;pic18f27j13.h: 17592: extern volatile __bit PMDTMR2 @ (((unsigned) &PMDIS1)*8) + 2;
[; ;pic18f27j13.h: 17594: extern volatile __bit PMDTMR3 @ (((unsigned) &PMDIS1)*8) + 3;
[; ;pic18f27j13.h: 17596: extern volatile __bit PMDTMR4 @ (((unsigned) &PMDIS1)*8) + 4;
[; ;pic18f27j13.h: 17598: extern volatile __bit PMDTMR5 @ (((unsigned) &PMDIS2)*8) + 3;
[; ;pic18f27j13.h: 17600: extern volatile __bit PMDTMR6 @ (((unsigned) &PMDIS2)*8) + 4;
[; ;pic18f27j13.h: 17602: extern volatile __bit PMDTMR8 @ (((unsigned) &PMDIS2)*8) + 6;
[; ;pic18f27j13.h: 17604: extern volatile __bit PMDUART1 @ (((unsigned) &PMDIS0)*8) + 3;
[; ;pic18f27j13.h: 17606: extern volatile __bit PMDUART2 @ (((unsigned) &PMDIS0)*8) + 4;
[; ;pic18f27j13.h: 17608: extern volatile __bit POR @ (((unsigned) &RCON)*8) + 1;
[; ;pic18f27j13.h: 17610: extern volatile __bit PRISD @ (((unsigned) &OSCCON2)*8) + 2;
[; ;pic18f27j13.h: 17612: extern volatile __bit PSA @ (((unsigned) &T0CON)*8) + 3;
[; ;pic18f27j13.h: 17614: extern volatile __bit PSS1AC0 @ (((unsigned) &ECCP1AS)*8) + 2;
[; ;pic18f27j13.h: 17616: extern volatile __bit PSS1AC1 @ (((unsigned) &ECCP1AS)*8) + 3;
[; ;pic18f27j13.h: 17618: extern volatile __bit PSS1BD0 @ (((unsigned) &ECCP1AS)*8) + 0;
[; ;pic18f27j13.h: 17620: extern volatile __bit PSS1BD1 @ (((unsigned) &ECCP1AS)*8) + 1;
[; ;pic18f27j13.h: 17622: extern volatile __bit PSS2AC0 @ (((unsigned) &ECCP2AS)*8) + 2;
[; ;pic18f27j13.h: 17624: extern volatile __bit PSS2AC1 @ (((unsigned) &ECCP2AS)*8) + 3;
[; ;pic18f27j13.h: 17626: extern volatile __bit PSS2BD0 @ (((unsigned) &ECCP2AS)*8) + 0;
[; ;pic18f27j13.h: 17628: extern volatile __bit PSS2BD1 @ (((unsigned) &ECCP2AS)*8) + 1;
[; ;pic18f27j13.h: 17630: extern volatile __bit PSS3AC0 @ (((unsigned) &ECCP3AS)*8) + 2;
[; ;pic18f27j13.h: 17632: extern volatile __bit PSS3AC1 @ (((unsigned) &ECCP3AS)*8) + 3;
[; ;pic18f27j13.h: 17634: extern volatile __bit PSS3BD0 @ (((unsigned) &ECCP3AS)*8) + 0;
[; ;pic18f27j13.h: 17636: extern volatile __bit PSS3BD1 @ (((unsigned) &ECCP3AS)*8) + 1;
[; ;pic18f27j13.h: 17638: extern volatile __bit RA0 @ (((unsigned) &PORTA)*8) + 0;
[; ;pic18f27j13.h: 17640: extern volatile __bit RA1 @ (((unsigned) &PORTA)*8) + 1;
[; ;pic18f27j13.h: 17642: extern volatile __bit RA2 @ (((unsigned) &PORTA)*8) + 2;
[; ;pic18f27j13.h: 17644: extern volatile __bit RA3 @ (((unsigned) &PORTA)*8) + 3;
[; ;pic18f27j13.h: 17646: extern volatile __bit RA4 @ (((unsigned) &PORTA)*8) + 4;
[; ;pic18f27j13.h: 17648: extern volatile __bit RA5 @ (((unsigned) &PORTA)*8) + 5;
[; ;pic18f27j13.h: 17650: extern volatile __bit RA6 @ (((unsigned) &PORTA)*8) + 6;
[; ;pic18f27j13.h: 17652: extern volatile __bit RA7 @ (((unsigned) &PORTA)*8) + 7;
[; ;pic18f27j13.h: 17654: extern volatile __bit RB0 @ (((unsigned) &PORTB)*8) + 0;
[; ;pic18f27j13.h: 17656: extern volatile __bit RB1 @ (((unsigned) &PORTB)*8) + 1;
[; ;pic18f27j13.h: 17658: extern volatile __bit RB2 @ (((unsigned) &PORTB)*8) + 2;
[; ;pic18f27j13.h: 17660: extern volatile __bit RB3 @ (((unsigned) &PORTB)*8) + 3;
[; ;pic18f27j13.h: 17662: extern volatile __bit RB4 @ (((unsigned) &PORTB)*8) + 4;
[; ;pic18f27j13.h: 17664: extern volatile __bit RB5 @ (((unsigned) &PORTB)*8) + 5;
[; ;pic18f27j13.h: 17666: extern volatile __bit RB6 @ (((unsigned) &PORTB)*8) + 6;
[; ;pic18f27j13.h: 17668: extern volatile __bit RB7 @ (((unsigned) &PORTB)*8) + 7;
[; ;pic18f27j13.h: 17670: extern volatile __bit RBIE @ (((unsigned) &INTCON)*8) + 3;
[; ;pic18f27j13.h: 17672: extern volatile __bit RBIF @ (((unsigned) &INTCON)*8) + 0;
[; ;pic18f27j13.h: 17674: extern volatile __bit RBIP @ (((unsigned) &INTCON2)*8) + 0;
[; ;pic18f27j13.h: 17676: extern volatile __bit RBPU @ (((unsigned) &INTCON2)*8) + 7;
[; ;pic18f27j13.h: 17678: extern volatile __bit RC0 @ (((unsigned) &PORTC)*8) + 0;
[; ;pic18f27j13.h: 17680: extern volatile __bit RC1 @ (((unsigned) &PORTC)*8) + 1;
[; ;pic18f27j13.h: 17682: extern volatile __bit RC1IE @ (((unsigned) &PIE1)*8) + 5;
[; ;pic18f27j13.h: 17684: extern volatile __bit RC1IF @ (((unsigned) &PIR1)*8) + 5;
[; ;pic18f27j13.h: 17686: extern volatile __bit RC1IP @ (((unsigned) &IPR1)*8) + 5;
[; ;pic18f27j13.h: 17688: extern volatile __bit RC2 @ (((unsigned) &PORTC)*8) + 2;
[; ;pic18f27j13.h: 17690: extern volatile __bit RC2IE @ (((unsigned) &PIE3)*8) + 5;
[; ;pic18f27j13.h: 17692: extern volatile __bit RC2IF @ (((unsigned) &PIR3)*8) + 5;
[; ;pic18f27j13.h: 17694: extern volatile __bit RC2IP @ (((unsigned) &IPR3)*8) + 5;
[; ;pic18f27j13.h: 17696: extern volatile __bit RC3 @ (((unsigned) &PORTC)*8) + 3;
[; ;pic18f27j13.h: 17698: extern volatile __bit RC4 @ (((unsigned) &PORTC)*8) + 4;
[; ;pic18f27j13.h: 17700: extern volatile __bit RC5 @ (((unsigned) &PORTC)*8) + 5;
[; ;pic18f27j13.h: 17702: extern volatile __bit RC6 @ (((unsigned) &PORTC)*8) + 6;
[; ;pic18f27j13.h: 17704: extern volatile __bit RC7 @ (((unsigned) &PORTC)*8) + 7;
[; ;pic18f27j13.h: 17706: extern volatile __bit RC8_9 @ (((unsigned) &RCSTA1)*8) + 6;
[; ;pic18f27j13.h: 17708: extern volatile __bit RC8_92 @ (((unsigned) &RCSTA2)*8) + 6;
[; ;pic18f27j13.h: 17710: extern volatile __bit RC9 @ (((unsigned) &RCSTA1)*8) + 6;
[; ;pic18f27j13.h: 17712: extern volatile __bit RC92 @ (((unsigned) &RCSTA2)*8) + 6;
[; ;pic18f27j13.h: 17714: extern volatile __bit RCD8 @ (((unsigned) &RCSTA1)*8) + 0;
[; ;pic18f27j13.h: 17716: extern volatile __bit RCD82 @ (((unsigned) &RCSTA2)*8) + 0;
[; ;pic18f27j13.h: 17718: extern volatile __bit RCEN1 @ (((unsigned) &SSP1CON2)*8) + 3;
[; ;pic18f27j13.h: 17720: extern volatile __bit RCEN2 @ (((unsigned) &SSP2CON2)*8) + 3;
[; ;pic18f27j13.h: 17722: extern volatile __bit RCIDL1 @ (((unsigned) &BAUDCON1)*8) + 6;
[; ;pic18f27j13.h: 17724: extern volatile __bit RCIDL2 @ (((unsigned) &BAUDCON2)*8) + 6;
[; ;pic18f27j13.h: 17726: extern volatile __bit RCIE @ (((unsigned) &PIE1)*8) + 5;
[; ;pic18f27j13.h: 17728: extern volatile __bit RCIF @ (((unsigned) &PIR1)*8) + 5;
[; ;pic18f27j13.h: 17730: extern volatile __bit RCIP @ (((unsigned) &IPR1)*8) + 5;
[; ;pic18f27j13.h: 17732: extern volatile __bit RCMT @ (((unsigned) &BAUDCON1)*8) + 6;
[; ;pic18f27j13.h: 17734: extern volatile __bit RCMT1 @ (((unsigned) &BAUDCON1)*8) + 6;
[; ;pic18f27j13.h: 17736: extern volatile __bit RCMT2 @ (((unsigned) &BAUDCON2)*8) + 6;
[; ;pic18f27j13.h: 17738: extern volatile __bit RD163 @ (((unsigned) &T3CON)*8) + 7;
[; ;pic18f27j13.h: 17740: extern volatile __bit RD165 @ (((unsigned) &T5CON)*8) + 1;
[; ;pic18f27j13.h: 17742: extern volatile __bit READ_WRITE @ (((unsigned) &SSP1STAT)*8) + 2;
[; ;pic18f27j13.h: 17744: extern volatile __bit READ_WRITE2 @ (((unsigned) &SSP2STAT)*8) + 2;
[; ;pic18f27j13.h: 17746: extern volatile __bit REFO @ (((unsigned) &PORTB)*8) + 2;
[; ;pic18f27j13.h: 17748: extern volatile __bit REGSLP @ (((unsigned) &WDTCON)*8) + 7;
[; ;pic18f27j13.h: 17750: extern volatile __bit RELEASE @ (((unsigned) &DSCONL)*8) + 0;
[; ;pic18f27j13.h: 17752: extern volatile __bit RI @ (((unsigned) &RCON)*8) + 4;
[; ;pic18f27j13.h: 17754: extern volatile __bit RJPU @ (((unsigned) &PORTA)*8) + 7;
[; ;pic18f27j13.h: 17756: extern volatile __bit RODIV0 @ (((unsigned) &REFOCON)*8) + 0;
[; ;pic18f27j13.h: 17758: extern volatile __bit RODIV1 @ (((unsigned) &REFOCON)*8) + 1;
[; ;pic18f27j13.h: 17760: extern volatile __bit RODIV2 @ (((unsigned) &REFOCON)*8) + 2;
[; ;pic18f27j13.h: 17762: extern volatile __bit RODIV3 @ (((unsigned) &REFOCON)*8) + 3;
[; ;pic18f27j13.h: 17764: extern volatile __bit ROON @ (((unsigned) &REFOCON)*8) + 7;
[; ;pic18f27j13.h: 17766: extern volatile __bit ROSEL @ (((unsigned) &REFOCON)*8) + 4;
[; ;pic18f27j13.h: 17768: extern volatile __bit ROSSLP @ (((unsigned) &REFOCON)*8) + 5;
[; ;pic18f27j13.h: 17770: extern volatile __bit RP0 @ (((unsigned) &PORTA)*8) + 0;
[; ;pic18f27j13.h: 17772: extern volatile __bit RP1 @ (((unsigned) &PORTA)*8) + 1;
[; ;pic18f27j13.h: 17774: extern volatile __bit RP10 @ (((unsigned) &PORTB)*8) + 7;
[; ;pic18f27j13.h: 17776: extern volatile __bit RP11 @ (((unsigned) &PORTC)*8) + 0;
[; ;pic18f27j13.h: 17778: extern volatile __bit RP12 @ (((unsigned) &PORTC)*8) + 1;
[; ;pic18f27j13.h: 17780: extern volatile __bit RP13 @ (((unsigned) &PORTC)*8) + 2;
[; ;pic18f27j13.h: 17782: extern volatile __bit RP14 @ (((unsigned) &PORTC)*8) + 3;
[; ;pic18f27j13.h: 17784: extern volatile __bit RP15 @ (((unsigned) &PORTC)*8) + 4;
[; ;pic18f27j13.h: 17786: extern volatile __bit RP16 @ (((unsigned) &PORTC)*8) + 5;
[; ;pic18f27j13.h: 17788: extern volatile __bit RP17 @ (((unsigned) &PORTC)*8) + 6;
[; ;pic18f27j13.h: 17790: extern volatile __bit RP18 @ (((unsigned) &PORTC)*8) + 7;
[; ;pic18f27j13.h: 17792: extern volatile __bit RP2 @ (((unsigned) &PORTA)*8) + 5;
[; ;pic18f27j13.h: 17794: extern volatile __bit RP3 @ (((unsigned) &PORTB)*8) + 0;
[; ;pic18f27j13.h: 17796: extern volatile __bit RP4 @ (((unsigned) &PORTB)*8) + 1;
[; ;pic18f27j13.h: 17798: extern volatile __bit RP5 @ (((unsigned) &PORTB)*8) + 2;
[; ;pic18f27j13.h: 17800: extern volatile __bit RP6 @ (((unsigned) &PORTB)*8) + 3;
[; ;pic18f27j13.h: 17802: extern volatile __bit RP7 @ (((unsigned) &PORTB)*8) + 4;
[; ;pic18f27j13.h: 17804: extern volatile __bit RP8 @ (((unsigned) &PORTB)*8) + 5;
[; ;pic18f27j13.h: 17806: extern volatile __bit RP9 @ (((unsigned) &PORTB)*8) + 6;
[; ;pic18f27j13.h: 17808: extern volatile __bit RSEN1 @ (((unsigned) &SSP1CON2)*8) + 1;
[; ;pic18f27j13.h: 17810: extern volatile __bit RSEN2 @ (((unsigned) &SSP2CON2)*8) + 1;
[; ;pic18f27j13.h: 17812: extern volatile __bit RTCC @ (((unsigned) &PORTB)*8) + 1;
[; ;pic18f27j13.h: 17814: extern volatile __bit RTCCIE @ (((unsigned) &PIE3)*8) + 0;
[; ;pic18f27j13.h: 17816: extern volatile __bit RTCCIF @ (((unsigned) &PIR3)*8) + 0;
[; ;pic18f27j13.h: 17818: extern volatile __bit RTCCIP @ (((unsigned) &IPR3)*8) + 0;
[; ;pic18f27j13.h: 17820: extern volatile __bit RTCCMD @ (((unsigned) &PMDIS1)*8) + 5;
[; ;pic18f27j13.h: 17822: extern volatile __bit RTCEN @ (((unsigned) &RTCCFG)*8) + 7;
[; ;pic18f27j13.h: 17824: extern volatile __bit RTCOE @ (((unsigned) &RTCCFG)*8) + 2;
[; ;pic18f27j13.h: 17826: extern volatile __bit RTCPTR0 @ (((unsigned) &RTCCFG)*8) + 0;
[; ;pic18f27j13.h: 17828: extern volatile __bit RTCPTR1 @ (((unsigned) &RTCCFG)*8) + 1;
[; ;pic18f27j13.h: 17830: extern volatile __bit RTCSYNC @ (((unsigned) &RTCCFG)*8) + 4;
[; ;pic18f27j13.h: 17832: extern volatile __bit RTCWDIS @ (((unsigned) &DSCONH)*8) + 0;
[; ;pic18f27j13.h: 17834: extern volatile __bit RTCWREN @ (((unsigned) &RTCCFG)*8) + 5;
[; ;pic18f27j13.h: 17836: extern volatile __bit RTSECSEL0 @ (((unsigned) &PADCFG1)*8) + 1;
[; ;pic18f27j13.h: 17838: extern volatile __bit RTSECSEL1 @ (((unsigned) &PADCFG1)*8) + 2;
[; ;pic18f27j13.h: 17840: extern volatile __bit RW @ (((unsigned) &SSP1STAT)*8) + 2;
[; ;pic18f27j13.h: 17842: extern volatile __bit RW1 @ (((unsigned) &SSP1STAT)*8) + 2;
[; ;pic18f27j13.h: 17844: extern volatile __bit RW2 @ (((unsigned) &SSP2STAT)*8) + 2;
[; ;pic18f27j13.h: 17846: extern volatile __bit RX1 @ (((unsigned) &PORTC)*8) + 7;
[; ;pic18f27j13.h: 17848: extern volatile __bit RX91 @ (((unsigned) &RCSTA1)*8) + 6;
[; ;pic18f27j13.h: 17850: extern volatile __bit RX92 @ (((unsigned) &RCSTA2)*8) + 6;
[; ;pic18f27j13.h: 17852: extern volatile __bit RX9D1 @ (((unsigned) &RCSTA1)*8) + 0;
[; ;pic18f27j13.h: 17854: extern volatile __bit RX9D2 @ (((unsigned) &RCSTA2)*8) + 0;
[; ;pic18f27j13.h: 17856: extern volatile __bit RXB0IE @ (((unsigned) &PIE3)*8) + 0;
[; ;pic18f27j13.h: 17858: extern volatile __bit RXB1IE @ (((unsigned) &PIE3)*8) + 1;
[; ;pic18f27j13.h: 17860: extern volatile __bit RXBNIE @ (((unsigned) &PIE3)*8) + 1;
[; ;pic18f27j13.h: 17862: extern volatile __bit RXBNIF @ (((unsigned) &PIR3)*8) + 1;
[; ;pic18f27j13.h: 17864: extern volatile __bit RXBNIP @ (((unsigned) &IPR3)*8) + 1;
[; ;pic18f27j13.h: 17866: extern volatile __bit RXCKP @ (((unsigned) &BAUDCON1)*8) + 5;
[; ;pic18f27j13.h: 17868: extern volatile __bit RXDTP1 @ (((unsigned) &BAUDCON1)*8) + 5;
[; ;pic18f27j13.h: 17870: extern volatile __bit RXDTP2 @ (((unsigned) &BAUDCON2)*8) + 5;
[; ;pic18f27j13.h: 17872: extern volatile __bit RXINC @ (((unsigned) &DMACON1)*8) + 4;
[; ;pic18f27j13.h: 17874: extern volatile __bit R_W @ (((unsigned) &SSP1STAT)*8) + 2;
[; ;pic18f27j13.h: 17876: extern volatile __bit R_W2 @ (((unsigned) &SSP2STAT)*8) + 2;
[; ;pic18f27j13.h: 17878: extern volatile __bit R_nW2 @ (((unsigned) &SSP2STAT)*8) + 2;
[; ;pic18f27j13.h: 17880: extern volatile __bit S2 @ (((unsigned) &SSP2STAT)*8) + 3;
[; ;pic18f27j13.h: 17882: extern volatile __bit SCK1 @ (((unsigned) &PORTC)*8) + 3;
[; ;pic18f27j13.h: 17884: extern volatile __bit SCKP @ (((unsigned) &BAUDCON1)*8) + 4;
[; ;pic18f27j13.h: 17886: extern volatile __bit SCKP1 @ (((unsigned) &BAUDCON1)*8) + 4;
[; ;pic18f27j13.h: 17888: extern volatile __bit SCKP2 @ (((unsigned) &BAUDCON2)*8) + 4;
[; ;pic18f27j13.h: 17890: extern volatile __bit SCL1 @ (((unsigned) &PORTC)*8) + 3;
[; ;pic18f27j13.h: 17892: extern volatile __bit SCL2 @ (((unsigned) &PORTB)*8) + 4;
[; ;pic18f27j13.h: 17894: extern volatile __bit SCS0 @ (((unsigned) &OSCCON)*8) + 0;
[; ;pic18f27j13.h: 17896: extern volatile __bit SCS1 @ (((unsigned) &OSCCON)*8) + 1;
[; ;pic18f27j13.h: 17898: extern volatile __bit SDA1 @ (((unsigned) &PORTC)*8) + 4;
[; ;pic18f27j13.h: 17900: extern volatile __bit SDA2 @ (((unsigned) &PORTB)*8) + 5;
[; ;pic18f27j13.h: 17902: extern volatile __bit SDI1 @ (((unsigned) &PORTC)*8) + 4;
[; ;pic18f27j13.h: 17904: extern volatile __bit SDO1 @ (((unsigned) &PORTC)*8) + 5;
[; ;pic18f27j13.h: 17906: extern volatile __bit SEN1 @ (((unsigned) &SSP1CON2)*8) + 0;
[; ;pic18f27j13.h: 17908: extern volatile __bit SEN2 @ (((unsigned) &SSP2CON2)*8) + 0;
[; ;pic18f27j13.h: 17910: extern volatile __bit SENDB1 @ (((unsigned) &TXSTA1)*8) + 3;
[; ;pic18f27j13.h: 17912: extern volatile __bit SENDB2 @ (((unsigned) &TXSTA2)*8) + 3;
[; ;pic18f27j13.h: 17914: extern volatile __bit SMP1 @ (((unsigned) &SSP1STAT)*8) + 7;
[; ;pic18f27j13.h: 17916: extern volatile __bit SMP2 @ (((unsigned) &SSP2STAT)*8) + 7;
[; ;pic18f27j13.h: 17918: extern volatile __bit SOSCDRV @ (((unsigned) &OSCCON2)*8) + 4;
[; ;pic18f27j13.h: 17920: extern volatile __bit SOSCEN @ (((unsigned) &T1CON)*8) + 3;
[; ;pic18f27j13.h: 17922: extern volatile __bit SOSCEN3 @ (((unsigned) &T3CON)*8) + 3;
[; ;pic18f27j13.h: 17924: extern volatile __bit SOSCEN5 @ (((unsigned) &T5CON)*8) + 3;
[; ;pic18f27j13.h: 17926: extern volatile __bit SOSCGO @ (((unsigned) &OSCCON2)*8) + 3;
[; ;pic18f27j13.h: 17928: extern volatile __bit SOSCRUN @ (((unsigned) &OSCCON2)*8) + 6;
[; ;pic18f27j13.h: 17930: extern volatile __bit SP0 @ (((unsigned) &STKPTR)*8) + 0;
[; ;pic18f27j13.h: 17932: extern volatile __bit SP1 @ (((unsigned) &STKPTR)*8) + 1;
[; ;pic18f27j13.h: 17934: extern volatile __bit SP2 @ (((unsigned) &STKPTR)*8) + 2;
[; ;pic18f27j13.h: 17936: extern volatile __bit SP3 @ (((unsigned) &STKPTR)*8) + 3;
[; ;pic18f27j13.h: 17938: extern volatile __bit SP4 @ (((unsigned) &STKPTR)*8) + 4;
[; ;pic18f27j13.h: 17940: extern volatile __bit SPEN1 @ (((unsigned) &RCSTA1)*8) + 7;
[; ;pic18f27j13.h: 17942: extern volatile __bit SPEN2 @ (((unsigned) &RCSTA2)*8) + 7;
[; ;pic18f27j13.h: 17944: extern volatile __bit SPI1MD @ (((unsigned) &PMDIS0)*8) + 1;
[; ;pic18f27j13.h: 17946: extern volatile __bit SPI1OD @ (((unsigned) &ODCON3)*8) + 0;
[; ;pic18f27j13.h: 17948: extern volatile __bit SPI2MD @ (((unsigned) &PMDIS0)*8) + 2;
[; ;pic18f27j13.h: 17950: extern volatile __bit SPI2OD @ (((unsigned) &ODCON3)*8) + 1;
[; ;pic18f27j13.h: 17952: extern volatile __bit SRC0 @ (((unsigned) &ADCTRIG)*8) + 0;
[; ;pic18f27j13.h: 17954: extern volatile __bit SRC1 @ (((unsigned) &ADCTRIG)*8) + 1;
[; ;pic18f27j13.h: 17956: extern volatile __bit SREN1 @ (((unsigned) &RCSTA1)*8) + 5;
[; ;pic18f27j13.h: 17958: extern volatile __bit SREN2 @ (((unsigned) &RCSTA2)*8) + 5;
[; ;pic18f27j13.h: 17960: extern volatile __bit SRENA @ (((unsigned) &RCSTA1)*8) + 5;
[; ;pic18f27j13.h: 17962: extern volatile __bit SSCON0 @ (((unsigned) &DMACON1)*8) + 6;
[; ;pic18f27j13.h: 17964: extern volatile __bit SSCON1 @ (((unsigned) &DMACON1)*8) + 7;
[; ;pic18f27j13.h: 17966: extern volatile __bit SSP1IE @ (((unsigned) &PIE1)*8) + 3;
[; ;pic18f27j13.h: 17968: extern volatile __bit SSP1IF @ (((unsigned) &PIR1)*8) + 3;
[; ;pic18f27j13.h: 17970: extern volatile __bit SSP1IP @ (((unsigned) &IPR1)*8) + 3;
[; ;pic18f27j13.h: 17972: extern volatile __bit SSP2IE @ (((unsigned) &PIE3)*8) + 7;
[; ;pic18f27j13.h: 17974: extern volatile __bit SSP2IF @ (((unsigned) &PIR3)*8) + 7;
[; ;pic18f27j13.h: 17976: extern volatile __bit SSP2IP @ (((unsigned) &IPR3)*8) + 7;
[; ;pic18f27j13.h: 17978: extern volatile __bit SSPEN1 @ (((unsigned) &SSP1CON1)*8) + 5;
[; ;pic18f27j13.h: 17980: extern volatile __bit SSPEN2 @ (((unsigned) &SSP2CON1)*8) + 5;
[; ;pic18f27j13.h: 17982: extern volatile __bit SSPIE @ (((unsigned) &PIE1)*8) + 3;
[; ;pic18f27j13.h: 17984: extern volatile __bit SSPIF @ (((unsigned) &PIR1)*8) + 3;
[; ;pic18f27j13.h: 17986: extern volatile __bit SSPIP @ (((unsigned) &IPR1)*8) + 3;
[; ;pic18f27j13.h: 17988: extern volatile __bit SSPM01 @ (((unsigned) &SSP1CON1)*8) + 0;
[; ;pic18f27j13.h: 17990: extern volatile __bit SSPM02 @ (((unsigned) &SSP2CON1)*8) + 0;
[; ;pic18f27j13.h: 17992: extern volatile __bit SSPM11 @ (((unsigned) &SSP1CON1)*8) + 1;
[; ;pic18f27j13.h: 17994: extern volatile __bit SSPM12 @ (((unsigned) &SSP2CON1)*8) + 1;
[; ;pic18f27j13.h: 17996: extern volatile __bit SSPM21 @ (((unsigned) &SSP1CON1)*8) + 2;
[; ;pic18f27j13.h: 17998: extern volatile __bit SSPM22 @ (((unsigned) &SSP2CON1)*8) + 2;
[; ;pic18f27j13.h: 18000: extern volatile __bit SSPM31 @ (((unsigned) &SSP1CON1)*8) + 3;
[; ;pic18f27j13.h: 18002: extern volatile __bit SSPM32 @ (((unsigned) &SSP2CON1)*8) + 3;
[; ;pic18f27j13.h: 18004: extern volatile __bit SSPOV1 @ (((unsigned) &SSP1CON1)*8) + 6;
[; ;pic18f27j13.h: 18006: extern volatile __bit SSPOV2 @ (((unsigned) &SSP2CON1)*8) + 6;
[; ;pic18f27j13.h: 18008: extern volatile __bit START @ (((unsigned) &SSP1STAT)*8) + 3;
[; ;pic18f27j13.h: 18010: extern volatile __bit START1 @ (((unsigned) &SSP1STAT)*8) + 3;
[; ;pic18f27j13.h: 18012: extern volatile __bit START2 @ (((unsigned) &SSP2STAT)*8) + 3;
[; ;pic18f27j13.h: 18014: extern volatile __bit STKFUL @ (((unsigned) &STKPTR)*8) + 7;
[; ;pic18f27j13.h: 18016: extern volatile __bit STKOVF @ (((unsigned) &STKPTR)*8) + 7;
[; ;pic18f27j13.h: 18018: extern volatile __bit STKUNF @ (((unsigned) &STKPTR)*8) + 6;
[; ;pic18f27j13.h: 18020: extern volatile __bit STOP @ (((unsigned) &SSP1STAT)*8) + 4;
[; ;pic18f27j13.h: 18022: extern volatile __bit STOP1 @ (((unsigned) &SSP1STAT)*8) + 4;
[; ;pic18f27j13.h: 18024: extern volatile __bit STOP2 @ (((unsigned) &SSP2STAT)*8) + 4;
[; ;pic18f27j13.h: 18026: extern volatile __bit STRA2 @ (((unsigned) &PSTR2CON)*8) + 0;
[; ;pic18f27j13.h: 18028: extern volatile __bit STRA3 @ (((unsigned) &PSTR3CON)*8) + 0;
[; ;pic18f27j13.h: 18030: extern volatile __bit STRB2 @ (((unsigned) &PSTR2CON)*8) + 1;
[; ;pic18f27j13.h: 18032: extern volatile __bit STRB3 @ (((unsigned) &PSTR3CON)*8) + 1;
[; ;pic18f27j13.h: 18034: extern volatile __bit STRC2 @ (((unsigned) &PSTR2CON)*8) + 2;
[; ;pic18f27j13.h: 18036: extern volatile __bit STRC3 @ (((unsigned) &PSTR3CON)*8) + 2;
[; ;pic18f27j13.h: 18038: extern volatile __bit STRD2 @ (((unsigned) &PSTR2CON)*8) + 3;
[; ;pic18f27j13.h: 18040: extern volatile __bit STRD3 @ (((unsigned) &PSTR3CON)*8) + 3;
[; ;pic18f27j13.h: 18042: extern volatile __bit STRSYNC2 @ (((unsigned) &PSTR2CON)*8) + 4;
[; ;pic18f27j13.h: 18044: extern volatile __bit STRSYNC3 @ (((unsigned) &PSTR3CON)*8) + 4;
[; ;pic18f27j13.h: 18046: extern volatile __bit SWDTE @ (((unsigned) &WDTCON)*8) + 0;
[; ;pic18f27j13.h: 18048: extern volatile __bit SWDTEN @ (((unsigned) &WDTCON)*8) + 0;
[; ;pic18f27j13.h: 18050: extern volatile __bit SYNC1 @ (((unsigned) &TXSTA1)*8) + 4;
[; ;pic18f27j13.h: 18052: extern volatile __bit SYNC2 @ (((unsigned) &TXSTA2)*8) + 4;
[; ;pic18f27j13.h: 18054: extern volatile __bit T08BIT @ (((unsigned) &T0CON)*8) + 6;
[; ;pic18f27j13.h: 18056: extern volatile __bit T0CS @ (((unsigned) &T0CON)*8) + 5;
[; ;pic18f27j13.h: 18058: extern volatile __bit T0IE @ (((unsigned) &INTCON)*8) + 5;
[; ;pic18f27j13.h: 18060: extern volatile __bit T0IF @ (((unsigned) &INTCON)*8) + 2;
[; ;pic18f27j13.h: 18062: extern volatile __bit T0IP @ (((unsigned) &INTCON2)*8) + 2;
[; ;pic18f27j13.h: 18064: extern volatile __bit T0PS0 @ (((unsigned) &T0CON)*8) + 0;
[; ;pic18f27j13.h: 18066: extern volatile __bit T0PS1 @ (((unsigned) &T0CON)*8) + 1;
[; ;pic18f27j13.h: 18068: extern volatile __bit T0PS2 @ (((unsigned) &T0CON)*8) + 2;
[; ;pic18f27j13.h: 18070: extern volatile __bit T0SE @ (((unsigned) &T0CON)*8) + 4;
[; ;pic18f27j13.h: 18072: extern volatile __bit T1CKI @ (((unsigned) &PORTC)*8) + 0;
[; ;pic18f27j13.h: 18074: extern volatile __bit T1CKPS0 @ (((unsigned) &T1CON)*8) + 4;
[; ;pic18f27j13.h: 18076: extern volatile __bit T1CKPS1 @ (((unsigned) &T1CON)*8) + 5;
[; ;pic18f27j13.h: 18078: extern volatile __bit T1DONE @ (((unsigned) &T1GCON)*8) + 3;
[; ;pic18f27j13.h: 18080: extern volatile __bit T1GGO @ (((unsigned) &T1GCON)*8) + 3;
[; ;pic18f27j13.h: 18082: extern volatile __bit T1GGO_NOT_T1DONE @ (((unsigned) &T1GCON)*8) + 3;
[; ;pic18f27j13.h: 18084: extern volatile __bit T1GGO_nT1DONE @ (((unsigned) &T1GCON)*8) + 3;
[; ;pic18f27j13.h: 18086: extern volatile __bit T1GPOL @ (((unsigned) &T1GCON)*8) + 6;
[; ;pic18f27j13.h: 18088: extern volatile __bit T1GSPM @ (((unsigned) &T1GCON)*8) + 4;
[; ;pic18f27j13.h: 18090: extern volatile __bit T1GSS0 @ (((unsigned) &T1GCON)*8) + 0;
[; ;pic18f27j13.h: 18092: extern volatile __bit T1GSS1 @ (((unsigned) &T1GCON)*8) + 1;
[; ;pic18f27j13.h: 18094: extern volatile __bit T1GTM @ (((unsigned) &T1GCON)*8) + 5;
[; ;pic18f27j13.h: 18096: extern volatile __bit T1GVAL @ (((unsigned) &T1GCON)*8) + 2;
[; ;pic18f27j13.h: 18098: extern volatile __bit T1OSCEN @ (((unsigned) &T1CON)*8) + 3;
[; ;pic18f27j13.h: 18100: extern volatile __bit T1OSI @ (((unsigned) &PORTC)*8) + 1;
[; ;pic18f27j13.h: 18102: extern volatile __bit T1OSO @ (((unsigned) &PORTC)*8) + 0;
[; ;pic18f27j13.h: 18104: extern volatile __bit T1RD16 @ (((unsigned) &T1CON)*8) + 7;
[; ;pic18f27j13.h: 18106: extern volatile __bit T2CKPS0 @ (((unsigned) &T2CON)*8) + 0;
[; ;pic18f27j13.h: 18108: extern volatile __bit T2CKPS1 @ (((unsigned) &T2CON)*8) + 1;
[; ;pic18f27j13.h: 18110: extern volatile __bit T2OUTPS0 @ (((unsigned) &T2CON)*8) + 3;
[; ;pic18f27j13.h: 18112: extern volatile __bit T2OUTPS1 @ (((unsigned) &T2CON)*8) + 4;
[; ;pic18f27j13.h: 18114: extern volatile __bit T2OUTPS2 @ (((unsigned) &T2CON)*8) + 5;
[; ;pic18f27j13.h: 18116: extern volatile __bit T2OUTPS3 @ (((unsigned) &T2CON)*8) + 6;
[; ;pic18f27j13.h: 18118: extern volatile __bit T3CKPS0 @ (((unsigned) &T3CON)*8) + 4;
[; ;pic18f27j13.h: 18120: extern volatile __bit T3CKPS1 @ (((unsigned) &T3CON)*8) + 5;
[; ;pic18f27j13.h: 18122: extern volatile __bit T3DONE @ (((unsigned) &T3GCON)*8) + 3;
[; ;pic18f27j13.h: 18124: extern volatile __bit T3GGO @ (((unsigned) &T3GCON)*8) + 3;
[; ;pic18f27j13.h: 18126: extern volatile __bit T3GGO_T3DONE @ (((unsigned) &T3GCON)*8) + 3;
[; ;pic18f27j13.h: 18128: extern volatile __bit T3GPOL @ (((unsigned) &T3GCON)*8) + 6;
[; ;pic18f27j13.h: 18130: extern volatile __bit T3GSPM @ (((unsigned) &T3GCON)*8) + 4;
[; ;pic18f27j13.h: 18132: extern volatile __bit T3GSS0 @ (((unsigned) &T3GCON)*8) + 0;
[; ;pic18f27j13.h: 18134: extern volatile __bit T3GSS1 @ (((unsigned) &T3GCON)*8) + 1;
[; ;pic18f27j13.h: 18136: extern volatile __bit T3GTM @ (((unsigned) &T3GCON)*8) + 5;
[; ;pic18f27j13.h: 18138: extern volatile __bit T3GVAL @ (((unsigned) &T3GCON)*8) + 2;
[; ;pic18f27j13.h: 18140: extern volatile __bit T3OSCEN @ (((unsigned) &T3CON)*8) + 3;
[; ;pic18f27j13.h: 18142: extern volatile __bit T3RD16 @ (((unsigned) &T3CON)*8) + 7;
[; ;pic18f27j13.h: 18144: extern volatile __bit T4CKPS0 @ (((unsigned) &T4CON)*8) + 0;
[; ;pic18f27j13.h: 18146: extern volatile __bit T4CKPS1 @ (((unsigned) &T4CON)*8) + 1;
[; ;pic18f27j13.h: 18148: extern volatile __bit T4OUTPS0 @ (((unsigned) &T4CON)*8) + 3;
[; ;pic18f27j13.h: 18150: extern volatile __bit T4OUTPS1 @ (((unsigned) &T4CON)*8) + 4;
[; ;pic18f27j13.h: 18152: extern volatile __bit T4OUTPS2 @ (((unsigned) &T4CON)*8) + 5;
[; ;pic18f27j13.h: 18154: extern volatile __bit T4OUTPS3 @ (((unsigned) &T4CON)*8) + 6;
[; ;pic18f27j13.h: 18156: extern volatile __bit T5CKPS0 @ (((unsigned) &T5CON)*8) + 4;
[; ;pic18f27j13.h: 18158: extern volatile __bit T5CKPS1 @ (((unsigned) &T5CON)*8) + 5;
[; ;pic18f27j13.h: 18160: extern volatile __bit T5DONE @ (((unsigned) &T5GCON)*8) + 3;
[; ;pic18f27j13.h: 18162: extern volatile __bit T5GGO @ (((unsigned) &T5GCON)*8) + 3;
[; ;pic18f27j13.h: 18164: extern volatile __bit T5GGO_NOT_T5DONE @ (((unsigned) &T5GCON)*8) + 3;
[; ;pic18f27j13.h: 18166: extern volatile __bit T5GGO_nT5DONE @ (((unsigned) &T5GCON)*8) + 3;
[; ;pic18f27j13.h: 18168: extern volatile __bit T5GPOL @ (((unsigned) &T5GCON)*8) + 6;
[; ;pic18f27j13.h: 18170: extern volatile __bit T5GSPM @ (((unsigned) &T5GCON)*8) + 4;
[; ;pic18f27j13.h: 18172: extern volatile __bit T5GSS0 @ (((unsigned) &T5GCON)*8) + 0;
[; ;pic18f27j13.h: 18174: extern volatile __bit T5GSS1 @ (((unsigned) &T5GCON)*8) + 1;
[; ;pic18f27j13.h: 18176: extern volatile __bit T5GTM @ (((unsigned) &T5GCON)*8) + 5;
[; ;pic18f27j13.h: 18178: extern volatile __bit T5GVAL @ (((unsigned) &T5GCON)*8) + 2;
[; ;pic18f27j13.h: 18180: extern volatile __bit T5OSCEN @ (((unsigned) &T5CON)*8) + 3;
[; ;pic18f27j13.h: 18182: extern volatile __bit T6CKPS0 @ (((unsigned) &T6CON)*8) + 0;
[; ;pic18f27j13.h: 18184: extern volatile __bit T6CKPS1 @ (((unsigned) &T6CON)*8) + 1;
[; ;pic18f27j13.h: 18186: extern volatile __bit T6OUTPS0 @ (((unsigned) &T6CON)*8) + 3;
[; ;pic18f27j13.h: 18188: extern volatile __bit T6OUTPS1 @ (((unsigned) &T6CON)*8) + 4;
[; ;pic18f27j13.h: 18190: extern volatile __bit T6OUTPS2 @ (((unsigned) &T6CON)*8) + 5;
[; ;pic18f27j13.h: 18192: extern volatile __bit T6OUTPS3 @ (((unsigned) &T6CON)*8) + 6;
[; ;pic18f27j13.h: 18194: extern volatile __bit T8CKPS0 @ (((unsigned) &T8CON)*8) + 0;
[; ;pic18f27j13.h: 18196: extern volatile __bit T8CKPS1 @ (((unsigned) &T8CON)*8) + 1;
[; ;pic18f27j13.h: 18198: extern volatile __bit T8OUTPS0 @ (((unsigned) &T8CON)*8) + 3;
[; ;pic18f27j13.h: 18200: extern volatile __bit T8OUTPS1 @ (((unsigned) &T8CON)*8) + 4;
[; ;pic18f27j13.h: 18202: extern volatile __bit T8OUTPS2 @ (((unsigned) &T8CON)*8) + 5;
[; ;pic18f27j13.h: 18204: extern volatile __bit T8OUTPS3 @ (((unsigned) &T8CON)*8) + 6;
[; ;pic18f27j13.h: 18206: extern volatile __bit TGEN @ (((unsigned) &CTMUCONH)*8) + 4;
[; ;pic18f27j13.h: 18208: extern volatile __bit TMR0IE @ (((unsigned) &INTCON)*8) + 5;
[; ;pic18f27j13.h: 18210: extern volatile __bit TMR0IF @ (((unsigned) &INTCON)*8) + 2;
[; ;pic18f27j13.h: 18212: extern volatile __bit TMR0IP @ (((unsigned) &INTCON2)*8) + 2;
[; ;pic18f27j13.h: 18214: extern volatile __bit TMR0ON @ (((unsigned) &T0CON)*8) + 7;
[; ;pic18f27j13.h: 18216: extern volatile __bit TMR1CS0 @ (((unsigned) &T1CON)*8) + 6;
[; ;pic18f27j13.h: 18218: extern volatile __bit TMR1CS1 @ (((unsigned) &T1CON)*8) + 7;
[; ;pic18f27j13.h: 18220: extern volatile __bit TMR1GE @ (((unsigned) &T1GCON)*8) + 7;
[; ;pic18f27j13.h: 18222: extern volatile __bit TMR1GIE @ (((unsigned) &PIE5)*8) + 0;
[; ;pic18f27j13.h: 18224: extern volatile __bit TMR1GIF @ (((unsigned) &PIR5)*8) + 0;
[; ;pic18f27j13.h: 18226: extern volatile __bit TMR1GIP @ (((unsigned) &IPR5)*8) + 0;
[; ;pic18f27j13.h: 18228: extern volatile __bit TMR1IE @ (((unsigned) &PIE1)*8) + 0;
[; ;pic18f27j13.h: 18230: extern volatile __bit TMR1IF @ (((unsigned) &PIR1)*8) + 0;
[; ;pic18f27j13.h: 18232: extern volatile __bit TMR1IP @ (((unsigned) &IPR1)*8) + 0;
[; ;pic18f27j13.h: 18234: extern volatile __bit TMR1MD @ (((unsigned) &PMDIS1)*8) + 1;
[; ;pic18f27j13.h: 18236: extern volatile __bit TMR1ON @ (((unsigned) &T1CON)*8) + 0;
[; ;pic18f27j13.h: 18238: extern volatile __bit TMR2IE @ (((unsigned) &PIE1)*8) + 1;
[; ;pic18f27j13.h: 18240: extern volatile __bit TMR2IF @ (((unsigned) &PIR1)*8) + 1;
[; ;pic18f27j13.h: 18242: extern volatile __bit TMR2IP @ (((unsigned) &IPR1)*8) + 1;
[; ;pic18f27j13.h: 18244: extern volatile __bit TMR2MD @ (((unsigned) &PMDIS1)*8) + 2;
[; ;pic18f27j13.h: 18246: extern volatile __bit TMR2ON @ (((unsigned) &T2CON)*8) + 2;
[; ;pic18f27j13.h: 18248: extern volatile __bit TMR3CS0 @ (((unsigned) &T3CON)*8) + 6;
[; ;pic18f27j13.h: 18250: extern volatile __bit TMR3CS1 @ (((unsigned) &T3CON)*8) + 7;
[; ;pic18f27j13.h: 18252: extern volatile __bit TMR3GE @ (((unsigned) &T3GCON)*8) + 7;
[; ;pic18f27j13.h: 18254: extern volatile __bit TMR3GIE @ (((unsigned) &PIE3)*8) + 1;
[; ;pic18f27j13.h: 18256: extern volatile __bit TMR3GIF @ (((unsigned) &PIR3)*8) + 1;
[; ;pic18f27j13.h: 18258: extern volatile __bit TMR3GIP @ (((unsigned) &IPR3)*8) + 1;
[; ;pic18f27j13.h: 18260: extern volatile __bit TMR3IE @ (((unsigned) &PIE2)*8) + 1;
[; ;pic18f27j13.h: 18262: extern volatile __bit TMR3IF @ (((unsigned) &PIR2)*8) + 1;
[; ;pic18f27j13.h: 18264: extern volatile __bit TMR3IP @ (((unsigned) &IPR2)*8) + 1;
[; ;pic18f27j13.h: 18266: extern volatile __bit TMR3MD @ (((unsigned) &PMDIS1)*8) + 3;
[; ;pic18f27j13.h: 18268: extern volatile __bit TMR3ON @ (((unsigned) &T3CON)*8) + 0;
[; ;pic18f27j13.h: 18270: extern volatile __bit TMR4IE @ (((unsigned) &PIE3)*8) + 3;
[; ;pic18f27j13.h: 18272: extern volatile __bit TMR4IF @ (((unsigned) &PIR3)*8) + 3;
[; ;pic18f27j13.h: 18274: extern volatile __bit TMR4IP @ (((unsigned) &IPR3)*8) + 3;
[; ;pic18f27j13.h: 18276: extern volatile __bit TMR4MD @ (((unsigned) &PMDIS1)*8) + 4;
[; ;pic18f27j13.h: 18278: extern volatile __bit TMR4ON @ (((unsigned) &T4CON)*8) + 2;
[; ;pic18f27j13.h: 18280: extern volatile __bit TMR5CS0 @ (((unsigned) &T5CON)*8) + 6;
[; ;pic18f27j13.h: 18282: extern volatile __bit TMR5CS1 @ (((unsigned) &T5CON)*8) + 7;
[; ;pic18f27j13.h: 18284: extern volatile __bit TMR5GE @ (((unsigned) &T5GCON)*8) + 7;
[; ;pic18f27j13.h: 18286: extern volatile __bit TMR5GIE @ (((unsigned) &PIE5)*8) + 1;
[; ;pic18f27j13.h: 18288: extern volatile __bit TMR5GIF @ (((unsigned) &PIR5)*8) + 1;
[; ;pic18f27j13.h: 18290: extern volatile __bit TMR5GIP @ (((unsigned) &IPR5)*8) + 1;
[; ;pic18f27j13.h: 18292: extern volatile __bit TMR5IE @ (((unsigned) &PIE5)*8) + 2;
[; ;pic18f27j13.h: 18294: extern volatile __bit TMR5IF @ (((unsigned) &PIR5)*8) + 2;
[; ;pic18f27j13.h: 18296: extern volatile __bit TMR5IP @ (((unsigned) &IPR5)*8) + 2;
[; ;pic18f27j13.h: 18298: extern volatile __bit TMR5MD @ (((unsigned) &PMDIS2)*8) + 3;
[; ;pic18f27j13.h: 18300: extern volatile __bit TMR5ON @ (((unsigned) &T5CON)*8) + 0;
[; ;pic18f27j13.h: 18302: extern volatile __bit TMR6IE @ (((unsigned) &PIE5)*8) + 3;
[; ;pic18f27j13.h: 18304: extern volatile __bit TMR6IF @ (((unsigned) &PIR5)*8) + 3;
[; ;pic18f27j13.h: 18306: extern volatile __bit TMR6IP @ (((unsigned) &IPR5)*8) + 3;
[; ;pic18f27j13.h: 18308: extern volatile __bit TMR6MD @ (((unsigned) &PMDIS2)*8) + 4;
[; ;pic18f27j13.h: 18310: extern volatile __bit TMR6ON @ (((unsigned) &T6CON)*8) + 2;
[; ;pic18f27j13.h: 18312: extern volatile __bit TMR8IE @ (((unsigned) &PIE5)*8) + 4;
[; ;pic18f27j13.h: 18314: extern volatile __bit TMR8IF @ (((unsigned) &PIR5)*8) + 4;
[; ;pic18f27j13.h: 18316: extern volatile __bit TMR8IP @ (((unsigned) &IPR5)*8) + 4;
[; ;pic18f27j13.h: 18318: extern volatile __bit TMR8MD @ (((unsigned) &PMDIS2)*8) + 6;
[; ;pic18f27j13.h: 18320: extern volatile __bit TMR8ON @ (((unsigned) &T8CON)*8) + 2;
[; ;pic18f27j13.h: 18322: extern volatile __bit TO @ (((unsigned) &RCON)*8) + 3;
[; ;pic18f27j13.h: 18324: extern volatile __bit TRIGSEL0 @ (((unsigned) &ADCTRIG)*8) + 0;
[; ;pic18f27j13.h: 18326: extern volatile __bit TRIGSEL1 @ (((unsigned) &ADCTRIG)*8) + 1;
[; ;pic18f27j13.h: 18328: extern volatile __bit TRISA0 @ (((unsigned) &TRISA)*8) + 0;
[; ;pic18f27j13.h: 18330: extern volatile __bit TRISA1 @ (((unsigned) &TRISA)*8) + 1;
[; ;pic18f27j13.h: 18332: extern volatile __bit TRISA2 @ (((unsigned) &TRISA)*8) + 2;
[; ;pic18f27j13.h: 18334: extern volatile __bit TRISA3 @ (((unsigned) &TRISA)*8) + 3;
[; ;pic18f27j13.h: 18336: extern volatile __bit TRISA5 @ (((unsigned) &TRISA)*8) + 5;
[; ;pic18f27j13.h: 18338: extern volatile __bit TRISA6 @ (((unsigned) &TRISA)*8) + 6;
[; ;pic18f27j13.h: 18340: extern volatile __bit TRISA7 @ (((unsigned) &TRISA)*8) + 7;
[; ;pic18f27j13.h: 18342: extern volatile __bit TRISB0 @ (((unsigned) &TRISB)*8) + 0;
[; ;pic18f27j13.h: 18344: extern volatile __bit TRISB1 @ (((unsigned) &TRISB)*8) + 1;
[; ;pic18f27j13.h: 18346: extern volatile __bit TRISB2 @ (((unsigned) &TRISB)*8) + 2;
[; ;pic18f27j13.h: 18348: extern volatile __bit TRISB3 @ (((unsigned) &TRISB)*8) + 3;
[; ;pic18f27j13.h: 18350: extern volatile __bit TRISB4 @ (((unsigned) &TRISB)*8) + 4;
[; ;pic18f27j13.h: 18352: extern volatile __bit TRISB5 @ (((unsigned) &TRISB)*8) + 5;
[; ;pic18f27j13.h: 18354: extern volatile __bit TRISB6 @ (((unsigned) &TRISB)*8) + 6;
[; ;pic18f27j13.h: 18356: extern volatile __bit TRISB7 @ (((unsigned) &TRISB)*8) + 7;
[; ;pic18f27j13.h: 18358: extern volatile __bit TRISC0 @ (((unsigned) &TRISC)*8) + 0;
[; ;pic18f27j13.h: 18360: extern volatile __bit TRISC1 @ (((unsigned) &TRISC)*8) + 1;
[; ;pic18f27j13.h: 18362: extern volatile __bit TRISC2 @ (((unsigned) &TRISC)*8) + 2;
[; ;pic18f27j13.h: 18364: extern volatile __bit TRISC3 @ (((unsigned) &TRISC)*8) + 3;
[; ;pic18f27j13.h: 18366: extern volatile __bit TRISC4 @ (((unsigned) &TRISC)*8) + 4;
[; ;pic18f27j13.h: 18368: extern volatile __bit TRISC5 @ (((unsigned) &TRISC)*8) + 5;
[; ;pic18f27j13.h: 18370: extern volatile __bit TRISC6 @ (((unsigned) &TRISC)*8) + 6;
[; ;pic18f27j13.h: 18372: extern volatile __bit TRISC7 @ (((unsigned) &TRISC)*8) + 7;
[; ;pic18f27j13.h: 18374: extern volatile __bit TRMT1 @ (((unsigned) &TXSTA1)*8) + 1;
[; ;pic18f27j13.h: 18376: extern volatile __bit TRMT2 @ (((unsigned) &TXSTA2)*8) + 1;
[; ;pic18f27j13.h: 18378: extern volatile __bit TUN0 @ (((unsigned) &OSCTUNE)*8) + 0;
[; ;pic18f27j13.h: 18380: extern volatile __bit TUN1 @ (((unsigned) &OSCTUNE)*8) + 1;
[; ;pic18f27j13.h: 18382: extern volatile __bit TUN2 @ (((unsigned) &OSCTUNE)*8) + 2;
[; ;pic18f27j13.h: 18384: extern volatile __bit TUN3 @ (((unsigned) &OSCTUNE)*8) + 3;
[; ;pic18f27j13.h: 18386: extern volatile __bit TUN4 @ (((unsigned) &OSCTUNE)*8) + 4;
[; ;pic18f27j13.h: 18388: extern volatile __bit TUN5 @ (((unsigned) &OSCTUNE)*8) + 5;
[; ;pic18f27j13.h: 18390: extern volatile __bit TX1 @ (((unsigned) &PORTC)*8) + 6;
[; ;pic18f27j13.h: 18392: extern volatile __bit TX1IE @ (((unsigned) &PIE1)*8) + 4;
[; ;pic18f27j13.h: 18394: extern volatile __bit TX1IF @ (((unsigned) &PIR1)*8) + 4;
[; ;pic18f27j13.h: 18396: extern volatile __bit TX1IP @ (((unsigned) &IPR1)*8) + 4;
[; ;pic18f27j13.h: 18398: extern volatile __bit TX2IE @ (((unsigned) &PIE3)*8) + 4;
[; ;pic18f27j13.h: 18400: extern volatile __bit TX2IF @ (((unsigned) &PIR3)*8) + 4;
[; ;pic18f27j13.h: 18402: extern volatile __bit TX2IP @ (((unsigned) &IPR3)*8) + 4;
[; ;pic18f27j13.h: 18404: extern volatile __bit TX8_9 @ (((unsigned) &TXSTA1)*8) + 6;
[; ;pic18f27j13.h: 18406: extern volatile __bit TX8_92 @ (((unsigned) &TXSTA2)*8) + 6;
[; ;pic18f27j13.h: 18408: extern volatile __bit TX91 @ (((unsigned) &TXSTA1)*8) + 6;
[; ;pic18f27j13.h: 18410: extern volatile __bit TX92 @ (((unsigned) &TXSTA2)*8) + 6;
[; ;pic18f27j13.h: 18412: extern volatile __bit TX9D1 @ (((unsigned) &TXSTA1)*8) + 0;
[; ;pic18f27j13.h: 18414: extern volatile __bit TX9D2 @ (((unsigned) &TXSTA2)*8) + 0;
[; ;pic18f27j13.h: 18416: extern volatile __bit TXB0IE @ (((unsigned) &PIE3)*8) + 2;
[; ;pic18f27j13.h: 18418: extern volatile __bit TXB1IE @ (((unsigned) &PIE3)*8) + 3;
[; ;pic18f27j13.h: 18420: extern volatile __bit TXB2IE @ (((unsigned) &PIE3)*8) + 4;
[; ;pic18f27j13.h: 18422: extern volatile __bit TXBNIE @ (((unsigned) &PIE3)*8) + 4;
[; ;pic18f27j13.h: 18424: extern volatile __bit TXBNIF @ (((unsigned) &PIR3)*8) + 4;
[; ;pic18f27j13.h: 18426: extern volatile __bit TXBNIP @ (((unsigned) &IPR3)*8) + 4;
[; ;pic18f27j13.h: 18428: extern volatile __bit TXCKP1 @ (((unsigned) &BAUDCON1)*8) + 4;
[; ;pic18f27j13.h: 18430: extern volatile __bit TXCKP2 @ (((unsigned) &BAUDCON2)*8) + 4;
[; ;pic18f27j13.h: 18432: extern volatile __bit TXD8 @ (((unsigned) &TXSTA1)*8) + 0;
[; ;pic18f27j13.h: 18434: extern volatile __bit TXD82 @ (((unsigned) &TXSTA2)*8) + 0;
[; ;pic18f27j13.h: 18436: extern volatile __bit TXEN1 @ (((unsigned) &TXSTA1)*8) + 5;
[; ;pic18f27j13.h: 18438: extern volatile __bit TXEN2 @ (((unsigned) &TXSTA2)*8) + 5;
[; ;pic18f27j13.h: 18440: extern volatile __bit TXIE @ (((unsigned) &PIE1)*8) + 4;
[; ;pic18f27j13.h: 18442: extern volatile __bit TXIF @ (((unsigned) &PIR1)*8) + 4;
[; ;pic18f27j13.h: 18444: extern volatile __bit TXINC @ (((unsigned) &DMACON1)*8) + 5;
[; ;pic18f27j13.h: 18446: extern volatile __bit TXIP @ (((unsigned) &IPR1)*8) + 4;
[; ;pic18f27j13.h: 18448: extern volatile __bit U1OD @ (((unsigned) &ODCON2)*8) + 0;
[; ;pic18f27j13.h: 18450: extern volatile __bit U2OD @ (((unsigned) &ODCON2)*8) + 1;
[; ;pic18f27j13.h: 18452: extern volatile __bit UA1 @ (((unsigned) &SSP1STAT)*8) + 1;
[; ;pic18f27j13.h: 18454: extern volatile __bit UA2 @ (((unsigned) &SSP2STAT)*8) + 1;
[; ;pic18f27j13.h: 18456: extern volatile __bit UART1MD @ (((unsigned) &PMDIS0)*8) + 3;
[; ;pic18f27j13.h: 18458: extern volatile __bit UART2MD @ (((unsigned) &PMDIS0)*8) + 4;
[; ;pic18f27j13.h: 18460: extern volatile __bit ULPEN @ (((unsigned) &WDTCON)*8) + 2;
[; ;pic18f27j13.h: 18462: extern volatile __bit ULPLVL @ (((unsigned) &WDTCON)*8) + 5;
[; ;pic18f27j13.h: 18464: extern volatile __bit ULPSINK @ (((unsigned) &WDTCON)*8) + 1;
[; ;pic18f27j13.h: 18466: extern volatile __bit ULPWDIS @ (((unsigned) &DSCONL)*8) + 2;
[; ;pic18f27j13.h: 18468: extern volatile __bit ULPWU @ (((unsigned) &PORTA)*8) + 0;
[; ;pic18f27j13.h: 18470: extern volatile __bit ULPWUIN @ (((unsigned) &PORTA)*8) + 0;
[; ;pic18f27j13.h: 18472: extern volatile __bit VBG @ (((unsigned) &PORTA)*8) + 1;
[; ;pic18f27j13.h: 18474: extern volatile __bit VBGEN @ (((unsigned) &ANCON1)*8) + 7;
[; ;pic18f27j13.h: 18476: extern volatile __bit VBGOE @ (((unsigned) &WDTCON)*8) + 4;
[; ;pic18f27j13.h: 18478: extern volatile __bit VCFG0 @ (((unsigned) &ADCON0)*8) + 6;
[; ;pic18f27j13.h: 18480: extern volatile __bit VCFG01 @ (((unsigned) &ADCON1)*8) + 4;
[; ;pic18f27j13.h: 18482: extern volatile __bit VCFG1 @ (((unsigned) &ADCON0)*8) + 7;
[; ;pic18f27j13.h: 18484: extern volatile __bit VCFG11 @ (((unsigned) &ADCON1)*8) + 5;
[; ;pic18f27j13.h: 18486: extern volatile __bit VDIRMAG @ (((unsigned) &HLVDCON)*8) + 7;
[; ;pic18f27j13.h: 18488: extern volatile __bit VREF_MINUS @ (((unsigned) &PORTA)*8) + 2;
[; ;pic18f27j13.h: 18490: extern volatile __bit VREF_PLUS @ (((unsigned) &PORTA)*8) + 3;
[; ;pic18f27j13.h: 18492: extern volatile __bit W4E @ (((unsigned) &BAUDCON1)*8) + 1;
[; ;pic18f27j13.h: 18494: extern volatile __bit WAITB0 @ (((unsigned) &RTCVALH)*8) + 6;
[; ;pic18f27j13.h: 18496: extern volatile __bit WAITB1 @ (((unsigned) &RTCVALH)*8) + 7;
[; ;pic18f27j13.h: 18498: extern volatile __bit WAITE0 @ (((unsigned) &RTCVALH)*8) + 0;
[; ;pic18f27j13.h: 18500: extern volatile __bit WAITE1 @ (((unsigned) &RTCVALH)*8) + 1;
[; ;pic18f27j13.h: 18502: extern volatile __bit WAITM0 @ (((unsigned) &RTCVALH)*8) + 2;
[; ;pic18f27j13.h: 18504: extern volatile __bit WAITM1 @ (((unsigned) &RTCVALH)*8) + 3;
[; ;pic18f27j13.h: 18506: extern volatile __bit WAITM2 @ (((unsigned) &RTCVALH)*8) + 4;
[; ;pic18f27j13.h: 18508: extern volatile __bit WAITM3 @ (((unsigned) &RTCVALH)*8) + 5;
[; ;pic18f27j13.h: 18510: extern volatile __bit WCOL1 @ (((unsigned) &SSP1CON1)*8) + 7;
[; ;pic18f27j13.h: 18512: extern volatile __bit WCOL2 @ (((unsigned) &SSP2CON1)*8) + 7;
[; ;pic18f27j13.h: 18514: extern volatile __bit WPROG @ (((unsigned) &EECON1)*8) + 5;
[; ;pic18f27j13.h: 18516: extern volatile __bit WR @ (((unsigned) &EECON1)*8) + 1;
[; ;pic18f27j13.h: 18518: extern volatile __bit WREN @ (((unsigned) &EECON1)*8) + 2;
[; ;pic18f27j13.h: 18520: extern volatile __bit WRERR @ (((unsigned) &EECON1)*8) + 3;
[; ;pic18f27j13.h: 18522: extern volatile __bit WUE1 @ (((unsigned) &BAUDCON1)*8) + 1;
[; ;pic18f27j13.h: 18524: extern volatile __bit WUE2 @ (((unsigned) &BAUDCON2)*8) + 1;
[; ;pic18f27j13.h: 18526: extern volatile __bit ZERO @ (((unsigned) &STATUS)*8) + 2;
[; ;pic18f27j13.h: 18528: extern volatile __bit nA @ (((unsigned) &SSP1STAT)*8) + 5;
[; ;pic18f27j13.h: 18530: extern volatile __bit nA2 @ (((unsigned) &SSP2STAT)*8) + 5;
[; ;pic18f27j13.h: 18532: extern volatile __bit nADDRESS @ (((unsigned) &SSP1STAT)*8) + 5;
[; ;pic18f27j13.h: 18534: extern volatile __bit nADDRESS2 @ (((unsigned) &SSP2STAT)*8) + 5;
[; ;pic18f27j13.h: 18536: extern volatile __bit nBOR @ (((unsigned) &RCON)*8) + 0;
[; ;pic18f27j13.h: 18538: extern volatile __bit nCM @ (((unsigned) &RCON)*8) + 5;
[; ;pic18f27j13.h: 18540: extern volatile __bit nDONE @ (((unsigned) &ADCON0)*8) + 1;
[; ;pic18f27j13.h: 18542: extern volatile __bit nPD @ (((unsigned) &RCON)*8) + 2;
[; ;pic18f27j13.h: 18544: extern volatile __bit nPOR @ (((unsigned) &RCON)*8) + 1;
[; ;pic18f27j13.h: 18546: extern volatile __bit nRBPU @ (((unsigned) &INTCON2)*8) + 7;
[; ;pic18f27j13.h: 18548: extern volatile __bit nRC8 @ (((unsigned) &RCSTA1)*8) + 6;
[; ;pic18f27j13.h: 18550: extern volatile __bit nRI @ (((unsigned) &RCON)*8) + 4;
[; ;pic18f27j13.h: 18552: extern volatile __bit nSS1 @ (((unsigned) &PORTA)*8) + 5;
[; ;pic18f27j13.h: 18554: extern volatile __bit nT1DONE @ (((unsigned) &T1GCON)*8) + 3;
[; ;pic18f27j13.h: 18556: extern volatile __bit nT1SYNC @ (((unsigned) &T1CON)*8) + 2;
[; ;pic18f27j13.h: 18558: extern volatile __bit nT3SYNC @ (((unsigned) &T3CON)*8) + 2;
[; ;pic18f27j13.h: 18560: extern volatile __bit nT5DONE @ (((unsigned) &T5GCON)*8) + 3;
[; ;pic18f27j13.h: 18562: extern volatile __bit nT5SYNC @ (((unsigned) &T5CON)*8) + 2;
[; ;pic18f27j13.h: 18564: extern volatile __bit nTO @ (((unsigned) &RCON)*8) + 3;
[; ;pic18f27j13.h: 18566: extern volatile __bit nTX8 @ (((unsigned) &TXSTA1)*8) + 6;
[; ;pic18f27j13.h: 18568: extern volatile __bit nW @ (((unsigned) &SSP1STAT)*8) + 2;
[; ;pic18f27j13.h: 18570: extern volatile __bit nW2 @ (((unsigned) &SSP2STAT)*8) + 2;
[; ;pic18f27j13.h: 18572: extern volatile __bit nWRITE @ (((unsigned) &SSP1STAT)*8) + 2;
[; ;pic18f27j13.h: 18574: extern volatile __bit nWRITE2 @ (((unsigned) &SSP2STAT)*8) + 2;
[; ;adc.h: 2008: union ADCResult
[; ;adc.h: 2009: {
[; ;adc.h: 2010: int lr;
[; ;adc.h: 2011: char br[2];
[; ;adc.h: 2012: };
[; ;adc.h: 2014: char BusyADC (void);
[; ;adc.h: 2016: void ConvertADC (void);
[; ;adc.h: 2018: void CloseADC(void);
[; ;adc.h: 2026: int ReadADC(void);
[; ;adc.h: 2052: void OpenADC ( unsigned char ,
[; ;adc.h: 2053: unsigned char ,
[; ;adc.h: 2054: unsigned char ,
[; ;adc.h: 2055: unsigned int );
[; ;adc.h: 2084: void SetChanADC(unsigned char );
[; ;adc.h: 2100: void SelChanConvADC( unsigned char );
[; ;ancomp.h: 202: void Close_ancomp1( void );
[; ;ancomp.h: 203: void Open_ancomp1(unsigned char config);
[; ;ancomp.h: 204: void Close_ancomp2( void );
[; ;ancomp.h: 205: void Open_ancomp2(unsigned char config);
[; ;ancomp.h: 208: void Close_ancomp3( void );
[; ;ancomp.h: 209: void Open_ancomp3(unsigned char config);
[; ;spi.h: 236: void OpenSPI1( unsigned char sync_mode,
[; ;spi.h: 237: unsigned char bus_mode,
[; ;spi.h: 238: unsigned char smp_phase );
[; ;spi.h: 240: signed char WriteSPI1( unsigned char data_out );
[; ;spi.h: 242: void getsSPI1( unsigned char *rdptr, unsigned char length );
[; ;spi.h: 244: void putsSPI1( unsigned char *wrptr );
[; ;spi.h: 246: unsigned char ReadSPI1( void );
[; ;spi.h: 441: void OpenSPI2( unsigned char sync_mode,
[; ;spi.h: 442: unsigned char bus_mode,
[; ;spi.h: 443: unsigned char smp_phase );
[; ;spi.h: 445: signed char WriteSPI2( unsigned char data_out );
[; ;spi.h: 447: void getsSPI2( unsigned char *rdptr, unsigned char length );
[; ;spi.h: 449: void putsSPI2( unsigned char *wrptr );
[; ;spi.h: 451: unsigned char ReadSPI2( void );
[; ;can2510.h: 414: void CAN2510Initialize( unsigned int configuration,
[; ;can2510.h: 415: unsigned char brp,
[; ;can2510.h: 416: unsigned char interruptFlags,
[; ;can2510.h: 417: unsigned char SPI_syncMode,
[; ;can2510.h: 418: unsigned char SPI_busMode,
[; ;can2510.h: 419: unsigned char SPI_smpPhase );
[; ;can2510.h: 421: signed char CAN2510Init( unsigned long BufferConfig,
[; ;can2510.h: 422: unsigned long BitTimeConfig,
[; ;can2510.h: 423: unsigned char interruptEnables,
[; ;can2510.h: 424: unsigned char SPI_syncMode,
[; ;can2510.h: 425: unsigned char SPI_busMode,
[; ;can2510.h: 426: unsigned char SPI_smpPhase );
[; ;can2510.h: 428: void CAN2510Enable( void );
[; ;can2510.h: 430: void CAN2510Disable( void );
[; ;can2510.h: 432: void CAN2510Reset( void );
[; ;can2510.h: 434: void CAN2510SetMode( unsigned char mode );
[; ;can2510.h: 436: unsigned char CAN2510ReadMode( void );
[; ;can2510.h: 438: unsigned char CAN2510ReadStatus( void );
[; ;can2510.h: 440: unsigned char CAN2510ErrorState( void );
[; ;can2510.h: 442: unsigned char CAN2510InterruptStatus( void );
[; ;can2510.h: 444: void CAN2510InterruptEnable( unsigned char interruptFlags );
[; ;can2510.h: 446: unsigned char CAN2510ByteRead( unsigned char addr );
[; ;can2510.h: 448: void CAN2510ByteWrite( unsigned char addr, unsigned char value );
[; ;can2510.h: 450: void CAN2510SequentialRead( unsigned char *DataArray,
[; ;can2510.h: 451: unsigned char CAN2510addr,
[; ;can2510.h: 452: unsigned char numbytes );
[; ;can2510.h: 454: void CAN2510SequentialWrite( unsigned char *DataArray,
[; ;can2510.h: 455: unsigned char CAN2510addr,
[; ;can2510.h: 456: unsigned char numbytes );
[; ;can2510.h: 458: void CAN2510BitModify( unsigned char address,
[; ;can2510.h: 459: unsigned char mask,
[; ;can2510.h: 460: unsigned char data );
[; ;can2510.h: 462: void CAN2510SetSingleMaskStd( unsigned char maskNum, unsigned int mask );
[; ;can2510.h: 464: void CAN2510SetSingleMaskXtd( unsigned char maskNum, unsigned long mask );
[; ;can2510.h: 466: void CAN2510SetSingleFilterStd( unsigned char filterNum, unsigned int filter );
[; ;can2510.h: 468: void CAN2510SetSingleFilterXtd( unsigned char filterNum, unsigned long filter );
[; ;can2510.h: 470: signed char CAN2510SetMsgFilterStd( unsigned char bufferNum,
[; ;can2510.h: 471: unsigned int mask,
[; ;can2510.h: 472: unsigned int *filters );
[; ;can2510.h: 474: signed char CAN2510SetMsgFilterXtd( unsigned char bufferNum,
[; ;can2510.h: 475: unsigned long mask,
[; ;can2510.h: 476: unsigned long *filters );
[; ;can2510.h: 478: signed char CAN2510WriteStd( unsigned int msgId,
[; ;can2510.h: 479: unsigned char msgPriority,
[; ;can2510.h: 480: unsigned char numBytes,
[; ;can2510.h: 481: unsigned char *data );
[; ;can2510.h: 483: signed char CAN2510WriteXtd( unsigned long msgId,
[; ;can2510.h: 484: unsigned char msgPriority,
[; ;can2510.h: 485: unsigned char numBytes,
[; ;can2510.h: 486: unsigned char *data );
[; ;can2510.h: 488: void CAN2510LoadBufferStd( unsigned char bufferNum,
[; ;can2510.h: 489: unsigned int msgId,
[; ;can2510.h: 490: unsigned char numBytes,
[; ;can2510.h: 491: unsigned char *data );
[; ;can2510.h: 493: void CAN2510LoadBufferXtd( unsigned char bufferNum,
[; ;can2510.h: 494: unsigned long msgId,
[; ;can2510.h: 495: unsigned char numBytes,
[; ;can2510.h: 496: unsigned char *data );
[; ;can2510.h: 498: void CAN2510LoadRTRStd( unsigned char bufferNum,
[; ;can2510.h: 499: unsigned int msgId,
[; ;can2510.h: 500: unsigned char numBytes );
[; ;can2510.h: 502: void CAN2510LoadRTRXtd( unsigned char bufferNum,
[; ;can2510.h: 503: unsigned long msgId,
[; ;can2510.h: 504: unsigned char numBytes );
[; ;can2510.h: 506: void CAN2510SetBufferPriority( unsigned char bufferNum,
[; ;can2510.h: 507: unsigned char bufferPriority );
[; ;can2510.h: 509: void CAN2510SendBuffer( unsigned char bufferNumber );
[; ;can2510.h: 511: signed char CAN2510WriteBuffer( unsigned char bufferNum );
[; ;can2510.h: 513: unsigned char CAN2510DataReady( unsigned char bufferNum );
[; ;can2510.h: 515: unsigned char CAN2510DataRead( unsigned char bufferNum,
[; ;can2510.h: 516: unsigned long *msgId,
[; ;can2510.h: 517: unsigned char *numBytes,
[; ;can2510.h: 518: unsigned char *data );
[; ;capture.h: 64: union capstatus
[; ;capture.h: 65: {
[; ;capture.h: 73: struct
[; ;capture.h: 74: {
[; ;capture.h: 91: unsigned Cap4OVF:1;
[; ;capture.h: 92: unsigned Cap5OVF:1;
[; ;capture.h: 96: unsigned Cap6OVF:1;
[; ;capture.h: 97: unsigned Cap7OVF:1;
[; ;capture.h: 98: unsigned Cap8OVF:1;
[; ;capture.h: 107: unsigned ECap1OVF:1;
[; ;capture.h: 111: unsigned ECap2OVF:1;
[; ;capture.h: 112: unsigned ECap3OVF:1;
[; ;capture.h: 115: };
[; ;capture.h: 117: unsigned :8;
[; ;capture.h: 119: };
[; ;capture.h: 121: extern union capstatus CapStatus;
[; ;capture.h: 123: union CapResult
[; ;capture.h: 124: {
[; ;capture.h: 125: unsigned int lc;
[; ;capture.h: 126: char bc[2];
[; ;capture.h: 127: };
[; ;capture.h: 507: void OpenCapture4 ( unsigned char config);
[; ;capture.h: 508: unsigned int ReadCapture4 (void);
[; ;capture.h: 509: void CloseCapture4 (void);
[; ;capture.h: 511: void OpenCapture5 ( unsigned char config);
[; ;capture.h: 512: unsigned int ReadCapture5 (void);
[; ;capture.h: 513: void CloseCapture5 (void);
[; ;capture.h: 520: void OpenCapture6 ( unsigned char config);
[; ;capture.h: 521: unsigned int ReadCapture6 (void);
[; ;capture.h: 522: void CloseCapture6 (void);
[; ;capture.h: 524: void OpenCapture7 ( unsigned char config);
[; ;capture.h: 525: unsigned int ReadCapture7 (void);
[; ;capture.h: 526: void CloseCapture7 (void);
[; ;capture.h: 528: void OpenCapture8 ( unsigned char config);
[; ;capture.h: 529: unsigned int ReadCapture8 (void);
[; ;capture.h: 530: void CloseCapture8 (void);
[; ;capture.h: 568: void OpenECapture1 ( unsigned char config);
[; ;capture.h: 569: unsigned int ReadECapture1 (void);
[; ;capture.h: 570: void CloseECapture1 (void);
[; ;capture.h: 573: void OpenECapture2 ( unsigned char config);
[; ;capture.h: 574: unsigned int ReadECapture2 (void);
[; ;capture.h: 575: void CloseECapture2 (void);
[; ;capture.h: 577: void OpenECapture3 ( unsigned char config);
[; ;capture.h: 578: unsigned int ReadECapture3 (void);
[; ;capture.h: 579: void CloseECapture3 (void);
[; ;compare.h: 403: void OpenCompare4(unsigned char config,unsigned int period);
[; ;compare.h: 404: void CloseCompare4(void);
[; ;compare.h: 406: void OpenCompare5(unsigned char config,unsigned int period);
[; ;compare.h: 407: void CloseCompare5(void);
[; ;compare.h: 411: void OpenCompare6(unsigned char config,unsigned int period);
[; ;compare.h: 412: void CloseCompare6(void);
[; ;compare.h: 414: void OpenCompare7(unsigned char config,unsigned int period);
[; ;compare.h: 415: void CloseCompare7(void);
[; ;compare.h: 417: void OpenCompare8(unsigned char config,unsigned int period);
[; ;compare.h: 418: void CloseCompare8(void);
[; ;compare.h: 433: void OpenECompare1(unsigned char config,unsigned int period);
[; ;compare.h: 434: void CloseECompare1(void);
[; ;compare.h: 439: void OpenECompare2(unsigned char config,unsigned int period);
[; ;compare.h: 440: void CloseECompare2(void);
[; ;compare.h: 442: void OpenECompare3(unsigned char config,unsigned int period);
[; ;compare.h: 443: void CloseECompare3(void);
[; ;ctmu.h: 374: void OpenCTMU(unsigned char config1,unsigned char config2,unsigned char config3);
[; ;ctmu.h: 379: void CurrentControlCTMU(unsigned char config);
[; ;ctmu.h: 380: void CloseCTMU(void);
[; ;dpslp.h: 49: typedef union
[; ;dpslp.h: 50: {
[; ;dpslp.h: 51: struct
[; ;dpslp.h: 52: {
[; ;dpslp.h: 53: unsigned char DS_POR:1;
[; ;dpslp.h: 54: unsigned char DS_MCLR:1;
[; ;dpslp.h: 55: unsigned char DS_RTC:1;
[; ;dpslp.h: 56: unsigned char DS_WDT:1;
[; ;dpslp.h: 57: unsigned char DS_FLT:1;
[; ;dpslp.h: 58: unsigned char DS_INT0:1;
[; ;dpslp.h: 59: unsigned char DS_BOR:1;
[; ;dpslp.h: 60: unsigned char DS_ULP:1;
[; ;dpslp.h: 61: }WK_SRC;
[; ;dpslp.h: 63: unsigned char WKSRC;
[; ;dpslp.h: 65: }SRC;
[; ;dpslp.h: 68: typedef struct
[; ;dpslp.h: 69: {
[; ;dpslp.h: 70: unsigned char Reg0;
[; ;dpslp.h: 71: unsigned char Reg1;
[; ;dpslp.h: 72: }CONTEXT;
[; ;dpslp.h: 164: extern void DeepSleepWakeUpSource(SRC* ptr);
[; ;dpslp.h: 165: extern void GotoDeepSleep( unsigned int config);
[; ;dpslp.h: 166: extern signed char IsResetFromDeepSleep( void );
[; ;dpslp.h: 167: extern void ReadDSGPR( CONTEXT* ptr );
[; ;dpslp.h: 171: extern void ULPWakeUpEnable( void );
[; ;stddef.h: 2: typedef int ptrdiff_t;
[; ;stddef.h: 3: typedef unsigned size_t;
[; ;stddef.h: 4: typedef unsigned short wchar_t;
[; ;stddef.h: 13: extern int errno;
[; ;GenericTypeDefs.h: 65: typedef enum _BOOL { FALSE = 0, TRUE } BOOL;
[; ;GenericTypeDefs.h: 68: typedef enum _BIT { CLEAR = 0, SET } BIT;
[; ;GenericTypeDefs.h: 75: typedef signed int INT;
[; ;GenericTypeDefs.h: 76: typedef signed char INT8;
[; ;GenericTypeDefs.h: 77: typedef signed short int INT16;
[; ;GenericTypeDefs.h: 78: typedef signed long int INT32;
[; ;GenericTypeDefs.h: 82: typedef signed long long INT64;
[; ;GenericTypeDefs.h: 86: typedef unsigned int UINT;
[; ;GenericTypeDefs.h: 87: typedef unsigned char UINT8;
[; ;GenericTypeDefs.h: 88: typedef unsigned short int UINT16;
[; ;GenericTypeDefs.h: 93: typedef unsigned long int UINT32;
[; ;GenericTypeDefs.h: 96: typedef unsigned long long UINT64;
[; ;GenericTypeDefs.h: 99: typedef union
[; ;GenericTypeDefs.h: 100: {
[; ;GenericTypeDefs.h: 101: UINT8 Val;
[; ;GenericTypeDefs.h: 102: struct
[; ;GenericTypeDefs.h: 103: {
[; ;GenericTypeDefs.h: 104: UINT8 b0:1;
[; ;GenericTypeDefs.h: 105: UINT8 b1:1;
[; ;GenericTypeDefs.h: 106: UINT8 b2:1;
[; ;GenericTypeDefs.h: 107: UINT8 b3:1;
[; ;GenericTypeDefs.h: 108: UINT8 b4:1;
[; ;GenericTypeDefs.h: 109: UINT8 b5:1;
[; ;GenericTypeDefs.h: 110: UINT8 b6:1;
[; ;GenericTypeDefs.h: 111: UINT8 b7:1;
[; ;GenericTypeDefs.h: 112: } bits;
[; ;GenericTypeDefs.h: 113: } UINT8_VAL, UINT8_BITS;
[; ;GenericTypeDefs.h: 115: typedef union
[; ;GenericTypeDefs.h: 116: {
[; ;GenericTypeDefs.h: 117: UINT16 Val;
[; ;GenericTypeDefs.h: 118: UINT8 v[2] ;
[; ;GenericTypeDefs.h: 119: struct
[; ;GenericTypeDefs.h: 120: {
[; ;GenericTypeDefs.h: 121: UINT8 LB;
[; ;GenericTypeDefs.h: 122: UINT8 HB;
[; ;GenericTypeDefs.h: 123: } byte;
[; ;GenericTypeDefs.h: 124: struct
[; ;GenericTypeDefs.h: 125: {
[; ;GenericTypeDefs.h: 126: UINT8 b0:1;
[; ;GenericTypeDefs.h: 127: UINT8 b1:1;
[; ;GenericTypeDefs.h: 128: UINT8 b2:1;
[; ;GenericTypeDefs.h: 129: UINT8 b3:1;
[; ;GenericTypeDefs.h: 130: UINT8 b4:1;
[; ;GenericTypeDefs.h: 131: UINT8 b5:1;
[; ;GenericTypeDefs.h: 132: UINT8 b6:1;
[; ;GenericTypeDefs.h: 133: UINT8 b7:1;
[; ;GenericTypeDefs.h: 134: UINT8 b8:1;
[; ;GenericTypeDefs.h: 135: UINT8 b9:1;
[; ;GenericTypeDefs.h: 136: UINT8 b10:1;
[; ;GenericTypeDefs.h: 137: UINT8 b11:1;
[; ;GenericTypeDefs.h: 138: UINT8 b12:1;
[; ;GenericTypeDefs.h: 139: UINT8 b13:1;
[; ;GenericTypeDefs.h: 140: UINT8 b14:1;
[; ;GenericTypeDefs.h: 141: UINT8 b15:1;
[; ;GenericTypeDefs.h: 142: } bits;
[; ;GenericTypeDefs.h: 143: } UINT16_VAL, UINT16_BITS;
[; ;GenericTypeDefs.h: 187: typedef union
[; ;GenericTypeDefs.h: 188: {
[; ;GenericTypeDefs.h: 189: UINT32 Val;
[; ;GenericTypeDefs.h: 190: UINT16 w[2] ;
[; ;GenericTypeDefs.h: 191: UINT8 v[4] ;
[; ;GenericTypeDefs.h: 192: struct
[; ;GenericTypeDefs.h: 193: {
[; ;GenericTypeDefs.h: 194: UINT16 LW;
[; ;GenericTypeDefs.h: 195: UINT16 HW;
[; ;GenericTypeDefs.h: 196: } word;
[; ;GenericTypeDefs.h: 197: struct
[; ;GenericTypeDefs.h: 198: {
[; ;GenericTypeDefs.h: 199: UINT8 LB;
[; ;GenericTypeDefs.h: 200: UINT8 HB;
[; ;GenericTypeDefs.h: 201: UINT8 UB;
[; ;GenericTypeDefs.h: 202: UINT8 MB;
[; ;GenericTypeDefs.h: 203: } byte;
[; ;GenericTypeDefs.h: 204: struct
[; ;GenericTypeDefs.h: 205: {
[; ;GenericTypeDefs.h: 206: UINT16_VAL low;
[; ;GenericTypeDefs.h: 207: UINT16_VAL high;
[; ;GenericTypeDefs.h: 208: }wordUnion;
[; ;GenericTypeDefs.h: 209: struct
[; ;GenericTypeDefs.h: 210: {
[; ;GenericTypeDefs.h: 211: UINT8 b0:1;
[; ;GenericTypeDefs.h: 212: UINT8 b1:1;
[; ;GenericTypeDefs.h: 213: UINT8 b2:1;
[; ;GenericTypeDefs.h: 214: UINT8 b3:1;
[; ;GenericTypeDefs.h: 215: UINT8 b4:1;
[; ;GenericTypeDefs.h: 216: UINT8 b5:1;
[; ;GenericTypeDefs.h: 217: UINT8 b6:1;
[; ;GenericTypeDefs.h: 218: UINT8 b7:1;
[; ;GenericTypeDefs.h: 219: UINT8 b8:1;
[; ;GenericTypeDefs.h: 220: UINT8 b9:1;
[; ;GenericTypeDefs.h: 221: UINT8 b10:1;
[; ;GenericTypeDefs.h: 222: UINT8 b11:1;
[; ;GenericTypeDefs.h: 223: UINT8 b12:1;
[; ;GenericTypeDefs.h: 224: UINT8 b13:1;
[; ;GenericTypeDefs.h: 225: UINT8 b14:1;
[; ;GenericTypeDefs.h: 226: UINT8 b15:1;
[; ;GenericTypeDefs.h: 227: UINT8 b16:1;
[; ;GenericTypeDefs.h: 228: UINT8 b17:1;
[; ;GenericTypeDefs.h: 229: UINT8 b18:1;
[; ;GenericTypeDefs.h: 230: UINT8 b19:1;
[; ;GenericTypeDefs.h: 231: UINT8 b20:1;
[; ;GenericTypeDefs.h: 232: UINT8 b21:1;
[; ;GenericTypeDefs.h: 233: UINT8 b22:1;
[; ;GenericTypeDefs.h: 234: UINT8 b23:1;
[; ;GenericTypeDefs.h: 235: UINT8 b24:1;
[; ;GenericTypeDefs.h: 236: UINT8 b25:1;
[; ;GenericTypeDefs.h: 237: UINT8 b26:1;
[; ;GenericTypeDefs.h: 238: UINT8 b27:1;
[; ;GenericTypeDefs.h: 239: UINT8 b28:1;
[; ;GenericTypeDefs.h: 240: UINT8 b29:1;
[; ;GenericTypeDefs.h: 241: UINT8 b30:1;
[; ;GenericTypeDefs.h: 242: UINT8 b31:1;
[; ;GenericTypeDefs.h: 243: } bits;
[; ;GenericTypeDefs.h: 244: } UINT32_VAL;
[; ;GenericTypeDefs.h: 248: typedef union
[; ;GenericTypeDefs.h: 249: {
[; ;GenericTypeDefs.h: 250: UINT64 Val;
[; ;GenericTypeDefs.h: 251: UINT32 d[2] ;
[; ;GenericTypeDefs.h: 252: UINT16 w[4] ;
[; ;GenericTypeDefs.h: 253: UINT8 v[8] ;
[; ;GenericTypeDefs.h: 254: struct
[; ;GenericTypeDefs.h: 255: {
[; ;GenericTypeDefs.h: 256: UINT32 LD;
[; ;GenericTypeDefs.h: 257: UINT32 HD;
[; ;GenericTypeDefs.h: 258: } dword;
[; ;GenericTypeDefs.h: 259: struct
[; ;GenericTypeDefs.h: 260: {
[; ;GenericTypeDefs.h: 261: UINT16 LW;
[; ;GenericTypeDefs.h: 262: UINT16 HW;
[; ;GenericTypeDefs.h: 263: UINT16 UW;
[; ;GenericTypeDefs.h: 264: UINT16 MW;
[; ;GenericTypeDefs.h: 265: } word;
[; ;GenericTypeDefs.h: 266: struct
[; ;GenericTypeDefs.h: 267: {
[; ;GenericTypeDefs.h: 268: UINT8 b0:1;
[; ;GenericTypeDefs.h: 269: UINT8 b1:1;
[; ;GenericTypeDefs.h: 270: UINT8 b2:1;
[; ;GenericTypeDefs.h: 271: UINT8 b3:1;
[; ;GenericTypeDefs.h: 272: UINT8 b4:1;
[; ;GenericTypeDefs.h: 273: UINT8 b5:1;
[; ;GenericTypeDefs.h: 274: UINT8 b6:1;
[; ;GenericTypeDefs.h: 275: UINT8 b7:1;
[; ;GenericTypeDefs.h: 276: UINT8 b8:1;
[; ;GenericTypeDefs.h: 277: UINT8 b9:1;
[; ;GenericTypeDefs.h: 278: UINT8 b10:1;
[; ;GenericTypeDefs.h: 279: UINT8 b11:1;
[; ;GenericTypeDefs.h: 280: UINT8 b12:1;
[; ;GenericTypeDefs.h: 281: UINT8 b13:1;
[; ;GenericTypeDefs.h: 282: UINT8 b14:1;
[; ;GenericTypeDefs.h: 283: UINT8 b15:1;
[; ;GenericTypeDefs.h: 284: UINT8 b16:1;
[; ;GenericTypeDefs.h: 285: UINT8 b17:1;
[; ;GenericTypeDefs.h: 286: UINT8 b18:1;
[; ;GenericTypeDefs.h: 287: UINT8 b19:1;
[; ;GenericTypeDefs.h: 288: UINT8 b20:1;
[; ;GenericTypeDefs.h: 289: UINT8 b21:1;
[; ;GenericTypeDefs.h: 290: UINT8 b22:1;
[; ;GenericTypeDefs.h: 291: UINT8 b23:1;
[; ;GenericTypeDefs.h: 292: UINT8 b24:1;
[; ;GenericTypeDefs.h: 293: UINT8 b25:1;
[; ;GenericTypeDefs.h: 294: UINT8 b26:1;
[; ;GenericTypeDefs.h: 295: UINT8 b27:1;
[; ;GenericTypeDefs.h: 296: UINT8 b28:1;
[; ;GenericTypeDefs.h: 297: UINT8 b29:1;
[; ;GenericTypeDefs.h: 298: UINT8 b30:1;
[; ;GenericTypeDefs.h: 299: UINT8 b31:1;
[; ;GenericTypeDefs.h: 300: UINT8 b32:1;
[; ;GenericTypeDefs.h: 301: UINT8 b33:1;
[; ;GenericTypeDefs.h: 302: UINT8 b34:1;
[; ;GenericTypeDefs.h: 303: UINT8 b35:1;
[; ;GenericTypeDefs.h: 304: UINT8 b36:1;
[; ;GenericTypeDefs.h: 305: UINT8 b37:1;
[; ;GenericTypeDefs.h: 306: UINT8 b38:1;
[; ;GenericTypeDefs.h: 307: UINT8 b39:1;
[; ;GenericTypeDefs.h: 308: UINT8 b40:1;
[; ;GenericTypeDefs.h: 309: UINT8 b41:1;
[; ;GenericTypeDefs.h: 310: UINT8 b42:1;
[; ;GenericTypeDefs.h: 311: UINT8 b43:1;
[; ;GenericTypeDefs.h: 312: UINT8 b44:1;
[; ;GenericTypeDefs.h: 313: UINT8 b45:1;
[; ;GenericTypeDefs.h: 314: UINT8 b46:1;
[; ;GenericTypeDefs.h: 315: UINT8 b47:1;
[; ;GenericTypeDefs.h: 316: UINT8 b48:1;
[; ;GenericTypeDefs.h: 317: UINT8 b49:1;
[; ;GenericTypeDefs.h: 318: UINT8 b50:1;
[; ;GenericTypeDefs.h: 319: UINT8 b51:1;
[; ;GenericTypeDefs.h: 320: UINT8 b52:1;
[; ;GenericTypeDefs.h: 321: UINT8 b53:1;
[; ;GenericTypeDefs.h: 322: UINT8 b54:1;
[; ;GenericTypeDefs.h: 323: UINT8 b55:1;
[; ;GenericTypeDefs.h: 324: UINT8 b56:1;
[; ;GenericTypeDefs.h: 325: UINT8 b57:1;
[; ;GenericTypeDefs.h: 326: UINT8 b58:1;
[; ;GenericTypeDefs.h: 327: UINT8 b59:1;
[; ;GenericTypeDefs.h: 328: UINT8 b60:1;
[; ;GenericTypeDefs.h: 329: UINT8 b61:1;
[; ;GenericTypeDefs.h: 330: UINT8 b62:1;
[; ;GenericTypeDefs.h: 331: UINT8 b63:1;
[; ;GenericTypeDefs.h: 332: } bits;
[; ;GenericTypeDefs.h: 333: } UINT64_VAL;
[; ;GenericTypeDefs.h: 339: typedef void VOID;
[; ;GenericTypeDefs.h: 341: typedef char CHAR8;
[; ;GenericTypeDefs.h: 342: typedef unsigned char UCHAR8;
[; ;GenericTypeDefs.h: 344: typedef unsigned char BYTE;
[; ;GenericTypeDefs.h: 345: typedef unsigned short int WORD;
[; ;GenericTypeDefs.h: 346: typedef unsigned long DWORD;
[; ;GenericTypeDefs.h: 349: typedef unsigned long long QWORD;
[; ;GenericTypeDefs.h: 350: typedef signed char CHAR;
[; ;GenericTypeDefs.h: 351: typedef signed short int SHORT;
[; ;GenericTypeDefs.h: 352: typedef signed long LONG;
[; ;GenericTypeDefs.h: 355: typedef signed long long LONGLONG;
[; ;GenericTypeDefs.h: 356: typedef union
[; ;GenericTypeDefs.h: 357: {
[; ;GenericTypeDefs.h: 358: BYTE Val;
[; ;GenericTypeDefs.h: 359: struct
[; ;GenericTypeDefs.h: 360: {
[; ;GenericTypeDefs.h: 361: BYTE b0:1;
[; ;GenericTypeDefs.h: 362: BYTE b1:1;
[; ;GenericTypeDefs.h: 363: BYTE b2:1;
[; ;GenericTypeDefs.h: 364: BYTE b3:1;
[; ;GenericTypeDefs.h: 365: BYTE b4:1;
[; ;GenericTypeDefs.h: 366: BYTE b5:1;
[; ;GenericTypeDefs.h: 367: BYTE b6:1;
[; ;GenericTypeDefs.h: 368: BYTE b7:1;
[; ;GenericTypeDefs.h: 369: } bits;
[; ;GenericTypeDefs.h: 370: } BYTE_VAL, BYTE_BITS;
[; ;GenericTypeDefs.h: 372: typedef union
[; ;GenericTypeDefs.h: 373: {
[; ;GenericTypeDefs.h: 374: WORD Val;
[; ;GenericTypeDefs.h: 375: BYTE v[2] ;
[; ;GenericTypeDefs.h: 376: struct
[; ;GenericTypeDefs.h: 377: {
[; ;GenericTypeDefs.h: 378: BYTE LB;
[; ;GenericTypeDefs.h: 379: BYTE HB;
[; ;GenericTypeDefs.h: 380: } byte;
[; ;GenericTypeDefs.h: 381: struct
[; ;GenericTypeDefs.h: 382: {
[; ;GenericTypeDefs.h: 383: BYTE b0:1;
[; ;GenericTypeDefs.h: 384: BYTE b1:1;
[; ;GenericTypeDefs.h: 385: BYTE b2:1;
[; ;GenericTypeDefs.h: 386: BYTE b3:1;
[; ;GenericTypeDefs.h: 387: BYTE b4:1;
[; ;GenericTypeDefs.h: 388: BYTE b5:1;
[; ;GenericTypeDefs.h: 389: BYTE b6:1;
[; ;GenericTypeDefs.h: 390: BYTE b7:1;
[; ;GenericTypeDefs.h: 391: BYTE b8:1;
[; ;GenericTypeDefs.h: 392: BYTE b9:1;
[; ;GenericTypeDefs.h: 393: BYTE b10:1;
[; ;GenericTypeDefs.h: 394: BYTE b11:1;
[; ;GenericTypeDefs.h: 395: BYTE b12:1;
[; ;GenericTypeDefs.h: 396: BYTE b13:1;
[; ;GenericTypeDefs.h: 397: BYTE b14:1;
[; ;GenericTypeDefs.h: 398: BYTE b15:1;
[; ;GenericTypeDefs.h: 399: } bits;
[; ;GenericTypeDefs.h: 400: } WORD_VAL, WORD_BITS;
[; ;GenericTypeDefs.h: 402: typedef union
[; ;GenericTypeDefs.h: 403: {
[; ;GenericTypeDefs.h: 404: DWORD Val;
[; ;GenericTypeDefs.h: 405: WORD w[2] ;
[; ;GenericTypeDefs.h: 406: BYTE v[4] ;
[; ;GenericTypeDefs.h: 407: struct
[; ;GenericTypeDefs.h: 408: {
[; ;GenericTypeDefs.h: 409: WORD LW;
[; ;GenericTypeDefs.h: 410: WORD HW;
[; ;GenericTypeDefs.h: 411: } word;
[; ;GenericTypeDefs.h: 412: struct
[; ;GenericTypeDefs.h: 413: {
[; ;GenericTypeDefs.h: 414: BYTE LB;
[; ;GenericTypeDefs.h: 415: BYTE HB;
[; ;GenericTypeDefs.h: 416: BYTE UB;
[; ;GenericTypeDefs.h: 417: BYTE MB;
[; ;GenericTypeDefs.h: 418: } byte;
[; ;GenericTypeDefs.h: 419: struct
[; ;GenericTypeDefs.h: 420: {
[; ;GenericTypeDefs.h: 421: WORD_VAL low;
[; ;GenericTypeDefs.h: 422: WORD_VAL high;
[; ;GenericTypeDefs.h: 423: }wordUnion;
[; ;GenericTypeDefs.h: 424: struct
[; ;GenericTypeDefs.h: 425: {
[; ;GenericTypeDefs.h: 426: BYTE b0:1;
[; ;GenericTypeDefs.h: 427: BYTE b1:1;
[; ;GenericTypeDefs.h: 428: BYTE b2:1;
[; ;GenericTypeDefs.h: 429: BYTE b3:1;
[; ;GenericTypeDefs.h: 430: BYTE b4:1;
[; ;GenericTypeDefs.h: 431: BYTE b5:1;
[; ;GenericTypeDefs.h: 432: BYTE b6:1;
[; ;GenericTypeDefs.h: 433: BYTE b7:1;
[; ;GenericTypeDefs.h: 434: BYTE b8:1;
[; ;GenericTypeDefs.h: 435: BYTE b9:1;
[; ;GenericTypeDefs.h: 436: BYTE b10:1;
[; ;GenericTypeDefs.h: 437: BYTE b11:1;
[; ;GenericTypeDefs.h: 438: BYTE b12:1;
[; ;GenericTypeDefs.h: 439: BYTE b13:1;
[; ;GenericTypeDefs.h: 440: BYTE b14:1;
[; ;GenericTypeDefs.h: 441: BYTE b15:1;
[; ;GenericTypeDefs.h: 442: BYTE b16:1;
[; ;GenericTypeDefs.h: 443: BYTE b17:1;
[; ;GenericTypeDefs.h: 444: BYTE b18:1;
[; ;GenericTypeDefs.h: 445: BYTE b19:1;
[; ;GenericTypeDefs.h: 446: BYTE b20:1;
[; ;GenericTypeDefs.h: 447: BYTE b21:1;
[; ;GenericTypeDefs.h: 448: BYTE b22:1;
[; ;GenericTypeDefs.h: 449: BYTE b23:1;
[; ;GenericTypeDefs.h: 450: BYTE b24:1;
[; ;GenericTypeDefs.h: 451: BYTE b25:1;
[; ;GenericTypeDefs.h: 452: BYTE b26:1;
[; ;GenericTypeDefs.h: 453: BYTE b27:1;
[; ;GenericTypeDefs.h: 454: BYTE b28:1;
[; ;GenericTypeDefs.h: 455: BYTE b29:1;
[; ;GenericTypeDefs.h: 456: BYTE b30:1;
[; ;GenericTypeDefs.h: 457: BYTE b31:1;
[; ;GenericTypeDefs.h: 458: } bits;
[; ;GenericTypeDefs.h: 459: } DWORD_VAL;
[; ;GenericTypeDefs.h: 462: typedef union
[; ;GenericTypeDefs.h: 463: {
[; ;GenericTypeDefs.h: 464: QWORD Val;
[; ;GenericTypeDefs.h: 465: DWORD d[2] ;
[; ;GenericTypeDefs.h: 466: WORD w[4] ;
[; ;GenericTypeDefs.h: 467: BYTE v[8] ;
[; ;GenericTypeDefs.h: 468: struct
[; ;GenericTypeDefs.h: 469: {
[; ;GenericTypeDefs.h: 470: DWORD LD;
[; ;GenericTypeDefs.h: 471: DWORD HD;
[; ;GenericTypeDefs.h: 472: } dword;
[; ;GenericTypeDefs.h: 473: struct
[; ;GenericTypeDefs.h: 474: {
[; ;GenericTypeDefs.h: 475: WORD LW;
[; ;GenericTypeDefs.h: 476: WORD HW;
[; ;GenericTypeDefs.h: 477: WORD UW;
[; ;GenericTypeDefs.h: 478: WORD MW;
[; ;GenericTypeDefs.h: 479: } word;
[; ;GenericTypeDefs.h: 480: struct
[; ;GenericTypeDefs.h: 481: {
[; ;GenericTypeDefs.h: 482: BYTE b0:1;
[; ;GenericTypeDefs.h: 483: BYTE b1:1;
[; ;GenericTypeDefs.h: 484: BYTE b2:1;
[; ;GenericTypeDefs.h: 485: BYTE b3:1;
[; ;GenericTypeDefs.h: 486: BYTE b4:1;
[; ;GenericTypeDefs.h: 487: BYTE b5:1;
[; ;GenericTypeDefs.h: 488: BYTE b6:1;
[; ;GenericTypeDefs.h: 489: BYTE b7:1;
[; ;GenericTypeDefs.h: 490: BYTE b8:1;
[; ;GenericTypeDefs.h: 491: BYTE b9:1;
[; ;GenericTypeDefs.h: 492: BYTE b10:1;
[; ;GenericTypeDefs.h: 493: BYTE b11:1;
[; ;GenericTypeDefs.h: 494: BYTE b12:1;
[; ;GenericTypeDefs.h: 495: BYTE b13:1;
[; ;GenericTypeDefs.h: 496: BYTE b14:1;
[; ;GenericTypeDefs.h: 497: BYTE b15:1;
[; ;GenericTypeDefs.h: 498: BYTE b16:1;
[; ;GenericTypeDefs.h: 499: BYTE b17:1;
[; ;GenericTypeDefs.h: 500: BYTE b18:1;
[; ;GenericTypeDefs.h: 501: BYTE b19:1;
[; ;GenericTypeDefs.h: 502: BYTE b20:1;
[; ;GenericTypeDefs.h: 503: BYTE b21:1;
[; ;GenericTypeDefs.h: 504: BYTE b22:1;
[; ;GenericTypeDefs.h: 505: BYTE b23:1;
[; ;GenericTypeDefs.h: 506: BYTE b24:1;
[; ;GenericTypeDefs.h: 507: BYTE b25:1;
[; ;GenericTypeDefs.h: 508: BYTE b26:1;
[; ;GenericTypeDefs.h: 509: BYTE b27:1;
[; ;GenericTypeDefs.h: 510: BYTE b28:1;
[; ;GenericTypeDefs.h: 511: BYTE b29:1;
[; ;GenericTypeDefs.h: 512: BYTE b30:1;
[; ;GenericTypeDefs.h: 513: BYTE b31:1;
[; ;GenericTypeDefs.h: 514: BYTE b32:1;
[; ;GenericTypeDefs.h: 515: BYTE b33:1;
[; ;GenericTypeDefs.h: 516: BYTE b34:1;
[; ;GenericTypeDefs.h: 517: BYTE b35:1;
[; ;GenericTypeDefs.h: 518: BYTE b36:1;
[; ;GenericTypeDefs.h: 519: BYTE b37:1;
[; ;GenericTypeDefs.h: 520: BYTE b38:1;
[; ;GenericTypeDefs.h: 521: BYTE b39:1;
[; ;GenericTypeDefs.h: 522: BYTE b40:1;
[; ;GenericTypeDefs.h: 523: BYTE b41:1;
[; ;GenericTypeDefs.h: 524: BYTE b42:1;
[; ;GenericTypeDefs.h: 525: BYTE b43:1;
[; ;GenericTypeDefs.h: 526: BYTE b44:1;
[; ;GenericTypeDefs.h: 527: BYTE b45:1;
[; ;GenericTypeDefs.h: 528: BYTE b46:1;
[; ;GenericTypeDefs.h: 529: BYTE b47:1;
[; ;GenericTypeDefs.h: 530: BYTE b48:1;
[; ;GenericTypeDefs.h: 531: BYTE b49:1;
[; ;GenericTypeDefs.h: 532: BYTE b50:1;
[; ;GenericTypeDefs.h: 533: BYTE b51:1;
[; ;GenericTypeDefs.h: 534: BYTE b52:1;
[; ;GenericTypeDefs.h: 535: BYTE b53:1;
[; ;GenericTypeDefs.h: 536: BYTE b54:1;
[; ;GenericTypeDefs.h: 537: BYTE b55:1;
[; ;GenericTypeDefs.h: 538: BYTE b56:1;
[; ;GenericTypeDefs.h: 539: BYTE b57:1;
[; ;GenericTypeDefs.h: 540: BYTE b58:1;
[; ;GenericTypeDefs.h: 541: BYTE b59:1;
[; ;GenericTypeDefs.h: 542: BYTE b60:1;
[; ;GenericTypeDefs.h: 543: BYTE b61:1;
[; ;GenericTypeDefs.h: 544: BYTE b62:1;
[; ;GenericTypeDefs.h: 545: BYTE b63:1;
[; ;GenericTypeDefs.h: 546: } bits;
[; ;GenericTypeDefs.h: 547: } QWORD_VAL;
[; ;flash.h: 113: extern void ReadFlash(unsigned long startaddr, unsigned int num_bytes, unsigned char *flash_array);
[; ;flash.h: 120: extern void EraseFlash(unsigned long startaddr, unsigned long endaddr);
[; ;flash.h: 122: extern void WriteBlockFlash(unsigned long startaddr, unsigned char num_blocks, unsigned char *flash_array);
[; ;flash.h: 124: extern void WriteBytesFlash(unsigned long startaddr, unsigned int num_bytes, unsigned char *flash_array);
[; ;flash.h: 127: extern void WriteWordFlash(unsigned long startaddr, unsigned int data);
[; ;i2c.h: 244: void OpenI2C1( unsigned char sync_mode, unsigned char slew );
[; ;i2c.h: 264: unsigned char ReadI2C1( void );
[; ;i2c.h: 279: signed char WriteI2C1( unsigned char data_out );
[; ;i2c.h: 294: signed char getsI2C1( unsigned char *rdptr, unsigned char length );
[; ;i2c.h: 297: signed char putsI2C1( unsigned char *wrptr );
[; ;i2c.h: 305: signed char EEAckPolling1( unsigned char control );
[; ;i2c.h: 308: signed char EEByteWrite1( unsigned char control,
[; ;i2c.h: 309: unsigned char address,
[; ;i2c.h: 310: unsigned char data );
[; ;i2c.h: 313: signed int EECurrentAddRead1( unsigned char control );
[; ;i2c.h: 316: signed char EEPageWrite1( unsigned char control,
[; ;i2c.h: 317: unsigned char address,
[; ;i2c.h: 318: unsigned char *wrptr );
[; ;i2c.h: 321: signed int EERandomRead1( unsigned char control, unsigned char address );
[; ;i2c.h: 324: signed char EESequentialRead1( unsigned char control,
[; ;i2c.h: 325: unsigned char address,
[; ;i2c.h: 326: unsigned char *rdptr,
[; ;i2c.h: 327: unsigned char length );
[; ;mwire.h: 200: void OpenMwire1( unsigned char sync_mode );
[; ;mwire.h: 203: unsigned char ReadMwire1( unsigned char high_byte,
[; ;mwire.h: 204: unsigned char low_byte );
[; ;mwire.h: 219: signed char WriteMwire1( unsigned char data_out );
[; ;mwire.h: 234: void getsMwire1( unsigned char *rdptr, unsigned char length );
[; ;portb.h: 126: void OpenPORTB( unsigned char config);
[; ;portb.h: 176: void OpenRB0INT( unsigned char config);
[; ;portb.h: 194: void OpenRB1INT( unsigned char config);
[; ;portb.h: 211: void OpenRB2INT( unsigned char config);
[; ;portb.h: 230: void OpenRB3INT( unsigned char config);
[; ;pwm.h: 85: union PWMDC
[; ;pwm.h: 86: {
[; ;pwm.h: 87: unsigned int lpwm;
[; ;pwm.h: 88: char bpwm[2];
[; ;pwm.h: 89: };
[; ;pwm.h: 467: void OpenPWM1 ( char period);
[; ;pwm.h: 468: void SetDCPWM1 ( unsigned int duty_cycle);
[; ;pwm.h: 477: void ClosePWM1 (void);
[; ;pwm.h: 538: void OpenPWM4 ( unsigned char period, unsigned char timer_source );
[; ;pwm.h: 539: void SetDCPWM4 ( unsigned int duty_cycle);
[; ;pwm.h: 540: void ClosePWM4 (void);
[; ;pwm.h: 542: void OpenPWM5 ( unsigned char period, unsigned char timer_source );
[; ;pwm.h: 543: void SetDCPWM5 ( unsigned int duty_cycle);
[; ;pwm.h: 544: void ClosePWM5 (void);
[; ;pwm.h: 547: void OpenPWM6 ( unsigned char period, unsigned char timer_source );
[; ;pwm.h: 548: void SetDCPWM6 ( unsigned int duty_cycle);
[; ;pwm.h: 549: void ClosePWM6 (void);
[; ;pwm.h: 551: void OpenPWM7 ( unsigned char period, unsigned char timer_source );
[; ;pwm.h: 552: void SetDCPWM7 ( unsigned int duty_cycle);
[; ;pwm.h: 553: void ClosePWM7 (void);
[; ;pwm.h: 555: void OpenPWM8 ( unsigned char period, unsigned char timer_source );
[; ;pwm.h: 556: void SetDCPWM8 ( unsigned int duty_cycle);
[; ;pwm.h: 557: void ClosePWM8 (void);
[; ;pwm.h: 586: void OpenEPWM1( unsigned char period, unsigned char timer_source );
[; ;pwm.h: 587: void SetDCEPWM1 ( unsigned int duty_cycle);
[; ;pwm.h: 588: void SetOutputEPWM1 ( unsigned char output_config,
[; ;pwm.h: 589: unsigned char pwm_mode);
[; ;pwm.h: 590: void CloseEPWM1 (void);
[; ;pwm.h: 594: void OpenEPWM2( unsigned char period, unsigned char timer_source );
[; ;pwm.h: 595: void SetDCEPWM2 ( unsigned int duty_cycle);
[; ;pwm.h: 596: void SetOutputEPWM2 ( unsigned char output_config,
[; ;pwm.h: 597: unsigned char pwm_mode);
[; ;pwm.h: 598: void CloseEPWM2 (void);
[; ;pwm.h: 601: void OpenEPWM3( unsigned char period, unsigned char timer_source );
[; ;pwm.h: 602: void SetDCEPWM3 ( unsigned int duty_cycle);
[; ;pwm.h: 603: void SetOutputEPWM3 ( unsigned char output_config,
[; ;pwm.h: 604: unsigned char pwm_mode);
[; ;pwm.h: 605: void CloseEPWM3 (void);
[; ;reset.h: 16: char isMCLR(void);
[; ;reset.h: 17: void StatusReset(void);
[; ;reset.h: 18: char isPOR(void);
[; ;reset.h: 19: char isWU(void);
[; ;reset.h: 22: char isBOR(void);
[; ;reset.h: 26: char isWDTTO(void);
[; ;reset.h: 27: char isWDTWU(void);
[; ;reset.h: 31: char isLVD(void);
[; ;rtcc.h: 43: typedef union _WORD_VAL
[; ;rtcc.h: 44: {
[; ;rtcc.h: 45: unsigned int Val;
[; ;rtcc.h: 46: unsigned char v[2];
[; ;rtcc.h: 47: struct
[; ;rtcc.h: 48: {
[; ;rtcc.h: 49: unsigned char LB;
[; ;rtcc.h: 50: unsigned char HB;
[; ;rtcc.h: 51: } byte;
[; ;rtcc.h: 52: struct
[; ;rtcc.h: 53: {
[; ;rtcc.h: 54: unsigned char b0:1;
[; ;rtcc.h: 55: unsigned char b1:1;
[; ;rtcc.h: 56: unsigned char b2:1;
[; ;rtcc.h: 57: unsigned char b3:1;
[; ;rtcc.h: 58: unsigned char b4:1;
[; ;rtcc.h: 59: unsigned char b5:1;
[; ;rtcc.h: 60: unsigned char b6:1;
[; ;rtcc.h: 61: unsigned char b7:1;
[; ;rtcc.h: 62: unsigned char b8:1;
[; ;rtcc.h: 63: unsigned char b9:1;
[; ;rtcc.h: 64: unsigned char b10:1;
[; ;rtcc.h: 65: unsigned char b11:1;
[; ;rtcc.h: 66: unsigned char b12:1;
[; ;rtcc.h: 67: unsigned char b13:1;
[; ;rtcc.h: 68: unsigned char b14:1;
[; ;rtcc.h: 69: unsigned char b15:1;
[; ;rtcc.h: 70: } bits;
[; ;rtcc.h: 71: } WORD_VAL, WORD_BITS;
[; ;rtcc.h: 75: typedef enum
[; ;rtcc.h: 76: {
[; ;rtcc.h: 77: RTCCFG_MASK_RTCEN = 0x80,
[; ;rtcc.h: 78: RTCCFG_MASK_FRZ = 0x40,
[; ;rtcc.h: 79: RTCCFG_MASK_RTCWREN = 0x20,
[; ;rtcc.h: 80: RTCCFG_MASK_RTCSYNC = 0x10,
[; ;rtcc.h: 81: RTCCFG_MASK_HALFSEC = 0x08,
[; ;rtcc.h: 82: RTCCFG_MASK_RTCOE = 0x04,
[; ;rtcc.h: 83: RTCCFG_MASK_RTCPTR = 0x03
[; ;rtcc.h: 84: }RTCCFG_MASK;
[; ;rtcc.h: 89: typedef enum
[; ;rtcc.h: 90: {
[; ;rtcc.h: 91: ALRMCFG_MASK_ALRMEN = 0x80,
[; ;rtcc.h: 92: ALRMCFG_MASK_CHIME = 0x40,
[; ;rtcc.h: 93: ALRMCFG_MASK_AMASK = 0x3c,
[; ;rtcc.h: 94: ALRMCFG_MASK_ALRMPTR = 0x03
[; ;rtcc.h: 95: }ALRMCFG_MASK;
[; ;rtcc.h: 100: typedef enum
[; ;rtcc.h: 101: {
[; ;rtcc.h: 102: RTCCPTR_MASK_SECMIN = 0x00,
[; ;rtcc.h: 103: RTCCPTR_MASK_HRSWEEK = 0x01,
[; ;rtcc.h: 104: RTCCPTR_MASK_DAYMON = 0x02,
[; ;rtcc.h: 105: RTCCPTR_MASK_YEAR = 0x03
[; ;rtcc.h: 106: }RTCCPTR_MASK;
[; ;rtcc.h: 110: typedef union
[; ;rtcc.h: 111: {
[; ;rtcc.h: 112: struct
[; ;rtcc.h: 113: {
[; ;rtcc.h: 114: unsigned char rsvd;
[; ;rtcc.h: 115: unsigned char sec;
[; ;rtcc.h: 116: unsigned char min;
[; ;rtcc.h: 117: unsigned char hour;
[; ;rtcc.h: 118: }f;
[; ;rtcc.h: 119: unsigned char b[4];
[; ;rtcc.h: 120: unsigned int w[2];
[; ;rtcc.h: 121: unsigned long l;
[; ;rtcc.h: 122: }rtccTime;
[; ;rtcc.h: 125: typedef union
[; ;rtcc.h: 126: {
[; ;rtcc.h: 127: struct
[; ;rtcc.h: 128: {
[; ;rtcc.h: 129: unsigned char wday;
[; ;rtcc.h: 130: unsigned char mday;
[; ;rtcc.h: 131: unsigned char mon;
[; ;rtcc.h: 132: unsigned char year;
[; ;rtcc.h: 133: }f;
[; ;rtcc.h: 134: unsigned char b[4];
[; ;rtcc.h: 135: unsigned int w[2];
[; ;rtcc.h: 136: unsigned long l;
[; ;rtcc.h: 137: }rtccDate;
[; ;rtcc.h: 141: typedef union
[; ;rtcc.h: 142: {
[; ;rtcc.h: 143: struct
[; ;rtcc.h: 144: {
[; ;rtcc.h: 145: unsigned char year;
[; ;rtcc.h: 146: unsigned char rsvd;
[; ;rtcc.h: 147: unsigned char mday;
[; ;rtcc.h: 148: unsigned char mon;
[; ;rtcc.h: 149: unsigned char hour;
[; ;rtcc.h: 150: unsigned char wday;
[; ;rtcc.h: 151: unsigned char sec;
[; ;rtcc.h: 152: unsigned char min;
[; ;rtcc.h: 153: }f;
[; ;rtcc.h: 154: unsigned char b[8];
[; ;rtcc.h: 155: unsigned int w[4];
[; ;rtcc.h: 156: unsigned long l[2];
[; ;rtcc.h: 157: }rtccTimeDate;
[; ;rtcc.h: 162: typedef enum
[; ;rtcc.h: 163: {
[; ;rtcc.h: 164: RTCC_RPT_HALF_SEC,
[; ;rtcc.h: 165: RTCC_RPT_SEC,
[; ;rtcc.h: 166: RTCC_RPT_TEN_SEC,
[; ;rtcc.h: 167: RTCC_RPT_MIN,
[; ;rtcc.h: 168: RTCC_RPT_TEN_MIN,
[; ;rtcc.h: 169: RTCC_RPT_HOUR,
[; ;rtcc.h: 170: RTCC_RPT_DAY,
[; ;rtcc.h: 171: RTCC_RPT_WEEK,
[; ;rtcc.h: 172: RTCC_RPT_MON,
[; ;rtcc.h: 173: RTCC_RPT_YEAR
[; ;rtcc.h: 174: }rtccRepeat;
[; ;rtcc.h: 646: extern void RtccInitClock(void) ;
[; ;rtcc.h: 648: extern void RtccReadAlrmDate(rtccDate* pDt) ;
[; ;rtcc.h: 650: extern void RtccReadAlrmTime(rtccTime* pTm);
[; ;rtcc.h: 652: extern void RtccReadAlrmTimeDate(rtccTimeDate* pTD) ;
[; ;rtcc.h: 654: extern void RtccReadDate(rtccDate* pDt) ;
[; ;rtcc.h: 656: extern void RtccReadTime(rtccTime* pTm) ;
[; ;rtcc.h: 658: extern void RtccReadTimeDate(rtccTimeDate* pTD) ;
[; ;rtcc.h: 660: extern void RtccSetAlarmRpt(rtccRepeat rpt, BOOL dsblAlrm) ;
[; ;rtcc.h: 662: extern void RtccSetAlarmRptCount(unsigned char rptCnt, BOOL dsblAlrm) ;
[; ;rtcc.h: 664: extern void RtccSetCalibration(int drift) ;
[; ;rtcc.h: 666: extern void RtccSetChimeEnable(BOOL enable, BOOL dsblAlrm) ;
[; ;rtcc.h: 668: extern BOOL RtccWriteAlrmDate(const rtccDate* pDt) ;
[; ;rtcc.h: 670: extern BOOL RtccWriteAlrmTime(const rtccTime* pTm) ;
[; ;rtcc.h: 672: extern BOOL RtccWriteAlrmTimeDate(const rtccTimeDate* pTD) ;
[; ;rtcc.h: 674: extern BOOL RtccWriteDate(const rtccDate* pDt , BOOL di);
[; ;rtcc.h: 676: extern BOOL RtccWriteTime(const rtccTime* pTm , BOOL di) ;
[; ;rtcc.h: 678: extern BOOL RtccWriteTimeDate(const rtccTimeDate* pTD , BOOL di) ;
[; ;rtcc.h: 680: extern void RtccWrOn(void);
[; ;rtcc.h: 687: void Open_RTCC(void);
[; ;rtcc.h: 688: void Close_RTCC(void);
[; ;rtcc.h: 689: unsigned char update_RTCC(void);
[; ;sw_i2c.h: 97: void SWStopI2C ( void );
[; ;sw_i2c.h: 98: void SWStartI2C ( void );
[; ;sw_i2c.h: 99: void SWRestartI2C ( void );
[; ;sw_i2c.h: 100: void SWStopI2C ( void );
[; ;sw_i2c.h: 102: signed char SWAckI2C( void );
[; ;sw_i2c.h: 103: signed char Clock_test( void );
[; ;sw_i2c.h: 104: signed int SWReadI2C( void );
[; ;sw_i2c.h: 105: signed char SWWriteI2C( unsigned char data_out );
[; ;sw_i2c.h: 106: signed char SWGetsI2C( unsigned char *rdptr, unsigned char length );
[; ;sw_i2c.h: 107: signed char SWPutsI2C( unsigned char *wrptr );
[; ;sw_spi.h: 84: void OpenSWSPI(void);
[; ;sw_spi.h: 87: char WriteSWSPI( char output);
[; ;sw_spi.h: 90: void SetCSSWSPI(void);
[; ;sw_spi.h: 93: void ClearCSSWSPI(void);
[; ;sw_uart.h: 47: void OpenUART(void);
[; ;sw_uart.h: 49: unsigned char ReadUART(void);
[; ;sw_uart.h: 51: void WriteUART( unsigned char);
[; ;sw_uart.h: 53: void getsUART( char *, unsigned char);
[; ;sw_uart.h: 55: void putsUART( char *);
[; ;sw_uart.h: 79: extern void DelayRXBitUART (void);
[; ;sw_uart.h: 80: extern void DelayRXHalfBitUART(void);
[; ;sw_uart.h: 81: extern void DelayTXBitUART (void);
[; ;timers.h: 36: union Timers
[; ;timers.h: 37: {
[; ;timers.h: 38: unsigned int lt;
[; ;timers.h: 39: char bt[2];
[; ;timers.h: 40: };
[; ;timers.h: 118: void OpenTimer0 ( unsigned char config);
[; ;timers.h: 119: void CloseTimer0 (void);
[; ;timers.h: 120: unsigned int ReadTimer0 (void);
[; ;timers.h: 121: void WriteTimer0 ( unsigned int timer0);
[; ;timers.h: 185: void OpenTimer1 ( unsigned char config, unsigned char config1);
[; ;timers.h: 186: void CloseTimer1 (void);
[; ;timers.h: 187: unsigned int ReadTimer1 (void);
[; ;timers.h: 188: void WriteTimer1 ( unsigned int timer1);
[; ;timers.h: 325: void OpenTimer2 ( unsigned char config);
[; ;timers.h: 326: void CloseTimer2 (void);
[; ;timers.h: 452: void OpenTimer3 ( unsigned char config, unsigned char config1);
[; ;timers.h: 453: void CloseTimer3 (void);
[; ;timers.h: 454: unsigned int ReadTimer3 (void);
[; ;timers.h: 455: void WriteTimer3 ( unsigned int timer3);
[; ;timers.h: 541: void OpenTimer4 ( unsigned char config);
[; ;timers.h: 542: void CloseTimer4 (void);
[; ;timers.h: 657: void OpenTimer5 ( unsigned char config, unsigned char config1);
[; ;timers.h: 658: void CloseTimer5 (void);
[; ;timers.h: 659: unsigned int ReadTimer5 (void);
[; ;timers.h: 660: void WriteTimer5 ( unsigned int Timer5);
[; ;timers.h: 746: void OpenTimer6 ( unsigned char config);
[; ;timers.h: 747: void CloseTimer6 (void);
[; ;timers.h: 892: void OpenTimer8 ( unsigned char config);
[; ;timers.h: 893: void CloseTimer8 (void);
[; ;usart.h: 200: union USART1
[; ;usart.h: 201: {
[; ;usart.h: 202: unsigned char val;
[; ;usart.h: 203: struct
[; ;usart.h: 204: {
[; ;usart.h: 205: unsigned RX_NINE:1;
[; ;usart.h: 206: unsigned TX_NINE:1;
[; ;usart.h: 207: unsigned FRAME_ERROR:1;
[; ;usart.h: 208: unsigned OVERRUN_ERROR:1;
[; ;usart.h: 209: unsigned fill:4;
[; ;usart.h: 210: };
[; ;usart.h: 211: };
[; ;usart.h: 212: extern union USART1 USART1_Status;
[; ;usart.h: 214: void Open1USART ( unsigned char config, unsigned int spbrg);
[; ;usart.h: 244: char Read1USART (void);
[; ;usart.h: 245: void Write1USART ( char data);
[; ;usart.h: 246: void gets1USART ( char *buffer, unsigned char len);
[; ;usart.h: 247: void puts1USART ( char *data);
[; ;usart.h: 248: void putrs1USART ( const char *data);
[; ;usart.h: 305: union USART2
[; ;usart.h: 306: {
[; ;usart.h: 307: unsigned char val;
[; ;usart.h: 308: struct
[; ;usart.h: 309: {
[; ;usart.h: 310: unsigned RX_NINE:1;
[; ;usart.h: 311: unsigned TX_NINE:1;
[; ;usart.h: 312: unsigned FRAME_ERROR:1;
[; ;usart.h: 313: unsigned OVERRUN_ERROR:1;
[; ;usart.h: 314: unsigned fill:4;
[; ;usart.h: 315: };
[; ;usart.h: 316: };
[; ;usart.h: 317: extern union USART2 USART2_Status;
[; ;usart.h: 318: void Open2USART ( unsigned char config, unsigned int spbrg);
[; ;usart.h: 333: char Read2USART (void);
[; ;usart.h: 334: void Write2USART ( char data);
[; ;usart.h: 335: void gets2USART ( char *buffer, unsigned char len);
[; ;usart.h: 336: void puts2USART ( char *data);
[; ;usart.h: 337: void putrs2USART ( const char *data);
[; ;usart.h: 660: void baud1USART ( unsigned char baudconfig);
[; ;usart.h: 665: void baud2USART ( unsigned char baudconfig);
[; ;xlcd.h: 87: void OpenXLCD( unsigned char);
[; ;xlcd.h: 92: void SetCGRamAddr( unsigned char);
[; ;xlcd.h: 97: void SetDDRamAddr( unsigned char);
[; ;xlcd.h: 102: unsigned char BusyXLCD(void);
[; ;xlcd.h: 107: unsigned char ReadAddrXLCD(void);
[; ;xlcd.h: 112: char ReadDataXLCD(void);
[; ;xlcd.h: 117: void WriteCmdXLCD( unsigned char);
[; ;xlcd.h: 122: void WriteDataXLCD( char);
[; ;xlcd.h: 132: void putsXLCD( char *);
[; ;xlcd.h: 137: void putrsXLCD(const char *);
[; ;xlcd.h: 140: extern void DelayFor18TCY(void);
[; ;xlcd.h: 141: extern void DelayPORXLCD(void);
[; ;xlcd.h: 142: extern void DelayXLCD(void);
[; ;pic18.h: 18: __attribute__((__unsupported__("The flash_write routine is no longer supported. Please use the peripheral library functions: WriteBytesFlash, WriteBlockFlash or WriteWordFlash"))) void flash_write(const unsigned char *, unsigned int, __far unsigned c
[; ;pic18.h: 144: extern void _delay(unsigned long);
[; ;pic18.h: 146: extern void _delaywdt(unsigned long);
[; ;pic18.h: 148: extern void _delay3(unsigned char);
[; ;delays.h: 18: void Delay10TCYx(unsigned char);
[; ;delays.h: 24: void Delay100TCYx(unsigned char);
[; ;delays.h: 30: void Delay1KTCYx(unsigned char);
[; ;delays.h: 36: void Delay10KTCYx(unsigned char);
[; ;stdarg.h: 7: typedef void * va_list[1];
[; ;stdarg.h: 10: extern void * __va_start(void);
[; ;stdarg.h: 13: extern void * __va_arg(void *, ...);
[; ;stdio.h: 23: extern int errno;
[; ;stdio.h: 54: struct __prbuf
[; ;stdio.h: 55: {
[; ;stdio.h: 56: char * ptr;
[; ;stdio.h: 57: void (* func)(char);
[; ;stdio.h: 58: };
[; ;conio.h: 17: extern int errno;
[; ;conio.h: 20: extern void init_uart(void);
[; ;conio.h: 22: extern char getch(void);
[; ;conio.h: 23: extern char getche(void);
[; ;conio.h: 24: extern void putch(char);
[; ;conio.h: 25: extern void ungetch(char);
[; ;conio.h: 27: extern __bit kbhit(void);
[; ;conio.h: 31: extern char * cgets(char *);
[; ;conio.h: 32: extern void cputs(const char *);
[; ;stdio.h: 99: extern int cprintf(char *, ...);
[; ;stdio.h: 104: extern int _doprnt(struct __prbuf *, const register char *, register va_list);
[; ;stdio.h: 194: extern char * gets(char *);
[; ;stdio.h: 195: extern int puts(const char *);
[; ;stdio.h: 196: extern int scanf(const char *, ...);
[; ;stdio.h: 197: extern int sscanf(const char *, const char *, ...);
[; ;stdio.h: 198: extern int vprintf(const char *, va_list);
[; ;stdio.h: 199: extern int vsprintf(char *, const char *, va_list) __attribute__((unsupported("vsprintf() is not supported by this compiler")));
[; ;stdio.h: 200: extern int vscanf(const char *, va_list ap);
[; ;stdio.h: 201: extern int vsscanf(const char *, const char *, va_list);
[; ;stdio.h: 205: extern int sprintf(char *, const char *, ...);
[; ;stdio.h: 206: extern int printf(const char *, ...);
[; ;uart.h: 11: typedef struct __UART_DATA {
[; ;uart.h: 12: unsigned char buffer_in[125];
[; ;uart.h: 13: unsigned char buffer_in_read_ind;
[; ;uart.h: 14: unsigned char buffer_in_write_ind;
[; ;uart.h: 15: unsigned char buffer_in_len;
[; ;uart.h: 16: unsigned char buffer_in_len_tmp;
[; ;uart.h: 18: unsigned char buffer_out[125];
[; ;uart.h: 19: unsigned char buffer_out_ind;
[; ;uart.h: 20: unsigned char buffer_out_len;
[; ;uart.h: 21: } UART_DATA;
[; ;uart.h: 23: void UART1_Init(void);
[; ;uart.h: 24: void UART1_Recv_Interrupt_Handler(void);
[; ;uart.h: 25: void UART1_Send_Interrupt_Handler(void);
[; ;uart.h: 26: void UART1_WriteS(const char *fmt, ...);
[; ;uart.h: 27: void UART1_WriteB(const char *msg, unsigned char length);
[; ;uart.h: 28: void UART1_WriteC(const unsigned char c);
[; ;uart.h: 29: unsigned char UART1_Buffer_Len(void);
[; ;uart.h: 30: unsigned char UART1_Read_Buffer(unsigned char *buffer);
"10 main.c
[p x CFGPLLEN=ON ]
"11
[p x PLLDIV=3 ]
"12
[p x WDTEN=OFF ]
"13
[p x STVREN=OFF ]
"14
[p x XINST=OFF ]
"17
[p x CP0=OFF ]
"20
[p x CLKOEC=OFF ]
"21
[p x SOSCSEL=LOW ]
"22
[p x IESO=ON ]
"23
[p x OSC=HSPLL ]
"24
[p x FCMEN=OFF ]
"27
[p x WDTPS=1 ]
"30
[p x RTCOSC=T1OSCREF ]
"31
[p x DSBOREN=ON ]
"32
[p x DSWDTPS=M2 ]
"33
[p x DSWDTEN=OFF ]
"34
[p x DSWDTOSC=INTOSCREF ]
"37
[p x PLLSEL=PLL96 ]
"38
[p x ADCSEL=BIT12 ]
"39
[p x MSSP7B_EN=MSK7 ]
"40
[p x IOL1WAY=OFF ]
"43
[p x WPCFG=ON ]
"46
[p x WPEND=PAGE_WPFP ]
"47
[p x WPDIS=OFF ]
"95
[v _main `(i ~T0 @X0 1 ef ]
{
[; ;main.c: 95: int main() {
[e :U _main ]
[f ]
"96
[v _buffer `uc ~T0 @X0 -> 255 `i a ]
"97
[v _buffer1 `uc ~T0 @X0 -> 255 `i a ]
"98
[v _buffer2 `uc ~T0 @X0 -> 255 `i a ]
"99
[v _buffer3 `uc ~T0 @X0 -> 255 `i a ]
"100
[v _buffer4 `uc ~T0 @X0 -> 255 `i a ]
"101
[v _buffer5 `uc ~T0 @X0 -> 255 `i a ]
"102
[v _buffer6 `uc ~T0 @X0 -> 255 `i a ]
"103
[v _buffer7 `uc ~T0 @X0 -> 255 `i a ]
"104
[v _buffer8 `uc ~T0 @X0 -> 255 `i a ]
"105
[v _buffer9 `uc ~T0 @X0 -> 255 `i a ]
"106
[v _buffer10 `uc ~T0 @X0 -> 255 `i a ]
"107
[v _buffer11 `uc ~T0 @X0 -> 255 `i a ]
"108
[v _buffer12 `uc ~T0 @X0 -> 100 `i a ]
"109
[v _buffer13 `uc ~T0 @X0 -> 100 `i a ]
"110
[v _buffer14 `uc ~T0 @X0 -> 50 `i a ]
"111
[v _buffer15 `uc ~T0 @X0 -> 50 `i a ]
"112
[v _buffer16 `uc ~T0 @X0 -> 50 `i a ]
"113
[v _buffer17 `uc ~T0 @X0 -> 40 `i a ]
"114
[v _buffer18 `uc ~T0 @X0 -> 20 `i a ]
[; ;main.c: 96: char buffer[255];
[; ;main.c: 97: char buffer1[255];
[; ;main.c: 98: char buffer2[255];
[; ;main.c: 99: char buffer3[255];
[; ;main.c: 100: char buffer4[255];
[; ;main.c: 101: char buffer5[255];
[; ;main.c: 102: char buffer6[255];
[; ;main.c: 103: char buffer7[255];
[; ;main.c: 104: char buffer8[255];
[; ;main.c: 105: char buffer9[255];
[; ;main.c: 106: char buffer10[255];
[; ;main.c: 107: char buffer11[255];
[; ;main.c: 108: char buffer12[100];
[; ;main.c: 109: char buffer13[100];
[; ;main.c: 110: char buffer14[50];
[; ;main.c: 111: char buffer15[50];
[; ;main.c: 112: char buffer16[50];
[; ;main.c: 113: char buffer17[40];
[; ;main.c: 114: char buffer18[20];
[; ;main.c: 115: buffer[0] = 1;
"115
[e = *U + &U _buffer * -> -> -> 0 `i `ui `ux -> -> # *U &U _buffer `ui `ux -> -> 1 `i `uc ]
[; ;main.c: 116: buffer1[0] = 1;
"116
[e = *U + &U _buffer1 * -> -> -> 0 `i `ui `ux -> -> # *U &U _buffer1 `ui `ux -> -> 1 `i `uc ]
[; ;main.c: 117: buffer2[0] = 1;
"117
[e = *U + &U _buffer2 * -> -> -> 0 `i `ui `ux -> -> # *U &U _buffer2 `ui `ux -> -> 1 `i `uc ]
[; ;main.c: 118: buffer3[0] = 1;
"118
[e = *U + &U _buffer3 * -> -> -> 0 `i `ui `ux -> -> # *U &U _buffer3 `ui `ux -> -> 1 `i `uc ]
[; ;main.c: 119: buffer4[0] = 1;
"119
[e = *U + &U _buffer4 * -> -> -> 0 `i `ui `ux -> -> # *U &U _buffer4 `ui `ux -> -> 1 `i `uc ]
[; ;main.c: 120: buffer5[0] = 1;
"120
[e = *U + &U _buffer5 * -> -> -> 0 `i `ui `ux -> -> # *U &U _buffer5 `ui `ux -> -> 1 `i `uc ]
[; ;main.c: 121: buffer6[0] = 1;
"121
[e = *U + &U _buffer6 * -> -> -> 0 `i `ui `ux -> -> # *U &U _buffer6 `ui `ux -> -> 1 `i `uc ]
[; ;main.c: 122: buffer7[0] = 1;
"122
[e = *U + &U _buffer7 * -> -> -> 0 `i `ui `ux -> -> # *U &U _buffer7 `ui `ux -> -> 1 `i `uc ]
[; ;main.c: 123: buffer8[0] = 1;
"123
[e = *U + &U _buffer8 * -> -> -> 0 `i `ui `ux -> -> # *U &U _buffer8 `ui `ux -> -> 1 `i `uc ]
[; ;main.c: 124: buffer9[0] = 1;
"124
[e = *U + &U _buffer9 * -> -> -> 0 `i `ui `ux -> -> # *U &U _buffer9 `ui `ux -> -> 1 `i `uc ]
[; ;main.c: 125: buffer10[0] = 1;
"125
[e = *U + &U _buffer10 * -> -> -> 0 `i `ui `ux -> -> # *U &U _buffer10 `ui `ux -> -> 1 `i `uc ]
[; ;main.c: 126: buffer11[0] = 1;
"126
[e = *U + &U _buffer11 * -> -> -> 0 `i `ui `ux -> -> # *U &U _buffer11 `ui `ux -> -> 1 `i `uc ]
[; ;main.c: 127: buffer12[0] = 1;
"127
[e = *U + &U _buffer12 * -> -> -> 0 `i `ui `ux -> -> # *U &U _buffer12 `ui `ux -> -> 1 `i `uc ]
[; ;main.c: 128: buffer13[0] = 1;
"128
[e = *U + &U _buffer13 * -> -> -> 0 `i `ui `ux -> -> # *U &U _buffer13 `ui `ux -> -> 1 `i `uc ]
[; ;main.c: 129: buffer14[0] = 1;
"129
[e = *U + &U _buffer14 * -> -> -> 0 `i `ui `ux -> -> # *U &U _buffer14 `ui `ux -> -> 1 `i `uc ]
[; ;main.c: 130: buffer15[0] = 1;
"130
[e = *U + &U _buffer15 * -> -> -> 0 `i `ui `ux -> -> # *U &U _buffer15 `ui `ux -> -> 1 `i `uc ]
[; ;main.c: 131: buffer16[0] = 1;
"131
[e = *U + &U _buffer16 * -> -> -> 0 `i `ui `ux -> -> # *U &U _buffer16 `ui `ux -> -> 1 `i `uc ]
[; ;main.c: 132: buffer17[0] = 1;
"132
[e = *U + &U _buffer17 * -> -> -> 0 `i `ui `ux -> -> # *U &U _buffer17 `ui `ux -> -> 1 `i `uc ]
[; ;main.c: 133: buffer18[0] = 1;
"133
[e = *U + &U _buffer18 * -> -> -> 0 `i `ui `ux -> -> # *U &U _buffer18 `ui `ux -> -> 1 `i `uc ]
[; ;main.c: 134: }
"134
[e :UE 1075 ]
}
"137
[v _putch `(v ~T0 @X0 1 ef1`uc ]
{
[; ;main.c: 137: void putch(char data) {
[e :U _putch ]
[v _data `uc ~T0 @X0 1 r1 ]
[f ]
[; ;main.c: 138: while (!TXIF)
"138
[e $U 1077 ]
[e :U 1078 ]
[; ;main.c: 139: continue;
"139
[e $U 1077 ]
[e :U 1077 ]
"138
[e $ ! _TXIF 1078 ]
[e :U 1079 ]
[; ;main.c: 140: TXREG = data;
"140
[e = _TXREG _data ]
[; ;main.c: 141: }
"141
[e :UE 1076 ]
}

/PIC Stuff/PICX_27J13/build/default/production/main.p1.d
0,0 → 1,5
build/default/production/main.d \
build/default/production/main.p1: \
main.c \
uart.h \
defines.h

/PIC Stuff/PICX_27J13/build/default/production/main.pre
0,0 → 1,10405
# 1 "main.c"
# 44 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
extern volatile unsigned char ADCTRIG @ 0xEB8;
asm("ADCTRIG equ 0EB8h");
typedef union {
struct {
unsigned TRIGSEL :2;
};
struct {
unsigned SRC0 :1;
unsigned SRC1 :1;
};
struct {
unsigned TRIGSEL0 :1;
unsigned TRIGSEL1 :1;
};
struct {
unsigned SRC :2;
};
} ADCTRIGbits_t;
extern volatile ADCTRIGbits_t ADCTRIGbits @ 0xEB8;
# 99
extern volatile unsigned char PMDIS0 @ 0xEB9;
asm("PMDIS0 equ 0EB9h");
extern volatile unsigned char PD0 @ 0xEB9;
asm("PD0 equ 0EB9h");
typedef union {
struct {
unsigned ADCMD :1;
unsigned SPI1MD :1;
unsigned SPI2MD :1;
unsigned UART1MD :1;
unsigned UART2MD :1;
unsigned ECCP1MD :1;
unsigned ECCP2MD :1;
unsigned ECCP3MD :1;
};
struct {
unsigned :1;
unsigned PMDMSSP1 :1;
unsigned PMDMSSP2 :1;
unsigned PMDUART1 :1;
unsigned PMDUART2 :1;
unsigned PMDECCP1 :1;
unsigned PMDECCP2 :1;
unsigned PMDECCP3 :1;
};
struct {
unsigned PMDADC :1;
unsigned PMDMSSP :2;
unsigned PMDUART :2;
unsigned PMDECCP :3;
};
struct {
unsigned :1;
unsigned SPIMD :2;
unsigned UARTMD :2;
unsigned ECCPMD :3;
};
} PMDIS0bits_t;
extern volatile PMDIS0bits_t PMDIS0bits @ 0xEB9;
# 256
typedef union {
struct {
unsigned ADCMD :1;
unsigned SPI1MD :1;
unsigned SPI2MD :1;
unsigned UART1MD :1;
unsigned UART2MD :1;
unsigned ECCP1MD :1;
unsigned ECCP2MD :1;
unsigned ECCP3MD :1;
};
struct {
unsigned :1;
unsigned PMDMSSP1 :1;
unsigned PMDMSSP2 :1;
unsigned PMDUART1 :1;
unsigned PMDUART2 :1;
unsigned PMDECCP1 :1;
unsigned PMDECCP2 :1;
unsigned PMDECCP3 :1;
};
struct {
unsigned PMDADC :1;
unsigned PMDMSSP :2;
unsigned PMDUART :2;
unsigned PMDECCP :3;
};
struct {
unsigned :1;
unsigned SPIMD :2;
unsigned UARTMD :2;
unsigned ECCPMD :3;
};
} PD0bits_t;
extern volatile PD0bits_t PD0bits @ 0xEB9;
# 404
extern volatile unsigned char PMDIS1 @ 0xEBA;
asm("PMDIS1 equ 0EBAh");
extern volatile unsigned char PD1 @ 0xEBA;
asm("PD1 equ 0EBAh");
typedef union {
struct {
unsigned :1;
unsigned TMR1MD :1;
unsigned TMR2MD :1;
unsigned TMR3MD :1;
unsigned TMR4MD :1;
unsigned RTCCMD :1;
unsigned CTMUMD :1;
};
struct {
unsigned :1;
unsigned PMDTMR1 :1;
unsigned PMDTMR2 :1;
unsigned PMDTMR3 :1;
unsigned PMDTMR4 :1;
};
struct {
unsigned :1;
unsigned PMDTMR :4;
unsigned PMDRTCC :1;
unsigned PMDCTMU :1;
};
struct {
unsigned :1;
unsigned TMRMD :4;
};
} PMDIS1bits_t;
extern volatile PMDIS1bits_t PMDIS1bits @ 0xEBA;
# 515
typedef union {
struct {
unsigned :1;
unsigned TMR1MD :1;
unsigned TMR2MD :1;
unsigned TMR3MD :1;
unsigned TMR4MD :1;
unsigned RTCCMD :1;
unsigned CTMUMD :1;
};
struct {
unsigned :1;
unsigned PMDTMR1 :1;
unsigned PMDTMR2 :1;
unsigned PMDTMR3 :1;
unsigned PMDTMR4 :1;
};
struct {
unsigned :1;
unsigned PMDTMR :4;
unsigned PMDRTCC :1;
unsigned PMDCTMU :1;
};
struct {
unsigned :1;
unsigned TMRMD :4;
};
} PD1bits_t;
extern volatile PD1bits_t PD1bits @ 0xEBA;
# 617
extern volatile unsigned char PMDIS2 @ 0xEBB;
asm("PMDIS2 equ 0EBBh");
extern volatile unsigned char PD2 @ 0xEBB;
asm("PD2 equ 0EBBh");
typedef union {
struct {
unsigned CMP1MD :1;
unsigned CMP2MD :1;
unsigned CMP3MD :1;
unsigned TMR5MD :1;
unsigned TMR6MD :1;
unsigned :1;
unsigned TMR8MD :1;
};
struct {
unsigned PMDCMP1 :1;
unsigned PMDCMP2 :1;
unsigned PMDCMP3 :1;
};
struct {
unsigned PMDCMP :3;
unsigned PMDTMR5 :1;
unsigned PMDTMR6 :1;
unsigned :1;
unsigned PMDTMR8 :1;
};
struct {
unsigned CMPMD :3;
};
} PMDIS2bits_t;
extern volatile PMDIS2bits_t PMDIS2bits @ 0xEBB;
# 726
typedef union {
struct {
unsigned CMP1MD :1;
unsigned CMP2MD :1;
unsigned CMP3MD :1;
unsigned TMR5MD :1;
unsigned TMR6MD :1;
unsigned :1;
unsigned TMR8MD :1;
};
struct {
unsigned PMDCMP1 :1;
unsigned PMDCMP2 :1;
unsigned PMDCMP3 :1;
};
struct {
unsigned PMDCMP :3;
unsigned PMDTMR5 :1;
unsigned PMDTMR6 :1;
unsigned :1;
unsigned PMDTMR8 :1;
};
struct {
unsigned CMPMD :3;
};
} PD2bits_t;
extern volatile PD2bits_t PD2bits @ 0xEBB;
# 826
extern volatile unsigned char PMDIS3 @ 0xEBC;
asm("PMDIS3 equ 0EBCh");
extern volatile unsigned char PD3 @ 0xEBC;
asm("PD3 equ 0EBCh");
typedef union {
struct {
unsigned :1;
unsigned CCP4MD :1;
unsigned CCP5MD :1;
unsigned CCP6MD :1;
unsigned CCP7MD :1;
unsigned CCP8MD :1;
unsigned CCP9MD :1;
unsigned CCP10MD :1;
};
struct {
unsigned :1;
unsigned PMDCCP4 :1;
unsigned PMDCCP5 :1;
unsigned PMDCCP6 :1;
unsigned PMDCCP7 :1;
unsigned PMDCCP8 :1;
unsigned PMDCCP9 :1;
unsigned PMDCCP10 :1;
};
struct {
unsigned :1;
unsigned PMDCCP :7;
};
struct {
unsigned :1;
unsigned CCPMD :7;
};
} PMDIS3bits_t;
extern volatile PMDIS3bits_t PMDIS3bits @ 0xEBC;
# 949
typedef union {
struct {
unsigned :1;
unsigned CCP4MD :1;
unsigned CCP5MD :1;
unsigned CCP6MD :1;
unsigned CCP7MD :1;
unsigned CCP8MD :1;
unsigned CCP9MD :1;
unsigned CCP10MD :1;
};
struct {
unsigned :1;
unsigned PMDCCP4 :1;
unsigned PMDCCP5 :1;
unsigned PMDCCP6 :1;
unsigned PMDCCP7 :1;
unsigned PMDCCP8 :1;
unsigned PMDCCP9 :1;
unsigned PMDCCP10 :1;
};
struct {
unsigned :1;
unsigned PMDCCP :7;
};
struct {
unsigned :1;
unsigned CCPMD :7;
};
} PD3bits_t;
extern volatile PD3bits_t PD3bits @ 0xEBC;
# 1063
extern volatile unsigned char PPSCON @ 0xEBF;
asm("PPSCON equ 0EBFh");
typedef union {
struct {
unsigned IOLOCK :1;
};
} PPSCONbits_t;
extern volatile PPSCONbits_t PPSCONbits @ 0xEBF;
# 1082
extern volatile unsigned char RPOR0 @ 0xEC0;
asm("RPOR0 equ 0EC0h");
extern volatile unsigned char RPOR1 @ 0xEC1;
asm("RPOR1 equ 0EC1h");
extern volatile unsigned char RPOR2 @ 0xEC2;
asm("RPOR2 equ 0EC2h");
extern volatile unsigned char RPOR3 @ 0xEC3;
asm("RPOR3 equ 0EC3h");
extern volatile unsigned char RPOR4 @ 0xEC4;
asm("RPOR4 equ 0EC4h");
extern volatile unsigned char RPOR5 @ 0xEC5;
asm("RPOR5 equ 0EC5h");
extern volatile unsigned char RPOR6 @ 0xEC6;
asm("RPOR6 equ 0EC6h");
extern volatile unsigned char RPOR7 @ 0xEC7;
asm("RPOR7 equ 0EC7h");
extern volatile unsigned char RPOR8 @ 0xEC8;
asm("RPOR8 equ 0EC8h");
extern volatile unsigned char RPOR9 @ 0xEC9;
asm("RPOR9 equ 0EC9h");
extern volatile unsigned char RPOR10 @ 0xECA;
asm("RPOR10 equ 0ECAh");
extern volatile unsigned char RPOR11 @ 0xECB;
asm("RPOR11 equ 0ECBh");
extern volatile unsigned char RPOR12 @ 0xECC;
asm("RPOR12 equ 0ECCh");
extern volatile unsigned char RPOR13 @ 0xECD;
asm("RPOR13 equ 0ECDh");
extern volatile unsigned char RPOR14 @ 0xECE;
asm("RPOR14 equ 0ECEh");
extern volatile unsigned char RPOR15 @ 0xECF;
asm("RPOR15 equ 0ECFh");
extern volatile unsigned char RPOR16 @ 0xED0;
asm("RPOR16 equ 0ED0h");
extern volatile unsigned char RPOR17 @ 0xED1;
asm("RPOR17 equ 0ED1h");
extern volatile unsigned char RPOR18 @ 0xED2;
asm("RPOR18 equ 0ED2h");
extern volatile unsigned char RPINR1 @ 0xEE1;
asm("RPINR1 equ 0EE1h");
extern volatile unsigned char RPINR2 @ 0xEE2;
asm("RPINR2 equ 0EE2h");
extern volatile unsigned char RPINR3 @ 0xEE3;
asm("RPINR3 equ 0EE3h");
extern volatile unsigned char RPINR4 @ 0xEE4;
asm("RPINR4 equ 0EE4h");
extern volatile unsigned char RPINR6 @ 0xEE6;
asm("RPINR6 equ 0EE6h");
extern volatile unsigned char RPINR15 @ 0xEE7;
asm("RPINR15 equ 0EE7h");
extern volatile unsigned char RPINR7 @ 0xEE8;
asm("RPINR7 equ 0EE8h");
extern volatile unsigned char RPINR8 @ 0xEE9;
asm("RPINR8 equ 0EE9h");
extern volatile unsigned char RPINR9 @ 0xEEA;
asm("RPINR9 equ 0EEAh");
extern volatile unsigned char RPINR12 @ 0xEF2;
asm("RPINR12 equ 0EF2h");
extern volatile unsigned char RPINR13 @ 0xEF3;
asm("RPINR13 equ 0EF3h");
extern volatile unsigned char RPINR14 @ 0xEF4;
asm("RPINR14 equ 0EF4h");
extern volatile unsigned char RPINR16 @ 0xEF7;
asm("RPINR16 equ 0EF7h");
extern volatile unsigned char RPINR17 @ 0xEF8;
asm("RPINR17 equ 0EF8h");
extern volatile unsigned char RPINR21 @ 0xEFC;
asm("RPINR21 equ 0EFCh");
extern volatile unsigned char RPINR22 @ 0xEFD;
asm("RPINR22 equ 0EFDh");
extern volatile unsigned char RPINR23 @ 0xEFE;
asm("RPINR23 equ 0EFEh");
extern volatile unsigned char RPINR24 @ 0xEFF;
asm("RPINR24 equ 0EFFh");
extern volatile unsigned char CCP10CON @ 0xF00;
asm("CCP10CON equ 0F00h");
typedef union {
struct {
unsigned CCP10M :4;
unsigned DC10B :2;
};
struct {
unsigned CCP10M0 :1;
unsigned CCP10M1 :1;
unsigned CCP10M2 :1;
unsigned CCP10M3 :1;
unsigned DC10B0 :1;
unsigned DC10B1 :1;
};
} CCP10CONbits_t;
extern volatile CCP10CONbits_t CCP10CONbits @ 0xF00;
# 1367
extern volatile unsigned char CCPR10L @ 0xF01;
asm("CCPR10L equ 0F01h");
typedef union {
struct {
unsigned CCPR10L :8;
};
} CCPR10Lbits_t;
extern volatile CCPR10Lbits_t CCPR10Lbits @ 0xF01;
# 1386
extern volatile unsigned char CCPR10H @ 0xF02;
asm("CCPR10H equ 0F02h");
typedef union {
struct {
unsigned CCPR10H :8;
};
} CCPR10Hbits_t;
extern volatile CCPR10Hbits_t CCPR10Hbits @ 0xF02;
# 1405
extern volatile unsigned char CCP9CON @ 0xF03;
asm("CCP9CON equ 0F03h");
typedef union {
struct {
unsigned CCP9M :4;
unsigned DC9B :2;
};
struct {
unsigned CCP9M0 :1;
unsigned CCP9M1 :1;
unsigned CCP9M2 :1;
unsigned CCP9M3 :1;
unsigned DC9B0 :1;
unsigned DC9B1 :1;
};
} CCP9CONbits_t;
extern volatile CCP9CONbits_t CCP9CONbits @ 0xF03;
# 1468
extern volatile unsigned char CCPR9L @ 0xF04;
asm("CCPR9L equ 0F04h");
typedef union {
struct {
unsigned CCPR9L :8;
};
} CCPR9Lbits_t;
extern volatile CCPR9Lbits_t CCPR9Lbits @ 0xF04;
# 1487
extern volatile unsigned char CCPR9H @ 0xF05;
asm("CCPR9H equ 0F05h");
typedef union {
struct {
unsigned CCPR9H :8;
};
} CCPR9Hbits_t;
extern volatile CCPR9Hbits_t CCPR9Hbits @ 0xF05;
# 1506
extern volatile unsigned char CCP8CON @ 0xF06;
asm("CCP8CON equ 0F06h");
typedef union {
struct {
unsigned CCP8M :4;
unsigned DC8B :2;
};
struct {
unsigned CCP8M0 :1;
unsigned CCP8M1 :1;
unsigned CCP8M2 :1;
unsigned CCP8M3 :1;
unsigned DC8B0 :1;
unsigned DC8B1 :1;
};
} CCP8CONbits_t;
extern volatile CCP8CONbits_t CCP8CONbits @ 0xF06;
# 1569
extern volatile unsigned char CCPR8L @ 0xF07;
asm("CCPR8L equ 0F07h");
typedef union {
struct {
unsigned CCPR8L :8;
};
} CCPR8Lbits_t;
extern volatile CCPR8Lbits_t CCPR8Lbits @ 0xF07;
# 1588
extern volatile unsigned char CCPR8H @ 0xF08;
asm("CCPR8H equ 0F08h");
typedef union {
struct {
unsigned CCPR8H :8;
};
} CCPR8Hbits_t;
extern volatile CCPR8Hbits_t CCPR8Hbits @ 0xF08;
# 1607
extern volatile unsigned char CCP7CON @ 0xF09;
asm("CCP7CON equ 0F09h");
typedef union {
struct {
unsigned CCP7M :4;
unsigned DC7B :2;
};
struct {
unsigned CCP7M0 :1;
unsigned CCP7M1 :1;
unsigned CCP7M2 :1;
unsigned CCP7M3 :1;
unsigned DC7B0 :1;
unsigned DC7B1 :1;
};
} CCP7CONbits_t;
extern volatile CCP7CONbits_t CCP7CONbits @ 0xF09;
# 1670
extern volatile unsigned char CCPR7L @ 0xF0A;
asm("CCPR7L equ 0F0Ah");
typedef union {
struct {
unsigned CCPR7L :8;
};
} CCPR7Lbits_t;
extern volatile CCPR7Lbits_t CCPR7Lbits @ 0xF0A;
# 1689
extern volatile unsigned char CCPR7H @ 0xF0B;
asm("CCPR7H equ 0F0Bh");
typedef union {
struct {
unsigned CCPR7H :8;
};
} CCPR7Hbits_t;
extern volatile CCPR7Hbits_t CCPR7Hbits @ 0xF0B;
# 1708
extern volatile unsigned char CCP6CON @ 0xF0C;
asm("CCP6CON equ 0F0Ch");
typedef union {
struct {
unsigned CCP6M :4;
unsigned DC6B :2;
};
struct {
unsigned CCP6M0 :1;
unsigned CCP6M1 :1;
unsigned CCP6M2 :1;
unsigned CCP6M3 :1;
unsigned DC6B0 :1;
unsigned DC6B1 :1;
};
} CCP6CONbits_t;
extern volatile CCP6CONbits_t CCP6CONbits @ 0xF0C;
# 1771
extern volatile unsigned char CCPR6L @ 0xF0D;
asm("CCPR6L equ 0F0Dh");
typedef union {
struct {
unsigned CCPR6L :8;
};
} CCPR6Lbits_t;
extern volatile CCPR6Lbits_t CCPR6Lbits @ 0xF0D;
# 1790
extern volatile unsigned char CCPR6H @ 0xF0E;
asm("CCPR6H equ 0F0Eh");
typedef union {
struct {
unsigned CCPR6H :8;
};
} CCPR6Hbits_t;
extern volatile CCPR6Hbits_t CCPR6Hbits @ 0xF0E;
# 1809
extern volatile unsigned char CCP5CON @ 0xF0F;
asm("CCP5CON equ 0F0Fh");
typedef union {
struct {
unsigned CCP5M :4;
unsigned DC5B :2;
};
struct {
unsigned CCP5M0 :1;
unsigned CCP5M1 :1;
unsigned CCP5M2 :1;
unsigned CCP5M3 :1;
unsigned DC5B0 :1;
unsigned DC5B1 :1;
};
} CCP5CONbits_t;
extern volatile CCP5CONbits_t CCP5CONbits @ 0xF0F;
# 1872
extern volatile unsigned char CCPR5L @ 0xF10;
asm("CCPR5L equ 0F10h");
typedef union {
struct {
unsigned CCPR5L :8;
};
} CCPR5Lbits_t;
extern volatile CCPR5Lbits_t CCPR5Lbits @ 0xF10;
# 1891
extern volatile unsigned char CCPR5H @ 0xF11;
asm("CCPR5H equ 0F11h");
typedef union {
struct {
unsigned CCPR5H :8;
};
} CCPR5Hbits_t;
extern volatile CCPR5Hbits_t CCPR5Hbits @ 0xF11;
# 1910
extern volatile unsigned char CCP4CON @ 0xF12;
asm("CCP4CON equ 0F12h");
typedef union {
struct {
unsigned CCP4M :4;
unsigned DC4B :2;
};
struct {
unsigned CCP4M0 :1;
unsigned CCP4M1 :1;
unsigned CCP4M2 :1;
unsigned CCP4M3 :1;
unsigned DC4B0 :1;
unsigned DC4B1 :1;
};
} CCP4CONbits_t;
extern volatile CCP4CONbits_t CCP4CONbits @ 0xF12;
# 1973
extern volatile unsigned char CCPR4L @ 0xF13;
asm("CCPR4L equ 0F13h");
typedef union {
struct {
unsigned CCPR4L :8;
};
} CCPR4Lbits_t;
extern volatile CCPR4Lbits_t CCPR4Lbits @ 0xF13;
# 1992
extern volatile unsigned char CCPR4H @ 0xF14;
asm("CCPR4H equ 0F14h");
typedef union {
struct {
unsigned CCPR4H :8;
};
} CCPR4Hbits_t;
extern volatile CCPR4Hbits_t CCPR4Hbits @ 0xF14;
# 2011
extern volatile unsigned char CCP3CON @ 0xF15;
asm("CCP3CON equ 0F15h");
typedef union {
struct {
unsigned CCP3M :4;
unsigned DC3B :2;
unsigned P3M :2;
};
struct {
unsigned CCP3M0 :1;
unsigned CCP3M1 :1;
unsigned CCP3M2 :1;
unsigned CCP3M3 :1;
unsigned DC3B0 :1;
unsigned DC3B1 :1;
unsigned P3M0 :1;
unsigned P3M1 :1;
};
} CCP3CONbits_t;
extern volatile CCP3CONbits_t CCP3CONbits @ 0xF15;
# 2092
extern volatile unsigned char CCPR3L @ 0xF16;
asm("CCPR3L equ 0F16h");
typedef union {
struct {
unsigned CCPR3L :8;
};
} CCPR3Lbits_t;
extern volatile CCPR3Lbits_t CCPR3Lbits @ 0xF16;
# 2111
extern volatile unsigned char CCPR3H @ 0xF17;
asm("CCPR3H equ 0F17h");
typedef union {
struct {
unsigned CCPR3H :8;
};
} CCPR3Hbits_t;
extern volatile CCPR3Hbits_t CCPR3Hbits @ 0xF17;
# 2130
extern volatile unsigned char ECCP3DEL @ 0xF18;
asm("ECCP3DEL equ 0F18h");
typedef union {
struct {
unsigned P3DC :7;
unsigned P3RSEN :1;
};
struct {
unsigned P3DC0 :1;
unsigned P3DC1 :1;
unsigned P3DC2 :1;
unsigned P3DC3 :1;
unsigned P3DC4 :1;
unsigned P3DC5 :1;
unsigned P3DC6 :1;
};
} ECCP3DELbits_t;
extern volatile ECCP3DELbits_t ECCP3DELbits @ 0xF18;
# 2199
extern volatile unsigned char ECCP3AS @ 0xF19;
asm("ECCP3AS equ 0F19h");
typedef union {
struct {
unsigned PSS3BD :2;
unsigned PSS3AC :2;
unsigned ECCP3AS :3;
unsigned ECCP3ASE :1;
};
struct {
unsigned PSS3BD0 :1;
unsigned PSS3BD1 :1;
unsigned PSS3AC0 :1;
unsigned PSS3AC1 :1;
unsigned ECCP3AS0 :1;
unsigned ECCP3AS1 :1;
unsigned ECCP3AS2 :1;
};
} ECCP3ASbits_t;
extern volatile ECCP3ASbits_t ECCP3ASbits @ 0xF19;
# 2280
extern volatile unsigned char PSTR3CON @ 0xF1A;
asm("PSTR3CON equ 0F1Ah");
typedef union {
struct {
unsigned STRA :1;
unsigned STRB :1;
unsigned STRC :1;
unsigned STRD :1;
unsigned STRSYNC :1;
unsigned :1;
unsigned CMPL :2;
};
struct {
unsigned :6;
unsigned CMPL0 :1;
unsigned CMPL1 :1;
};
struct {
unsigned :6;
unsigned CMPL03 :1;
};
struct {
unsigned :7;
unsigned CMPL13 :1;
};
struct {
unsigned STRA3 :1;
};
struct {
unsigned :1;
unsigned STRB3 :1;
};
struct {
unsigned :2;
unsigned STRC3 :1;
};
struct {
unsigned :3;
unsigned STRD3 :1;
};
struct {
unsigned :4;
unsigned STRSYNC3 :1;
};
} PSTR3CONbits_t;
extern volatile PSTR3CONbits_t PSTR3CONbits @ 0xF1A;
# 2407
extern volatile unsigned char T8CON @ 0xF1B;
asm("T8CON equ 0F1Bh");
typedef union {
struct {
unsigned T8CKPS :2;
unsigned TMR8ON :1;
unsigned T8OUTPS :4;
};
struct {
unsigned T8CKPS0 :1;
unsigned T8CKPS1 :1;
unsigned :1;
unsigned T8OUTPS0 :1;
unsigned T8OUTPS1 :1;
unsigned T8OUTPS2 :1;
unsigned T8OUTPS3 :1;
};
} T8CONbits_t;
extern volatile T8CONbits_t T8CONbits @ 0xF1B;
# 2477
extern volatile unsigned char PR8 @ 0xF1C;
asm("PR8 equ 0F1Ch");
typedef union {
struct {
unsigned PR8 :8;
};
} PR8bits_t;
extern volatile PR8bits_t PR8bits @ 0xF1C;
# 2496
extern volatile unsigned char TMR8 @ 0xF1D;
asm("TMR8 equ 0F1Dh");
typedef union {
struct {
unsigned TMR8 :8;
};
} TMR8bits_t;
extern volatile TMR8bits_t TMR8bits @ 0xF1D;
# 2515
extern volatile unsigned char T6CON @ 0xF1E;
asm("T6CON equ 0F1Eh");
typedef union {
struct {
unsigned T6CKPS :2;
unsigned TMR6ON :1;
unsigned T6OUTPS :4;
};
struct {
unsigned T6CKPS0 :1;
unsigned T6CKPS1 :1;
unsigned :1;
unsigned T6OUTPS0 :1;
unsigned T6OUTPS1 :1;
unsigned T6OUTPS2 :1;
unsigned T6OUTPS3 :1;
};
} T6CONbits_t;
extern volatile T6CONbits_t T6CONbits @ 0xF1E;
# 2585
extern volatile unsigned char PR6 @ 0xF1F;
asm("PR6 equ 0F1Fh");
typedef union {
struct {
unsigned PR6 :8;
};
} PR6bits_t;
extern volatile PR6bits_t PR6bits @ 0xF1F;
# 2604
extern volatile unsigned char TMR6 @ 0xF20;
asm("TMR6 equ 0F20h");
typedef union {
struct {
unsigned TMR6 :8;
};
} TMR6bits_t;
extern volatile TMR6bits_t TMR6bits @ 0xF20;
# 2623
extern volatile unsigned char T5GCON @ 0xF21;
asm("T5GCON equ 0F21h");
typedef union {
struct {
unsigned :3;
unsigned T5GGO_NOT_T5DONE :1;
};
struct {
unsigned T5GSS :2;
unsigned T5GVAL :1;
unsigned T5GGO_nT5DONE :1;
unsigned T5GSPM :1;
unsigned T5GTM :1;
unsigned T5GPOL :1;
unsigned TMR5GE :1;
};
struct {
unsigned T5GSS0 :1;
unsigned T5GSS1 :1;
unsigned :1;
unsigned T5GGO :1;
};
struct {
unsigned :3;
unsigned NOT_T5DONE :1;
};
struct {
unsigned :3;
unsigned nT5DONE :1;
};
struct {
unsigned :3;
unsigned T5DONE :1;
};
} T5GCONbits_t;
extern volatile T5GCONbits_t T5GCONbits @ 0xF21;
# 2735
extern volatile unsigned char T5CON @ 0xF22;
asm("T5CON equ 0F22h");
typedef union {
struct {
unsigned :2;
unsigned NOT_T5SYNC :1;
};
struct {
unsigned TMR5ON :1;
unsigned RD16 :1;
unsigned nT5SYNC :1;
unsigned T5OSCEN :1;
unsigned T5CKPS :2;
unsigned TMR5CS :2;
};
struct {
unsigned :4;
unsigned T5CKPS0 :1;
unsigned T5CKPS1 :1;
unsigned TMR5CS0 :1;
unsigned TMR5CS1 :1;
};
struct {
unsigned :1;
unsigned RD165 :1;
};
struct {
unsigned :3;
unsigned SOSCEN5 :1;
};
} T5CONbits_t;
extern volatile T5CONbits_t T5CONbits @ 0xF22;
# 2838
extern volatile unsigned char TMR5L @ 0xF23;
asm("TMR5L equ 0F23h");
typedef union {
struct {
unsigned TMR5L :8;
};
} TMR5Lbits_t;
extern volatile TMR5Lbits_t TMR5Lbits @ 0xF23;
# 2857
extern volatile unsigned char TMR5H @ 0xF24;
asm("TMR5H equ 0F24h");
typedef union {
struct {
unsigned TMR5H :8;
};
} TMR5Hbits_t;
extern volatile TMR5Hbits_t TMR5Hbits @ 0xF24;
# 2876
extern volatile unsigned char CM3CON @ 0xF25;
asm("CM3CON equ 0F25h");
typedef union {
struct {
unsigned CCH :2;
unsigned CREF :1;
unsigned EVPOL :2;
unsigned CPOL :1;
unsigned COE :1;
unsigned CON :1;
};
struct {
unsigned CCH0 :1;
unsigned CCH1 :1;
unsigned :1;
unsigned EVPOL0 :1;
unsigned EVPOL1 :1;
};
struct {
unsigned CCH03 :1;
};
struct {
unsigned :1;
unsigned CCH13 :1;
};
struct {
unsigned :6;
unsigned COE3 :1;
};
struct {
unsigned :7;
unsigned CON3 :1;
};
struct {
unsigned :5;
unsigned CPOL3 :1;
};
struct {
unsigned :2;
unsigned CREF3 :1;
};
struct {
unsigned :3;
unsigned EVPOL03 :1;
};
struct {
unsigned :4;
unsigned EVPOL13 :1;
};
} CM3CONbits_t;
extern volatile CM3CONbits_t CM3CONbits @ 0xF25;
# 3023
extern volatile unsigned char RTCVALL @ 0xF3A;
asm("RTCVALL equ 0F3Ah");
typedef union {
struct {
unsigned RTCVALL :8;
};
} RTCVALLbits_t;
extern volatile RTCVALLbits_t RTCVALLbits @ 0xF3A;
# 3042
extern volatile unsigned char RTCVALH @ 0xF3B;
asm("RTCVALH equ 0F3Bh");
typedef union {
struct {
unsigned RTCVALH :8;
};
struct {
unsigned :6;
unsigned WAITB0 :1;
};
struct {
unsigned :7;
unsigned WAITB1 :1;
};
struct {
unsigned WAITE0 :1;
};
struct {
unsigned :1;
unsigned WAITE1 :1;
};
struct {
unsigned :2;
unsigned WAITM0 :1;
};
struct {
unsigned :3;
unsigned WAITM1 :1;
};
struct {
unsigned :4;
unsigned WAITM2 :1;
};
struct {
unsigned :5;
unsigned WAITM3 :1;
};
} RTCVALHbits_t;
extern volatile RTCVALHbits_t RTCVALHbits @ 0xF3B;
# 3132
extern volatile unsigned char PADCFG1 @ 0xF3C;
asm("PADCFG1 equ 0F3Ch");
typedef union {
struct {
unsigned :1;
unsigned RTSECSEL0 :1;
unsigned RTSECSEL1 :1;
};
} PADCFG1bits_t;
extern volatile PADCFG1bits_t PADCFG1bits @ 0xF3C;
# 3158
extern volatile unsigned char REFOCON @ 0xF3D;
asm("REFOCON equ 0F3Dh");
typedef union {
struct {
unsigned RODIV :4;
unsigned ROSEL :1;
unsigned ROSSLP :1;
unsigned :1;
unsigned ROON :1;
};
struct {
unsigned RODIV0 :1;
unsigned RODIV1 :1;
unsigned RODIV2 :1;
unsigned RODIV3 :1;
};
} REFOCONbits_t;
extern volatile REFOCONbits_t REFOCONbits @ 0xF3D;
# 3222
extern volatile unsigned char RTCCAL @ 0xF3E;
asm("RTCCAL equ 0F3Eh");
typedef union {
struct {
unsigned CAL :8;
};
struct {
unsigned CAL0 :1;
unsigned CAL1 :1;
unsigned CAL2 :1;
unsigned CAL3 :1;
unsigned CAL4 :1;
unsigned CAL5 :1;
unsigned CAL6 :1;
unsigned CAL7 :1;
};
} RTCCALbits_t;
extern volatile RTCCALbits_t RTCCALbits @ 0xF3E;
# 3291
extern volatile unsigned char RTCCFG @ 0xF3F;
asm("RTCCFG equ 0F3Fh");
typedef union {
struct {
unsigned RTCPTR0 :1;
unsigned RTCPTR1 :1;
unsigned RTCOE :1;
unsigned HALFSEC :1;
unsigned RTCSYNC :1;
unsigned RTCWREN :1;
unsigned :1;
unsigned RTCEN :1;
};
} RTCCFGbits_t;
extern volatile RTCCFGbits_t RTCCFGbits @ 0xF3F;
# 3347
extern volatile unsigned char ODCON3 @ 0xF40;
asm("ODCON3 equ 0F40h");
typedef union {
struct {
unsigned SPI1OD :1;
unsigned SPI2OD :1;
unsigned :5;
unsigned CTMUDS :1;
};
} ODCON3bits_t;
extern volatile ODCON3bits_t ODCON3bits @ 0xF40;
# 3379
extern volatile unsigned char ODCON2 @ 0xF41;
asm("ODCON2 equ 0F41h");
typedef union {
struct {
unsigned U1OD :1;
unsigned U2OD :1;
unsigned CCP9OD :1;
unsigned CCP10OD :1;
};
} ODCON2bits_t;
extern volatile ODCON2bits_t ODCON2bits @ 0xF41;
# 3416
extern volatile unsigned char ODCON1 @ 0xF42;
asm("ODCON1 equ 0F42h");
typedef union {
struct {
unsigned ECCP1OD :1;
unsigned ECCP2OD :1;
unsigned ECCP3OD :1;
unsigned CCP4OD :1;
unsigned CCP5OD :1;
unsigned CCP6OD :1;
unsigned CCP7OD :1;
unsigned CCP8OD :1;
};
} ODCON1bits_t;
extern volatile ODCON1bits_t ODCON1bits @ 0xF42;
# 3477
extern volatile unsigned char ALRMVALL @ 0xF44;
asm("ALRMVALL equ 0F44h");
typedef union {
struct {
unsigned ALRMVALL :8;
};
} ALRMVALLbits_t;
extern volatile ALRMVALLbits_t ALRMVALLbits @ 0xF44;
# 3496
extern volatile unsigned char ALRMVALH @ 0xF45;
asm("ALRMVALH equ 0F45h");
typedef union {
struct {
unsigned ALRMVALH :8;
};
} ALRMVALHbits_t;
extern volatile ALRMVALHbits_t ALRMVALHbits @ 0xF45;
# 3515
extern volatile unsigned char ALRMRPT @ 0xF46;
asm("ALRMRPT equ 0F46h");
typedef union {
struct {
unsigned ARPT :8;
};
struct {
unsigned ARPT0 :1;
unsigned ARPT1 :1;
unsigned ARPT2 :1;
unsigned ARPT3 :1;
unsigned ARPT4 :1;
unsigned ARPT5 :1;
unsigned ARPT6 :1;
unsigned ARPT7 :1;
};
} ALRMRPTbits_t;
extern volatile ALRMRPTbits_t ALRMRPTbits @ 0xF46;
# 3584
extern volatile unsigned char ALRMCFG @ 0xF47;
asm("ALRMCFG equ 0F47h");
typedef union {
struct {
unsigned ALRMPTR :2;
unsigned AMASK :4;
unsigned CHIME :1;
unsigned ALRMEN :1;
};
struct {
unsigned ALRMPTR0 :1;
unsigned ALRMPTR1 :1;
unsigned AMASK0 :1;
unsigned AMASK1 :1;
unsigned AMASK2 :1;
unsigned AMASK3 :1;
};
} ALRMCFGbits_t;
extern volatile ALRMCFGbits_t ALRMCFGbits @ 0xF47;
# 3659
extern volatile unsigned char ANCON0 @ 0xF48;
asm("ANCON0 equ 0F48h");
typedef union {
struct {
unsigned PCFG0 :1;
unsigned PCFG1 :1;
unsigned PCFG2 :1;
unsigned PCFG3 :1;
unsigned PCFG4 :1;
};
} ANCON0bits_t;
extern volatile ANCON0bits_t ANCON0bits @ 0xF48;
# 3702
extern volatile unsigned char ANCON1 @ 0xF49;
asm("ANCON1 equ 0F49h");
typedef union {
struct {
unsigned PCFG8 :1;
unsigned PCFG9 :1;
unsigned PCFG10 :1;
unsigned PCFG11 :1;
unsigned PCFG12 :1;
unsigned :2;
unsigned VBGEN :1;
};
struct {
unsigned :7;
unsigned PCFG15 :1;
};
} ANCON1bits_t;
extern volatile ANCON1bits_t ANCON1bits @ 0xF49;
# 3761
extern volatile unsigned char DSWAKEL @ 0xF4A;
asm("DSWAKEL equ 0F4Ah");
typedef union {
struct {
unsigned DSPOR :1;
unsigned :1;
unsigned DSMCLR :1;
unsigned DSRTC :1;
unsigned DSWDT :1;
unsigned DSULP :1;
unsigned :1;
unsigned DSFLT :1;
};
} DSWAKELbits_t;
extern volatile DSWAKELbits_t DSWAKELbits @ 0xF4A;
# 3812
extern volatile unsigned char DSWAKEH @ 0xF4B;
asm("DSWAKEH equ 0F4Bh");
typedef union {
struct {
unsigned DSINT0 :1;
};
} DSWAKEHbits_t;
extern volatile DSWAKEHbits_t DSWAKEHbits @ 0xF4B;
# 3831
extern volatile unsigned char DSCONL @ 0xF4C;
asm("DSCONL equ 0F4Ch");
typedef union {
struct {
unsigned RELEASE :1;
unsigned DSBOR :1;
unsigned ULPWDIS :1;
};
} DSCONLbits_t;
extern volatile DSCONLbits_t DSCONLbits @ 0xF4C;
# 3862
extern volatile unsigned char DSCONH @ 0xF4D;
asm("DSCONH equ 0F4Dh");
typedef union {
struct {
unsigned RTCWDIS :1;
unsigned DSULPEN :1;
unsigned :5;
unsigned DSEN :1;
};
} DSCONHbits_t;
extern volatile DSCONHbits_t DSCONHbits @ 0xF4D;
# 3894
extern volatile unsigned char DSGPR0 @ 0xF4E;
asm("DSGPR0 equ 0F4Eh");
typedef union {
struct {
unsigned DSGPR0 :8;
};
} DSGPR0bits_t;
extern volatile DSGPR0bits_t DSGPR0bits @ 0xF4E;
# 3913
extern volatile unsigned char DSGPR1 @ 0xF4F;
asm("DSGPR1 equ 0F4Fh");
typedef union {
struct {
unsigned DSGPR1 :8;
};
} DSGPR1bits_t;
extern volatile DSGPR1bits_t DSGPR1bits @ 0xF4F;
# 3932
extern volatile unsigned char CCPTMRS2 @ 0xF50;
asm("CCPTMRS2 equ 0F50h");
typedef union {
struct {
unsigned C8TSEL :2;
unsigned C9TSEL0 :1;
unsigned :1;
unsigned C10TSEL0 :1;
};
struct {
unsigned C8TSEL0 :1;
unsigned C8TSEL1 :1;
};
} CCPTMRS2bits_t;
extern volatile CCPTMRS2bits_t CCPTMRS2bits @ 0xF50;
# 3978
extern volatile unsigned char CCPTMRS1 @ 0xF51;
asm("CCPTMRS1 equ 0F51h");
typedef union {
struct {
unsigned C4TSEL :2;
unsigned C5TSEL0 :1;
unsigned :1;
unsigned C6TSEL0 :1;
unsigned :1;
unsigned C7TSEL :2;
};
struct {
unsigned C4TSEL0 :1;
unsigned C4TSEL1 :1;
unsigned :4;
unsigned C7TSEL0 :1;
unsigned C7TSEL1 :1;
};
} CCPTMRS1bits_t;
extern volatile CCPTMRS1bits_t CCPTMRS1bits @ 0xF51;
# 4044
extern volatile unsigned char CCPTMRS0 @ 0xF52;
asm("CCPTMRS0 equ 0F52h");
typedef union {
struct {
unsigned C1TSEL :3;
unsigned C2TSEL :3;
unsigned C3TSEL :2;
};
struct {
unsigned C1TSEL0 :1;
unsigned C1TSEL1 :1;
unsigned C1TSEL2 :1;
unsigned C2TSEL0 :1;
unsigned C2TSEL1 :1;
unsigned C2TSEL2 :1;
unsigned C3TSEL0 :1;
unsigned C3TSEL1 :1;
};
} CCPTMRS0bits_t;
extern volatile CCPTMRS0bits_t CCPTMRS0bits @ 0xF52;
# 4125
extern volatile unsigned char CVRCON @ 0xF53;
asm("CVRCON equ 0F53h");
typedef union {
struct {
unsigned CVR :4;
unsigned CVRSS :1;
unsigned CVRR :1;
unsigned CVROE :1;
unsigned CVREN :1;
};
struct {
unsigned CVR0 :1;
unsigned CVR1 :1;
unsigned CVR2 :1;
unsigned CVR3 :1;
};
struct {
unsigned :6;
unsigned CVROEN :1;
};
} CVRCONbits_t;
extern volatile CVRCONbits_t CVRCONbits @ 0xF53;
# 4203
extern volatile unsigned char DMABCH @ 0xF66;
asm("DMABCH equ 0F66h");
typedef union {
struct {
unsigned DMACNTHB :2;
};
} DMABCHbits_t;
extern volatile DMABCHbits_t DMABCHbits @ 0xF66;
# 4222
extern volatile unsigned char DMABCL @ 0xF67;
asm("DMABCL equ 0F67h");
typedef union {
struct {
unsigned DMACNTLB :8;
};
} DMABCLbits_t;
extern volatile DMABCLbits_t DMABCLbits @ 0xF67;
# 4241
extern volatile unsigned char RXADDRH @ 0xF68;
asm("RXADDRH equ 0F68h");
typedef union {
struct {
unsigned DMARCVPTRHB :4;
};
} RXADDRHbits_t;
extern volatile RXADDRHbits_t RXADDRHbits @ 0xF68;
# 4260
extern volatile unsigned char RXADDRL @ 0xF69;
asm("RXADDRL equ 0F69h");
typedef union {
struct {
unsigned DMARCVPTRLB :8;
};
} RXADDRLbits_t;
extern volatile RXADDRLbits_t RXADDRLbits @ 0xF69;
# 4279
extern volatile unsigned char TXADDRH @ 0xF6A;
asm("TXADDRH equ 0F6Ah");
typedef union {
struct {
unsigned DMATXPTRHB :4;
};
} TXADDRHbits_t;
extern volatile TXADDRHbits_t TXADDRHbits @ 0xF6A;
# 4298
extern volatile unsigned char TXADDRL @ 0xF6B;
asm("TXADDRL equ 0F6Bh");
typedef union {
struct {
unsigned DMATXPTRLB :8;
};
} TXADDRLbits_t;
extern volatile TXADDRLbits_t TXADDRLbits @ 0xF6B;
# 4317
extern volatile unsigned char CMSTAT @ 0xF70;
asm("CMSTAT equ 0F70h");
extern volatile unsigned char CMSTATUS @ 0xF70;
asm("CMSTATUS equ 0F70h");
typedef union {
struct {
unsigned COUT1 :1;
unsigned COUT2 :1;
unsigned COUT3 :1;
};
} CMSTATbits_t;
extern volatile CMSTATbits_t CMSTATbits @ 0xF70;
# 4352
typedef union {
struct {
unsigned COUT1 :1;
unsigned COUT2 :1;
unsigned COUT3 :1;
};
} CMSTATUSbits_t;
extern volatile CMSTATUSbits_t CMSTATUSbits @ 0xF70;
# 4378
extern volatile unsigned char SSP2CON2 @ 0xF71;
asm("SSP2CON2 equ 0F71h");
typedef union {
struct {
unsigned SEN :1;
unsigned RSEN :1;
unsigned PEN :1;
unsigned RCEN :1;
unsigned ACKEN :1;
unsigned ACKDT :1;
unsigned ACKSTAT :1;
unsigned GCEN :1;
};
struct {
unsigned :1;
unsigned ADMSK1 :1;
unsigned ADMSK2 :1;
unsigned ADMSK3 :1;
unsigned ADMSK4 :1;
unsigned ADMSK5 :1;
};
struct {
unsigned :5;
unsigned ACKDT2 :1;
};
struct {
unsigned :4;
unsigned ACKEN2 :1;
};
struct {
unsigned :6;
unsigned ACKSTAT2 :1;
};
struct {
unsigned :1;
unsigned ADMSK12 :1;
};
struct {
unsigned :2;
unsigned ADMSK22 :1;
};
struct {
unsigned :3;
unsigned ADMSK32 :1;
};
struct {
unsigned :4;
unsigned ADMSK42 :1;
};
struct {
unsigned :5;
unsigned ADMSK52 :1;
};
struct {
unsigned :7;
unsigned GCEN2 :1;
};
struct {
unsigned :2;
unsigned PEN2 :1;
};
struct {
unsigned :3;
unsigned RCEN2 :1;
};
struct {
unsigned :1;
unsigned RSEN2 :1;
};
struct {
unsigned SEN2 :1;
};
} SSP2CON2bits_t;
extern volatile SSP2CON2bits_t SSP2CON2bits @ 0xF71;
# 4588
extern volatile unsigned char SSP2CON1 @ 0xF72;
asm("SSP2CON1 equ 0F72h");
typedef union {
struct {
unsigned SSPM :4;
unsigned CKP :1;
unsigned SSPEN :1;
unsigned SSPOV :1;
unsigned WCOL :1;
};
struct {
unsigned SSPM0 :1;
unsigned SSPM1 :1;
unsigned SSPM2 :1;
unsigned SSPM3 :1;
};
struct {
unsigned :4;
unsigned CKP2 :1;
};
struct {
unsigned :5;
unsigned SSPEN2 :1;
};
struct {
unsigned SSPM02 :1;
};
struct {
unsigned :1;
unsigned SSPM12 :1;
};
struct {
unsigned :2;
unsigned SSPM22 :1;
};
struct {
unsigned :3;
unsigned SSPM32 :1;
};
struct {
unsigned :6;
unsigned SSPOV2 :1;
};
struct {
unsigned :7;
unsigned WCOL2 :1;
};
} SSP2CON1bits_t;
extern volatile SSP2CON1bits_t SSP2CON1bits @ 0xF72;
# 4728
extern volatile unsigned char SSP2STAT @ 0xF73;
asm("SSP2STAT equ 0F73h");
typedef union {
struct {
unsigned :2;
unsigned R_NOT_W :1;
};
struct {
unsigned :5;
unsigned D_NOT_A :1;
};
struct {
unsigned BF :1;
unsigned UA :1;
unsigned R_nW :1;
unsigned S :1;
unsigned P :1;
unsigned D_nA :1;
unsigned CKE :1;
unsigned SMP :1;
};
struct {
unsigned BF2 :1;
};
struct {
unsigned :6;
unsigned CKE2 :1;
};
struct {
unsigned :5;
unsigned DA2 :1;
};
struct {
unsigned :5;
unsigned DATA_ADDRESS2 :1;
};
struct {
unsigned :5;
unsigned D_A2 :1;
};
struct {
unsigned :5;
unsigned D_nA2 :1;
};
struct {
unsigned :5;
unsigned I2C_DAT2 :1;
};
struct {
unsigned :2;
unsigned I2C_READ2 :1;
};
struct {
unsigned :3;
unsigned I2C_START2 :1;
};
struct {
unsigned :4;
unsigned I2C_STOP2 :1;
};
struct {
unsigned :4;
unsigned P2 :1;
};
struct {
unsigned :2;
unsigned READ_WRITE2 :1;
};
struct {
unsigned :2;
unsigned RW2 :1;
};
struct {
unsigned :2;
unsigned R_W2 :1;
};
struct {
unsigned :2;
unsigned R_nW2 :1;
};
struct {
unsigned :3;
unsigned S2 :1;
};
struct {
unsigned :7;
unsigned SMP2 :1;
};
struct {
unsigned :3;
unsigned START2 :1;
};
struct {
unsigned :4;
unsigned STOP2 :1;
};
struct {
unsigned :1;
unsigned UA2 :1;
};
struct {
unsigned :5;
unsigned nA2 :1;
};
struct {
unsigned :5;
unsigned nADDRESS2 :1;
};
struct {
unsigned :2;
unsigned nW2 :1;
};
struct {
unsigned :2;
unsigned nWRITE2 :1;
};
} SSP2STATbits_t;
extern volatile SSP2STATbits_t SSP2STATbits @ 0xF73;
# 5022
extern volatile unsigned char SSP2ADD @ 0xF74;
asm("SSP2ADD equ 0F74h");
typedef union {
struct {
unsigned SSPADD :8;
};
struct {
unsigned MSK02 :1;
};
struct {
unsigned :1;
unsigned MSK12 :1;
};
struct {
unsigned :2;
unsigned MSK22 :1;
};
struct {
unsigned :3;
unsigned MSK32 :1;
};
struct {
unsigned :4;
unsigned MSK42 :1;
};
struct {
unsigned :5;
unsigned MSK52 :1;
};
struct {
unsigned :6;
unsigned MSK62 :1;
};
struct {
unsigned :7;
unsigned MSK72 :1;
};
} SSP2ADDbits_t;
extern volatile SSP2ADDbits_t SSP2ADDbits @ 0xF74;
# 5112
extern volatile unsigned char SSP2MSK @ 0xF74;
asm("SSP2MSK equ 0F74h");
typedef union {
struct {
unsigned MSK0 :1;
unsigned MSK1 :1;
unsigned MSK2 :1;
unsigned MSK3 :1;
unsigned MSK4 :1;
unsigned MSK5 :1;
unsigned MSK6 :1;
unsigned MSK7 :1;
};
} SSP2MSKbits_t;
extern volatile SSP2MSKbits_t SSP2MSKbits @ 0xF74;
# 5173
extern volatile unsigned char SSP2BUF @ 0xF75;
asm("SSP2BUF equ 0F75h");
typedef union {
struct {
unsigned SSPBUF :8;
};
} SSP2BUFbits_t;
extern volatile SSP2BUFbits_t SSP2BUFbits @ 0xF75;
# 5192
extern volatile unsigned char T4CON @ 0xF76;
asm("T4CON equ 0F76h");
typedef union {
struct {
unsigned T4CKPS :2;
unsigned TMR4ON :1;
unsigned T4OUTPS :4;
};
struct {
unsigned T4CKPS0 :1;
unsigned T4CKPS1 :1;
unsigned :1;
unsigned T4OUTPS0 :1;
unsigned T4OUTPS1 :1;
unsigned T4OUTPS2 :1;
unsigned T4OUTPS3 :1;
};
} T4CONbits_t;
extern volatile T4CONbits_t T4CONbits @ 0xF76;
# 5262
extern volatile unsigned char PR4 @ 0xF77;
asm("PR4 equ 0F77h");
typedef union {
struct {
unsigned PR4 :8;
};
} PR4bits_t;
extern volatile PR4bits_t PR4bits @ 0xF77;
# 5281
extern volatile unsigned char TMR4 @ 0xF78;
asm("TMR4 equ 0F78h");
typedef union {
struct {
unsigned TMR4 :8;
};
} TMR4bits_t;
extern volatile TMR4bits_t TMR4bits @ 0xF78;
# 5300
extern volatile unsigned char T3CON @ 0xF79;
asm("T3CON equ 0F79h");
typedef union {
struct {
unsigned :2;
unsigned NOT_T3SYNC :1;
};
struct {
unsigned TMR3ON :1;
unsigned RD16 :1;
unsigned nT3SYNC :1;
unsigned T3OSCEN :1;
unsigned T3CKPS :2;
unsigned TMR3CS :2;
};
struct {
unsigned :4;
unsigned T3CKPS0 :1;
unsigned T3CKPS1 :1;
unsigned TMR3CS0 :1;
unsigned TMR3CS1 :1;
};
struct {
unsigned :7;
unsigned RD163 :1;
};
struct {
unsigned :3;
unsigned SOSCEN3 :1;
};
struct {
unsigned :7;
unsigned T3RD16 :1;
};
} T3CONbits_t;
extern volatile T3CONbits_t T3CONbits @ 0xF79;
# 5412
extern volatile unsigned short TMR3 @ 0xF7A;
asm("TMR3 equ 0F7Ah");
extern volatile unsigned char TMR3L @ 0xF7A;
asm("TMR3L equ 0F7Ah");
typedef union {
struct {
unsigned TMR3L :8;
};
} TMR3Lbits_t;
extern volatile TMR3Lbits_t TMR3Lbits @ 0xF7A;
# 5437
extern volatile unsigned char TMR3H @ 0xF7B;
asm("TMR3H equ 0F7Bh");
typedef union {
struct {
unsigned TMR3H :8;
};
} TMR3Hbits_t;
extern volatile TMR3Hbits_t TMR3Hbits @ 0xF7B;
# 5456
extern volatile unsigned char BAUDCON2 @ 0xF7C;
asm("BAUDCON2 equ 0F7Ch");
typedef union {
struct {
unsigned ABDEN :1;
unsigned WUE :1;
unsigned :1;
unsigned BRG16 :1;
unsigned TXCKP :1;
unsigned RXDTP :1;
unsigned RCIDL :1;
unsigned ABDOVF :1;
};
struct {
unsigned ABDEN2 :1;
};
struct {
unsigned :7;
unsigned ABDOVF2 :1;
};
struct {
unsigned :3;
unsigned BRG162 :1;
};
struct {
unsigned :5;
unsigned DTRXP2 :1;
};
struct {
unsigned :6;
unsigned RCIDL2 :1;
};
struct {
unsigned :6;
unsigned RCMT2 :1;
};
struct {
unsigned :5;
unsigned RXDTP2 :1;
};
struct {
unsigned :4;
unsigned SCKP2 :1;
};
struct {
unsigned :4;
unsigned TXCKP2 :1;
};
struct {
unsigned :1;
unsigned WUE2 :1;
};
} BAUDCON2bits_t;
extern volatile BAUDCON2bits_t BAUDCON2bits @ 0xF7C;
# 5601
extern volatile unsigned char SPBRGH2 @ 0xF7D;
asm("SPBRGH2 equ 0F7Dh");
typedef union {
struct {
unsigned SPBRGH2 :8;
};
} SPBRGH2bits_t;
extern volatile SPBRGH2bits_t SPBRGH2bits @ 0xF7D;
# 5620
extern volatile unsigned char BAUDCON1 @ 0xF7E;
asm("BAUDCON1 equ 0F7Eh");
extern volatile unsigned char BAUDCON @ 0xF7E;
asm("BAUDCON equ 0F7Eh");
extern volatile unsigned char BAUDCTL @ 0xF7E;
asm("BAUDCTL equ 0F7Eh");
typedef union {
struct {
unsigned ABDEN :1;
unsigned WUE :1;
unsigned :1;
unsigned BRG16 :1;
unsigned TXCKP :1;
unsigned RXDTP :1;
unsigned RCIDL :1;
unsigned ABDOVF :1;
};
struct {
unsigned ABDEN1 :1;
};
struct {
unsigned :7;
unsigned ABDOVF1 :1;
};
struct {
unsigned :3;
unsigned BRG161 :1;
};
struct {
unsigned :4;
unsigned CKTXP :1;
};
struct {
unsigned :5;
unsigned DTRXP :1;
};
struct {
unsigned :5;
unsigned DTRXP1 :1;
};
struct {
unsigned :6;
unsigned RCIDL1 :1;
};
struct {
unsigned :6;
unsigned RCMT :1;
};
struct {
unsigned :6;
unsigned RCMT1 :1;
};
struct {
unsigned :5;
unsigned RXDTP1 :1;
};
struct {
unsigned :4;
unsigned SCKP :1;
};
struct {
unsigned :4;
unsigned SCKP1 :1;
};
struct {
unsigned :4;
unsigned TXCKP1 :1;
};
struct {
unsigned :1;
unsigned WUE1 :1;
};
struct {
unsigned :5;
unsigned RXCKP :1;
};
struct {
unsigned :1;
unsigned W4E :1;
};
} BAUDCON1bits_t;
extern volatile BAUDCON1bits_t BAUDCON1bits @ 0xF7E;
# 5827
typedef union {
struct {
unsigned ABDEN :1;
unsigned WUE :1;
unsigned :1;
unsigned BRG16 :1;
unsigned TXCKP :1;
unsigned RXDTP :1;
unsigned RCIDL :1;
unsigned ABDOVF :1;
};
struct {
unsigned ABDEN1 :1;
};
struct {
unsigned :7;
unsigned ABDOVF1 :1;
};
struct {
unsigned :3;
unsigned BRG161 :1;
};
struct {
unsigned :4;
unsigned CKTXP :1;
};
struct {
unsigned :5;
unsigned DTRXP :1;
};
struct {
unsigned :5;
unsigned DTRXP1 :1;
};
struct {
unsigned :6;
unsigned RCIDL1 :1;
};
struct {
unsigned :6;
unsigned RCMT :1;
};
struct {
unsigned :6;
unsigned RCMT1 :1;
};
struct {
unsigned :5;
unsigned RXDTP1 :1;
};
struct {
unsigned :4;
unsigned SCKP :1;
};
struct {
unsigned :4;
unsigned SCKP1 :1;
};
struct {
unsigned :4;
unsigned TXCKP1 :1;
};
struct {
unsigned :1;
unsigned WUE1 :1;
};
struct {
unsigned :5;
unsigned RXCKP :1;
};
struct {
unsigned :1;
unsigned W4E :1;
};
} BAUDCONbits_t;
extern volatile BAUDCONbits_t BAUDCONbits @ 0xF7E;
# 6019
typedef union {
struct {
unsigned ABDEN :1;
unsigned WUE :1;
unsigned :1;
unsigned BRG16 :1;
unsigned TXCKP :1;
unsigned RXDTP :1;
unsigned RCIDL :1;
unsigned ABDOVF :1;
};
struct {
unsigned ABDEN1 :1;
};
struct {
unsigned :7;
unsigned ABDOVF1 :1;
};
struct {
unsigned :3;
unsigned BRG161 :1;
};
struct {
unsigned :4;
unsigned CKTXP :1;
};
struct {
unsigned :5;
unsigned DTRXP :1;
};
struct {
unsigned :5;
unsigned DTRXP1 :1;
};
struct {
unsigned :6;
unsigned RCIDL1 :1;
};
struct {
unsigned :6;
unsigned RCMT :1;
};
struct {
unsigned :6;
unsigned RCMT1 :1;
};
struct {
unsigned :5;
unsigned RXDTP1 :1;
};
struct {
unsigned :4;
unsigned SCKP :1;
};
struct {
unsigned :4;
unsigned SCKP1 :1;
};
struct {
unsigned :4;
unsigned TXCKP1 :1;
};
struct {
unsigned :1;
unsigned WUE1 :1;
};
struct {
unsigned :5;
unsigned RXCKP :1;
};
struct {
unsigned :1;
unsigned W4E :1;
};
} BAUDCTLbits_t;
extern volatile BAUDCTLbits_t BAUDCTLbits @ 0xF7E;
# 6213
extern volatile unsigned char SPBRGH1 @ 0xF7F;
asm("SPBRGH1 equ 0F7Fh");
extern volatile unsigned char SPBRGH @ 0xF7F;
asm("SPBRGH equ 0F7Fh");
typedef union {
struct {
unsigned SPBRGH1 :8;
};
} SPBRGH1bits_t;
extern volatile SPBRGH1bits_t SPBRGH1bits @ 0xF7F;
# 6236
typedef union {
struct {
unsigned SPBRGH1 :8;
};
} SPBRGHbits_t;
extern volatile SPBRGHbits_t SPBRGHbits @ 0xF7F;
# 6250
extern volatile unsigned char PORTA @ 0xF80;
asm("PORTA equ 0F80h");
typedef union {
struct {
unsigned RA0 :1;
unsigned RA1 :1;
unsigned RA2 :1;
unsigned RA3 :1;
unsigned :1;
unsigned RA5 :1;
unsigned RA6 :1;
unsigned RA7 :1;
};
struct {
unsigned AN0 :1;
unsigned AN1 :1;
unsigned AN2 :1;
unsigned AN3 :1;
unsigned :1;
unsigned AN4 :1;
unsigned OSC2 :1;
unsigned OSC1 :1;
};
struct {
unsigned :5;
unsigned NOT_SS1 :1;
};
struct {
unsigned C1INA :1;
unsigned C2INA :1;
unsigned VREF_MINUS :1;
unsigned VREF_PLUS :1;
unsigned :1;
unsigned nSS1 :1;
unsigned CLKO :1;
unsigned CLKI :1;
};
struct {
unsigned :2;
unsigned CVREF :1;
unsigned C1INB :1;
unsigned :1;
unsigned HLVDIN :1;
};
struct {
unsigned RP0 :1;
unsigned RP1 :1;
unsigned C2INB :1;
};
struct {
unsigned ULPWU :1;
unsigned VBG :1;
unsigned C3INB :1;
unsigned :2;
unsigned RP2 :1;
};
struct {
unsigned :2;
unsigned C1IND :1;
unsigned :2;
unsigned C1INC :1;
};
struct {
unsigned :5;
unsigned LVDIN :1;
};
struct {
unsigned :4;
unsigned RA4 :1;
};
struct {
unsigned :7;
unsigned RJPU :1;
};
struct {
unsigned ULPWUIN :1;
};
} PORTAbits_t;
extern volatile PORTAbits_t PORTAbits @ 0xF80;
# 6525
extern volatile unsigned char PORTB @ 0xF81;
asm("PORTB equ 0F81h");
typedef union {
struct {
unsigned RB0 :1;
unsigned RB1 :1;
unsigned RB2 :1;
unsigned RB3 :1;
unsigned RB4 :1;
unsigned RB5 :1;
unsigned RB6 :1;
unsigned RB7 :1;
};
struct {
unsigned AN12 :1;
unsigned AN10 :1;
unsigned AN8 :1;
unsigned AN9 :1;
unsigned :2;
unsigned KBI2 :1;
unsigned KBI3 :1;
};
struct {
unsigned INT0 :1;
unsigned :1;
unsigned CTED1 :1;
unsigned CTED2 :1;
unsigned KBI0 :1;
unsigned KBI1 :1;
unsigned PGC :1;
unsigned PGD :1;
};
struct {
unsigned RP3 :1;
unsigned RTCC :1;
unsigned :4;
unsigned RP9 :1;
unsigned RP10 :1;
};
struct {
unsigned C3IND :1;
unsigned C3INC :1;
unsigned C2INC :1;
unsigned :1;
unsigned SCL2 :1;
unsigned SDA2 :1;
};
struct {
unsigned :1;
unsigned RP4 :1;
unsigned REFO :1;
unsigned RP6 :1;
unsigned RP7 :1;
unsigned RP8 :1;
};
struct {
unsigned :2;
unsigned RP5 :1;
unsigned C3INA :1;
unsigned CCP4 :1;
unsigned CCP5 :1;
unsigned CCP6 :1;
unsigned CCP7 :1;
};
struct {
unsigned :3;
unsigned CCP2_PA2 :1;
};
} PORTBbits_t;
extern volatile PORTBbits_t PORTBbits @ 0xF81;
# 6811
extern volatile unsigned char PORTC @ 0xF82;
asm("PORTC equ 0F82h");
typedef union {
struct {
unsigned RC0 :1;
unsigned RC1 :1;
unsigned RC2 :1;
unsigned RC3 :1;
unsigned RC4 :1;
unsigned RC5 :1;
unsigned RC6 :1;
unsigned RC7 :1;
};
struct {
unsigned T1OSO :1;
unsigned T1OSI :1;
unsigned AN11 :1;
unsigned SCL1 :1;
unsigned SDA1 :1;
};
struct {
unsigned T1CKI :1;
unsigned :1;
unsigned CTPLS :1;
unsigned :3;
unsigned TX1 :1;
unsigned RX1 :1;
};
struct {
unsigned RP11 :1;
unsigned RP12 :1;
unsigned RP13 :1;
unsigned RP14 :1;
unsigned RP15 :1;
unsigned RP16 :1;
unsigned CK1 :1;
unsigned DT1 :1;
};
struct {
unsigned :1;
unsigned CCP8 :1;
unsigned C2IND :1;
unsigned SCK1 :1;
unsigned SDI1 :1;
unsigned SDO1 :1;
unsigned CCP9 :1;
unsigned CCP10 :1;
};
struct {
unsigned :6;
unsigned RP17 :1;
unsigned RP18 :1;
};
struct {
unsigned :1;
unsigned CCP2 :1;
};
struct {
unsigned :2;
unsigned PA1 :1;
};
struct {
unsigned :1;
unsigned PA2 :1;
};
} PORTCbits_t;
extern volatile PORTCbits_t PORTCbits @ 0xF82;
# 7069
extern volatile unsigned char HLVDCON @ 0xF85;
asm("HLVDCON equ 0F85h");
typedef union {
struct {
unsigned HLVDL :4;
unsigned HLVDEN :1;
unsigned IRVST :1;
unsigned BGVST :1;
unsigned VDIRMAG :1;
};
struct {
unsigned HLVDL0 :1;
unsigned HLVDL1 :1;
unsigned HLVDL2 :1;
unsigned HLVDL3 :1;
};
} HLVDCONbits_t;
extern volatile HLVDCONbits_t HLVDCONbits @ 0xF85;
# 7138
extern volatile unsigned char DMACON2 @ 0xF86;
asm("DMACON2 equ 0F86h");
typedef union {
struct {
unsigned INTLVL :4;
unsigned DLYCYC :4;
};
struct {
unsigned INTLVL0 :1;
unsigned INTLVL1 :1;
unsigned INTLVL2 :1;
unsigned INTLVL3 :1;
unsigned DLYCYC0 :1;
unsigned DLYCYC1 :1;
unsigned DLYCYC2 :1;
unsigned DLYCYC3 :1;
};
} DMACON2bits_t;
extern volatile DMACON2bits_t DMACON2bits @ 0xF86;
# 7213
extern volatile unsigned char OSCCON2 @ 0xF87;
asm("OSCCON2 equ 0F87h");
typedef union {
struct {
unsigned :2;
unsigned PRISD :1;
unsigned SOSCGO :1;
unsigned SOSCDRV :1;
unsigned :1;
unsigned SOSCRUN :1;
};
} OSCCON2bits_t;
extern volatile OSCCON2bits_t OSCCON2bits @ 0xF87;
# 7252
extern volatile unsigned char DMACON1 @ 0xF88;
asm("DMACON1 equ 0F88h");
typedef union {
struct {
unsigned DMAEN :1;
unsigned DLYINTEN :1;
unsigned DUPLEX0 :1;
unsigned DUPLEX1 :1;
unsigned RXINC :1;
unsigned TXINC :1;
unsigned SSCON0 :1;
unsigned SSCON1 :1;
};
} DMACON1bits_t;
extern volatile DMACON1bits_t DMACON1bits @ 0xF88;
# 7313
extern volatile unsigned char LATA @ 0xF89;
asm("LATA equ 0F89h");
typedef union {
struct {
unsigned LATA0 :1;
unsigned LATA1 :1;
unsigned LATA2 :1;
unsigned LATA3 :1;
unsigned :1;
unsigned LATA5 :1;
unsigned LATA6 :1;
unsigned LATA7 :1;
};
struct {
unsigned LA0 :1;
};
struct {
unsigned :1;
unsigned LA1 :1;
};
struct {
unsigned :2;
unsigned LA2 :1;
};
struct {
unsigned :3;
unsigned LA3 :1;
};
struct {
unsigned :4;
unsigned LA4 :1;
};
struct {
unsigned :5;
unsigned LA5 :1;
};
struct {
unsigned :6;
unsigned LA6 :1;
};
struct {
unsigned :7;
unsigned LA7 :1;
};
} LATAbits_t;
extern volatile LATAbits_t LATAbits @ 0xF89;
# 7440
extern volatile unsigned char LATB @ 0xF8A;
asm("LATB equ 0F8Ah");
typedef union {
struct {
unsigned LATB0 :1;
unsigned LATB1 :1;
unsigned LATB2 :1;
unsigned LATB3 :1;
unsigned LATB4 :1;
unsigned LATB5 :1;
unsigned LATB6 :1;
unsigned LATB7 :1;
};
struct {
unsigned LB0 :1;
};
struct {
unsigned :1;
unsigned LB1 :1;
};
struct {
unsigned :2;
unsigned LB2 :1;
};
struct {
unsigned :3;
unsigned LB3 :1;
};
struct {
unsigned :4;
unsigned LB4 :1;
};
struct {
unsigned :5;
unsigned LB5 :1;
};
struct {
unsigned :6;
unsigned LB6 :1;
};
struct {
unsigned :7;
unsigned LB7 :1;
};
} LATBbits_t;
extern volatile LATBbits_t LATBbits @ 0xF8A;
# 7572
extern volatile unsigned char LATC @ 0xF8B;
asm("LATC equ 0F8Bh");
typedef union {
struct {
unsigned LATC0 :1;
unsigned LATC1 :1;
unsigned LATC2 :1;
unsigned LATC3 :1;
unsigned LATC4 :1;
unsigned LATC5 :1;
unsigned LATC6 :1;
unsigned LATC7 :1;
};
struct {
unsigned LC0 :1;
};
struct {
unsigned :1;
unsigned LC1 :1;
};
struct {
unsigned :2;
unsigned LC2 :1;
};
struct {
unsigned :3;
unsigned LC3 :1;
};
struct {
unsigned :4;
unsigned LC4 :1;
};
struct {
unsigned :5;
unsigned LC5 :1;
};
struct {
unsigned :6;
unsigned LC6 :1;
};
struct {
unsigned :7;
unsigned LC7 :1;
};
} LATCbits_t;
extern volatile LATCbits_t LATCbits @ 0xF8B;
# 7704
extern volatile unsigned char PIE4 @ 0xF8E;
asm("PIE4 equ 0F8Eh");
typedef union {
struct {
unsigned CCP3IE :1;
unsigned CCP4IE :1;
unsigned CCP5IE :1;
unsigned CCP6IE :1;
unsigned CCP7IE :1;
unsigned CCP8IE :1;
unsigned CCP9IE :1;
unsigned CCP10IE :1;
};
} PIE4bits_t;
extern volatile PIE4bits_t PIE4bits @ 0xF8E;
# 7765
extern volatile unsigned char PIR4 @ 0xF8F;
asm("PIR4 equ 0F8Fh");
typedef union {
struct {
unsigned CCP3IF :1;
unsigned CCP4IF :1;
unsigned CCP5IF :1;
unsigned CCP6IF :1;
unsigned CCP7IF :1;
unsigned CCP8IF :1;
unsigned CCP9IF :1;
unsigned CCP10IF :1;
};
} PIR4bits_t;
extern volatile PIR4bits_t PIR4bits @ 0xF8F;
# 7826
extern volatile unsigned char IPR4 @ 0xF90;
asm("IPR4 equ 0F90h");
typedef union {
struct {
unsigned CCP3IP :1;
unsigned CCP4IP :1;
unsigned CCP5IP :1;
unsigned CCP6IP :1;
unsigned CCP7IP :1;
unsigned CCP8IP :1;
unsigned CCP9IP :1;
unsigned CCP10IP :1;
};
struct {
unsigned CCIP3IP :1;
};
} IPR4bits_t;
extern volatile IPR4bits_t IPR4bits @ 0xF90;
# 7895
extern volatile unsigned char PIE5 @ 0xF91;
asm("PIE5 equ 0F91h");
typedef union {
struct {
unsigned TMR1GIE :1;
unsigned TMR5GIE :1;
unsigned TMR5IE :1;
unsigned TMR6IE :1;
unsigned TMR8IE :1;
unsigned CM3IE :1;
};
} PIE5bits_t;
extern volatile PIE5bits_t PIE5bits @ 0xF91;
# 7944
extern volatile unsigned char TRISA @ 0xF92;
asm("TRISA equ 0F92h");
typedef union {
struct {
unsigned TRISA0 :1;
unsigned TRISA1 :1;
unsigned TRISA2 :1;
unsigned TRISA3 :1;
unsigned :1;
unsigned TRISA5 :1;
unsigned TRISA6 :1;
unsigned TRISA7 :1;
};
} TRISAbits_t;
extern volatile TRISAbits_t TRISAbits @ 0xF92;
# 8000
extern volatile unsigned char TRISB @ 0xF93;
asm("TRISB equ 0F93h");
typedef union {
struct {
unsigned TRISB0 :1;
unsigned TRISB1 :1;
unsigned TRISB2 :1;
unsigned TRISB3 :1;
unsigned TRISB4 :1;
unsigned TRISB5 :1;
unsigned TRISB6 :1;
unsigned TRISB7 :1;
};
} TRISBbits_t;
extern volatile TRISBbits_t TRISBbits @ 0xF93;
# 8061
extern volatile unsigned char TRISC @ 0xF94;
asm("TRISC equ 0F94h");
typedef union {
struct {
unsigned TRISC0 :1;
unsigned TRISC1 :1;
unsigned TRISC2 :1;
unsigned TRISC3 :1;
unsigned TRISC4 :1;
unsigned TRISC5 :1;
unsigned TRISC6 :1;
unsigned TRISC7 :1;
};
} TRISCbits_t;
extern volatile TRISCbits_t TRISCbits @ 0xF94;
# 8122
extern volatile unsigned char T3GCON @ 0xF97;
asm("T3GCON equ 0F97h");
typedef union {
struct {
unsigned T3GSS0 :1;
unsigned T3GSS1 :1;
unsigned T3GVAL :1;
unsigned T3GGO_T3DONE :1;
unsigned T3GSPM :1;
unsigned T3GTM :1;
unsigned T3GPOL :1;
unsigned TMR3GE :1;
};
struct {
unsigned :3;
unsigned T3GGO :1;
};
struct {
unsigned :3;
unsigned T3DONE :1;
};
} T3GCONbits_t;
extern volatile T3GCONbits_t T3GCONbits @ 0xF97;
# 8201
extern volatile unsigned char PIR5 @ 0xF98;
asm("PIR5 equ 0F98h");
typedef union {
struct {
unsigned TMR1GIF :1;
unsigned TMR5GIF :1;
unsigned TMR5IF :1;
unsigned TMR6IF :1;
unsigned TMR8IF :1;
unsigned CM3IF :1;
};
} PIR5bits_t;
extern volatile PIR5bits_t PIR5bits @ 0xF98;
# 8250
extern volatile unsigned char IPR5 @ 0xF99;
asm("IPR5 equ 0F99h");
typedef union {
struct {
unsigned TMR1GIP :1;
unsigned TMR5GIP :1;
unsigned TMR5IP :1;
unsigned TMR6IP :1;
unsigned TMR8IP :1;
unsigned CM3IP :1;
};
struct {
unsigned CCH05 :1;
};
struct {
unsigned :1;
unsigned CCH15 :1;
};
struct {
unsigned :3;
unsigned EVPOL05 :1;
};
struct {
unsigned :4;
unsigned EVPOL15 :1;
};
} IPR5bits_t;
extern volatile IPR5bits_t IPR5bits @ 0xF99;
# 8334
extern volatile unsigned char T1GCON @ 0xF9A;
asm("T1GCON equ 0F9Ah");
typedef union {
struct {
unsigned :3;
unsigned T1GGO_NOT_T1DONE :1;
};
struct {
unsigned T1GSS0 :1;
unsigned T1GSS1 :1;
unsigned T1GVAL :1;
unsigned T1GGO_nT1DONE :1;
unsigned T1GSPM :1;
unsigned T1GTM :1;
unsigned T1GPOL :1;
unsigned TMR1GE :1;
};
struct {
unsigned :3;
unsigned T1GGO :1;
};
struct {
unsigned :3;
unsigned NOT_T1DONE :1;
};
struct {
unsigned :3;
unsigned nT1DONE :1;
};
struct {
unsigned :3;
unsigned T1DONE :1;
};
} T1GCONbits_t;
extern volatile T1GCONbits_t T1GCONbits @ 0xF9A;
# 8440
extern volatile unsigned char OSCTUNE @ 0xF9B;
asm("OSCTUNE equ 0F9Bh");
typedef union {
struct {
unsigned TUN :6;
unsigned PLLEN :1;
unsigned INTSRC :1;
};
struct {
unsigned TUN0 :1;
unsigned TUN1 :1;
unsigned TUN2 :1;
unsigned TUN3 :1;
unsigned TUN4 :1;
unsigned TUN5 :1;
};
} OSCTUNEbits_t;
extern volatile OSCTUNEbits_t OSCTUNEbits @ 0xF9B;
# 8509
extern volatile unsigned char RCSTA2 @ 0xF9C;
asm("RCSTA2 equ 0F9Ch");
typedef union {
struct {
unsigned RX9D :1;
unsigned OERR :1;
unsigned FERR :1;
unsigned ADDEN :1;
unsigned CREN :1;
unsigned SREN :1;
unsigned RX9 :1;
unsigned SPEN :1;
};
struct {
unsigned RX9D2 :1;
unsigned OERR2 :1;
unsigned FERR2 :1;
unsigned ADDEN2 :1;
unsigned CREN2 :1;
unsigned SREN2 :1;
unsigned RX92 :1;
unsigned SPEN2 :1;
};
struct {
unsigned :6;
unsigned RC8_92 :1;
};
struct {
unsigned :6;
unsigned RC92 :1;
};
struct {
unsigned RCD82 :1;
};
} RCSTA2bits_t;
extern volatile RCSTA2bits_t RCSTA2bits @ 0xF9C;
# 8646
extern volatile unsigned char PIE1 @ 0xF9D;
asm("PIE1 equ 0F9Dh");
typedef union {
struct {
unsigned TMR1IE :1;
unsigned TMR2IE :1;
unsigned CCP1IE :1;
unsigned SSP1IE :1;
unsigned TX1IE :1;
unsigned RC1IE :1;
unsigned ADIE :1;
};
struct {
unsigned :3;
unsigned SSPIE :1;
unsigned TXIE :1;
unsigned RCIE :1;
};
} PIE1bits_t;
extern volatile PIE1bits_t PIE1bits @ 0xF9D;
# 8722
extern volatile unsigned char PIR1 @ 0xF9E;
asm("PIR1 equ 0F9Eh");
typedef union {
struct {
unsigned TMR1IF :1;
unsigned TMR2IF :1;
unsigned CCP1IF :1;
unsigned SSP1IF :1;
unsigned TX1IF :1;
unsigned RC1IF :1;
unsigned ADIF :1;
};
struct {
unsigned :3;
unsigned SSPIF :1;
unsigned TXIF :1;
unsigned RCIF :1;
};
} PIR1bits_t;
extern volatile PIR1bits_t PIR1bits @ 0xF9E;
# 8798
extern volatile unsigned char IPR1 @ 0xF9F;
asm("IPR1 equ 0F9Fh");
typedef union {
struct {
unsigned TMR1IP :1;
unsigned TMR2IP :1;
unsigned CCP1IP :1;
unsigned SSP1IP :1;
unsigned TX1IP :1;
unsigned RC1IP :1;
unsigned ADIP :1;
};
struct {
unsigned :3;
unsigned SSPIP :1;
unsigned TXIP :1;
unsigned RCIP :1;
};
} IPR1bits_t;
extern volatile IPR1bits_t IPR1bits @ 0xF9F;
# 8874
extern volatile unsigned char PIE2 @ 0xFA0;
asm("PIE2 equ 0FA0h");
typedef union {
struct {
unsigned CCP2IE :1;
unsigned TMR3IE :1;
unsigned LVDIE :1;
unsigned BCL1IE :1;
unsigned :1;
unsigned CM1IE :1;
unsigned CM2IE :1;
unsigned OSCFIE :1;
};
struct {
unsigned :2;
unsigned HLVDIE :1;
unsigned BCLIE :1;
};
struct {
unsigned :6;
unsigned CMIE :1;
};
} PIE2bits_t;
extern volatile PIE2bits_t PIE2bits @ 0xFA0;
# 8954
extern volatile unsigned char PIR2 @ 0xFA1;
asm("PIR2 equ 0FA1h");
typedef union {
struct {
unsigned CCP2IF :1;
unsigned TMR3IF :1;
unsigned LVDIF :1;
unsigned BCL1IF :1;
unsigned :1;
unsigned CM1IF :1;
unsigned CM2IF :1;
unsigned OSCFIF :1;
};
struct {
unsigned :2;
unsigned HLVDIF :1;
unsigned BCLIF :1;
};
struct {
unsigned :6;
unsigned CMIF :1;
};
} PIR2bits_t;
extern volatile PIR2bits_t PIR2bits @ 0xFA1;
# 9034
extern volatile unsigned char IPR2 @ 0xFA2;
asm("IPR2 equ 0FA2h");
typedef union {
struct {
unsigned CCP2IP :1;
unsigned TMR3IP :1;
unsigned LVDIP :1;
unsigned BCL1IP :1;
unsigned :1;
unsigned CM1IP :1;
unsigned CM2IP :1;
unsigned OSCFIP :1;
};
struct {
unsigned :2;
unsigned HLVDIP :1;
unsigned BCLIP :1;
};
struct {
unsigned :6;
unsigned CMIP :1;
};
} IPR2bits_t;
extern volatile IPR2bits_t IPR2bits @ 0xFA2;
# 9114
extern volatile unsigned char PIE3 @ 0xFA3;
asm("PIE3 equ 0FA3h");
typedef union {
struct {
unsigned RTCCIE :1;
unsigned TMR3GIE :1;
unsigned CTMUIE :1;
unsigned TMR4IE :1;
unsigned TX2IE :1;
unsigned RC2IE :1;
unsigned BCL2IE :1;
unsigned SSP2IE :1;
};
struct {
unsigned RXB0IE :1;
};
struct {
unsigned :1;
unsigned RXB1IE :1;
};
struct {
unsigned :1;
unsigned RXBNIE :1;
};
struct {
unsigned :2;
unsigned TXB0IE :1;
};
struct {
unsigned :3;
unsigned TXB1IE :1;
};
struct {
unsigned :4;
unsigned TXB2IE :1;
};
struct {
unsigned :4;
unsigned TXBNIE :1;
};
} PIE3bits_t;
extern volatile PIE3bits_t PIE3bits @ 0xFA3;
# 9237
extern volatile unsigned char PIR3 @ 0xFA4;
asm("PIR3 equ 0FA4h");
typedef union {
struct {
unsigned RTCCIF :1;
unsigned TMR3GIF :1;
unsigned CTMUIF :1;
unsigned TMR4IF :1;
unsigned TX2IF :1;
unsigned RC2IF :1;
unsigned BCL2IF :1;
unsigned SSP2IF :1;
};
struct {
unsigned :1;
unsigned RXBNIF :1;
};
struct {
unsigned :4;
unsigned TXBNIF :1;
};
} PIR3bits_t;
extern volatile PIR3bits_t PIR3bits @ 0xFA4;
# 9316
extern volatile unsigned char IPR3 @ 0xFA5;
asm("IPR3 equ 0FA5h");
typedef union {
struct {
unsigned RTCCIP :1;
unsigned TMR3GIP :1;
unsigned CTMUIP :1;
unsigned TMR4IP :1;
unsigned TX2IP :1;
unsigned RC2IP :1;
unsigned BCL2IP :1;
unsigned SSP2IP :1;
};
struct {
unsigned :1;
unsigned RXBNIP :1;
};
struct {
unsigned :4;
unsigned TXBNIP :1;
};
} IPR3bits_t;
extern volatile IPR3bits_t IPR3bits @ 0xFA5;
# 9395
extern volatile unsigned char EECON1 @ 0xFA6;
asm("EECON1 equ 0FA6h");
typedef union {
struct {
unsigned :1;
unsigned WR :1;
unsigned WREN :1;
unsigned WRERR :1;
unsigned FREE :1;
unsigned WPROG :1;
};
} EECON1bits_t;
extern volatile EECON1bits_t EECON1bits @ 0xFA6;
# 9439
extern volatile unsigned char EECON2 @ 0xFA7;
asm("EECON2 equ 0FA7h");
typedef union {
struct {
unsigned EECON2 :8;
};
} EECON2bits_t;
extern volatile EECON2bits_t EECON2bits @ 0xFA7;
# 9458
extern volatile unsigned char TXSTA2 @ 0xFA8;
asm("TXSTA2 equ 0FA8h");
typedef union {
struct {
unsigned TX9D :1;
unsigned TRMT :1;
unsigned BRGH :1;
unsigned SENDB :1;
unsigned SYNC :1;
unsigned TXEN :1;
unsigned TX9 :1;
unsigned CSRC :1;
};
struct {
unsigned TX9D2 :1;
unsigned TRMT2 :1;
unsigned BRGH2 :1;
unsigned SENDB2 :1;
unsigned SYNC2 :1;
unsigned TXEN2 :1;
unsigned TX92 :1;
unsigned CSRC2 :1;
};
struct {
unsigned :6;
unsigned TX8_92 :1;
};
struct {
unsigned TXD82 :1;
};
} TXSTA2bits_t;
extern volatile TXSTA2bits_t TXSTA2bits @ 0xFA8;
# 9586
extern volatile unsigned char TXREG2 @ 0xFA9;
asm("TXREG2 equ 0FA9h");
typedef union {
struct {
unsigned TXREG2 :8;
};
} TXREG2bits_t;
extern volatile TXREG2bits_t TXREG2bits @ 0xFA9;
# 9605
extern volatile unsigned char RCREG2 @ 0xFAA;
asm("RCREG2 equ 0FAAh");
typedef union {
struct {
unsigned RCREG2 :8;
};
} RCREG2bits_t;
extern volatile RCREG2bits_t RCREG2bits @ 0xFAA;
# 9624
extern volatile unsigned char SPBRG2 @ 0xFAB;
asm("SPBRG2 equ 0FABh");
typedef union {
struct {
unsigned SPBRG2 :8;
};
} SPBRG2bits_t;
extern volatile SPBRG2bits_t SPBRG2bits @ 0xFAB;
# 9643
extern volatile unsigned char RCSTA1 @ 0xFAC;
asm("RCSTA1 equ 0FACh");
extern volatile unsigned char RCSTA @ 0xFAC;
asm("RCSTA equ 0FACh");
typedef union {
struct {
unsigned RX9D :1;
unsigned OERR :1;
unsigned FERR :1;
unsigned ADDEN :1;
unsigned CREN :1;
unsigned SREN :1;
unsigned RX9 :1;
unsigned SPEN :1;
};
struct {
unsigned RCD8 :1;
unsigned :2;
unsigned ADEN :1;
unsigned :2;
unsigned RC9 :1;
};
struct {
unsigned :6;
unsigned NOT_RC8 :1;
};
struct {
unsigned :6;
unsigned nRC8 :1;
};
struct {
unsigned :6;
unsigned RC8_9 :1;
};
struct {
unsigned RX9D1 :1;
unsigned OERR1 :1;
unsigned FERR1 :1;
unsigned ADDEN1 :1;
unsigned CREN1 :1;
unsigned SREN1 :1;
unsigned RX91 :1;
unsigned SPEN1 :1;
};
struct {
unsigned :5;
unsigned SRENA :1;
};
} RCSTA1bits_t;
extern volatile RCSTA1bits_t RCSTA1bits @ 0xFAC;
# 9816
typedef union {
struct {
unsigned RX9D :1;
unsigned OERR :1;
unsigned FERR :1;
unsigned ADDEN :1;
unsigned CREN :1;
unsigned SREN :1;
unsigned RX9 :1;
unsigned SPEN :1;
};
struct {
unsigned RCD8 :1;
unsigned :2;
unsigned ADEN :1;
unsigned :2;
unsigned RC9 :1;
};
struct {
unsigned :6;
unsigned NOT_RC8 :1;
};
struct {
unsigned :6;
unsigned nRC8 :1;
};
struct {
unsigned :6;
unsigned RC8_9 :1;
};
struct {
unsigned RX9D1 :1;
unsigned OERR1 :1;
unsigned FERR1 :1;
unsigned ADDEN1 :1;
unsigned CREN1 :1;
unsigned SREN1 :1;
unsigned RX91 :1;
unsigned SPEN1 :1;
};
struct {
unsigned :5;
unsigned SRENA :1;
};
} RCSTAbits_t;
extern volatile RCSTAbits_t RCSTAbits @ 0xFAC;
# 9980
extern volatile unsigned char TXSTA1 @ 0xFAD;
asm("TXSTA1 equ 0FADh");
extern volatile unsigned char TXSTA @ 0xFAD;
asm("TXSTA equ 0FADh");
typedef union {
struct {
unsigned TX9D :1;
unsigned TRMT :1;
unsigned BRGH :1;
unsigned SENDB :1;
unsigned SYNC :1;
unsigned TXEN :1;
unsigned TX9 :1;
unsigned CSRC :1;
};
struct {
unsigned TXD8 :1;
unsigned :5;
unsigned TX8_9 :1;
};
struct {
unsigned :6;
unsigned NOT_TX8 :1;
};
struct {
unsigned :6;
unsigned nTX8 :1;
};
struct {
unsigned TX9D1 :1;
unsigned TRMT1 :1;
unsigned BRGH1 :1;
unsigned SENDB1 :1;
unsigned SYNC1 :1;
unsigned TXEN1 :1;
unsigned TX91 :1;
unsigned CSRC1 :1;
};
} TXSTA1bits_t;
extern volatile TXSTA1bits_t TXSTA1bits @ 0xFAD;
# 10128
typedef union {
struct {
unsigned TX9D :1;
unsigned TRMT :1;
unsigned BRGH :1;
unsigned SENDB :1;
unsigned SYNC :1;
unsigned TXEN :1;
unsigned TX9 :1;
unsigned CSRC :1;
};
struct {
unsigned TXD8 :1;
unsigned :5;
unsigned TX8_9 :1;
};
struct {
unsigned :6;
unsigned NOT_TX8 :1;
};
struct {
unsigned :6;
unsigned nTX8 :1;
};
struct {
unsigned TX9D1 :1;
unsigned TRMT1 :1;
unsigned BRGH1 :1;
unsigned SENDB1 :1;
unsigned SYNC1 :1;
unsigned TXEN1 :1;
unsigned TX91 :1;
unsigned CSRC1 :1;
};
} TXSTAbits_t;
extern volatile TXSTAbits_t TXSTAbits @ 0xFAD;
# 10267
extern volatile unsigned char TXREG1 @ 0xFAE;
asm("TXREG1 equ 0FAEh");
extern volatile unsigned char TXREG @ 0xFAE;
asm("TXREG equ 0FAEh");
typedef union {
struct {
unsigned TXREG1 :8;
};
} TXREG1bits_t;
extern volatile TXREG1bits_t TXREG1bits @ 0xFAE;
# 10290
typedef union {
struct {
unsigned TXREG1 :8;
};
} TXREGbits_t;
extern volatile TXREGbits_t TXREGbits @ 0xFAE;
# 10304
extern volatile unsigned char RCREG1 @ 0xFAF;
asm("RCREG1 equ 0FAFh");
extern volatile unsigned char RCREG @ 0xFAF;
asm("RCREG equ 0FAFh");
typedef union {
struct {
unsigned RCREG1 :8;
};
} RCREG1bits_t;
extern volatile RCREG1bits_t RCREG1bits @ 0xFAF;
# 10327
typedef union {
struct {
unsigned RCREG1 :8;
};
} RCREGbits_t;
extern volatile RCREGbits_t RCREGbits @ 0xFAF;
# 10341
extern volatile unsigned char SPBRG1 @ 0xFB0;
asm("SPBRG1 equ 0FB0h");
extern volatile unsigned char SPBRG @ 0xFB0;
asm("SPBRG equ 0FB0h");
typedef union {
struct {
unsigned SPBRG1 :8;
};
} SPBRG1bits_t;
extern volatile SPBRG1bits_t SPBRG1bits @ 0xFB0;
# 10364
typedef union {
struct {
unsigned SPBRG1 :8;
};
} SPBRGbits_t;
extern volatile SPBRGbits_t SPBRGbits @ 0xFB0;
# 10378
extern volatile unsigned char CTMUICON @ 0xFB1;
asm("CTMUICON equ 0FB1h");
typedef union {
struct {
unsigned IRNG :2;
unsigned ITRIM :6;
};
struct {
unsigned IRNG0 :1;
unsigned IRNG1 :1;
unsigned ITRIM0 :1;
unsigned ITRIM1 :1;
unsigned ITRIM2 :1;
unsigned ITRIM3 :1;
unsigned ITRIM4 :1;
unsigned ITRIM5 :1;
};
} CTMUICONbits_t;
extern volatile CTMUICONbits_t CTMUICONbits @ 0xFB1;
# 10453
extern volatile unsigned char CTMUCONL @ 0xFB2;
asm("CTMUCONL equ 0FB2h");
typedef union {
struct {
unsigned EDG1STAT :1;
unsigned EDG2STAT :1;
unsigned EDG1SEL0 :1;
unsigned EDG1SEL1 :1;
unsigned EDG1POL :1;
unsigned EDG2SEL0 :1;
unsigned EDG2SEL1 :1;
unsigned EDG2POL :1;
};
} CTMUCONLbits_t;
extern volatile CTMUCONLbits_t CTMUCONLbits @ 0xFB2;
# 10514
extern volatile unsigned char CTMUCONH @ 0xFB3;
asm("CTMUCONH equ 0FB3h");
typedef union {
struct {
unsigned CTTRIG :1;
unsigned IDISSEN :1;
unsigned EDGSEQEN :1;
unsigned EDGEN :1;
unsigned TGEN :1;
unsigned CTMUSIDL :1;
unsigned :1;
unsigned CTMUEN :1;
};
} CTMUCONHbits_t;
extern volatile CTMUCONHbits_t CTMUCONHbits @ 0xFB3;
# 10570
extern volatile unsigned char CCP2CON @ 0xFB4;
asm("CCP2CON equ 0FB4h");
extern volatile unsigned char ECCP2CON @ 0xFB4;
asm("ECCP2CON equ 0FB4h");
typedef union {
struct {
unsigned CCP2M :4;
unsigned DC2B :2;
unsigned P2M :2;
};
struct {
unsigned CCP2M0 :1;
unsigned CCP2M1 :1;
unsigned CCP2M2 :1;
unsigned CCP2M3 :1;
unsigned DC2B0 :1;
unsigned DC2B1 :1;
unsigned P2M0 :1;
unsigned P2M1 :1;
};
struct {
unsigned :4;
unsigned CCP2Y :1;
unsigned CCP2X :1;
};
} CCP2CONbits_t;
extern volatile CCP2CONbits_t CCP2CONbits @ 0xFB4;
# 10670
typedef union {
struct {
unsigned CCP2M :4;
unsigned DC2B :2;
unsigned P2M :2;
};
struct {
unsigned CCP2M0 :1;
unsigned CCP2M1 :1;
unsigned CCP2M2 :1;
unsigned CCP2M3 :1;
unsigned DC2B0 :1;
unsigned DC2B1 :1;
unsigned P2M0 :1;
unsigned P2M1 :1;
};
struct {
unsigned :4;
unsigned CCP2Y :1;
unsigned CCP2X :1;
};
} ECCP2CONbits_t;
extern volatile ECCP2CONbits_t ECCP2CONbits @ 0xFB4;
# 10761
extern volatile unsigned short CCPR2 @ 0xFB5;
asm("CCPR2 equ 0FB5h");
extern volatile unsigned char CCPR2L @ 0xFB5;
asm("CCPR2L equ 0FB5h");
typedef union {
struct {
unsigned CCPR2L :8;
};
} CCPR2Lbits_t;
extern volatile CCPR2Lbits_t CCPR2Lbits @ 0xFB5;
# 10786
extern volatile unsigned char CCPR2H @ 0xFB6;
asm("CCPR2H equ 0FB6h");
typedef union {
struct {
unsigned CCPR2H :8;
};
} CCPR2Hbits_t;
extern volatile CCPR2Hbits_t CCPR2Hbits @ 0xFB6;
# 10805
extern volatile unsigned char ECCP2DEL @ 0xFB7;
asm("ECCP2DEL equ 0FB7h");
extern volatile unsigned char PWM2CON @ 0xFB7;
asm("PWM2CON equ 0FB7h");
typedef union {
struct {
unsigned P2DC :7;
unsigned P2RSEN :1;
};
struct {
unsigned P2DC0 :1;
unsigned P2DC1 :1;
unsigned P2DC2 :1;
unsigned P2DC3 :1;
unsigned P2DC4 :1;
unsigned P2DC5 :1;
unsigned P2DC6 :1;
};
} ECCP2DELbits_t;
extern volatile ECCP2DELbits_t ECCP2DELbits @ 0xFB7;
# 10878
typedef union {
struct {
unsigned P2DC :7;
unsigned P2RSEN :1;
};
struct {
unsigned P2DC0 :1;
unsigned P2DC1 :1;
unsigned P2DC2 :1;
unsigned P2DC3 :1;
unsigned P2DC4 :1;
unsigned P2DC5 :1;
unsigned P2DC6 :1;
};
} PWM2CONbits_t;
extern volatile PWM2CONbits_t PWM2CONbits @ 0xFB7;
# 10942
extern volatile unsigned char ECCP2AS @ 0xFB8;
asm("ECCP2AS equ 0FB8h");
typedef union {
struct {
unsigned PSS2BD :2;
unsigned PSS2AC :2;
unsigned ECCP2AS :3;
unsigned ECCP2ASE :1;
};
struct {
unsigned PSS2BD0 :1;
unsigned PSS2BD1 :1;
unsigned PSS2AC0 :1;
unsigned PSS2AC1 :1;
unsigned ECCP2AS0 :1;
unsigned ECCP2AS1 :1;
unsigned ECCP2AS2 :1;
};
} ECCP2ASbits_t;
extern volatile ECCP2ASbits_t ECCP2ASbits @ 0xFB8;
# 11023
extern volatile unsigned char PSTR2CON @ 0xFB9;
asm("PSTR2CON equ 0FB9h");
typedef union {
struct {
unsigned STRA :1;
unsigned STRB :1;
unsigned STRC :1;
unsigned STRD :1;
unsigned STRSYNC :1;
unsigned :1;
unsigned CMPL0 :1;
unsigned CMPL1 :1;
};
struct {
unsigned P2DC0 :1;
unsigned P2DC1 :1;
unsigned P2DC2 :1;
unsigned P2DC3 :1;
unsigned P2DC4 :1;
unsigned P2DC5 :1;
unsigned P2DC6 :1;
};
struct {
unsigned :6;
unsigned CMPL02 :1;
};
struct {
unsigned :7;
unsigned CMPL12 :1;
};
struct {
unsigned P2DC02 :1;
};
struct {
unsigned P2DC0CON :1;
};
struct {
unsigned :1;
unsigned P2DC12 :1;
};
struct {
unsigned :1;
unsigned P2DC1CON :1;
};
struct {
unsigned :2;
unsigned P2DC22 :1;
};
struct {
unsigned :2;
unsigned P2DC2CON :1;
};
struct {
unsigned :3;
unsigned P2DC32 :1;
};
struct {
unsigned :3;
unsigned P2DC3CON :1;
};
struct {
unsigned :4;
unsigned P2DC42 :1;
};
struct {
unsigned :4;
unsigned P2DC4CON :1;
};
struct {
unsigned :5;
unsigned P2DC52 :1;
};
struct {
unsigned :5;
unsigned P2DC5CON :1;
};
struct {
unsigned :6;
unsigned P2DC62 :1;
};
struct {
unsigned :6;
unsigned P2DC6CON :1;
};
struct {
unsigned STRA2 :1;
};
struct {
unsigned :1;
unsigned STRB2 :1;
};
struct {
unsigned :2;
unsigned STRC2 :1;
};
struct {
unsigned :3;
unsigned STRD2 :1;
};
struct {
unsigned :4;
unsigned STRSYNC2 :1;
};
} PSTR2CONbits_t;
extern volatile PSTR2CONbits_t PSTR2CONbits @ 0xFB9;
# 11309
extern volatile unsigned char CCP1CON @ 0xFBA;
asm("CCP1CON equ 0FBAh");
extern volatile unsigned char ECCP1CON @ 0xFBA;
asm("ECCP1CON equ 0FBAh");
typedef union {
struct {
unsigned CCP1M :4;
unsigned DC1B :2;
unsigned P1M :2;
};
struct {
unsigned CCP1M0 :1;
unsigned CCP1M1 :1;
unsigned CCP1M2 :1;
unsigned CCP1M3 :1;
unsigned DC1B0 :1;
unsigned DC1B1 :1;
unsigned P1M0 :1;
unsigned P1M1 :1;
};
struct {
unsigned :4;
unsigned CCP1Y :1;
unsigned CCP1X :1;
};
} CCP1CONbits_t;
extern volatile CCP1CONbits_t CCP1CONbits @ 0xFBA;
# 11409
typedef union {
struct {
unsigned CCP1M :4;
unsigned DC1B :2;
unsigned P1M :2;
};
struct {
unsigned CCP1M0 :1;
unsigned CCP1M1 :1;
unsigned CCP1M2 :1;
unsigned CCP1M3 :1;
unsigned DC1B0 :1;
unsigned DC1B1 :1;
unsigned P1M0 :1;
unsigned P1M1 :1;
};
struct {
unsigned :4;
unsigned CCP1Y :1;
unsigned CCP1X :1;
};
} ECCP1CONbits_t;
extern volatile ECCP1CONbits_t ECCP1CONbits @ 0xFBA;
# 11500
extern volatile unsigned short CCPR1 @ 0xFBB;
asm("CCPR1 equ 0FBBh");
extern volatile unsigned char CCPR1L @ 0xFBB;
asm("CCPR1L equ 0FBBh");
typedef union {
struct {
unsigned CCPR1L :8;
};
} CCPR1Lbits_t;
extern volatile CCPR1Lbits_t CCPR1Lbits @ 0xFBB;
# 11525
extern volatile unsigned char CCPR1H @ 0xFBC;
asm("CCPR1H equ 0FBCh");
typedef union {
struct {
unsigned CCPR1H :8;
};
} CCPR1Hbits_t;
extern volatile CCPR1Hbits_t CCPR1Hbits @ 0xFBC;
# 11544
extern volatile unsigned char ECCP1DEL @ 0xFBD;
asm("ECCP1DEL equ 0FBDh");
extern volatile unsigned char PWM1CON @ 0xFBD;
asm("PWM1CON equ 0FBDh");
typedef union {
struct {
unsigned P1DC :7;
unsigned P1RSEN :1;
};
struct {
unsigned P1DC0 :1;
unsigned P1DC1 :1;
unsigned P1DC2 :1;
unsigned P1DC3 :1;
unsigned P1DC4 :1;
unsigned P1DC5 :1;
unsigned P1DC6 :1;
};
} ECCP1DELbits_t;
extern volatile ECCP1DELbits_t ECCP1DELbits @ 0xFBD;
# 11617
typedef union {
struct {
unsigned P1DC :7;
unsigned P1RSEN :1;
};
struct {
unsigned P1DC0 :1;
unsigned P1DC1 :1;
unsigned P1DC2 :1;
unsigned P1DC3 :1;
unsigned P1DC4 :1;
unsigned P1DC5 :1;
unsigned P1DC6 :1;
};
} PWM1CONbits_t;
extern volatile PWM1CONbits_t PWM1CONbits @ 0xFBD;
# 11681
extern volatile unsigned char ECCP1AS @ 0xFBE;
asm("ECCP1AS equ 0FBEh");
typedef union {
struct {
unsigned PSS1BD :2;
unsigned PSS1AC :2;
unsigned ECCP1AS :3;
unsigned ECCP1ASE :1;
};
struct {
unsigned PSS1BD0 :1;
unsigned PSS1BD1 :1;
unsigned PSS1AC0 :1;
unsigned PSS1AC1 :1;
unsigned ECCP1AS0 :1;
unsigned ECCP1AS1 :1;
unsigned ECCP1AS2 :1;
};
} ECCP1ASbits_t;
extern volatile ECCP1ASbits_t ECCP1ASbits @ 0xFBE;
# 11762
extern volatile unsigned char PSTR1CON @ 0xFBF;
asm("PSTR1CON equ 0FBFh");
typedef union {
struct {
unsigned STRA :1;
unsigned STRB :1;
unsigned STRC :1;
unsigned STRD :1;
unsigned STRSYNC :1;
unsigned :1;
unsigned CMPL0 :1;
unsigned CMPL1 :1;
};
} PSTR1CONbits_t;
extern volatile PSTR1CONbits_t PSTR1CONbits @ 0xFBF;
# 11818
extern volatile unsigned char WDTCON @ 0xFC0;
asm("WDTCON equ 0FC0h");
typedef union {
struct {
unsigned SWDTEN :1;
unsigned ULPSINK :1;
unsigned ULPEN :1;
unsigned DS :1;
unsigned VBGOE :1;
unsigned ULPLVL :1;
unsigned LVDSTAT :1;
unsigned REGSLP :1;
};
struct {
unsigned SWDTE :1;
};
} WDTCONbits_t;
extern volatile WDTCONbits_t WDTCONbits @ 0xFC0;
# 11887
extern volatile unsigned char ADCON1 @ 0xFC1;
asm("ADCON1 equ 0FC1h");
typedef union {
struct {
unsigned ADCS :3;
unsigned ACQT :3;
unsigned ADCAL :1;
unsigned ADFM :1;
};
struct {
unsigned ADCS0 :1;
unsigned ADCS1 :1;
unsigned ADCS2 :1;
unsigned ACQT0 :1;
unsigned ACQT1 :1;
unsigned ACQT2 :1;
};
struct {
unsigned :3;
unsigned CHSN3 :1;
};
struct {
unsigned :4;
unsigned VCFG01 :1;
};
struct {
unsigned :5;
unsigned VCFG11 :1;
};
} ADCON1bits_t;
extern volatile ADCON1bits_t ADCON1bits @ 0xFC1;
# 11989
extern volatile unsigned char ADCON0 @ 0xFC2;
asm("ADCON0 equ 0FC2h");
typedef union {
struct {
unsigned :1;
unsigned GO_NOT_DONE :1;
};
struct {
unsigned ADON :1;
unsigned GO_nDONE :1;
unsigned CHS :4;
unsigned VCFG :2;
};
struct {
unsigned :1;
unsigned GO_DONE :1;
unsigned CHS0 :1;
unsigned CHS1 :1;
unsigned CHS2 :1;
unsigned CHS3 :1;
unsigned VCFG0 :1;
unsigned VCFG1 :1;
};
struct {
unsigned :1;
unsigned DONE :1;
};
struct {
unsigned :1;
unsigned GO :1;
};
struct {
unsigned :1;
unsigned NOT_DONE :1;
};
struct {
unsigned :1;
unsigned nDONE :1;
};
struct {
unsigned :7;
unsigned ADCAL :1;
};
struct {
unsigned :1;
unsigned GODONE :1;
};
} ADCON0bits_t;
extern volatile ADCON0bits_t ADCON0bits @ 0xFC2;
# 12134
extern volatile unsigned short ADRES @ 0xFC3;
asm("ADRES equ 0FC3h");
extern volatile unsigned char ADRESL @ 0xFC3;
asm("ADRESL equ 0FC3h");
typedef union {
struct {
unsigned ADRESL :8;
};
} ADRESLbits_t;
extern volatile ADRESLbits_t ADRESLbits @ 0xFC3;
# 12159
extern volatile unsigned char ADRESH @ 0xFC4;
asm("ADRESH equ 0FC4h");
typedef union {
struct {
unsigned ADRESH :8;
};
} ADRESHbits_t;
extern volatile ADRESHbits_t ADRESHbits @ 0xFC4;
# 12178
extern volatile unsigned char SSP1CON2 @ 0xFC5;
asm("SSP1CON2 equ 0FC5h");
extern volatile unsigned char SSPCON2 @ 0xFC5;
asm("SSPCON2 equ 0FC5h");
typedef union {
struct {
unsigned SEN :1;
unsigned RSEN :1;
unsigned PEN :1;
unsigned RCEN :1;
unsigned ACKEN :1;
unsigned ACKDT :1;
unsigned ACKSTAT :1;
unsigned GCEN :1;
};
struct {
unsigned :1;
unsigned ADMSK1 :1;
unsigned ADMSK2 :1;
unsigned ADMSK3 :1;
unsigned ADMSK4 :1;
unsigned ADMSK5 :1;
};
struct {
unsigned :5;
unsigned ACKDT1 :1;
};
struct {
unsigned :4;
unsigned ACKEN1 :1;
};
struct {
unsigned :6;
unsigned ACKSTAT1 :1;
};
struct {
unsigned :1;
unsigned ADMSK11 :1;
};
struct {
unsigned :2;
unsigned ADMSK21 :1;
};
struct {
unsigned :3;
unsigned ADMSK31 :1;
};
struct {
unsigned :4;
unsigned ADMSK41 :1;
};
struct {
unsigned :5;
unsigned ADMSK51 :1;
};
struct {
unsigned :7;
unsigned GCEN1 :1;
};
struct {
unsigned :2;
unsigned PEN1 :1;
};
struct {
unsigned :3;
unsigned RCEN1 :1;
};
struct {
unsigned :1;
unsigned RSEN1 :1;
};
struct {
unsigned SEN1 :1;
};
} SSP1CON2bits_t;
extern volatile SSP1CON2bits_t SSP1CON2bits @ 0xFC5;
# 12392
typedef union {
struct {
unsigned SEN :1;
unsigned RSEN :1;
unsigned PEN :1;
unsigned RCEN :1;
unsigned ACKEN :1;
unsigned ACKDT :1;
unsigned ACKSTAT :1;
unsigned GCEN :1;
};
struct {
unsigned :1;
unsigned ADMSK1 :1;
unsigned ADMSK2 :1;
unsigned ADMSK3 :1;
unsigned ADMSK4 :1;
unsigned ADMSK5 :1;
};
struct {
unsigned :5;
unsigned ACKDT1 :1;
};
struct {
unsigned :4;
unsigned ACKEN1 :1;
};
struct {
unsigned :6;
unsigned ACKSTAT1 :1;
};
struct {
unsigned :1;
unsigned ADMSK11 :1;
};
struct {
unsigned :2;
unsigned ADMSK21 :1;
};
struct {
unsigned :3;
unsigned ADMSK31 :1;
};
struct {
unsigned :4;
unsigned ADMSK41 :1;
};
struct {
unsigned :5;
unsigned ADMSK51 :1;
};
struct {
unsigned :7;
unsigned GCEN1 :1;
};
struct {
unsigned :2;
unsigned PEN1 :1;
};
struct {
unsigned :3;
unsigned RCEN1 :1;
};
struct {
unsigned :1;
unsigned RSEN1 :1;
};
struct {
unsigned SEN1 :1;
};
} SSPCON2bits_t;
extern volatile SSPCON2bits_t SSPCON2bits @ 0xFC5;
# 12597
extern volatile unsigned char SSP1CON1 @ 0xFC6;
asm("SSP1CON1 equ 0FC6h");
extern volatile unsigned char SSPCON1 @ 0xFC6;
asm("SSPCON1 equ 0FC6h");
typedef union {
struct {
unsigned SSPM :4;
unsigned CKP :1;
unsigned SSPEN :1;
unsigned SSPOV :1;
unsigned WCOL :1;
};
struct {
unsigned SSPM0 :1;
unsigned SSPM1 :1;
unsigned SSPM2 :1;
unsigned SSPM3 :1;
};
struct {
unsigned :4;
unsigned CKP1 :1;
};
struct {
unsigned :5;
unsigned SSPEN1 :1;
};
struct {
unsigned SSPM01 :1;
};
struct {
unsigned :1;
unsigned SSPM11 :1;
};
struct {
unsigned :2;
unsigned SSPM21 :1;
};
struct {
unsigned :3;
unsigned SSPM31 :1;
};
struct {
unsigned :6;
unsigned SSPOV1 :1;
};
struct {
unsigned :7;
unsigned WCOL1 :1;
};
} SSP1CON1bits_t;
extern volatile SSP1CON1bits_t SSP1CON1bits @ 0xFC6;
# 12741
typedef union {
struct {
unsigned SSPM :4;
unsigned CKP :1;
unsigned SSPEN :1;
unsigned SSPOV :1;
unsigned WCOL :1;
};
struct {
unsigned SSPM0 :1;
unsigned SSPM1 :1;
unsigned SSPM2 :1;
unsigned SSPM3 :1;
};
struct {
unsigned :4;
unsigned CKP1 :1;
};
struct {
unsigned :5;
unsigned SSPEN1 :1;
};
struct {
unsigned SSPM01 :1;
};
struct {
unsigned :1;
unsigned SSPM11 :1;
};
struct {
unsigned :2;
unsigned SSPM21 :1;
};
struct {
unsigned :3;
unsigned SSPM31 :1;
};
struct {
unsigned :6;
unsigned SSPOV1 :1;
};
struct {
unsigned :7;
unsigned WCOL1 :1;
};
} SSPCON1bits_t;
extern volatile SSPCON1bits_t SSPCON1bits @ 0xFC6;
# 12876
extern volatile unsigned char SSP1STAT @ 0xFC7;
asm("SSP1STAT equ 0FC7h");
extern volatile unsigned char SSPSTAT @ 0xFC7;
asm("SSPSTAT equ 0FC7h");
typedef union {
struct {
unsigned :2;
unsigned R_NOT_W :1;
};
struct {
unsigned :5;
unsigned D_NOT_A :1;
};
struct {
unsigned BF :1;
unsigned UA :1;
unsigned R_nW :1;
unsigned S :1;
unsigned P :1;
unsigned D_nA :1;
unsigned CKE :1;
unsigned SMP :1;
};
struct {
unsigned :2;
unsigned R :1;
unsigned :2;
unsigned D :1;
};
struct {
unsigned :2;
unsigned R_W :1;
unsigned :2;
unsigned D_A :1;
};
struct {
unsigned :2;
unsigned nW :1;
unsigned :2;
unsigned nA :1;
};
struct {
unsigned :2;
unsigned NOT_WRITE :1;
};
struct {
unsigned :5;
unsigned NOT_ADDRESS :1;
};
struct {
unsigned :2;
unsigned nWRITE :1;
unsigned :2;
unsigned nADDRESS :1;
};
struct {
unsigned :2;
unsigned READ_WRITE :1;
unsigned :2;
unsigned DATA_ADDRESS :1;
};
struct {
unsigned :2;
unsigned I2C_READ :1;
unsigned I2C_START :1;
unsigned I2C_STOP :1;
unsigned I2C_DAT :1;
};
struct {
unsigned BF1 :1;
};
struct {
unsigned :6;
unsigned CKE1 :1;
};
struct {
unsigned :5;
unsigned DA :1;
};
struct {
unsigned :5;
unsigned DA1 :1;
};
struct {
unsigned :2;
unsigned RW :1;
};
struct {
unsigned :2;
unsigned RW1 :1;
};
struct {
unsigned :7;
unsigned SMP1 :1;
};
struct {
unsigned :3;
unsigned START :1;
};
struct {
unsigned :3;
unsigned START1 :1;
};
struct {
unsigned :4;
unsigned STOP :1;
};
struct {
unsigned :4;
unsigned STOP1 :1;
};
struct {
unsigned :1;
unsigned UA1 :1;
};
struct {
unsigned :2;
unsigned NOT_W :1;
};
struct {
unsigned :5;
unsigned NOT_A :1;
};
} SSP1STATbits_t;
extern volatile SSP1STATbits_t SSP1STATbits @ 0xFC7;
# 13209
typedef union {
struct {
unsigned :2;
unsigned R_NOT_W :1;
};
struct {
unsigned :5;
unsigned D_NOT_A :1;
};
struct {
unsigned BF :1;
unsigned UA :1;
unsigned R_nW :1;
unsigned S :1;
unsigned P :1;
unsigned D_nA :1;
unsigned CKE :1;
unsigned SMP :1;
};
struct {
unsigned :2;
unsigned R :1;
unsigned :2;
unsigned D :1;
};
struct {
unsigned :2;
unsigned R_W :1;
unsigned :2;
unsigned D_A :1;
};
struct {
unsigned :2;
unsigned nW :1;
unsigned :2;
unsigned nA :1;
};
struct {
unsigned :2;
unsigned NOT_WRITE :1;
};
struct {
unsigned :5;
unsigned NOT_ADDRESS :1;
};
struct {
unsigned :2;
unsigned nWRITE :1;
unsigned :2;
unsigned nADDRESS :1;
};
struct {
unsigned :2;
unsigned READ_WRITE :1;
unsigned :2;
unsigned DATA_ADDRESS :1;
};
struct {
unsigned :2;
unsigned I2C_READ :1;
unsigned I2C_START :1;
unsigned I2C_STOP :1;
unsigned I2C_DAT :1;
};
struct {
unsigned BF1 :1;
};
struct {
unsigned :6;
unsigned CKE1 :1;
};
struct {
unsigned :5;
unsigned DA :1;
};
struct {
unsigned :5;
unsigned DA1 :1;
};
struct {
unsigned :2;
unsigned RW :1;
};
struct {
unsigned :2;
unsigned RW1 :1;
};
struct {
unsigned :7;
unsigned SMP1 :1;
};
struct {
unsigned :3;
unsigned START :1;
};
struct {
unsigned :3;
unsigned START1 :1;
};
struct {
unsigned :4;
unsigned STOP :1;
};
struct {
unsigned :4;
unsigned STOP1 :1;
};
struct {
unsigned :1;
unsigned UA1 :1;
};
struct {
unsigned :2;
unsigned NOT_W :1;
};
struct {
unsigned :5;
unsigned NOT_A :1;
};
} SSPSTATbits_t;
extern volatile SSPSTATbits_t SSPSTATbits @ 0xFC7;
# 13533
extern volatile unsigned char SSP1ADD @ 0xFC8;
asm("SSP1ADD equ 0FC8h");
extern volatile unsigned char SSPADD @ 0xFC8;
asm("SSPADD equ 0FC8h");
typedef union {
struct {
unsigned SSPADD :8;
};
struct {
unsigned MSK0 :1;
};
struct {
unsigned MSK01 :1;
};
struct {
unsigned :1;
unsigned MSK1 :1;
};
struct {
unsigned :1;
unsigned MSK11 :1;
};
struct {
unsigned :2;
unsigned MSK2 :1;
};
struct {
unsigned :2;
unsigned MSK21 :1;
};
struct {
unsigned :3;
unsigned MSK3 :1;
};
struct {
unsigned :3;
unsigned MSK31 :1;
};
struct {
unsigned :4;
unsigned MSK4 :1;
};
struct {
unsigned :4;
unsigned MSK41 :1;
};
struct {
unsigned :5;
unsigned MSK5 :1;
};
struct {
unsigned :5;
unsigned MSK51 :1;
};
struct {
unsigned :6;
unsigned MSK6 :1;
};
struct {
unsigned :6;
unsigned MSK61 :1;
};
struct {
unsigned :7;
unsigned MSK7 :1;
};
struct {
unsigned :7;
unsigned MSK71 :1;
};
} SSP1ADDbits_t;
extern volatile SSP1ADDbits_t SSP1ADDbits @ 0xFC8;
# 13698
typedef union {
struct {
unsigned SSPADD :8;
};
struct {
unsigned MSK0 :1;
};
struct {
unsigned MSK01 :1;
};
struct {
unsigned :1;
unsigned MSK1 :1;
};
struct {
unsigned :1;
unsigned MSK11 :1;
};
struct {
unsigned :2;
unsigned MSK2 :1;
};
struct {
unsigned :2;
unsigned MSK21 :1;
};
struct {
unsigned :3;
unsigned MSK3 :1;
};
struct {
unsigned :3;
unsigned MSK31 :1;
};
struct {
unsigned :4;
unsigned MSK4 :1;
};
struct {
unsigned :4;
unsigned MSK41 :1;
};
struct {
unsigned :5;
unsigned MSK5 :1;
};
struct {
unsigned :5;
unsigned MSK51 :1;
};
struct {
unsigned :6;
unsigned MSK6 :1;
};
struct {
unsigned :6;
unsigned MSK61 :1;
};
struct {
unsigned :7;
unsigned MSK7 :1;
};
struct {
unsigned :7;
unsigned MSK71 :1;
};
} SSPADDbits_t;
extern volatile SSPADDbits_t SSPADDbits @ 0xFC8;
# 13854
extern volatile unsigned char SSP1MSK @ 0xFC8;
asm("SSP1MSK equ 0FC8h");
typedef union {
struct {
unsigned MSK0 :1;
unsigned MSK1 :1;
unsigned MSK2 :1;
unsigned MSK3 :1;
unsigned MSK4 :1;
unsigned MSK5 :1;
unsigned MSK6 :1;
unsigned MSK7 :1;
};
} SSP1MSKbits_t;
extern volatile SSP1MSKbits_t SSP1MSKbits @ 0xFC8;
# 13915
extern volatile unsigned char SSP1BUF @ 0xFC9;
asm("SSP1BUF equ 0FC9h");
extern volatile unsigned char SSPBUF @ 0xFC9;
asm("SSPBUF equ 0FC9h");
typedef union {
struct {
unsigned SSPBUF :8;
};
} SSP1BUFbits_t;
extern volatile SSP1BUFbits_t SSP1BUFbits @ 0xFC9;
# 13938
typedef union {
struct {
unsigned SSPBUF :8;
};
} SSPBUFbits_t;
extern volatile SSPBUFbits_t SSPBUFbits @ 0xFC9;
# 13952
extern volatile unsigned char T2CON @ 0xFCA;
asm("T2CON equ 0FCAh");
typedef union {
struct {
unsigned T2CKPS :2;
unsigned TMR2ON :1;
unsigned T2OUTPS :4;
};
struct {
unsigned T2CKPS0 :1;
unsigned T2CKPS1 :1;
unsigned :1;
unsigned T2OUTPS0 :1;
unsigned T2OUTPS1 :1;
unsigned T2OUTPS2 :1;
unsigned T2OUTPS3 :1;
};
} T2CONbits_t;
extern volatile T2CONbits_t T2CONbits @ 0xFCA;
# 14022
extern volatile unsigned char PR2 @ 0xFCB;
asm("PR2 equ 0FCBh");
extern volatile unsigned char MEMCON @ 0xFCB;
asm("MEMCON equ 0FCBh");
typedef union {
struct {
unsigned PR2 :8;
};
} PR2bits_t;
extern volatile PR2bits_t PR2bits @ 0xFCB;
# 14045
typedef union {
struct {
unsigned PR2 :8;
};
} MEMCONbits_t;
extern volatile MEMCONbits_t MEMCONbits @ 0xFCB;
# 14059
extern volatile unsigned char TMR2 @ 0xFCC;
asm("TMR2 equ 0FCCh");
typedef union {
struct {
unsigned TMR2 :8;
};
} TMR2bits_t;
extern volatile TMR2bits_t TMR2bits @ 0xFCC;
# 14078
extern volatile unsigned char T1CON @ 0xFCD;
asm("T1CON equ 0FCDh");
typedef union {
struct {
unsigned :2;
unsigned NOT_T1SYNC :1;
};
struct {
unsigned TMR1ON :1;
unsigned RD16 :1;
unsigned nT1SYNC :1;
unsigned T1OSCEN :1;
unsigned T1CKPS :2;
unsigned TMR1CS :2;
};
struct {
unsigned :4;
unsigned T1CKPS0 :1;
unsigned T1CKPS1 :1;
unsigned TMR1CS0 :1;
unsigned TMR1CS1 :1;
};
struct {
unsigned :3;
unsigned SOSCEN :1;
};
struct {
unsigned :7;
unsigned T1RD16 :1;
};
} T1CONbits_t;
extern volatile T1CONbits_t T1CONbits @ 0xFCD;
# 14181
extern volatile unsigned short TMR1 @ 0xFCE;
asm("TMR1 equ 0FCEh");
extern volatile unsigned char TMR1L @ 0xFCE;
asm("TMR1L equ 0FCEh");
typedef union {
struct {
unsigned TMR1L :8;
};
} TMR1Lbits_t;
extern volatile TMR1Lbits_t TMR1Lbits @ 0xFCE;
# 14206
extern volatile unsigned char TMR1H @ 0xFCF;
asm("TMR1H equ 0FCFh");
typedef union {
struct {
unsigned TMR1H :8;
};
} TMR1Hbits_t;
extern volatile TMR1Hbits_t TMR1Hbits @ 0xFCF;
# 14225
extern volatile unsigned char RCON @ 0xFD0;
asm("RCON equ 0FD0h");
typedef union {
struct {
unsigned NOT_BOR :1;
};
struct {
unsigned :1;
unsigned NOT_POR :1;
};
struct {
unsigned :2;
unsigned NOT_PD :1;
};
struct {
unsigned :3;
unsigned NOT_TO :1;
};
struct {
unsigned :4;
unsigned NOT_RI :1;
};
struct {
unsigned :5;
unsigned NOT_CM :1;
};
struct {
unsigned nBOR :1;
unsigned nPOR :1;
unsigned nPD :1;
unsigned nTO :1;
unsigned nRI :1;
unsigned nCM :1;
unsigned :1;
unsigned IPEN :1;
};
struct {
unsigned BOR :1;
unsigned POR :1;
unsigned PD :1;
unsigned TO :1;
unsigned RI :1;
unsigned CM :1;
};
} RCONbits_t;
extern volatile RCONbits_t RCONbits @ 0xFD0;
# 14372
extern volatile unsigned char CM2CON @ 0xFD1;
asm("CM2CON equ 0FD1h");
extern volatile unsigned char CM2CON1 @ 0xFD1;
asm("CM2CON1 equ 0FD1h");
typedef union {
struct {
unsigned CCH :2;
unsigned CREF :1;
unsigned EVPOL :2;
unsigned CPOL :1;
unsigned COE :1;
unsigned CON :1;
};
struct {
unsigned CCH0 :1;
unsigned CCH1 :1;
unsigned :1;
unsigned EVPOL0 :1;
unsigned EVPOL1 :1;
};
struct {
unsigned CCH02 :1;
};
struct {
unsigned :1;
unsigned CCH12 :1;
};
struct {
unsigned :6;
unsigned COE2 :1;
};
struct {
unsigned :7;
unsigned CON2 :1;
};
struct {
unsigned :5;
unsigned CPOL2 :1;
};
struct {
unsigned :2;
unsigned CREF2 :1;
};
struct {
unsigned :3;
unsigned EVPOL02 :1;
};
struct {
unsigned :4;
unsigned EVPOL12 :1;
};
} CM2CONbits_t;
extern volatile CM2CONbits_t CM2CONbits @ 0xFD1;
# 14523
typedef union {
struct {
unsigned CCH :2;
unsigned CREF :1;
unsigned EVPOL :2;
unsigned CPOL :1;
unsigned COE :1;
unsigned CON :1;
};
struct {
unsigned CCH0 :1;
unsigned CCH1 :1;
unsigned :1;
unsigned EVPOL0 :1;
unsigned EVPOL1 :1;
};
struct {
unsigned CCH02 :1;
};
struct {
unsigned :1;
unsigned CCH12 :1;
};
struct {
unsigned :6;
unsigned COE2 :1;
};
struct {
unsigned :7;
unsigned CON2 :1;
};
struct {
unsigned :5;
unsigned CPOL2 :1;
};
struct {
unsigned :2;
unsigned CREF2 :1;
};
struct {
unsigned :3;
unsigned EVPOL02 :1;
};
struct {
unsigned :4;
unsigned EVPOL12 :1;
};
} CM2CON1bits_t;
extern volatile CM2CON1bits_t CM2CON1bits @ 0xFD1;
# 14665
extern volatile unsigned char CM1CON @ 0xFD2;
asm("CM1CON equ 0FD2h");
extern volatile unsigned char CM1CON1 @ 0xFD2;
asm("CM1CON1 equ 0FD2h");
typedef union {
struct {
unsigned CCH :2;
unsigned CREF :1;
unsigned EVPOL :2;
unsigned CPOL :1;
unsigned COE :1;
unsigned CON :1;
};
struct {
unsigned CCH0 :1;
unsigned CCH1 :1;
unsigned :1;
unsigned EVPOL0 :1;
unsigned EVPOL1 :1;
};
struct {
unsigned C1CH0 :1;
};
struct {
unsigned :1;
unsigned C1CH1 :1;
};
struct {
unsigned CCH01 :1;
};
struct {
unsigned :1;
unsigned CCH11 :1;
};
struct {
unsigned :6;
unsigned COE1 :1;
};
struct {
unsigned :7;
unsigned CON1 :1;
};
struct {
unsigned :5;
unsigned CPOL1 :1;
};
struct {
unsigned :2;
unsigned CREF1 :1;
};
struct {
unsigned :3;
unsigned EVPOL01 :1;
};
struct {
unsigned :4;
unsigned EVPOL11 :1;
};
} CM1CONbits_t;
extern volatile CM1CONbits_t CM1CONbits @ 0xFD2;
# 14833
typedef union {
struct {
unsigned CCH :2;
unsigned CREF :1;
unsigned EVPOL :2;
unsigned CPOL :1;
unsigned COE :1;
unsigned CON :1;
};
struct {
unsigned CCH0 :1;
unsigned CCH1 :1;
unsigned :1;
unsigned EVPOL0 :1;
unsigned EVPOL1 :1;
};
struct {
unsigned C1CH0 :1;
};
struct {
unsigned :1;
unsigned C1CH1 :1;
};
struct {
unsigned CCH01 :1;
};
struct {
unsigned :1;
unsigned CCH11 :1;
};
struct {
unsigned :6;
unsigned COE1 :1;
};
struct {
unsigned :7;
unsigned CON1 :1;
};
struct {
unsigned :5;
unsigned CPOL1 :1;
};
struct {
unsigned :2;
unsigned CREF1 :1;
};
struct {
unsigned :3;
unsigned EVPOL01 :1;
};
struct {
unsigned :4;
unsigned EVPOL11 :1;
};
} CM1CON1bits_t;
extern volatile CM1CON1bits_t CM1CON1bits @ 0xFD2;
# 14992
extern volatile unsigned char OSCCON @ 0xFD3;
asm("OSCCON equ 0FD3h");
typedef union {
struct {
unsigned SCS :2;
unsigned :1;
unsigned OSTS :1;
unsigned IRCF :3;
unsigned IDLEN :1;
};
struct {
unsigned SCS0 :1;
unsigned SCS1 :1;
unsigned :2;
unsigned IRCF0 :1;
unsigned IRCF1 :1;
unsigned IRCF2 :1;
};
} OSCCONbits_t;
extern volatile OSCCONbits_t OSCCONbits @ 0xFD3;
# 15063
extern volatile unsigned char T0CON @ 0xFD5;
asm("T0CON equ 0FD5h");
typedef union {
struct {
unsigned T0PS :3;
unsigned PSA :1;
unsigned T0SE :1;
unsigned T0CS :1;
unsigned T08BIT :1;
unsigned TMR0ON :1;
};
struct {
unsigned T0PS0 :1;
unsigned T0PS1 :1;
unsigned T0PS2 :1;
};
} T0CONbits_t;
extern volatile T0CONbits_t T0CONbits @ 0xFD5;
# 15132
extern volatile unsigned short TMR0 @ 0xFD6;
asm("TMR0 equ 0FD6h");
extern volatile unsigned char TMR0L @ 0xFD6;
asm("TMR0L equ 0FD6h");
typedef union {
struct {
unsigned TMR0L :8;
};
} TMR0Lbits_t;
extern volatile TMR0Lbits_t TMR0Lbits @ 0xFD6;
# 15157
extern volatile unsigned char TMR0H @ 0xFD7;
asm("TMR0H equ 0FD7h");
typedef union {
struct {
unsigned TMR0H :8;
};
} TMR0Hbits_t;
extern volatile TMR0Hbits_t TMR0Hbits @ 0xFD7;
# 15176
extern volatile unsigned char STATUS @ 0xFD8;
asm("STATUS equ 0FD8h");
typedef union {
struct {
unsigned C :1;
unsigned DC :1;
unsigned Z :1;
unsigned OV :1;
unsigned N :1;
};
struct {
unsigned CARRY :1;
};
struct {
unsigned :4;
unsigned NEGATIVE :1;
};
struct {
unsigned :3;
unsigned OVERFLOW :1;
};
struct {
unsigned :2;
unsigned ZERO :1;
};
} STATUSbits_t;
extern volatile STATUSbits_t STATUSbits @ 0xFD8;
# 15254
extern volatile unsigned short FSR2 @ 0xFD9;
asm("FSR2 equ 0FD9h");
extern volatile unsigned char FSR2L @ 0xFD9;
asm("FSR2L equ 0FD9h");
typedef union {
struct {
unsigned FSR2L :8;
};
} FSR2Lbits_t;
extern volatile FSR2Lbits_t FSR2Lbits @ 0xFD9;
# 15279
extern volatile unsigned char FSR2H @ 0xFDA;
asm("FSR2H equ 0FDAh");
extern volatile unsigned char PLUSW2 @ 0xFDB;
asm("PLUSW2 equ 0FDBh");
typedef union {
struct {
unsigned PLUSW2 :8;
};
} PLUSW2bits_t;
extern volatile PLUSW2bits_t PLUSW2bits @ 0xFDB;
# 15304
extern volatile unsigned char PREINC2 @ 0xFDC;
asm("PREINC2 equ 0FDCh");
typedef union {
struct {
unsigned PREINC2 :8;
};
} PREINC2bits_t;
extern volatile PREINC2bits_t PREINC2bits @ 0xFDC;
# 15323
extern volatile unsigned char POSTDEC2 @ 0xFDD;
asm("POSTDEC2 equ 0FDDh");
typedef union {
struct {
unsigned POSTDEC2 :8;
};
} POSTDEC2bits_t;
extern volatile POSTDEC2bits_t POSTDEC2bits @ 0xFDD;
# 15342
extern volatile unsigned char POSTINC2 @ 0xFDE;
asm("POSTINC2 equ 0FDEh");
typedef union {
struct {
unsigned POSTINC2 :8;
};
} POSTINC2bits_t;
extern volatile POSTINC2bits_t POSTINC2bits @ 0xFDE;
# 15361
extern volatile unsigned char INDF2 @ 0xFDF;
asm("INDF2 equ 0FDFh");
typedef union {
struct {
unsigned INDF2 :8;
};
} INDF2bits_t;
extern volatile INDF2bits_t INDF2bits @ 0xFDF;
# 15380
extern volatile unsigned char BSR @ 0xFE0;
asm("BSR equ 0FE0h");
extern volatile unsigned short FSR1 @ 0xFE1;
asm("FSR1 equ 0FE1h");
extern volatile unsigned char FSR1L @ 0xFE1;
asm("FSR1L equ 0FE1h");
typedef union {
struct {
unsigned FSR1L :8;
};
} FSR1Lbits_t;
extern volatile FSR1Lbits_t FSR1Lbits @ 0xFE1;
# 15411
extern volatile unsigned char FSR1H @ 0xFE2;
asm("FSR1H equ 0FE2h");
extern volatile unsigned char PLUSW1 @ 0xFE3;
asm("PLUSW1 equ 0FE3h");
typedef union {
struct {
unsigned PLUSW1 :8;
};
} PLUSW1bits_t;
extern volatile PLUSW1bits_t PLUSW1bits @ 0xFE3;
# 15436
extern volatile unsigned char PREINC1 @ 0xFE4;
asm("PREINC1 equ 0FE4h");
typedef union {
struct {
unsigned PREINC1 :8;
};
} PREINC1bits_t;
extern volatile PREINC1bits_t PREINC1bits @ 0xFE4;
# 15455
extern volatile unsigned char POSTDEC1 @ 0xFE5;
asm("POSTDEC1 equ 0FE5h");
typedef union {
struct {
unsigned POSTDEC1 :8;
};
} POSTDEC1bits_t;
extern volatile POSTDEC1bits_t POSTDEC1bits @ 0xFE5;
# 15474
extern volatile unsigned char POSTINC1 @ 0xFE6;
asm("POSTINC1 equ 0FE6h");
typedef union {
struct {
unsigned POSTINC1 :8;
};
} POSTINC1bits_t;
extern volatile POSTINC1bits_t POSTINC1bits @ 0xFE6;
# 15493
extern volatile unsigned char INDF1 @ 0xFE7;
asm("INDF1 equ 0FE7h");
typedef union {
struct {
unsigned INDF1 :8;
};
} INDF1bits_t;
extern volatile INDF1bits_t INDF1bits @ 0xFE7;
# 15512
extern volatile unsigned char WREG @ 0xFE8;
asm("WREG equ 0FE8h");
typedef union {
struct {
unsigned WREG :8;
};
} WREGbits_t;
extern volatile WREGbits_t WREGbits @ 0xFE8;
# 15531
extern volatile unsigned short FSR0 @ 0xFE9;
asm("FSR0 equ 0FE9h");
extern volatile unsigned char FSR0L @ 0xFE9;
asm("FSR0L equ 0FE9h");
typedef union {
struct {
unsigned FSR0L :8;
};
} FSR0Lbits_t;
extern volatile FSR0Lbits_t FSR0Lbits @ 0xFE9;
# 15556
extern volatile unsigned char FSR0H @ 0xFEA;
asm("FSR0H equ 0FEAh");
extern volatile unsigned char PLUSW0 @ 0xFEB;
asm("PLUSW0 equ 0FEBh");
typedef union {
struct {
unsigned PLUSW0 :8;
};
} PLUSW0bits_t;
extern volatile PLUSW0bits_t PLUSW0bits @ 0xFEB;
# 15581
extern volatile unsigned char PREINC0 @ 0xFEC;
asm("PREINC0 equ 0FECh");
typedef union {
struct {
unsigned PREINC0 :8;
};
} PREINC0bits_t;
extern volatile PREINC0bits_t PREINC0bits @ 0xFEC;
# 15600
extern volatile unsigned char POSTDEC0 @ 0xFED;
asm("POSTDEC0 equ 0FEDh");
typedef union {
struct {
unsigned POSTDEC0 :8;
};
} POSTDEC0bits_t;
extern volatile POSTDEC0bits_t POSTDEC0bits @ 0xFED;
# 15619
extern volatile unsigned char POSTINC0 @ 0xFEE;
asm("POSTINC0 equ 0FEEh");
typedef union {
struct {
unsigned POSTINC0 :8;
};
} POSTINC0bits_t;
extern volatile POSTINC0bits_t POSTINC0bits @ 0xFEE;
# 15638
extern volatile unsigned char INDF0 @ 0xFEF;
asm("INDF0 equ 0FEFh");
typedef union {
struct {
unsigned INDF0 :8;
};
} INDF0bits_t;
extern volatile INDF0bits_t INDF0bits @ 0xFEF;
# 15657
extern volatile unsigned char INTCON3 @ 0xFF0;
asm("INTCON3 equ 0FF0h");
typedef union {
struct {
unsigned INT1IF :1;
unsigned INT2IF :1;
unsigned INT3IF :1;
unsigned INT1IE :1;
unsigned INT2IE :1;
unsigned INT3IE :1;
unsigned INT1IP :1;
unsigned INT2IP :1;
};
struct {
unsigned INT1F :1;
unsigned INT2F :1;
unsigned INT3F :1;
unsigned INT1E :1;
unsigned INT2E :1;
unsigned INT3E :1;
unsigned INT1P :1;
unsigned INT2P :1;
};
} INTCON3bits_t;
extern volatile INTCON3bits_t INTCON3bits @ 0xFF0;
# 15768
extern volatile unsigned char INTCON2 @ 0xFF1;
asm("INTCON2 equ 0FF1h");
typedef union {
struct {
unsigned :7;
unsigned NOT_RBPU :1;
};
struct {
unsigned RBIP :1;
unsigned INT3IP :1;
unsigned TMR0IP :1;
unsigned INTEDG3 :1;
unsigned INTEDG2 :1;
unsigned INTEDG1 :1;
unsigned INTEDG0 :1;
unsigned nRBPU :1;
};
struct {
unsigned :1;
unsigned INT3P :1;
unsigned T0IP :1;
unsigned :4;
unsigned RBPU :1;
};
} INTCON2bits_t;
extern volatile INTCON2bits_t INTCON2bits @ 0xFF1;
# 15860
extern volatile unsigned char INTCON @ 0xFF2;
asm("INTCON equ 0FF2h");
typedef union {
struct {
unsigned RBIF :1;
unsigned INT0IF :1;
unsigned TMR0IF :1;
unsigned RBIE :1;
unsigned INT0IE :1;
unsigned TMR0IE :1;
unsigned PEIE_GIEL :1;
unsigned GIE_GIEH :1;
};
struct {
unsigned :1;
unsigned INT0F :1;
unsigned T0IF :1;
unsigned :1;
unsigned INT0E :1;
unsigned T0IE :1;
unsigned PEIE :1;
unsigned GIE :1;
};
struct {
unsigned :6;
unsigned GIEL :1;
unsigned GIEH :1;
};
struct {
unsigned :1;
unsigned INT0F :1;
unsigned T0IF :1;
unsigned :1;
unsigned INT0E :1;
unsigned T0IE :1;
unsigned PEIE :1;
unsigned GIE :1;
};
struct {
unsigned :6;
unsigned GIEL :1;
unsigned GIEH :1;
};
} INTCONbits_t;
extern volatile INTCONbits_t INTCONbits @ 0xFF2;
# 15991
extern volatile unsigned short PROD @ 0xFF3;
asm("PROD equ 0FF3h");
extern volatile unsigned char PRODL @ 0xFF3;
asm("PRODL equ 0FF3h");
typedef union {
struct {
unsigned PRODL :8;
};
} PRODLbits_t;
extern volatile PRODLbits_t PRODLbits @ 0xFF3;
# 16016
extern volatile unsigned char PRODH @ 0xFF4;
asm("PRODH equ 0FF4h");
typedef union {
struct {
unsigned PRODH :8;
};
} PRODHbits_t;
extern volatile PRODHbits_t PRODHbits @ 0xFF4;
# 16035
extern volatile unsigned char TABLAT @ 0xFF5;
asm("TABLAT equ 0FF5h");
typedef union {
struct {
unsigned TABLAT :8;
};
} TABLATbits_t;
extern volatile TABLATbits_t TABLATbits @ 0xFF5;
# 16055
extern volatile unsigned short long TBLPTR @ 0xFF6;
asm("TBLPTR equ 0FF6h");
extern volatile unsigned char TBLPTRL @ 0xFF6;
asm("TBLPTRL equ 0FF6h");
typedef union {
struct {
unsigned TBLPTRL :8;
};
} TBLPTRLbits_t;
extern volatile TBLPTRLbits_t TBLPTRLbits @ 0xFF6;
# 16081
extern volatile unsigned char TBLPTRH @ 0xFF7;
asm("TBLPTRH equ 0FF7h");
typedef union {
struct {
unsigned TBLPTRH :8;
};
} TBLPTRHbits_t;
extern volatile TBLPTRHbits_t TBLPTRHbits @ 0xFF7;
# 16100
extern volatile unsigned char TBLPTRU @ 0xFF8;
asm("TBLPTRU equ 0FF8h");
extern volatile unsigned short long PCLAT @ 0xFF9;
asm("PCLAT equ 0FF9h");
extern volatile unsigned short long PC @ 0xFF9;
asm("PC equ 0FF9h");
extern volatile unsigned char PCL @ 0xFF9;
asm("PCL equ 0FF9h");
typedef union {
struct {
unsigned PCL :8;
};
} PCLbits_t;
extern volatile PCLbits_t PCLbits @ 0xFF9;
# 16140
extern volatile unsigned char PCLATH @ 0xFFA;
asm("PCLATH equ 0FFAh");
typedef union {
struct {
unsigned PCH :8;
};
} PCLATHbits_t;
extern volatile PCLATHbits_t PCLATHbits @ 0xFFA;
# 16159
extern volatile unsigned char PCLATU @ 0xFFB;
asm("PCLATU equ 0FFBh");
extern volatile unsigned char STKPTR @ 0xFFC;
asm("STKPTR equ 0FFCh");
typedef union {
struct {
unsigned STKPTR :5;
unsigned :1;
unsigned STKUNF :1;
unsigned STKFUL :1;
};
struct {
unsigned SP0 :1;
unsigned SP1 :1;
unsigned SP2 :1;
unsigned SP3 :1;
unsigned SP4 :1;
unsigned :2;
unsigned STKOVF :1;
};
} STKPTRbits_t;
extern volatile STKPTRbits_t STKPTRbits @ 0xFFC;
# 16237
extern volatile unsigned short long TOS @ 0xFFD;
asm("TOS equ 0FFDh");
extern volatile unsigned char TOSL @ 0xFFD;
asm("TOSL equ 0FFDh");
typedef union {
struct {
unsigned TOSL :8;
};
} TOSLbits_t;
extern volatile TOSLbits_t TOSLbits @ 0xFFD;
# 16263
extern volatile unsigned char TOSH @ 0xFFE;
asm("TOSH equ 0FFEh");
typedef union {
struct {
unsigned TOSH :8;
};
} TOSHbits_t;
extern volatile TOSHbits_t TOSHbits @ 0xFFE;
# 16282
extern volatile unsigned char TOSU @ 0xFFF;
asm("TOSU equ 0FFFh");
# 16294
extern volatile __bit ABDEN1 @ (((unsigned) &BAUDCON1)*8) + 0;
extern volatile __bit ABDEN2 @ (((unsigned) &BAUDCON2)*8) + 0;
extern volatile __bit ABDOVF1 @ (((unsigned) &BAUDCON1)*8) + 7;
extern volatile __bit ABDOVF2 @ (((unsigned) &BAUDCON2)*8) + 7;
extern volatile __bit ACKDT1 @ (((unsigned) &SSP1CON2)*8) + 5;
extern volatile __bit ACKDT2 @ (((unsigned) &SSP2CON2)*8) + 5;
extern volatile __bit ACKEN1 @ (((unsigned) &SSP1CON2)*8) + 4;
extern volatile __bit ACKEN2 @ (((unsigned) &SSP2CON2)*8) + 4;
extern volatile __bit ACKSTAT1 @ (((unsigned) &SSP1CON2)*8) + 6;
extern volatile __bit ACKSTAT2 @ (((unsigned) &SSP2CON2)*8) + 6;
extern volatile __bit ACQT0 @ (((unsigned) &ADCON1)*8) + 3;
extern volatile __bit ACQT1 @ (((unsigned) &ADCON1)*8) + 4;
extern volatile __bit ACQT2 @ (((unsigned) &ADCON1)*8) + 5;
extern volatile __bit __attribute__((__deprecated__)) ADCAL @ (((unsigned) &ADCON1)*8) + 6;
extern volatile __bit ADCMD @ (((unsigned) &PMDIS0)*8) + 0;
extern volatile __bit ADCS0 @ (((unsigned) &ADCON1)*8) + 0;
extern volatile __bit ADCS1 @ (((unsigned) &ADCON1)*8) + 1;
extern volatile __bit ADCS2 @ (((unsigned) &ADCON1)*8) + 2;
extern volatile __bit ADDEN1 @ (((unsigned) &RCSTA1)*8) + 3;
extern volatile __bit ADDEN2 @ (((unsigned) &RCSTA2)*8) + 3;
extern volatile __bit ADEN @ (((unsigned) &RCSTA1)*8) + 3;
extern volatile __bit ADFM @ (((unsigned) &ADCON1)*8) + 7;
extern volatile __bit ADIE @ (((unsigned) &PIE1)*8) + 6;
extern volatile __bit ADIF @ (((unsigned) &PIR1)*8) + 6;
extern volatile __bit ADIP @ (((unsigned) &IPR1)*8) + 6;
extern volatile __bit ADMSK11 @ (((unsigned) &SSP1CON2)*8) + 1;
extern volatile __bit ADMSK12 @ (((unsigned) &SSP2CON2)*8) + 1;
extern volatile __bit ADMSK21 @ (((unsigned) &SSP1CON2)*8) + 2;
extern volatile __bit ADMSK22 @ (((unsigned) &SSP2CON2)*8) + 2;
extern volatile __bit ADMSK31 @ (((unsigned) &SSP1CON2)*8) + 3;
extern volatile __bit ADMSK32 @ (((unsigned) &SSP2CON2)*8) + 3;
extern volatile __bit ADMSK41 @ (((unsigned) &SSP1CON2)*8) + 4;
extern volatile __bit ADMSK42 @ (((unsigned) &SSP2CON2)*8) + 4;
extern volatile __bit ADMSK51 @ (((unsigned) &SSP1CON2)*8) + 5;
extern volatile __bit ADMSK52 @ (((unsigned) &SSP2CON2)*8) + 5;
extern volatile __bit ADON @ (((unsigned) &ADCON0)*8) + 0;
extern volatile __bit ALRMEN @ (((unsigned) &ALRMCFG)*8) + 7;
extern volatile __bit ALRMPTR0 @ (((unsigned) &ALRMCFG)*8) + 0;
extern volatile __bit ALRMPTR1 @ (((unsigned) &ALRMCFG)*8) + 1;
extern volatile __bit AMASK0 @ (((unsigned) &ALRMCFG)*8) + 2;
extern volatile __bit AMASK1 @ (((unsigned) &ALRMCFG)*8) + 3;
extern volatile __bit AMASK2 @ (((unsigned) &ALRMCFG)*8) + 4;
extern volatile __bit AMASK3 @ (((unsigned) &ALRMCFG)*8) + 5;
extern volatile __bit AN0 @ (((unsigned) &PORTA)*8) + 0;
extern volatile __bit AN1 @ (((unsigned) &PORTA)*8) + 1;
extern volatile __bit AN10 @ (((unsigned) &PORTB)*8) + 1;
extern volatile __bit AN11 @ (((unsigned) &PORTC)*8) + 2;
extern volatile __bit AN12 @ (((unsigned) &PORTB)*8) + 0;
extern volatile __bit AN2 @ (((unsigned) &PORTA)*8) + 2;
extern volatile __bit AN3 @ (((unsigned) &PORTA)*8) + 3;
extern volatile __bit AN4 @ (((unsigned) &PORTA)*8) + 5;
extern volatile __bit AN8 @ (((unsigned) &PORTB)*8) + 2;
extern volatile __bit AN9 @ (((unsigned) &PORTB)*8) + 3;
extern volatile __bit ARPT0 @ (((unsigned) &ALRMRPT)*8) + 0;
extern volatile __bit ARPT1 @ (((unsigned) &ALRMRPT)*8) + 1;
extern volatile __bit ARPT2 @ (((unsigned) &ALRMRPT)*8) + 2;
extern volatile __bit ARPT3 @ (((unsigned) &ALRMRPT)*8) + 3;
extern volatile __bit ARPT4 @ (((unsigned) &ALRMRPT)*8) + 4;
extern volatile __bit ARPT5 @ (((unsigned) &ALRMRPT)*8) + 5;
extern volatile __bit ARPT6 @ (((unsigned) &ALRMRPT)*8) + 6;
extern volatile __bit ARPT7 @ (((unsigned) &ALRMRPT)*8) + 7;
extern volatile __bit BCL1IE @ (((unsigned) &PIE2)*8) + 3;
extern volatile __bit BCL1IF @ (((unsigned) &PIR2)*8) + 3;
extern volatile __bit BCL1IP @ (((unsigned) &IPR2)*8) + 3;
extern volatile __bit BCL2IE @ (((unsigned) &PIE3)*8) + 6;
extern volatile __bit BCL2IF @ (((unsigned) &PIR3)*8) + 6;
extern volatile __bit BCL2IP @ (((unsigned) &IPR3)*8) + 6;
extern volatile __bit BCLIE @ (((unsigned) &PIE2)*8) + 3;
extern volatile __bit BCLIF @ (((unsigned) &PIR2)*8) + 3;
extern volatile __bit BCLIP @ (((unsigned) &IPR2)*8) + 3;
extern volatile __bit BF1 @ (((unsigned) &SSP1STAT)*8) + 0;
extern volatile __bit BF2 @ (((unsigned) &SSP2STAT)*8) + 0;
extern volatile __bit BGVST @ (((unsigned) &HLVDCON)*8) + 6;
extern volatile __bit BOR @ (((unsigned) &RCON)*8) + 0;
extern volatile __bit BRG161 @ (((unsigned) &BAUDCON1)*8) + 3;
extern volatile __bit BRG162 @ (((unsigned) &BAUDCON2)*8) + 3;
extern volatile __bit BRGH1 @ (((unsigned) &TXSTA1)*8) + 2;
extern volatile __bit BRGH2 @ (((unsigned) &TXSTA2)*8) + 2;
extern volatile __bit C10TSEL0 @ (((unsigned) &CCPTMRS2)*8) + 4;
extern volatile __bit C1CH0 @ (((unsigned) &CM1CON)*8) + 0;
extern volatile __bit C1CH1 @ (((unsigned) &CM1CON)*8) + 1;
extern volatile __bit C1INA @ (((unsigned) &PORTA)*8) + 0;
extern volatile __bit C1INB @ (((unsigned) &PORTA)*8) + 3;
extern volatile __bit C1INC @ (((unsigned) &PORTA)*8) + 5;
extern volatile __bit C1IND @ (((unsigned) &PORTA)*8) + 2;
extern volatile __bit C1TSEL0 @ (((unsigned) &CCPTMRS0)*8) + 0;
extern volatile __bit C1TSEL1 @ (((unsigned) &CCPTMRS0)*8) + 1;
extern volatile __bit C1TSEL2 @ (((unsigned) &CCPTMRS0)*8) + 2;
extern volatile __bit C2INA @ (((unsigned) &PORTA)*8) + 1;
extern volatile __bit C2INB @ (((unsigned) &PORTA)*8) + 2;
extern volatile __bit C2INC @ (((unsigned) &PORTB)*8) + 2;
extern volatile __bit C2IND @ (((unsigned) &PORTC)*8) + 2;
extern volatile __bit C2TSEL0 @ (((unsigned) &CCPTMRS0)*8) + 3;
extern volatile __bit C2TSEL1 @ (((unsigned) &CCPTMRS0)*8) + 4;
extern volatile __bit C2TSEL2 @ (((unsigned) &CCPTMRS0)*8) + 5;
extern volatile __bit C3INA @ (((unsigned) &PORTB)*8) + 3;
extern volatile __bit C3INB @ (((unsigned) &PORTA)*8) + 2;
extern volatile __bit C3INC @ (((unsigned) &PORTB)*8) + 1;
extern volatile __bit C3IND @ (((unsigned) &PORTB)*8) + 0;
extern volatile __bit C3TSEL0 @ (((unsigned) &CCPTMRS0)*8) + 6;
extern volatile __bit C3TSEL1 @ (((unsigned) &CCPTMRS0)*8) + 7;
extern volatile __bit C4TSEL0 @ (((unsigned) &CCPTMRS1)*8) + 0;
extern volatile __bit C4TSEL1 @ (((unsigned) &CCPTMRS1)*8) + 1;
extern volatile __bit C5TSEL0 @ (((unsigned) &CCPTMRS1)*8) + 2;
extern volatile __bit C6TSEL0 @ (((unsigned) &CCPTMRS1)*8) + 4;
extern volatile __bit C7TSEL0 @ (((unsigned) &CCPTMRS1)*8) + 6;
extern volatile __bit C7TSEL1 @ (((unsigned) &CCPTMRS1)*8) + 7;
extern volatile __bit C8TSEL0 @ (((unsigned) &CCPTMRS2)*8) + 0;
extern volatile __bit C8TSEL1 @ (((unsigned) &CCPTMRS2)*8) + 1;
extern volatile __bit C9TSEL0 @ (((unsigned) &CCPTMRS2)*8) + 2;
extern volatile __bit CAL0 @ (((unsigned) &RTCCAL)*8) + 0;
extern volatile __bit CAL1 @ (((unsigned) &RTCCAL)*8) + 1;
extern volatile __bit CAL2 @ (((unsigned) &RTCCAL)*8) + 2;
extern volatile __bit CAL3 @ (((unsigned) &RTCCAL)*8) + 3;
extern volatile __bit CAL4 @ (((unsigned) &RTCCAL)*8) + 4;
extern volatile __bit CAL5 @ (((unsigned) &RTCCAL)*8) + 5;
extern volatile __bit CAL6 @ (((unsigned) &RTCCAL)*8) + 6;
extern volatile __bit CAL7 @ (((unsigned) &RTCCAL)*8) + 7;
extern volatile __bit CARRY @ (((unsigned) &STATUS)*8) + 0;
extern volatile __bit CCH01 @ (((unsigned) &CM1CON)*8) + 0;
extern volatile __bit CCH02 @ (((unsigned) &CM2CON)*8) + 0;
extern volatile __bit CCH03 @ (((unsigned) &CM3CON)*8) + 0;
extern volatile __bit CCH05 @ (((unsigned) &IPR5)*8) + 0;
extern volatile __bit CCH11 @ (((unsigned) &CM1CON)*8) + 1;
extern volatile __bit CCH12 @ (((unsigned) &CM2CON)*8) + 1;
extern volatile __bit CCH13 @ (((unsigned) &CM3CON)*8) + 1;
extern volatile __bit CCH15 @ (((unsigned) &IPR5)*8) + 1;
extern volatile __bit CCIP3IP @ (((unsigned) &IPR4)*8) + 0;
extern volatile __bit CCP10 @ (((unsigned) &PORTC)*8) + 7;
extern volatile __bit CCP10IE @ (((unsigned) &PIE4)*8) + 7;
extern volatile __bit CCP10IF @ (((unsigned) &PIR4)*8) + 7;
extern volatile __bit CCP10IP @ (((unsigned) &IPR4)*8) + 7;
extern volatile __bit CCP10M0 @ (((unsigned) &CCP10CON)*8) + 0;
extern volatile __bit CCP10M1 @ (((unsigned) &CCP10CON)*8) + 1;
extern volatile __bit CCP10M2 @ (((unsigned) &CCP10CON)*8) + 2;
extern volatile __bit CCP10M3 @ (((unsigned) &CCP10CON)*8) + 3;
extern volatile __bit CCP10MD @ (((unsigned) &PMDIS3)*8) + 7;
extern volatile __bit CCP10OD @ (((unsigned) &ODCON2)*8) + 3;
extern volatile __bit CCP1IE @ (((unsigned) &PIE1)*8) + 2;
extern volatile __bit CCP1IF @ (((unsigned) &PIR1)*8) + 2;
extern volatile __bit CCP1IP @ (((unsigned) &IPR1)*8) + 2;
extern volatile __bit CCP1M0 @ (((unsigned) &CCP1CON)*8) + 0;
extern volatile __bit CCP1M1 @ (((unsigned) &CCP1CON)*8) + 1;
extern volatile __bit CCP1M2 @ (((unsigned) &CCP1CON)*8) + 2;
extern volatile __bit CCP1M3 @ (((unsigned) &CCP1CON)*8) + 3;
extern volatile __bit CCP1X @ (((unsigned) &CCP1CON)*8) + 5;
extern volatile __bit CCP1Y @ (((unsigned) &CCP1CON)*8) + 4;
extern volatile __bit CCP2 @ (((unsigned) &PORTC)*8) + 1;
extern volatile __bit CCP2IE @ (((unsigned) &PIE2)*8) + 0;
extern volatile __bit CCP2IF @ (((unsigned) &PIR2)*8) + 0;
extern volatile __bit CCP2IP @ (((unsigned) &IPR2)*8) + 0;
extern volatile __bit CCP2M0 @ (((unsigned) &CCP2CON)*8) + 0;
extern volatile __bit CCP2M1 @ (((unsigned) &CCP2CON)*8) + 1;
extern volatile __bit CCP2M2 @ (((unsigned) &CCP2CON)*8) + 2;
extern volatile __bit CCP2M3 @ (((unsigned) &CCP2CON)*8) + 3;
extern volatile __bit CCP2X @ (((unsigned) &CCP2CON)*8) + 5;
extern volatile __bit CCP2Y @ (((unsigned) &CCP2CON)*8) + 4;
extern volatile __bit CCP2_PA2 @ (((unsigned) &PORTB)*8) + 3;
extern volatile __bit CCP3IE @ (((unsigned) &PIE4)*8) + 0;
extern volatile __bit CCP3IF @ (((unsigned) &PIR4)*8) + 0;
extern volatile __bit CCP3IP @ (((unsigned) &IPR4)*8) + 0;
extern volatile __bit CCP3M0 @ (((unsigned) &CCP3CON)*8) + 0;
extern volatile __bit CCP3M1 @ (((unsigned) &CCP3CON)*8) + 1;
extern volatile __bit CCP3M2 @ (((unsigned) &CCP3CON)*8) + 2;
extern volatile __bit CCP3M3 @ (((unsigned) &CCP3CON)*8) + 3;
extern volatile __bit CCP4 @ (((unsigned) &PORTB)*8) + 4;
extern volatile __bit CCP4IE @ (((unsigned) &PIE4)*8) + 1;
extern volatile __bit CCP4IF @ (((unsigned) &PIR4)*8) + 1;
extern volatile __bit CCP4IP @ (((unsigned) &IPR4)*8) + 1;
extern volatile __bit CCP4M0 @ (((unsigned) &CCP4CON)*8) + 0;
extern volatile __bit CCP4M1 @ (((unsigned) &CCP4CON)*8) + 1;
extern volatile __bit CCP4M2 @ (((unsigned) &CCP4CON)*8) + 2;
extern volatile __bit CCP4M3 @ (((unsigned) &CCP4CON)*8) + 3;
extern volatile __bit CCP4MD @ (((unsigned) &PMDIS3)*8) + 1;
extern volatile __bit CCP4OD @ (((unsigned) &ODCON1)*8) + 3;
extern volatile __bit CCP5 @ (((unsigned) &PORTB)*8) + 5;
extern volatile __bit CCP5IE @ (((unsigned) &PIE4)*8) + 2;
extern volatile __bit CCP5IF @ (((unsigned) &PIR4)*8) + 2;
extern volatile __bit CCP5IP @ (((unsigned) &IPR4)*8) + 2;
extern volatile __bit CCP5M0 @ (((unsigned) &CCP5CON)*8) + 0;
extern volatile __bit CCP5M1 @ (((unsigned) &CCP5CON)*8) + 1;
extern volatile __bit CCP5M2 @ (((unsigned) &CCP5CON)*8) + 2;
extern volatile __bit CCP5M3 @ (((unsigned) &CCP5CON)*8) + 3;
extern volatile __bit CCP5MD @ (((unsigned) &PMDIS3)*8) + 2;
extern volatile __bit CCP5OD @ (((unsigned) &ODCON1)*8) + 4;
extern volatile __bit CCP6 @ (((unsigned) &PORTB)*8) + 6;
extern volatile __bit CCP6IE @ (((unsigned) &PIE4)*8) + 3;
extern volatile __bit CCP6IF @ (((unsigned) &PIR4)*8) + 3;
extern volatile __bit CCP6IP @ (((unsigned) &IPR4)*8) + 3;
extern volatile __bit CCP6M0 @ (((unsigned) &CCP6CON)*8) + 0;
extern volatile __bit CCP6M1 @ (((unsigned) &CCP6CON)*8) + 1;
extern volatile __bit CCP6M2 @ (((unsigned) &CCP6CON)*8) + 2;
extern volatile __bit CCP6M3 @ (((unsigned) &CCP6CON)*8) + 3;
extern volatile __bit CCP6MD @ (((unsigned) &PMDIS3)*8) + 3;
extern volatile __bit CCP6OD @ (((unsigned) &ODCON1)*8) + 5;
extern volatile __bit CCP7 @ (((unsigned) &PORTB)*8) + 7;
extern volatile __bit CCP7IE @ (((unsigned) &PIE4)*8) + 4;
extern volatile __bit CCP7IF @ (((unsigned) &PIR4)*8) + 4;
extern volatile __bit CCP7IP @ (((unsigned) &IPR4)*8) + 4;
extern volatile __bit CCP7M0 @ (((unsigned) &CCP7CON)*8) + 0;
extern volatile __bit CCP7M1 @ (((unsigned) &CCP7CON)*8) + 1;
extern volatile __bit CCP7M2 @ (((unsigned) &CCP7CON)*8) + 2;
extern volatile __bit CCP7M3 @ (((unsigned) &CCP7CON)*8) + 3;
extern volatile __bit CCP7MD @ (((unsigned) &PMDIS3)*8) + 4;
extern volatile __bit CCP7OD @ (((unsigned) &ODCON1)*8) + 6;
extern volatile __bit CCP8 @ (((unsigned) &PORTC)*8) + 1;
extern volatile __bit CCP8IE @ (((unsigned) &PIE4)*8) + 5;
extern volatile __bit CCP8IF @ (((unsigned) &PIR4)*8) + 5;
extern volatile __bit CCP8IP @ (((unsigned) &IPR4)*8) + 5;
extern volatile __bit CCP8M0 @ (((unsigned) &CCP8CON)*8) + 0;
extern volatile __bit CCP8M1 @ (((unsigned) &CCP8CON)*8) + 1;
extern volatile __bit CCP8M2 @ (((unsigned) &CCP8CON)*8) + 2;
extern volatile __bit CCP8M3 @ (((unsigned) &CCP8CON)*8) + 3;
extern volatile __bit CCP8MD @ (((unsigned) &PMDIS3)*8) + 5;
extern volatile __bit CCP8OD @ (((unsigned) &ODCON1)*8) + 7;
extern volatile __bit CCP9 @ (((unsigned) &PORTC)*8) + 6;
extern volatile __bit CCP9IE @ (((unsigned) &PIE4)*8) + 6;
extern volatile __bit CCP9IF @ (((unsigned) &PIR4)*8) + 6;
extern volatile __bit CCP9IP @ (((unsigned) &IPR4)*8) + 6;
extern volatile __bit CCP9M0 @ (((unsigned) &CCP9CON)*8) + 0;
extern volatile __bit CCP9M1 @ (((unsigned) &CCP9CON)*8) + 1;
extern volatile __bit CCP9M2 @ (((unsigned) &CCP9CON)*8) + 2;
extern volatile __bit CCP9M3 @ (((unsigned) &CCP9CON)*8) + 3;
extern volatile __bit CCP9MD @ (((unsigned) &PMDIS3)*8) + 6;
extern volatile __bit CCP9OD @ (((unsigned) &ODCON2)*8) + 2;
extern volatile __bit CHIME @ (((unsigned) &ALRMCFG)*8) + 6;
extern volatile __bit CHS0 @ (((unsigned) &ADCON0)*8) + 2;
extern volatile __bit CHS1 @ (((unsigned) &ADCON0)*8) + 3;
extern volatile __bit CHS2 @ (((unsigned) &ADCON0)*8) + 4;
extern volatile __bit CHS3 @ (((unsigned) &ADCON0)*8) + 5;
extern volatile __bit CHSN3 @ (((unsigned) &ADCON1)*8) + 3;
extern volatile __bit CK1 @ (((unsigned) &PORTC)*8) + 6;
extern volatile __bit CKE1 @ (((unsigned) &SSP1STAT)*8) + 6;
extern volatile __bit CKE2 @ (((unsigned) &SSP2STAT)*8) + 6;
extern volatile __bit CKP1 @ (((unsigned) &SSP1CON1)*8) + 4;
extern volatile __bit CKP2 @ (((unsigned) &SSP2CON1)*8) + 4;
extern volatile __bit CKTXP @ (((unsigned) &BAUDCON1)*8) + 4;
extern volatile __bit CLKI @ (((unsigned) &PORTA)*8) + 7;
extern volatile __bit CLKO @ (((unsigned) &PORTA)*8) + 6;
extern volatile __bit CM @ (((unsigned) &RCON)*8) + 5;
extern volatile __bit CM1IE @ (((unsigned) &PIE2)*8) + 5;
extern volatile __bit CM1IF @ (((unsigned) &PIR2)*8) + 5;
extern volatile __bit CM1IP @ (((unsigned) &IPR2)*8) + 5;
extern volatile __bit CM2IE @ (((unsigned) &PIE2)*8) + 6;
extern volatile __bit CM2IF @ (((unsigned) &PIR2)*8) + 6;
extern volatile __bit CM2IP @ (((unsigned) &IPR2)*8) + 6;
extern volatile __bit CM3IE @ (((unsigned) &PIE5)*8) + 5;
extern volatile __bit CM3IF @ (((unsigned) &PIR5)*8) + 5;
extern volatile __bit CM3IP @ (((unsigned) &IPR5)*8) + 5;
extern volatile __bit CMIE @ (((unsigned) &PIE2)*8) + 6;
extern volatile __bit CMIF @ (((unsigned) &PIR2)*8) + 6;
extern volatile __bit CMIP @ (((unsigned) &IPR2)*8) + 6;
extern volatile __bit CMP1MD @ (((unsigned) &PMDIS2)*8) + 0;
extern volatile __bit CMP2MD @ (((unsigned) &PMDIS2)*8) + 1;
extern volatile __bit CMP3MD @ (((unsigned) &PMDIS2)*8) + 2;
extern volatile __bit CMPL02 @ (((unsigned) &PSTR2CON)*8) + 6;
extern volatile __bit CMPL03 @ (((unsigned) &PSTR3CON)*8) + 6;
extern volatile __bit CMPL12 @ (((unsigned) &PSTR2CON)*8) + 7;
extern volatile __bit CMPL13 @ (((unsigned) &PSTR3CON)*8) + 7;
extern volatile __bit COE1 @ (((unsigned) &CM1CON)*8) + 6;
extern volatile __bit COE2 @ (((unsigned) &CM2CON)*8) + 6;
extern volatile __bit COE3 @ (((unsigned) &CM3CON)*8) + 6;
extern volatile __bit CON1 @ (((unsigned) &CM1CON)*8) + 7;
extern volatile __bit CON2 @ (((unsigned) &CM2CON)*8) + 7;
extern volatile __bit CON3 @ (((unsigned) &CM3CON)*8) + 7;
extern volatile __bit COUT1 @ (((unsigned) &CMSTAT)*8) + 0;
extern volatile __bit COUT2 @ (((unsigned) &CMSTAT)*8) + 1;
extern volatile __bit COUT3 @ (((unsigned) &CMSTAT)*8) + 2;
extern volatile __bit CPOL1 @ (((unsigned) &CM1CON)*8) + 5;
extern volatile __bit CPOL2 @ (((unsigned) &CM2CON)*8) + 5;
extern volatile __bit CPOL3 @ (((unsigned) &CM3CON)*8) + 5;
extern volatile __bit CREF1 @ (((unsigned) &CM1CON)*8) + 2;
extern volatile __bit CREF2 @ (((unsigned) &CM2CON)*8) + 2;
extern volatile __bit CREF3 @ (((unsigned) &CM3CON)*8) + 2;
extern volatile __bit CREN1 @ (((unsigned) &RCSTA1)*8) + 4;
extern volatile __bit CREN2 @ (((unsigned) &RCSTA2)*8) + 4;
extern volatile __bit CSRC1 @ (((unsigned) &TXSTA1)*8) + 7;
extern volatile __bit CSRC2 @ (((unsigned) &TXSTA2)*8) + 7;
extern volatile __bit CTED1 @ (((unsigned) &PORTB)*8) + 2;
extern volatile __bit CTED2 @ (((unsigned) &PORTB)*8) + 3;
extern volatile __bit CTMUDS @ (((unsigned) &ODCON3)*8) + 7;
extern volatile __bit CTMUEN @ (((unsigned) &CTMUCONH)*8) + 7;
extern volatile __bit CTMUIE @ (((unsigned) &PIE3)*8) + 2;
extern volatile __bit CTMUIF @ (((unsigned) &PIR3)*8) + 2;
extern volatile __bit CTMUIP @ (((unsigned) &IPR3)*8) + 2;
extern volatile __bit CTMUMD @ (((unsigned) &PMDIS1)*8) + 6;
extern volatile __bit CTMUSIDL @ (((unsigned) &CTMUCONH)*8) + 5;
extern volatile __bit CTPLS @ (((unsigned) &PORTC)*8) + 2;
extern volatile __bit CTTRIG @ (((unsigned) &CTMUCONH)*8) + 0;
extern volatile __bit CVR0 @ (((unsigned) &CVRCON)*8) + 0;
extern volatile __bit CVR1 @ (((unsigned) &CVRCON)*8) + 1;
extern volatile __bit CVR2 @ (((unsigned) &CVRCON)*8) + 2;
extern volatile __bit CVR3 @ (((unsigned) &CVRCON)*8) + 3;
extern volatile __bit CVREF @ (((unsigned) &PORTA)*8) + 2;
extern volatile __bit CVREN @ (((unsigned) &CVRCON)*8) + 7;
extern volatile __bit CVROE @ (((unsigned) &CVRCON)*8) + 6;
extern volatile __bit CVROEN @ (((unsigned) &CVRCON)*8) + 6;
extern volatile __bit CVRR @ (((unsigned) &CVRCON)*8) + 5;
extern volatile __bit CVRSS @ (((unsigned) &CVRCON)*8) + 4;
extern volatile __bit DA @ (((unsigned) &SSP1STAT)*8) + 5;
extern volatile __bit DA1 @ (((unsigned) &SSP1STAT)*8) + 5;
extern volatile __bit DA2 @ (((unsigned) &SSP2STAT)*8) + 5;
extern volatile __bit DATA_ADDRESS @ (((unsigned) &SSP1STAT)*8) + 5;
extern volatile __bit DATA_ADDRESS2 @ (((unsigned) &SSP2STAT)*8) + 5;
extern volatile __bit DC @ (((unsigned) &STATUS)*8) + 1;
extern volatile __bit DC10B0 @ (((unsigned) &CCP10CON)*8) + 4;
extern volatile __bit DC10B1 @ (((unsigned) &CCP10CON)*8) + 5;
extern volatile __bit DC1B0 @ (((unsigned) &CCP1CON)*8) + 4;
extern volatile __bit DC1B1 @ (((unsigned) &CCP1CON)*8) + 5;
extern volatile __bit DC2B0 @ (((unsigned) &CCP2CON)*8) + 4;
extern volatile __bit DC2B1 @ (((unsigned) &CCP2CON)*8) + 5;
extern volatile __bit DC3B0 @ (((unsigned) &CCP3CON)*8) + 4;
extern volatile __bit DC3B1 @ (((unsigned) &CCP3CON)*8) + 5;
extern volatile __bit DC4B0 @ (((unsigned) &CCP4CON)*8) + 4;
extern volatile __bit DC4B1 @ (((unsigned) &CCP4CON)*8) + 5;
extern volatile __bit DC5B0 @ (((unsigned) &CCP5CON)*8) + 4;
extern volatile __bit DC5B1 @ (((unsigned) &CCP5CON)*8) + 5;
extern volatile __bit DC6B0 @ (((unsigned) &CCP6CON)*8) + 4;
extern volatile __bit DC6B1 @ (((unsigned) &CCP6CON)*8) + 5;
extern volatile __bit DC7B0 @ (((unsigned) &CCP7CON)*8) + 4;
extern volatile __bit DC7B1 @ (((unsigned) &CCP7CON)*8) + 5;
extern volatile __bit DC8B0 @ (((unsigned) &CCP8CON)*8) + 4;
extern volatile __bit DC8B1 @ (((unsigned) &CCP8CON)*8) + 5;
extern volatile __bit DC9B0 @ (((unsigned) &CCP9CON)*8) + 4;
extern volatile __bit DC9B1 @ (((unsigned) &CCP9CON)*8) + 5;
extern volatile __bit DLYCYC0 @ (((unsigned) &DMACON2)*8) + 4;
extern volatile __bit DLYCYC1 @ (((unsigned) &DMACON2)*8) + 5;
extern volatile __bit DLYCYC2 @ (((unsigned) &DMACON2)*8) + 6;
extern volatile __bit DLYCYC3 @ (((unsigned) &DMACON2)*8) + 7;
extern volatile __bit DLYINTEN @ (((unsigned) &DMACON1)*8) + 1;
extern volatile __bit DMAEN @ (((unsigned) &DMACON1)*8) + 0;
extern volatile __bit DONE @ (((unsigned) &ADCON0)*8) + 1;
extern volatile __bit DS @ (((unsigned) &WDTCON)*8) + 3;
extern volatile __bit DSBOR @ (((unsigned) &DSCONL)*8) + 1;
extern volatile __bit DSEN @ (((unsigned) &DSCONH)*8) + 7;
extern volatile __bit DSFLT @ (((unsigned) &DSWAKEL)*8) + 7;
extern volatile __bit DSINT0 @ (((unsigned) &DSWAKEH)*8) + 0;
extern volatile __bit DSMCLR @ (((unsigned) &DSWAKEL)*8) + 2;
extern volatile __bit DSPOR @ (((unsigned) &DSWAKEL)*8) + 0;
extern volatile __bit DSRTC @ (((unsigned) &DSWAKEL)*8) + 3;
extern volatile __bit DSULP @ (((unsigned) &DSWAKEL)*8) + 5;
extern volatile __bit DSULPEN @ (((unsigned) &DSCONH)*8) + 1;
extern volatile __bit DSWDT @ (((unsigned) &DSWAKEL)*8) + 4;
extern volatile __bit DT1 @ (((unsigned) &PORTC)*8) + 7;
extern volatile __bit DTRXP @ (((unsigned) &BAUDCON1)*8) + 5;
extern volatile __bit DTRXP1 @ (((unsigned) &BAUDCON1)*8) + 5;
extern volatile __bit DTRXP2 @ (((unsigned) &BAUDCON2)*8) + 5;
extern volatile __bit DUPLEX0 @ (((unsigned) &DMACON1)*8) + 2;
extern volatile __bit DUPLEX1 @ (((unsigned) &DMACON1)*8) + 3;
extern volatile __bit D_A @ (((unsigned) &SSP1STAT)*8) + 5;
extern volatile __bit D_A2 @ (((unsigned) &SSP2STAT)*8) + 5;
extern volatile __bit D_nA2 @ (((unsigned) &SSP2STAT)*8) + 5;
extern volatile __bit ECCP1AS0 @ (((unsigned) &ECCP1AS)*8) + 4;
extern volatile __bit ECCP1AS1 @ (((unsigned) &ECCP1AS)*8) + 5;
extern volatile __bit ECCP1AS2 @ (((unsigned) &ECCP1AS)*8) + 6;
extern volatile __bit ECCP1ASE @ (((unsigned) &ECCP1AS)*8) + 7;
extern volatile __bit ECCP1MD @ (((unsigned) &PMDIS0)*8) + 5;
extern volatile __bit ECCP1OD @ (((unsigned) &ODCON1)*8) + 0;
extern volatile __bit ECCP2AS0 @ (((unsigned) &ECCP2AS)*8) + 4;
extern volatile __bit ECCP2AS1 @ (((unsigned) &ECCP2AS)*8) + 5;
extern volatile __bit ECCP2AS2 @ (((unsigned) &ECCP2AS)*8) + 6;
extern volatile __bit ECCP2ASE @ (((unsigned) &ECCP2AS)*8) + 7;
extern volatile __bit ECCP2MD @ (((unsigned) &PMDIS0)*8) + 6;
extern volatile __bit ECCP2OD @ (((unsigned) &ODCON1)*8) + 1;
extern volatile __bit ECCP3AS0 @ (((unsigned) &ECCP3AS)*8) + 4;
extern volatile __bit ECCP3AS1 @ (((unsigned) &ECCP3AS)*8) + 5;
extern volatile __bit ECCP3AS2 @ (((unsigned) &ECCP3AS)*8) + 6;
extern volatile __bit ECCP3ASE @ (((unsigned) &ECCP3AS)*8) + 7;
extern volatile __bit ECCP3MD @ (((unsigned) &PMDIS0)*8) + 7;
extern volatile __bit ECCP3OD @ (((unsigned) &ODCON1)*8) + 2;
extern volatile __bit EDG1POL @ (((unsigned) &CTMUCONL)*8) + 4;
extern volatile __bit EDG1SEL0 @ (((unsigned) &CTMUCONL)*8) + 2;
extern volatile __bit EDG1SEL1 @ (((unsigned) &CTMUCONL)*8) + 3;
extern volatile __bit EDG1STAT @ (((unsigned) &CTMUCONL)*8) + 0;
extern volatile __bit EDG2POL @ (((unsigned) &CTMUCONL)*8) + 7;
extern volatile __bit EDG2SEL0 @ (((unsigned) &CTMUCONL)*8) + 5;
extern volatile __bit EDG2SEL1 @ (((unsigned) &CTMUCONL)*8) + 6;
extern volatile __bit EDG2STAT @ (((unsigned) &CTMUCONL)*8) + 1;
extern volatile __bit EDGEN @ (((unsigned) &CTMUCONH)*8) + 3;
extern volatile __bit EDGSEQEN @ (((unsigned) &CTMUCONH)*8) + 2;
extern volatile __bit EVPOL01 @ (((unsigned) &CM1CON)*8) + 3;
extern volatile __bit EVPOL02 @ (((unsigned) &CM2CON)*8) + 3;
extern volatile __bit EVPOL03 @ (((unsigned) &CM3CON)*8) + 3;
extern volatile __bit EVPOL05 @ (((unsigned) &IPR5)*8) + 3;
extern volatile __bit EVPOL11 @ (((unsigned) &CM1CON)*8) + 4;
extern volatile __bit EVPOL12 @ (((unsigned) &CM2CON)*8) + 4;
extern volatile __bit EVPOL13 @ (((unsigned) &CM3CON)*8) + 4;
extern volatile __bit EVPOL15 @ (((unsigned) &IPR5)*8) + 4;
extern volatile __bit FERR1 @ (((unsigned) &RCSTA1)*8) + 2;
extern volatile __bit FERR2 @ (((unsigned) &RCSTA2)*8) + 2;
extern volatile __bit FREE @ (((unsigned) &EECON1)*8) + 4;
extern volatile __bit GCEN1 @ (((unsigned) &SSP1CON2)*8) + 7;
extern volatile __bit GCEN2 @ (((unsigned) &SSP2CON2)*8) + 7;
extern volatile __bit GIE @ (((unsigned) &INTCON)*8) + 7;
extern volatile __bit GIEH @ (((unsigned) &INTCON)*8) + 7;
extern volatile __bit GIEL @ (((unsigned) &INTCON)*8) + 6;
extern volatile __bit GIE_GIEH @ (((unsigned) &INTCON)*8) + 7;
extern volatile __bit GO @ (((unsigned) &ADCON0)*8) + 1;
extern volatile __bit GODONE @ (((unsigned) &ADCON0)*8) + 1;
extern volatile __bit GO_DONE @ (((unsigned) &ADCON0)*8) + 1;
extern volatile __bit GO_NOT_DONE @ (((unsigned) &ADCON0)*8) + 1;
extern volatile __bit GO_nDONE @ (((unsigned) &ADCON0)*8) + 1;
extern volatile __bit HALFSEC @ (((unsigned) &RTCCFG)*8) + 3;
extern volatile __bit HLVDEN @ (((unsigned) &HLVDCON)*8) + 4;
extern volatile __bit HLVDIE @ (((unsigned) &PIE2)*8) + 2;
extern volatile __bit HLVDIF @ (((unsigned) &PIR2)*8) + 2;
extern volatile __bit HLVDIN @ (((unsigned) &PORTA)*8) + 5;
extern volatile __bit HLVDIP @ (((unsigned) &IPR2)*8) + 2;
extern volatile __bit HLVDL0 @ (((unsigned) &HLVDCON)*8) + 0;
extern volatile __bit HLVDL1 @ (((unsigned) &HLVDCON)*8) + 1;
extern volatile __bit HLVDL2 @ (((unsigned) &HLVDCON)*8) + 2;
extern volatile __bit HLVDL3 @ (((unsigned) &HLVDCON)*8) + 3;
extern volatile __bit I2C_DAT @ (((unsigned) &SSP1STAT)*8) + 5;
extern volatile __bit I2C_DAT2 @ (((unsigned) &SSP2STAT)*8) + 5;
extern volatile __bit I2C_READ @ (((unsigned) &SSP1STAT)*8) + 2;
extern volatile __bit I2C_READ2 @ (((unsigned) &SSP2STAT)*8) + 2;
extern volatile __bit I2C_START @ (((unsigned) &SSP1STAT)*8) + 3;
extern volatile __bit I2C_START2 @ (((unsigned) &SSP2STAT)*8) + 3;
extern volatile __bit I2C_STOP @ (((unsigned) &SSP1STAT)*8) + 4;
extern volatile __bit I2C_STOP2 @ (((unsigned) &SSP2STAT)*8) + 4;
extern volatile __bit IDISSEN @ (((unsigned) &CTMUCONH)*8) + 1;
extern volatile __bit IDLEN @ (((unsigned) &OSCCON)*8) + 7;
extern volatile __bit INT0 @ (((unsigned) &PORTB)*8) + 0;
extern volatile __bit INT0E @ (((unsigned) &INTCON)*8) + 4;
extern volatile __bit INT0F @ (((unsigned) &INTCON)*8) + 1;
extern volatile __bit INT0IE @ (((unsigned) &INTCON)*8) + 4;
extern volatile __bit INT0IF @ (((unsigned) &INTCON)*8) + 1;
extern volatile __bit INT1E @ (((unsigned) &INTCON3)*8) + 3;
extern volatile __bit INT1F @ (((unsigned) &INTCON3)*8) + 0;
extern volatile __bit INT1IE @ (((unsigned) &INTCON3)*8) + 3;
extern volatile __bit INT1IF @ (((unsigned) &INTCON3)*8) + 0;
extern volatile __bit INT1IP @ (((unsigned) &INTCON3)*8) + 6;
extern volatile __bit INT1P @ (((unsigned) &INTCON3)*8) + 6;
extern volatile __bit INT2E @ (((unsigned) &INTCON3)*8) + 4;
extern volatile __bit INT2F @ (((unsigned) &INTCON3)*8) + 1;
extern volatile __bit INT2IE @ (((unsigned) &INTCON3)*8) + 4;
extern volatile __bit INT2IF @ (((unsigned) &INTCON3)*8) + 1;
extern volatile __bit INT2IP @ (((unsigned) &INTCON3)*8) + 7;
extern volatile __bit INT2P @ (((unsigned) &INTCON3)*8) + 7;
extern volatile __bit INT3E @ (((unsigned) &INTCON3)*8) + 5;
extern volatile __bit INT3F @ (((unsigned) &INTCON3)*8) + 2;
extern volatile __bit INT3IE @ (((unsigned) &INTCON3)*8) + 5;
extern volatile __bit INT3IF @ (((unsigned) &INTCON3)*8) + 2;
extern volatile __bit INT3IP @ (((unsigned) &INTCON2)*8) + 1;
extern volatile __bit INT3P @ (((unsigned) &INTCON2)*8) + 1;
extern volatile __bit INTEDG0 @ (((unsigned) &INTCON2)*8) + 6;
extern volatile __bit INTEDG1 @ (((unsigned) &INTCON2)*8) + 5;
extern volatile __bit INTEDG2 @ (((unsigned) &INTCON2)*8) + 4;
extern volatile __bit INTEDG3 @ (((unsigned) &INTCON2)*8) + 3;
extern volatile __bit INTLVL0 @ (((unsigned) &DMACON2)*8) + 0;
extern volatile __bit INTLVL1 @ (((unsigned) &DMACON2)*8) + 1;
extern volatile __bit INTLVL2 @ (((unsigned) &DMACON2)*8) + 2;
extern volatile __bit INTLVL3 @ (((unsigned) &DMACON2)*8) + 3;
extern volatile __bit INTSRC @ (((unsigned) &OSCTUNE)*8) + 7;
extern volatile __bit IOLOCK @ (((unsigned) &PPSCON)*8) + 0;
extern volatile __bit IPEN @ (((unsigned) &RCON)*8) + 7;
extern volatile __bit IRCF0 @ (((unsigned) &OSCCON)*8) + 4;
extern volatile __bit IRCF1 @ (((unsigned) &OSCCON)*8) + 5;
extern volatile __bit IRCF2 @ (((unsigned) &OSCCON)*8) + 6;
extern volatile __bit IRNG0 @ (((unsigned) &CTMUICON)*8) + 0;
extern volatile __bit IRNG1 @ (((unsigned) &CTMUICON)*8) + 1;
extern volatile __bit IRVST @ (((unsigned) &HLVDCON)*8) + 5;
extern volatile __bit ITRIM0 @ (((unsigned) &CTMUICON)*8) + 2;
extern volatile __bit ITRIM1 @ (((unsigned) &CTMUICON)*8) + 3;
extern volatile __bit ITRIM2 @ (((unsigned) &CTMUICON)*8) + 4;
extern volatile __bit ITRIM3 @ (((unsigned) &CTMUICON)*8) + 5;
extern volatile __bit ITRIM4 @ (((unsigned) &CTMUICON)*8) + 6;
extern volatile __bit ITRIM5 @ (((unsigned) &CTMUICON)*8) + 7;
extern volatile __bit KBI0 @ (((unsigned) &PORTB)*8) + 4;
extern volatile __bit KBI1 @ (((unsigned) &PORTB)*8) + 5;
extern volatile __bit KBI2 @ (((unsigned) &PORTB)*8) + 6;
extern volatile __bit KBI3 @ (((unsigned) &PORTB)*8) + 7;
extern volatile __bit LA0 @ (((unsigned) &LATA)*8) + 0;
extern volatile __bit LA1 @ (((unsigned) &LATA)*8) + 1;
extern volatile __bit LA2 @ (((unsigned) &LATA)*8) + 2;
extern volatile __bit LA3 @ (((unsigned) &LATA)*8) + 3;
extern volatile __bit LA4 @ (((unsigned) &LATA)*8) + 4;
extern volatile __bit LA5 @ (((unsigned) &LATA)*8) + 5;
extern volatile __bit LA6 @ (((unsigned) &LATA)*8) + 6;
extern volatile __bit LA7 @ (((unsigned) &LATA)*8) + 7;
extern volatile __bit LATA0 @ (((unsigned) &LATA)*8) + 0;
extern volatile __bit LATA1 @ (((unsigned) &LATA)*8) + 1;
extern volatile __bit LATA2 @ (((unsigned) &LATA)*8) + 2;
extern volatile __bit LATA3 @ (((unsigned) &LATA)*8) + 3;
extern volatile __bit LATA5 @ (((unsigned) &LATA)*8) + 5;
extern volatile __bit LATA6 @ (((unsigned) &LATA)*8) + 6;
extern volatile __bit LATA7 @ (((unsigned) &LATA)*8) + 7;
extern volatile __bit LATB0 @ (((unsigned) &LATB)*8) + 0;
extern volatile __bit LATB1 @ (((unsigned) &LATB)*8) + 1;
extern volatile __bit LATB2 @ (((unsigned) &LATB)*8) + 2;
extern volatile __bit LATB3 @ (((unsigned) &LATB)*8) + 3;
extern volatile __bit LATB4 @ (((unsigned) &LATB)*8) + 4;
extern volatile __bit LATB5 @ (((unsigned) &LATB)*8) + 5;
extern volatile __bit LATB6 @ (((unsigned) &LATB)*8) + 6;
extern volatile __bit LATB7 @ (((unsigned) &LATB)*8) + 7;
extern volatile __bit LATC0 @ (((unsigned) &LATC)*8) + 0;
extern volatile __bit LATC1 @ (((unsigned) &LATC)*8) + 1;
extern volatile __bit LATC2 @ (((unsigned) &LATC)*8) + 2;
extern volatile __bit LATC3 @ (((unsigned) &LATC)*8) + 3;
extern volatile __bit LATC4 @ (((unsigned) &LATC)*8) + 4;
extern volatile __bit LATC5 @ (((unsigned) &LATC)*8) + 5;
extern volatile __bit LATC6 @ (((unsigned) &LATC)*8) + 6;
extern volatile __bit LATC7 @ (((unsigned) &LATC)*8) + 7;
extern volatile __bit LB0 @ (((unsigned) &LATB)*8) + 0;
extern volatile __bit LB1 @ (((unsigned) &LATB)*8) + 1;
extern volatile __bit LB2 @ (((unsigned) &LATB)*8) + 2;
extern volatile __bit LB3 @ (((unsigned) &LATB)*8) + 3;
extern volatile __bit LB4 @ (((unsigned) &LATB)*8) + 4;
extern volatile __bit LB5 @ (((unsigned) &LATB)*8) + 5;
extern volatile __bit LB6 @ (((unsigned) &LATB)*8) + 6;
extern volatile __bit LB7 @ (((unsigned) &LATB)*8) + 7;
extern volatile __bit LC0 @ (((unsigned) &LATC)*8) + 0;
extern volatile __bit LC1 @ (((unsigned) &LATC)*8) + 1;
extern volatile __bit LC2 @ (((unsigned) &LATC)*8) + 2;
extern volatile __bit LC3 @ (((unsigned) &LATC)*8) + 3;
extern volatile __bit LC4 @ (((unsigned) &LATC)*8) + 4;
extern volatile __bit LC5 @ (((unsigned) &LATC)*8) + 5;
extern volatile __bit LC6 @ (((unsigned) &LATC)*8) + 6;
extern volatile __bit LC7 @ (((unsigned) &LATC)*8) + 7;
extern volatile __bit LVDIE @ (((unsigned) &PIE2)*8) + 2;
extern volatile __bit LVDIF @ (((unsigned) &PIR2)*8) + 2;
extern volatile __bit LVDIN @ (((unsigned) &PORTA)*8) + 5;
extern volatile __bit LVDIP @ (((unsigned) &IPR2)*8) + 2;
extern volatile __bit LVDSTAT @ (((unsigned) &WDTCON)*8) + 6;
extern volatile __bit MSK01 @ (((unsigned) &SSP1ADD)*8) + 0;
extern volatile __bit MSK02 @ (((unsigned) &SSP2ADD)*8) + 0;
extern volatile __bit MSK11 @ (((unsigned) &SSP1ADD)*8) + 1;
extern volatile __bit MSK12 @ (((unsigned) &SSP2ADD)*8) + 1;
extern volatile __bit MSK21 @ (((unsigned) &SSP1ADD)*8) + 2;
extern volatile __bit MSK22 @ (((unsigned) &SSP2ADD)*8) + 2;
extern volatile __bit MSK31 @ (((unsigned) &SSP1ADD)*8) + 3;
extern volatile __bit MSK32 @ (((unsigned) &SSP2ADD)*8) + 3;
extern volatile __bit MSK41 @ (((unsigned) &SSP1ADD)*8) + 4;
extern volatile __bit MSK42 @ (((unsigned) &SSP2ADD)*8) + 4;
extern volatile __bit MSK51 @ (((unsigned) &SSP1ADD)*8) + 5;
extern volatile __bit MSK52 @ (((unsigned) &SSP2ADD)*8) + 5;
extern volatile __bit MSK61 @ (((unsigned) &SSP1ADD)*8) + 6;
extern volatile __bit MSK62 @ (((unsigned) &SSP2ADD)*8) + 6;
extern volatile __bit MSK71 @ (((unsigned) &SSP1ADD)*8) + 7;
extern volatile __bit MSK72 @ (((unsigned) &SSP2ADD)*8) + 7;
extern volatile __bit NEGATIVE @ (((unsigned) &STATUS)*8) + 4;
extern volatile __bit NOT_A @ (((unsigned) &SSP1STAT)*8) + 5;
extern volatile __bit NOT_ADDRESS @ (((unsigned) &SSP1STAT)*8) + 5;
extern volatile __bit NOT_BOR @ (((unsigned) &RCON)*8) + 0;
extern volatile __bit NOT_CM @ (((unsigned) &RCON)*8) + 5;
extern volatile __bit NOT_DONE @ (((unsigned) &ADCON0)*8) + 1;
extern volatile __bit NOT_PD @ (((unsigned) &RCON)*8) + 2;
extern volatile __bit NOT_POR @ (((unsigned) &RCON)*8) + 1;
extern volatile __bit NOT_RBPU @ (((unsigned) &INTCON2)*8) + 7;
extern volatile __bit NOT_RC8 @ (((unsigned) &RCSTA1)*8) + 6;
extern volatile __bit NOT_RI @ (((unsigned) &RCON)*8) + 4;
extern volatile __bit NOT_SS1 @ (((unsigned) &PORTA)*8) + 5;
extern volatile __bit NOT_T1DONE @ (((unsigned) &T1GCON)*8) + 3;
extern volatile __bit NOT_T1SYNC @ (((unsigned) &T1CON)*8) + 2;
extern volatile __bit NOT_T3SYNC @ (((unsigned) &T3CON)*8) + 2;
extern volatile __bit NOT_T5DONE @ (((unsigned) &T5GCON)*8) + 3;
extern volatile __bit NOT_T5SYNC @ (((unsigned) &T5CON)*8) + 2;
extern volatile __bit NOT_TO @ (((unsigned) &RCON)*8) + 3;
extern volatile __bit NOT_TX8 @ (((unsigned) &TXSTA1)*8) + 6;
extern volatile __bit NOT_W @ (((unsigned) &SSP1STAT)*8) + 2;
extern volatile __bit NOT_WRITE @ (((unsigned) &SSP1STAT)*8) + 2;
extern volatile __bit OERR1 @ (((unsigned) &RCSTA1)*8) + 1;
extern volatile __bit OERR2 @ (((unsigned) &RCSTA2)*8) + 1;
extern volatile __bit OSC1 @ (((unsigned) &PORTA)*8) + 7;
extern volatile __bit OSC2 @ (((unsigned) &PORTA)*8) + 6;
extern volatile __bit OSCFIE @ (((unsigned) &PIE2)*8) + 7;
extern volatile __bit OSCFIF @ (((unsigned) &PIR2)*8) + 7;
extern volatile __bit OSCFIP @ (((unsigned) &IPR2)*8) + 7;
extern volatile __bit OSTS @ (((unsigned) &OSCCON)*8) + 3;
extern volatile __bit OV @ (((unsigned) &STATUS)*8) + 3;
extern volatile __bit OVERFLOW @ (((unsigned) &STATUS)*8) + 3;
extern volatile __bit P1DC0 @ (((unsigned) &ECCP1DEL)*8) + 0;
extern volatile __bit P1DC1 @ (((unsigned) &ECCP1DEL)*8) + 1;
extern volatile __bit P1DC2 @ (((unsigned) &ECCP1DEL)*8) + 2;
extern volatile __bit P1DC3 @ (((unsigned) &ECCP1DEL)*8) + 3;
extern volatile __bit P1DC4 @ (((unsigned) &ECCP1DEL)*8) + 4;
extern volatile __bit P1DC5 @ (((unsigned) &ECCP1DEL)*8) + 5;
extern volatile __bit P1DC6 @ (((unsigned) &ECCP1DEL)*8) + 6;
extern volatile __bit P1M0 @ (((unsigned) &CCP1CON)*8) + 6;
extern volatile __bit P1M1 @ (((unsigned) &CCP1CON)*8) + 7;
extern volatile __bit P1RSEN @ (((unsigned) &ECCP1DEL)*8) + 7;
extern volatile __bit P2 @ (((unsigned) &SSP2STAT)*8) + 4;
extern volatile __bit P2DC02 @ (((unsigned) &PSTR2CON)*8) + 0;
extern volatile __bit P2DC0CON @ (((unsigned) &PSTR2CON)*8) + 0;
extern volatile __bit P2DC12 @ (((unsigned) &PSTR2CON)*8) + 1;
extern volatile __bit P2DC1CON @ (((unsigned) &PSTR2CON)*8) + 1;
extern volatile __bit P2DC22 @ (((unsigned) &PSTR2CON)*8) + 2;
extern volatile __bit P2DC2CON @ (((unsigned) &PSTR2CON)*8) + 2;
extern volatile __bit P2DC32 @ (((unsigned) &PSTR2CON)*8) + 3;
extern volatile __bit P2DC3CON @ (((unsigned) &PSTR2CON)*8) + 3;
extern volatile __bit P2DC42 @ (((unsigned) &PSTR2CON)*8) + 4;
extern volatile __bit P2DC4CON @ (((unsigned) &PSTR2CON)*8) + 4;
extern volatile __bit P2DC52 @ (((unsigned) &PSTR2CON)*8) + 5;
extern volatile __bit P2DC5CON @ (((unsigned) &PSTR2CON)*8) + 5;
extern volatile __bit P2DC62 @ (((unsigned) &PSTR2CON)*8) + 6;
extern volatile __bit P2DC6CON @ (((unsigned) &PSTR2CON)*8) + 6;
extern volatile __bit P2M0 @ (((unsigned) &CCP2CON)*8) + 6;
extern volatile __bit P2M1 @ (((unsigned) &CCP2CON)*8) + 7;
extern volatile __bit P2RSEN @ (((unsigned) &ECCP2DEL)*8) + 7;
extern volatile __bit P3DC0 @ (((unsigned) &ECCP3DEL)*8) + 0;
extern volatile __bit P3DC1 @ (((unsigned) &ECCP3DEL)*8) + 1;
extern volatile __bit P3DC2 @ (((unsigned) &ECCP3DEL)*8) + 2;
extern volatile __bit P3DC3 @ (((unsigned) &ECCP3DEL)*8) + 3;
extern volatile __bit P3DC4 @ (((unsigned) &ECCP3DEL)*8) + 4;
extern volatile __bit P3DC5 @ (((unsigned) &ECCP3DEL)*8) + 5;
extern volatile __bit P3DC6 @ (((unsigned) &ECCP3DEL)*8) + 6;
extern volatile __bit P3M0 @ (((unsigned) &CCP3CON)*8) + 6;
extern volatile __bit P3M1 @ (((unsigned) &CCP3CON)*8) + 7;
extern volatile __bit P3RSEN @ (((unsigned) &ECCP3DEL)*8) + 7;
extern volatile __bit PA1 @ (((unsigned) &PORTC)*8) + 2;
extern volatile __bit PA2 @ (((unsigned) &PORTC)*8) + 1;
extern volatile __bit PCFG0 @ (((unsigned) &ANCON0)*8) + 0;
extern volatile __bit PCFG1 @ (((unsigned) &ANCON0)*8) + 1;
extern volatile __bit PCFG10 @ (((unsigned) &ANCON1)*8) + 2;
extern volatile __bit PCFG11 @ (((unsigned) &ANCON1)*8) + 3;
extern volatile __bit PCFG12 @ (((unsigned) &ANCON1)*8) + 4;
extern volatile __bit PCFG15 @ (((unsigned) &ANCON1)*8) + 7;
extern volatile __bit PCFG2 @ (((unsigned) &ANCON0)*8) + 2;
extern volatile __bit PCFG3 @ (((unsigned) &ANCON0)*8) + 3;
extern volatile __bit PCFG4 @ (((unsigned) &ANCON0)*8) + 4;
extern volatile __bit PCFG8 @ (((unsigned) &ANCON1)*8) + 0;
extern volatile __bit PCFG9 @ (((unsigned) &ANCON1)*8) + 1;
extern volatile __bit PD @ (((unsigned) &RCON)*8) + 2;
extern volatile __bit PEIE @ (((unsigned) &INTCON)*8) + 6;
extern volatile __bit PEIE_GIEL @ (((unsigned) &INTCON)*8) + 6;
extern volatile __bit PEN1 @ (((unsigned) &SSP1CON2)*8) + 2;
extern volatile __bit PEN2 @ (((unsigned) &SSP2CON2)*8) + 2;
extern volatile __bit PGC @ (((unsigned) &PORTB)*8) + 6;
extern volatile __bit PGD @ (((unsigned) &PORTB)*8) + 7;
extern volatile __bit PLLEN @ (((unsigned) &OSCTUNE)*8) + 6;
extern volatile __bit PMDADC @ (((unsigned) &PMDIS0)*8) + 0;
extern volatile __bit PMDCCP10 @ (((unsigned) &PMDIS3)*8) + 7;
extern volatile __bit PMDCCP4 @ (((unsigned) &PMDIS3)*8) + 1;
extern volatile __bit PMDCCP5 @ (((unsigned) &PMDIS3)*8) + 2;
extern volatile __bit PMDCCP6 @ (((unsigned) &PMDIS3)*8) + 3;
extern volatile __bit PMDCCP7 @ (((unsigned) &PMDIS3)*8) + 4;
extern volatile __bit PMDCCP8 @ (((unsigned) &PMDIS3)*8) + 5;
extern volatile __bit PMDCCP9 @ (((unsigned) &PMDIS3)*8) + 6;
extern volatile __bit PMDCMP1 @ (((unsigned) &PMDIS2)*8) + 0;
extern volatile __bit PMDCMP2 @ (((unsigned) &PMDIS2)*8) + 1;
extern volatile __bit PMDCMP3 @ (((unsigned) &PMDIS2)*8) + 2;
extern volatile __bit PMDCTMU @ (((unsigned) &PMDIS1)*8) + 6;
extern volatile __bit PMDECCP1 @ (((unsigned) &PMDIS0)*8) + 5;
extern volatile __bit PMDECCP2 @ (((unsigned) &PMDIS0)*8) + 6;
extern volatile __bit PMDECCP3 @ (((unsigned) &PMDIS0)*8) + 7;
extern volatile __bit PMDMSSP1 @ (((unsigned) &PMDIS0)*8) + 1;
extern volatile __bit PMDMSSP2 @ (((unsigned) &PMDIS0)*8) + 2;
extern volatile __bit PMDRTCC @ (((unsigned) &PMDIS1)*8) + 5;
extern volatile __bit PMDTMR1 @ (((unsigned) &PMDIS1)*8) + 1;
extern volatile __bit PMDTMR2 @ (((unsigned) &PMDIS1)*8) + 2;
extern volatile __bit PMDTMR3 @ (((unsigned) &PMDIS1)*8) + 3;
extern volatile __bit PMDTMR4 @ (((unsigned) &PMDIS1)*8) + 4;
extern volatile __bit PMDTMR5 @ (((unsigned) &PMDIS2)*8) + 3;
extern volatile __bit PMDTMR6 @ (((unsigned) &PMDIS2)*8) + 4;
extern volatile __bit PMDTMR8 @ (((unsigned) &PMDIS2)*8) + 6;
extern volatile __bit PMDUART1 @ (((unsigned) &PMDIS0)*8) + 3;
extern volatile __bit PMDUART2 @ (((unsigned) &PMDIS0)*8) + 4;
extern volatile __bit POR @ (((unsigned) &RCON)*8) + 1;
extern volatile __bit PRISD @ (((unsigned) &OSCCON2)*8) + 2;
extern volatile __bit PSA @ (((unsigned) &T0CON)*8) + 3;
extern volatile __bit PSS1AC0 @ (((unsigned) &ECCP1AS)*8) + 2;
extern volatile __bit PSS1AC1 @ (((unsigned) &ECCP1AS)*8) + 3;
extern volatile __bit PSS1BD0 @ (((unsigned) &ECCP1AS)*8) + 0;
extern volatile __bit PSS1BD1 @ (((unsigned) &ECCP1AS)*8) + 1;
extern volatile __bit PSS2AC0 @ (((unsigned) &ECCP2AS)*8) + 2;
extern volatile __bit PSS2AC1 @ (((unsigned) &ECCP2AS)*8) + 3;
extern volatile __bit PSS2BD0 @ (((unsigned) &ECCP2AS)*8) + 0;
extern volatile __bit PSS2BD1 @ (((unsigned) &ECCP2AS)*8) + 1;
extern volatile __bit PSS3AC0 @ (((unsigned) &ECCP3AS)*8) + 2;
extern volatile __bit PSS3AC1 @ (((unsigned) &ECCP3AS)*8) + 3;
extern volatile __bit PSS3BD0 @ (((unsigned) &ECCP3AS)*8) + 0;
extern volatile __bit PSS3BD1 @ (((unsigned) &ECCP3AS)*8) + 1;
extern volatile __bit RA0 @ (((unsigned) &PORTA)*8) + 0;
extern volatile __bit RA1 @ (((unsigned) &PORTA)*8) + 1;
extern volatile __bit RA2 @ (((unsigned) &PORTA)*8) + 2;
extern volatile __bit RA3 @ (((unsigned) &PORTA)*8) + 3;
extern volatile __bit RA4 @ (((unsigned) &PORTA)*8) + 4;
extern volatile __bit RA5 @ (((unsigned) &PORTA)*8) + 5;
extern volatile __bit RA6 @ (((unsigned) &PORTA)*8) + 6;
extern volatile __bit RA7 @ (((unsigned) &PORTA)*8) + 7;
extern volatile __bit RB0 @ (((unsigned) &PORTB)*8) + 0;
extern volatile __bit RB1 @ (((unsigned) &PORTB)*8) + 1;
extern volatile __bit RB2 @ (((unsigned) &PORTB)*8) + 2;
extern volatile __bit RB3 @ (((unsigned) &PORTB)*8) + 3;
extern volatile __bit RB4 @ (((unsigned) &PORTB)*8) + 4;
extern volatile __bit RB5 @ (((unsigned) &PORTB)*8) + 5;
extern volatile __bit RB6 @ (((unsigned) &PORTB)*8) + 6;
extern volatile __bit RB7 @ (((unsigned) &PORTB)*8) + 7;
extern volatile __bit RBIE @ (((unsigned) &INTCON)*8) + 3;
extern volatile __bit RBIF @ (((unsigned) &INTCON)*8) + 0;
extern volatile __bit RBIP @ (((unsigned) &INTCON2)*8) + 0;
extern volatile __bit RBPU @ (((unsigned) &INTCON2)*8) + 7;
extern volatile __bit RC0 @ (((unsigned) &PORTC)*8) + 0;
extern volatile __bit RC1 @ (((unsigned) &PORTC)*8) + 1;
extern volatile __bit RC1IE @ (((unsigned) &PIE1)*8) + 5;
extern volatile __bit RC1IF @ (((unsigned) &PIR1)*8) + 5;
extern volatile __bit RC1IP @ (((unsigned) &IPR1)*8) + 5;
extern volatile __bit RC2 @ (((unsigned) &PORTC)*8) + 2;
extern volatile __bit RC2IE @ (((unsigned) &PIE3)*8) + 5;
extern volatile __bit RC2IF @ (((unsigned) &PIR3)*8) + 5;
extern volatile __bit RC2IP @ (((unsigned) &IPR3)*8) + 5;
extern volatile __bit RC3 @ (((unsigned) &PORTC)*8) + 3;
extern volatile __bit RC4 @ (((unsigned) &PORTC)*8) + 4;
extern volatile __bit RC5 @ (((unsigned) &PORTC)*8) + 5;
extern volatile __bit RC6 @ (((unsigned) &PORTC)*8) + 6;
extern volatile __bit RC7 @ (((unsigned) &PORTC)*8) + 7;
extern volatile __bit RC8_9 @ (((unsigned) &RCSTA1)*8) + 6;
extern volatile __bit RC8_92 @ (((unsigned) &RCSTA2)*8) + 6;
extern volatile __bit RC9 @ (((unsigned) &RCSTA1)*8) + 6;
extern volatile __bit RC92 @ (((unsigned) &RCSTA2)*8) + 6;
extern volatile __bit RCD8 @ (((unsigned) &RCSTA1)*8) + 0;
extern volatile __bit RCD82 @ (((unsigned) &RCSTA2)*8) + 0;
extern volatile __bit RCEN1 @ (((unsigned) &SSP1CON2)*8) + 3;
extern volatile __bit RCEN2 @ (((unsigned) &SSP2CON2)*8) + 3;
extern volatile __bit RCIDL1 @ (((unsigned) &BAUDCON1)*8) + 6;
extern volatile __bit RCIDL2 @ (((unsigned) &BAUDCON2)*8) + 6;
extern volatile __bit RCIE @ (((unsigned) &PIE1)*8) + 5;
extern volatile __bit RCIF @ (((unsigned) &PIR1)*8) + 5;
extern volatile __bit RCIP @ (((unsigned) &IPR1)*8) + 5;
extern volatile __bit RCMT @ (((unsigned) &BAUDCON1)*8) + 6;
extern volatile __bit RCMT1 @ (((unsigned) &BAUDCON1)*8) + 6;
extern volatile __bit RCMT2 @ (((unsigned) &BAUDCON2)*8) + 6;
extern volatile __bit RD163 @ (((unsigned) &T3CON)*8) + 7;
extern volatile __bit RD165 @ (((unsigned) &T5CON)*8) + 1;
extern volatile __bit READ_WRITE @ (((unsigned) &SSP1STAT)*8) + 2;
extern volatile __bit READ_WRITE2 @ (((unsigned) &SSP2STAT)*8) + 2;
extern volatile __bit REFO @ (((unsigned) &PORTB)*8) + 2;
extern volatile __bit REGSLP @ (((unsigned) &WDTCON)*8) + 7;
extern volatile __bit RELEASE @ (((unsigned) &DSCONL)*8) + 0;
extern volatile __bit RI @ (((unsigned) &RCON)*8) + 4;
extern volatile __bit RJPU @ (((unsigned) &PORTA)*8) + 7;
extern volatile __bit RODIV0 @ (((unsigned) &REFOCON)*8) + 0;
extern volatile __bit RODIV1 @ (((unsigned) &REFOCON)*8) + 1;
extern volatile __bit RODIV2 @ (((unsigned) &REFOCON)*8) + 2;
extern volatile __bit RODIV3 @ (((unsigned) &REFOCON)*8) + 3;
extern volatile __bit ROON @ (((unsigned) &REFOCON)*8) + 7;
extern volatile __bit ROSEL @ (((unsigned) &REFOCON)*8) + 4;
extern volatile __bit ROSSLP @ (((unsigned) &REFOCON)*8) + 5;
extern volatile __bit RP0 @ (((unsigned) &PORTA)*8) + 0;
extern volatile __bit RP1 @ (((unsigned) &PORTA)*8) + 1;
extern volatile __bit RP10 @ (((unsigned) &PORTB)*8) + 7;
extern volatile __bit RP11 @ (((unsigned) &PORTC)*8) + 0;
extern volatile __bit RP12 @ (((unsigned) &PORTC)*8) + 1;
extern volatile __bit RP13 @ (((unsigned) &PORTC)*8) + 2;
extern volatile __bit RP14 @ (((unsigned) &PORTC)*8) + 3;
extern volatile __bit RP15 @ (((unsigned) &PORTC)*8) + 4;
extern volatile __bit RP16 @ (((unsigned) &PORTC)*8) + 5;
extern volatile __bit RP17 @ (((unsigned) &PORTC)*8) + 6;
extern volatile __bit RP18 @ (((unsigned) &PORTC)*8) + 7;
extern volatile __bit RP2 @ (((unsigned) &PORTA)*8) + 5;
extern volatile __bit RP3 @ (((unsigned) &PORTB)*8) + 0;
extern volatile __bit RP4 @ (((unsigned) &PORTB)*8) + 1;
extern volatile __bit RP5 @ (((unsigned) &PORTB)*8) + 2;
extern volatile __bit RP6 @ (((unsigned) &PORTB)*8) + 3;
extern volatile __bit RP7 @ (((unsigned) &PORTB)*8) + 4;
extern volatile __bit RP8 @ (((unsigned) &PORTB)*8) + 5;
extern volatile __bit RP9 @ (((unsigned) &PORTB)*8) + 6;
extern volatile __bit RSEN1 @ (((unsigned) &SSP1CON2)*8) + 1;
extern volatile __bit RSEN2 @ (((unsigned) &SSP2CON2)*8) + 1;
extern volatile __bit RTCC @ (((unsigned) &PORTB)*8) + 1;
extern volatile __bit RTCCIE @ (((unsigned) &PIE3)*8) + 0;
extern volatile __bit RTCCIF @ (((unsigned) &PIR3)*8) + 0;
extern volatile __bit RTCCIP @ (((unsigned) &IPR3)*8) + 0;
extern volatile __bit RTCCMD @ (((unsigned) &PMDIS1)*8) + 5;
extern volatile __bit RTCEN @ (((unsigned) &RTCCFG)*8) + 7;
extern volatile __bit RTCOE @ (((unsigned) &RTCCFG)*8) + 2;
extern volatile __bit RTCPTR0 @ (((unsigned) &RTCCFG)*8) + 0;
extern volatile __bit RTCPTR1 @ (((unsigned) &RTCCFG)*8) + 1;
extern volatile __bit RTCSYNC @ (((unsigned) &RTCCFG)*8) + 4;
extern volatile __bit RTCWDIS @ (((unsigned) &DSCONH)*8) + 0;
extern volatile __bit RTCWREN @ (((unsigned) &RTCCFG)*8) + 5;
extern volatile __bit RTSECSEL0 @ (((unsigned) &PADCFG1)*8) + 1;
extern volatile __bit RTSECSEL1 @ (((unsigned) &PADCFG1)*8) + 2;
extern volatile __bit RW @ (((unsigned) &SSP1STAT)*8) + 2;
extern volatile __bit RW1 @ (((unsigned) &SSP1STAT)*8) + 2;
extern volatile __bit RW2 @ (((unsigned) &SSP2STAT)*8) + 2;
extern volatile __bit RX1 @ (((unsigned) &PORTC)*8) + 7;
extern volatile __bit RX91 @ (((unsigned) &RCSTA1)*8) + 6;
extern volatile __bit RX92 @ (((unsigned) &RCSTA2)*8) + 6;
extern volatile __bit RX9D1 @ (((unsigned) &RCSTA1)*8) + 0;
extern volatile __bit RX9D2 @ (((unsigned) &RCSTA2)*8) + 0;
extern volatile __bit RXB0IE @ (((unsigned) &PIE3)*8) + 0;
extern volatile __bit RXB1IE @ (((unsigned) &PIE3)*8) + 1;
extern volatile __bit RXBNIE @ (((unsigned) &PIE3)*8) + 1;
extern volatile __bit RXBNIF @ (((unsigned) &PIR3)*8) + 1;
extern volatile __bit RXBNIP @ (((unsigned) &IPR3)*8) + 1;
extern volatile __bit RXCKP @ (((unsigned) &BAUDCON1)*8) + 5;
extern volatile __bit RXDTP1 @ (((unsigned) &BAUDCON1)*8) + 5;
extern volatile __bit RXDTP2 @ (((unsigned) &BAUDCON2)*8) + 5;
extern volatile __bit RXINC @ (((unsigned) &DMACON1)*8) + 4;
extern volatile __bit R_W @ (((unsigned) &SSP1STAT)*8) + 2;
extern volatile __bit R_W2 @ (((unsigned) &SSP2STAT)*8) + 2;
extern volatile __bit R_nW2 @ (((unsigned) &SSP2STAT)*8) + 2;
extern volatile __bit S2 @ (((unsigned) &SSP2STAT)*8) + 3;
extern volatile __bit SCK1 @ (((unsigned) &PORTC)*8) + 3;
extern volatile __bit SCKP @ (((unsigned) &BAUDCON1)*8) + 4;
extern volatile __bit SCKP1 @ (((unsigned) &BAUDCON1)*8) + 4;
extern volatile __bit SCKP2 @ (((unsigned) &BAUDCON2)*8) + 4;
extern volatile __bit SCL1 @ (((unsigned) &PORTC)*8) + 3;
extern volatile __bit SCL2 @ (((unsigned) &PORTB)*8) + 4;
extern volatile __bit SCS0 @ (((unsigned) &OSCCON)*8) + 0;
extern volatile __bit SCS1 @ (((unsigned) &OSCCON)*8) + 1;
extern volatile __bit SDA1 @ (((unsigned) &PORTC)*8) + 4;
extern volatile __bit SDA2 @ (((unsigned) &PORTB)*8) + 5;
extern volatile __bit SDI1 @ (((unsigned) &PORTC)*8) + 4;
extern volatile __bit SDO1 @ (((unsigned) &PORTC)*8) + 5;
extern volatile __bit SEN1 @ (((unsigned) &SSP1CON2)*8) + 0;
extern volatile __bit SEN2 @ (((unsigned) &SSP2CON2)*8) + 0;
extern volatile __bit SENDB1 @ (((unsigned) &TXSTA1)*8) + 3;
extern volatile __bit SENDB2 @ (((unsigned) &TXSTA2)*8) + 3;
extern volatile __bit SMP1 @ (((unsigned) &SSP1STAT)*8) + 7;
extern volatile __bit SMP2 @ (((unsigned) &SSP2STAT)*8) + 7;
extern volatile __bit SOSCDRV @ (((unsigned) &OSCCON2)*8) + 4;
extern volatile __bit SOSCEN @ (((unsigned) &T1CON)*8) + 3;
extern volatile __bit SOSCEN3 @ (((unsigned) &T3CON)*8) + 3;
extern volatile __bit SOSCEN5 @ (((unsigned) &T5CON)*8) + 3;
extern volatile __bit SOSCGO @ (((unsigned) &OSCCON2)*8) + 3;
extern volatile __bit SOSCRUN @ (((unsigned) &OSCCON2)*8) + 6;
extern volatile __bit SP0 @ (((unsigned) &STKPTR)*8) + 0;
extern volatile __bit SP1 @ (((unsigned) &STKPTR)*8) + 1;
extern volatile __bit SP2 @ (((unsigned) &STKPTR)*8) + 2;
extern volatile __bit SP3 @ (((unsigned) &STKPTR)*8) + 3;
extern volatile __bit SP4 @ (((unsigned) &STKPTR)*8) + 4;
extern volatile __bit SPEN1 @ (((unsigned) &RCSTA1)*8) + 7;
extern volatile __bit SPEN2 @ (((unsigned) &RCSTA2)*8) + 7;
extern volatile __bit SPI1MD @ (((unsigned) &PMDIS0)*8) + 1;
extern volatile __bit SPI1OD @ (((unsigned) &ODCON3)*8) + 0;
extern volatile __bit SPI2MD @ (((unsigned) &PMDIS0)*8) + 2;
extern volatile __bit SPI2OD @ (((unsigned) &ODCON3)*8) + 1;
extern volatile __bit SRC0 @ (((unsigned) &ADCTRIG)*8) + 0;
extern volatile __bit SRC1 @ (((unsigned) &ADCTRIG)*8) + 1;
extern volatile __bit SREN1 @ (((unsigned) &RCSTA1)*8) + 5;
extern volatile __bit SREN2 @ (((unsigned) &RCSTA2)*8) + 5;
extern volatile __bit SRENA @ (((unsigned) &RCSTA1)*8) + 5;
extern volatile __bit SSCON0 @ (((unsigned) &DMACON1)*8) + 6;
extern volatile __bit SSCON1 @ (((unsigned) &DMACON1)*8) + 7;
extern volatile __bit SSP1IE @ (((unsigned) &PIE1)*8) + 3;
extern volatile __bit SSP1IF @ (((unsigned) &PIR1)*8) + 3;
extern volatile __bit SSP1IP @ (((unsigned) &IPR1)*8) + 3;
extern volatile __bit SSP2IE @ (((unsigned) &PIE3)*8) + 7;
extern volatile __bit SSP2IF @ (((unsigned) &PIR3)*8) + 7;
extern volatile __bit SSP2IP @ (((unsigned) &IPR3)*8) + 7;
extern volatile __bit SSPEN1 @ (((unsigned) &SSP1CON1)*8) + 5;
extern volatile __bit SSPEN2 @ (((unsigned) &SSP2CON1)*8) + 5;
extern volatile __bit SSPIE @ (((unsigned) &PIE1)*8) + 3;
extern volatile __bit SSPIF @ (((unsigned) &PIR1)*8) + 3;
extern volatile __bit SSPIP @ (((unsigned) &IPR1)*8) + 3;
extern volatile __bit SSPM01 @ (((unsigned) &SSP1CON1)*8) + 0;
extern volatile __bit SSPM02 @ (((unsigned) &SSP2CON1)*8) + 0;
extern volatile __bit SSPM11 @ (((unsigned) &SSP1CON1)*8) + 1;
extern volatile __bit SSPM12 @ (((unsigned) &SSP2CON1)*8) + 1;
extern volatile __bit SSPM21 @ (((unsigned) &SSP1CON1)*8) + 2;
extern volatile __bit SSPM22 @ (((unsigned) &SSP2CON1)*8) + 2;
extern volatile __bit SSPM31 @ (((unsigned) &SSP1CON1)*8) + 3;
extern volatile __bit SSPM32 @ (((unsigned) &SSP2CON1)*8) + 3;
extern volatile __bit SSPOV1 @ (((unsigned) &SSP1CON1)*8) + 6;
extern volatile __bit SSPOV2 @ (((unsigned) &SSP2CON1)*8) + 6;
extern volatile __bit START @ (((unsigned) &SSP1STAT)*8) + 3;
extern volatile __bit START1 @ (((unsigned) &SSP1STAT)*8) + 3;
extern volatile __bit START2 @ (((unsigned) &SSP2STAT)*8) + 3;
extern volatile __bit STKFUL @ (((unsigned) &STKPTR)*8) + 7;
extern volatile __bit STKOVF @ (((unsigned) &STKPTR)*8) + 7;
extern volatile __bit STKUNF @ (((unsigned) &STKPTR)*8) + 6;
extern volatile __bit STOP @ (((unsigned) &SSP1STAT)*8) + 4;
extern volatile __bit STOP1 @ (((unsigned) &SSP1STAT)*8) + 4;
extern volatile __bit STOP2 @ (((unsigned) &SSP2STAT)*8) + 4;
extern volatile __bit STRA2 @ (((unsigned) &PSTR2CON)*8) + 0;
extern volatile __bit STRA3 @ (((unsigned) &PSTR3CON)*8) + 0;
extern volatile __bit STRB2 @ (((unsigned) &PSTR2CON)*8) + 1;
extern volatile __bit STRB3 @ (((unsigned) &PSTR3CON)*8) + 1;
extern volatile __bit STRC2 @ (((unsigned) &PSTR2CON)*8) + 2;
extern volatile __bit STRC3 @ (((unsigned) &PSTR3CON)*8) + 2;
extern volatile __bit STRD2 @ (((unsigned) &PSTR2CON)*8) + 3;
extern volatile __bit STRD3 @ (((unsigned) &PSTR3CON)*8) + 3;
extern volatile __bit STRSYNC2 @ (((unsigned) &PSTR2CON)*8) + 4;
extern volatile __bit STRSYNC3 @ (((unsigned) &PSTR3CON)*8) + 4;
extern volatile __bit SWDTE @ (((unsigned) &WDTCON)*8) + 0;
extern volatile __bit SWDTEN @ (((unsigned) &WDTCON)*8) + 0;
extern volatile __bit SYNC1 @ (((unsigned) &TXSTA1)*8) + 4;
extern volatile __bit SYNC2 @ (((unsigned) &TXSTA2)*8) + 4;
extern volatile __bit T08BIT @ (((unsigned) &T0CON)*8) + 6;
extern volatile __bit T0CS @ (((unsigned) &T0CON)*8) + 5;
extern volatile __bit T0IE @ (((unsigned) &INTCON)*8) + 5;
extern volatile __bit T0IF @ (((unsigned) &INTCON)*8) + 2;
extern volatile __bit T0IP @ (((unsigned) &INTCON2)*8) + 2;
extern volatile __bit T0PS0 @ (((unsigned) &T0CON)*8) + 0;
extern volatile __bit T0PS1 @ (((unsigned) &T0CON)*8) + 1;
extern volatile __bit T0PS2 @ (((unsigned) &T0CON)*8) + 2;
extern volatile __bit T0SE @ (((unsigned) &T0CON)*8) + 4;
extern volatile __bit T1CKI @ (((unsigned) &PORTC)*8) + 0;
extern volatile __bit T1CKPS0 @ (((unsigned) &T1CON)*8) + 4;
extern volatile __bit T1CKPS1 @ (((unsigned) &T1CON)*8) + 5;
extern volatile __bit T1DONE @ (((unsigned) &T1GCON)*8) + 3;
extern volatile __bit T1GGO @ (((unsigned) &T1GCON)*8) + 3;
extern volatile __bit T1GGO_NOT_T1DONE @ (((unsigned) &T1GCON)*8) + 3;
extern volatile __bit T1GGO_nT1DONE @ (((unsigned) &T1GCON)*8) + 3;
extern volatile __bit T1GPOL @ (((unsigned) &T1GCON)*8) + 6;
extern volatile __bit T1GSPM @ (((unsigned) &T1GCON)*8) + 4;
extern volatile __bit T1GSS0 @ (((unsigned) &T1GCON)*8) + 0;
extern volatile __bit T1GSS1 @ (((unsigned) &T1GCON)*8) + 1;
extern volatile __bit T1GTM @ (((unsigned) &T1GCON)*8) + 5;
extern volatile __bit T1GVAL @ (((unsigned) &T1GCON)*8) + 2;
extern volatile __bit T1OSCEN @ (((unsigned) &T1CON)*8) + 3;
extern volatile __bit T1OSI @ (((unsigned) &PORTC)*8) + 1;
extern volatile __bit T1OSO @ (((unsigned) &PORTC)*8) + 0;
extern volatile __bit T1RD16 @ (((unsigned) &T1CON)*8) + 7;
extern volatile __bit T2CKPS0 @ (((unsigned) &T2CON)*8) + 0;
extern volatile __bit T2CKPS1 @ (((unsigned) &T2CON)*8) + 1;
extern volatile __bit T2OUTPS0 @ (((unsigned) &T2CON)*8) + 3;
extern volatile __bit T2OUTPS1 @ (((unsigned) &T2CON)*8) + 4;
extern volatile __bit T2OUTPS2 @ (((unsigned) &T2CON)*8) + 5;
extern volatile __bit T2OUTPS3 @ (((unsigned) &T2CON)*8) + 6;
extern volatile __bit T3CKPS0 @ (((unsigned) &T3CON)*8) + 4;
extern volatile __bit T3CKPS1 @ (((unsigned) &T3CON)*8) + 5;
extern volatile __bit T3DONE @ (((unsigned) &T3GCON)*8) + 3;
extern volatile __bit T3GGO @ (((unsigned) &T3GCON)*8) + 3;
extern volatile __bit T3GGO_T3DONE @ (((unsigned) &T3GCON)*8) + 3;
extern volatile __bit T3GPOL @ (((unsigned) &T3GCON)*8) + 6;
extern volatile __bit T3GSPM @ (((unsigned) &T3GCON)*8) + 4;
extern volatile __bit T3GSS0 @ (((unsigned) &T3GCON)*8) + 0;
extern volatile __bit T3GSS1 @ (((unsigned) &T3GCON)*8) + 1;
extern volatile __bit T3GTM @ (((unsigned) &T3GCON)*8) + 5;
extern volatile __bit T3GVAL @ (((unsigned) &T3GCON)*8) + 2;
extern volatile __bit T3OSCEN @ (((unsigned) &T3CON)*8) + 3;
extern volatile __bit T3RD16 @ (((unsigned) &T3CON)*8) + 7;
extern volatile __bit T4CKPS0 @ (((unsigned) &T4CON)*8) + 0;
extern volatile __bit T4CKPS1 @ (((unsigned) &T4CON)*8) + 1;
extern volatile __bit T4OUTPS0 @ (((unsigned) &T4CON)*8) + 3;
extern volatile __bit T4OUTPS1 @ (((unsigned) &T4CON)*8) + 4;
extern volatile __bit T4OUTPS2 @ (((unsigned) &T4CON)*8) + 5;
extern volatile __bit T4OUTPS3 @ (((unsigned) &T4CON)*8) + 6;
extern volatile __bit T5CKPS0 @ (((unsigned) &T5CON)*8) + 4;
extern volatile __bit T5CKPS1 @ (((unsigned) &T5CON)*8) + 5;
extern volatile __bit T5DONE @ (((unsigned) &T5GCON)*8) + 3;
extern volatile __bit T5GGO @ (((unsigned) &T5GCON)*8) + 3;
extern volatile __bit T5GGO_NOT_T5DONE @ (((unsigned) &T5GCON)*8) + 3;
extern volatile __bit T5GGO_nT5DONE @ (((unsigned) &T5GCON)*8) + 3;
extern volatile __bit T5GPOL @ (((unsigned) &T5GCON)*8) + 6;
extern volatile __bit T5GSPM @ (((unsigned) &T5GCON)*8) + 4;
extern volatile __bit T5GSS0 @ (((unsigned) &T5GCON)*8) + 0;
extern volatile __bit T5GSS1 @ (((unsigned) &T5GCON)*8) + 1;
extern volatile __bit T5GTM @ (((unsigned) &T5GCON)*8) + 5;
extern volatile __bit T5GVAL @ (((unsigned) &T5GCON)*8) + 2;
extern volatile __bit T5OSCEN @ (((unsigned) &T5CON)*8) + 3;
extern volatile __bit T6CKPS0 @ (((unsigned) &T6CON)*8) + 0;
extern volatile __bit T6CKPS1 @ (((unsigned) &T6CON)*8) + 1;
extern volatile __bit T6OUTPS0 @ (((unsigned) &T6CON)*8) + 3;
extern volatile __bit T6OUTPS1 @ (((unsigned) &T6CON)*8) + 4;
extern volatile __bit T6OUTPS2 @ (((unsigned) &T6CON)*8) + 5;
extern volatile __bit T6OUTPS3 @ (((unsigned) &T6CON)*8) + 6;
extern volatile __bit T8CKPS0 @ (((unsigned) &T8CON)*8) + 0;
extern volatile __bit T8CKPS1 @ (((unsigned) &T8CON)*8) + 1;
extern volatile __bit T8OUTPS0 @ (((unsigned) &T8CON)*8) + 3;
extern volatile __bit T8OUTPS1 @ (((unsigned) &T8CON)*8) + 4;
extern volatile __bit T8OUTPS2 @ (((unsigned) &T8CON)*8) + 5;
extern volatile __bit T8OUTPS3 @ (((unsigned) &T8CON)*8) + 6;
extern volatile __bit TGEN @ (((unsigned) &CTMUCONH)*8) + 4;
extern volatile __bit TMR0IE @ (((unsigned) &INTCON)*8) + 5;
extern volatile __bit TMR0IF @ (((unsigned) &INTCON)*8) + 2;
extern volatile __bit TMR0IP @ (((unsigned) &INTCON2)*8) + 2;
extern volatile __bit TMR0ON @ (((unsigned) &T0CON)*8) + 7;
extern volatile __bit TMR1CS0 @ (((unsigned) &T1CON)*8) + 6;
extern volatile __bit TMR1CS1 @ (((unsigned) &T1CON)*8) + 7;
extern volatile __bit TMR1GE @ (((unsigned) &T1GCON)*8) + 7;
extern volatile __bit TMR1GIE @ (((unsigned) &PIE5)*8) + 0;
extern volatile __bit TMR1GIF @ (((unsigned) &PIR5)*8) + 0;
extern volatile __bit TMR1GIP @ (((unsigned) &IPR5)*8) + 0;
extern volatile __bit TMR1IE @ (((unsigned) &PIE1)*8) + 0;
extern volatile __bit TMR1IF @ (((unsigned) &PIR1)*8) + 0;
extern volatile __bit TMR1IP @ (((unsigned) &IPR1)*8) + 0;
extern volatile __bit TMR1MD @ (((unsigned) &PMDIS1)*8) + 1;
extern volatile __bit TMR1ON @ (((unsigned) &T1CON)*8) + 0;
extern volatile __bit TMR2IE @ (((unsigned) &PIE1)*8) + 1;
extern volatile __bit TMR2IF @ (((unsigned) &PIR1)*8) + 1;
extern volatile __bit TMR2IP @ (((unsigned) &IPR1)*8) + 1;
extern volatile __bit TMR2MD @ (((unsigned) &PMDIS1)*8) + 2;
extern volatile __bit TMR2ON @ (((unsigned) &T2CON)*8) + 2;
extern volatile __bit TMR3CS0 @ (((unsigned) &T3CON)*8) + 6;
extern volatile __bit TMR3CS1 @ (((unsigned) &T3CON)*8) + 7;
extern volatile __bit TMR3GE @ (((unsigned) &T3GCON)*8) + 7;
extern volatile __bit TMR3GIE @ (((unsigned) &PIE3)*8) + 1;
extern volatile __bit TMR3GIF @ (((unsigned) &PIR3)*8) + 1;
extern volatile __bit TMR3GIP @ (((unsigned) &IPR3)*8) + 1;
extern volatile __bit TMR3IE @ (((unsigned) &PIE2)*8) + 1;
extern volatile __bit TMR3IF @ (((unsigned) &PIR2)*8) + 1;
extern volatile __bit TMR3IP @ (((unsigned) &IPR2)*8) + 1;
extern volatile __bit TMR3MD @ (((unsigned) &PMDIS1)*8) + 3;
extern volatile __bit TMR3ON @ (((unsigned) &T3CON)*8) + 0;
extern volatile __bit TMR4IE @ (((unsigned) &PIE3)*8) + 3;
extern volatile __bit TMR4IF @ (((unsigned) &PIR3)*8) + 3;
extern volatile __bit TMR4IP @ (((unsigned) &IPR3)*8) + 3;
extern volatile __bit TMR4MD @ (((unsigned) &PMDIS1)*8) + 4;
extern volatile __bit TMR4ON @ (((unsigned) &T4CON)*8) + 2;
extern volatile __bit TMR5CS0 @ (((unsigned) &T5CON)*8) + 6;
extern volatile __bit TMR5CS1 @ (((unsigned) &T5CON)*8) + 7;
extern volatile __bit TMR5GE @ (((unsigned) &T5GCON)*8) + 7;
extern volatile __bit TMR5GIE @ (((unsigned) &PIE5)*8) + 1;
extern volatile __bit TMR5GIF @ (((unsigned) &PIR5)*8) + 1;
extern volatile __bit TMR5GIP @ (((unsigned) &IPR5)*8) + 1;
extern volatile __bit TMR5IE @ (((unsigned) &PIE5)*8) + 2;
extern volatile __bit TMR5IF @ (((unsigned) &PIR5)*8) + 2;
extern volatile __bit TMR5IP @ (((unsigned) &IPR5)*8) + 2;
extern volatile __bit TMR5MD @ (((unsigned) &PMDIS2)*8) + 3;
extern volatile __bit TMR5ON @ (((unsigned) &T5CON)*8) + 0;
extern volatile __bit TMR6IE @ (((unsigned) &PIE5)*8) + 3;
extern volatile __bit TMR6IF @ (((unsigned) &PIR5)*8) + 3;
extern volatile __bit TMR6IP @ (((unsigned) &IPR5)*8) + 3;
extern volatile __bit TMR6MD @ (((unsigned) &PMDIS2)*8) + 4;
extern volatile __bit TMR6ON @ (((unsigned) &T6CON)*8) + 2;
extern volatile __bit TMR8IE @ (((unsigned) &PIE5)*8) + 4;
extern volatile __bit TMR8IF @ (((unsigned) &PIR5)*8) + 4;
extern volatile __bit TMR8IP @ (((unsigned) &IPR5)*8) + 4;
extern volatile __bit TMR8MD @ (((unsigned) &PMDIS2)*8) + 6;
extern volatile __bit TMR8ON @ (((unsigned) &T8CON)*8) + 2;
extern volatile __bit TO @ (((unsigned) &RCON)*8) + 3;
extern volatile __bit TRIGSEL0 @ (((unsigned) &ADCTRIG)*8) + 0;
extern volatile __bit TRIGSEL1 @ (((unsigned) &ADCTRIG)*8) + 1;
extern volatile __bit TRISA0 @ (((unsigned) &TRISA)*8) + 0;
extern volatile __bit TRISA1 @ (((unsigned) &TRISA)*8) + 1;
extern volatile __bit TRISA2 @ (((unsigned) &TRISA)*8) + 2;
extern volatile __bit TRISA3 @ (((unsigned) &TRISA)*8) + 3;
extern volatile __bit TRISA5 @ (((unsigned) &TRISA)*8) + 5;
extern volatile __bit TRISA6 @ (((unsigned) &TRISA)*8) + 6;
extern volatile __bit TRISA7 @ (((unsigned) &TRISA)*8) + 7;
extern volatile __bit TRISB0 @ (((unsigned) &TRISB)*8) + 0;
extern volatile __bit TRISB1 @ (((unsigned) &TRISB)*8) + 1;
extern volatile __bit TRISB2 @ (((unsigned) &TRISB)*8) + 2;
extern volatile __bit TRISB3 @ (((unsigned) &TRISB)*8) + 3;
extern volatile __bit TRISB4 @ (((unsigned) &TRISB)*8) + 4;
extern volatile __bit TRISB5 @ (((unsigned) &TRISB)*8) + 5;
extern volatile __bit TRISB6 @ (((unsigned) &TRISB)*8) + 6;
extern volatile __bit TRISB7 @ (((unsigned) &TRISB)*8) + 7;
extern volatile __bit TRISC0 @ (((unsigned) &TRISC)*8) + 0;
extern volatile __bit TRISC1 @ (((unsigned) &TRISC)*8) + 1;
extern volatile __bit TRISC2 @ (((unsigned) &TRISC)*8) + 2;
extern volatile __bit TRISC3 @ (((unsigned) &TRISC)*8) + 3;
extern volatile __bit TRISC4 @ (((unsigned) &TRISC)*8) + 4;
extern volatile __bit TRISC5 @ (((unsigned) &TRISC)*8) + 5;
extern volatile __bit TRISC6 @ (((unsigned) &TRISC)*8) + 6;
extern volatile __bit TRISC7 @ (((unsigned) &TRISC)*8) + 7;
extern volatile __bit TRMT1 @ (((unsigned) &TXSTA1)*8) + 1;
extern volatile __bit TRMT2 @ (((unsigned) &TXSTA2)*8) + 1;
extern volatile __bit TUN0 @ (((unsigned) &OSCTUNE)*8) + 0;
extern volatile __bit TUN1 @ (((unsigned) &OSCTUNE)*8) + 1;
extern volatile __bit TUN2 @ (((unsigned) &OSCTUNE)*8) + 2;
extern volatile __bit TUN3 @ (((unsigned) &OSCTUNE)*8) + 3;
extern volatile __bit TUN4 @ (((unsigned) &OSCTUNE)*8) + 4;
extern volatile __bit TUN5 @ (((unsigned) &OSCTUNE)*8) + 5;
extern volatile __bit TX1 @ (((unsigned) &PORTC)*8) + 6;
extern volatile __bit TX1IE @ (((unsigned) &PIE1)*8) + 4;
extern volatile __bit TX1IF @ (((unsigned) &PIR1)*8) + 4;
extern volatile __bit TX1IP @ (((unsigned) &IPR1)*8) + 4;
extern volatile __bit TX2IE @ (((unsigned) &PIE3)*8) + 4;
extern volatile __bit TX2IF @ (((unsigned) &PIR3)*8) + 4;
extern volatile __bit TX2IP @ (((unsigned) &IPR3)*8) + 4;
extern volatile __bit TX8_9 @ (((unsigned) &TXSTA1)*8) + 6;
extern volatile __bit TX8_92 @ (((unsigned) &TXSTA2)*8) + 6;
extern volatile __bit TX91 @ (((unsigned) &TXSTA1)*8) + 6;
extern volatile __bit TX92 @ (((unsigned) &TXSTA2)*8) + 6;
extern volatile __bit TX9D1 @ (((unsigned) &TXSTA1)*8) + 0;
extern volatile __bit TX9D2 @ (((unsigned) &TXSTA2)*8) + 0;
extern volatile __bit TXB0IE @ (((unsigned) &PIE3)*8) + 2;
extern volatile __bit TXB1IE @ (((unsigned) &PIE3)*8) + 3;
extern volatile __bit TXB2IE @ (((unsigned) &PIE3)*8) + 4;
extern volatile __bit TXBNIE @ (((unsigned) &PIE3)*8) + 4;
extern volatile __bit TXBNIF @ (((unsigned) &PIR3)*8) + 4;
extern volatile __bit TXBNIP @ (((unsigned) &IPR3)*8) + 4;
extern volatile __bit TXCKP1 @ (((unsigned) &BAUDCON1)*8) + 4;
extern volatile __bit TXCKP2 @ (((unsigned) &BAUDCON2)*8) + 4;
extern volatile __bit TXD8 @ (((unsigned) &TXSTA1)*8) + 0;
extern volatile __bit TXD82 @ (((unsigned) &TXSTA2)*8) + 0;
extern volatile __bit TXEN1 @ (((unsigned) &TXSTA1)*8) + 5;
extern volatile __bit TXEN2 @ (((unsigned) &TXSTA2)*8) + 5;
extern volatile __bit TXIE @ (((unsigned) &PIE1)*8) + 4;
extern volatile __bit TXIF @ (((unsigned) &PIR1)*8) + 4;
extern volatile __bit TXINC @ (((unsigned) &DMACON1)*8) + 5;
extern volatile __bit TXIP @ (((unsigned) &IPR1)*8) + 4;
extern volatile __bit U1OD @ (((unsigned) &ODCON2)*8) + 0;
extern volatile __bit U2OD @ (((unsigned) &ODCON2)*8) + 1;
extern volatile __bit UA1 @ (((unsigned) &SSP1STAT)*8) + 1;
extern volatile __bit UA2 @ (((unsigned) &SSP2STAT)*8) + 1;
extern volatile __bit UART1MD @ (((unsigned) &PMDIS0)*8) + 3;
extern volatile __bit UART2MD @ (((unsigned) &PMDIS0)*8) + 4;
extern volatile __bit ULPEN @ (((unsigned) &WDTCON)*8) + 2;
extern volatile __bit ULPLVL @ (((unsigned) &WDTCON)*8) + 5;
extern volatile __bit ULPSINK @ (((unsigned) &WDTCON)*8) + 1;
extern volatile __bit ULPWDIS @ (((unsigned) &DSCONL)*8) + 2;
extern volatile __bit ULPWU @ (((unsigned) &PORTA)*8) + 0;
extern volatile __bit ULPWUIN @ (((unsigned) &PORTA)*8) + 0;
extern volatile __bit VBG @ (((unsigned) &PORTA)*8) + 1;
extern volatile __bit VBGEN @ (((unsigned) &ANCON1)*8) + 7;
extern volatile __bit VBGOE @ (((unsigned) &WDTCON)*8) + 4;
extern volatile __bit VCFG0 @ (((unsigned) &ADCON0)*8) + 6;
extern volatile __bit VCFG01 @ (((unsigned) &ADCON1)*8) + 4;
extern volatile __bit VCFG1 @ (((unsigned) &ADCON0)*8) + 7;
extern volatile __bit VCFG11 @ (((unsigned) &ADCON1)*8) + 5;
extern volatile __bit VDIRMAG @ (((unsigned) &HLVDCON)*8) + 7;
extern volatile __bit VREF_MINUS @ (((unsigned) &PORTA)*8) + 2;
extern volatile __bit VREF_PLUS @ (((unsigned) &PORTA)*8) + 3;
extern volatile __bit W4E @ (((unsigned) &BAUDCON1)*8) + 1;
extern volatile __bit WAITB0 @ (((unsigned) &RTCVALH)*8) + 6;
extern volatile __bit WAITB1 @ (((unsigned) &RTCVALH)*8) + 7;
extern volatile __bit WAITE0 @ (((unsigned) &RTCVALH)*8) + 0;
extern volatile __bit WAITE1 @ (((unsigned) &RTCVALH)*8) + 1;
extern volatile __bit WAITM0 @ (((unsigned) &RTCVALH)*8) + 2;
extern volatile __bit WAITM1 @ (((unsigned) &RTCVALH)*8) + 3;
extern volatile __bit WAITM2 @ (((unsigned) &RTCVALH)*8) + 4;
extern volatile __bit WAITM3 @ (((unsigned) &RTCVALH)*8) + 5;
extern volatile __bit WCOL1 @ (((unsigned) &SSP1CON1)*8) + 7;
extern volatile __bit WCOL2 @ (((unsigned) &SSP2CON1)*8) + 7;
extern volatile __bit WPROG @ (((unsigned) &EECON1)*8) + 5;
extern volatile __bit WR @ (((unsigned) &EECON1)*8) + 1;
extern volatile __bit WREN @ (((unsigned) &EECON1)*8) + 2;
extern volatile __bit WRERR @ (((unsigned) &EECON1)*8) + 3;
extern volatile __bit WUE1 @ (((unsigned) &BAUDCON1)*8) + 1;
extern volatile __bit WUE2 @ (((unsigned) &BAUDCON2)*8) + 1;
extern volatile __bit ZERO @ (((unsigned) &STATUS)*8) + 2;
extern volatile __bit nA @ (((unsigned) &SSP1STAT)*8) + 5;
extern volatile __bit nA2 @ (((unsigned) &SSP2STAT)*8) + 5;
extern volatile __bit nADDRESS @ (((unsigned) &SSP1STAT)*8) + 5;
extern volatile __bit nADDRESS2 @ (((unsigned) &SSP2STAT)*8) + 5;
extern volatile __bit nBOR @ (((unsigned) &RCON)*8) + 0;
extern volatile __bit nCM @ (((unsigned) &RCON)*8) + 5;
extern volatile __bit nDONE @ (((unsigned) &ADCON0)*8) + 1;
extern volatile __bit nPD @ (((unsigned) &RCON)*8) + 2;
extern volatile __bit nPOR @ (((unsigned) &RCON)*8) + 1;
extern volatile __bit nRBPU @ (((unsigned) &INTCON2)*8) + 7;
extern volatile __bit nRC8 @ (((unsigned) &RCSTA1)*8) + 6;
extern volatile __bit nRI @ (((unsigned) &RCON)*8) + 4;
extern volatile __bit nSS1 @ (((unsigned) &PORTA)*8) + 5;
extern volatile __bit nT1DONE @ (((unsigned) &T1GCON)*8) + 3;
extern volatile __bit nT1SYNC @ (((unsigned) &T1CON)*8) + 2;
extern volatile __bit nT3SYNC @ (((unsigned) &T3CON)*8) + 2;
extern volatile __bit nT5DONE @ (((unsigned) &T5GCON)*8) + 3;
extern volatile __bit nT5SYNC @ (((unsigned) &T5CON)*8) + 2;
extern volatile __bit nTO @ (((unsigned) &RCON)*8) + 3;
extern volatile __bit nTX8 @ (((unsigned) &TXSTA1)*8) + 6;
extern volatile __bit nW @ (((unsigned) &SSP1STAT)*8) + 2;
extern volatile __bit nW2 @ (((unsigned) &SSP2STAT)*8) + 2;
extern volatile __bit nWRITE @ (((unsigned) &SSP1STAT)*8) + 2;
extern volatile __bit nWRITE2 @ (((unsigned) &SSP2STAT)*8) + 2;
# 2008 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\plib\adc.h"
union ADCResult
{
int lr;
char br[2];
};
char BusyADC (void);
void ConvertADC (void);
void CloseADC(void);
# 2026
int ReadADC(void);
# 2052
void OpenADC ( unsigned char ,
unsigned char ,
unsigned char ,
unsigned int );
# 2084
void SetChanADC(unsigned char );
# 2100
void SelChanConvADC( unsigned char );
# 202 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\plib\ancomp.h"
void Close_ancomp1( void );
void Open_ancomp1(unsigned char config);
void Close_ancomp2( void );
void Open_ancomp2(unsigned char config);
void Close_ancomp3( void );
void Open_ancomp3(unsigned char config);
# 236 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\plib\spi.h"
void OpenSPI1( unsigned char sync_mode,
unsigned char bus_mode,
unsigned char smp_phase );
signed char WriteSPI1( unsigned char data_out );
void getsSPI1( unsigned char *rdptr, unsigned char length );
void putsSPI1( unsigned char *wrptr );
unsigned char ReadSPI1( void );
# 441
void OpenSPI2( unsigned char sync_mode,
unsigned char bus_mode,
unsigned char smp_phase );
signed char WriteSPI2( unsigned char data_out );
void getsSPI2( unsigned char *rdptr, unsigned char length );
void putsSPI2( unsigned char *wrptr );
unsigned char ReadSPI2( void );
# 414 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\plib\can2510.h"
void CAN2510Initialize( unsigned int configuration,
unsigned char brp,
unsigned char interruptFlags,
unsigned char SPI_syncMode,
unsigned char SPI_busMode,
unsigned char SPI_smpPhase );
signed char CAN2510Init( unsigned long BufferConfig,
unsigned long BitTimeConfig,
unsigned char interruptEnables,
unsigned char SPI_syncMode,
unsigned char SPI_busMode,
unsigned char SPI_smpPhase );
void CAN2510Enable( void );
void CAN2510Disable( void );
void CAN2510Reset( void );
void CAN2510SetMode( unsigned char mode );
unsigned char CAN2510ReadMode( void );
unsigned char CAN2510ReadStatus( void );
unsigned char CAN2510ErrorState( void );
unsigned char CAN2510InterruptStatus( void );
void CAN2510InterruptEnable( unsigned char interruptFlags );
unsigned char CAN2510ByteRead( unsigned char addr );
void CAN2510ByteWrite( unsigned char addr, unsigned char value );
void CAN2510SequentialRead( unsigned char *DataArray,
unsigned char CAN2510addr,
unsigned char numbytes );
void CAN2510SequentialWrite( unsigned char *DataArray,
unsigned char CAN2510addr,
unsigned char numbytes );
void CAN2510BitModify( unsigned char address,
unsigned char mask,
unsigned char data );
void CAN2510SetSingleMaskStd( unsigned char maskNum, unsigned int mask );
void CAN2510SetSingleMaskXtd( unsigned char maskNum, unsigned long mask );
void CAN2510SetSingleFilterStd( unsigned char filterNum, unsigned int filter );
void CAN2510SetSingleFilterXtd( unsigned char filterNum, unsigned long filter );
signed char CAN2510SetMsgFilterStd( unsigned char bufferNum,
unsigned int mask,
unsigned int *filters );
signed char CAN2510SetMsgFilterXtd( unsigned char bufferNum,
unsigned long mask,
unsigned long *filters );
signed char CAN2510WriteStd( unsigned int msgId,
unsigned char msgPriority,
unsigned char numBytes,
unsigned char *data );
signed char CAN2510WriteXtd( unsigned long msgId,
unsigned char msgPriority,
unsigned char numBytes,
unsigned char *data );
void CAN2510LoadBufferStd( unsigned char bufferNum,
unsigned int msgId,
unsigned char numBytes,
unsigned char *data );
void CAN2510LoadBufferXtd( unsigned char bufferNum,
unsigned long msgId,
unsigned char numBytes,
unsigned char *data );
void CAN2510LoadRTRStd( unsigned char bufferNum,
unsigned int msgId,
unsigned char numBytes );
void CAN2510LoadRTRXtd( unsigned char bufferNum,
unsigned long msgId,
unsigned char numBytes );
void CAN2510SetBufferPriority( unsigned char bufferNum,
unsigned char bufferPriority );
void CAN2510SendBuffer( unsigned char bufferNumber );
signed char CAN2510WriteBuffer( unsigned char bufferNum );
unsigned char CAN2510DataReady( unsigned char bufferNum );
unsigned char CAN2510DataRead( unsigned char bufferNum,
unsigned long *msgId,
unsigned char *numBytes,
unsigned char *data );
# 64 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\plib\capture.h"
union capstatus
{
# 73
struct
{
# 91
unsigned Cap4OVF:1;
unsigned Cap5OVF:1;
unsigned Cap6OVF:1;
unsigned Cap7OVF:1;
unsigned Cap8OVF:1;
# 107
unsigned ECap1OVF:1;
unsigned ECap2OVF:1;
unsigned ECap3OVF:1;
};
unsigned :8;
};
extern union capstatus CapStatus;
union CapResult
{
unsigned int lc;
char bc[2];
};
# 507
void OpenCapture4 ( unsigned char config);
unsigned int ReadCapture4 (void);
void CloseCapture4 (void);
void OpenCapture5 ( unsigned char config);
unsigned int ReadCapture5 (void);
void CloseCapture5 (void);
# 520
void OpenCapture6 ( unsigned char config);
unsigned int ReadCapture6 (void);
void CloseCapture6 (void);
void OpenCapture7 ( unsigned char config);
unsigned int ReadCapture7 (void);
void CloseCapture7 (void);
void OpenCapture8 ( unsigned char config);
unsigned int ReadCapture8 (void);
void CloseCapture8 (void);
# 568
void OpenECapture1 ( unsigned char config);
unsigned int ReadECapture1 (void);
void CloseECapture1 (void);
void OpenECapture2 ( unsigned char config);
unsigned int ReadECapture2 (void);
void CloseECapture2 (void);
void OpenECapture3 ( unsigned char config);
unsigned int ReadECapture3 (void);
void CloseECapture3 (void);
# 403 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\plib\compare.h"
void OpenCompare4(unsigned char config,unsigned int period);
void CloseCompare4(void);
void OpenCompare5(unsigned char config,unsigned int period);
void CloseCompare5(void);
void OpenCompare6(unsigned char config,unsigned int period);
void CloseCompare6(void);
void OpenCompare7(unsigned char config,unsigned int period);
void CloseCompare7(void);
void OpenCompare8(unsigned char config,unsigned int period);
void CloseCompare8(void);
# 433
void OpenECompare1(unsigned char config,unsigned int period);
void CloseECompare1(void);
# 439
void OpenECompare2(unsigned char config,unsigned int period);
void CloseECompare2(void);
void OpenECompare3(unsigned char config,unsigned int period);
void CloseECompare3(void);
# 374 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\plib\ctmu.h"
void OpenCTMU(unsigned char config1,unsigned char config2,unsigned char config3);
# 379
void CurrentControlCTMU(unsigned char config);
void CloseCTMU(void);
# 49 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\plib\dpslp.h"
typedef union
{
struct
{
unsigned char DS_POR:1;
unsigned char DS_MCLR:1;
unsigned char DS_RTC:1;
unsigned char DS_WDT:1;
unsigned char DS_FLT:1;
unsigned char DS_INT0:1;
unsigned char DS_BOR:1;
unsigned char DS_ULP:1;
}WK_SRC;
unsigned char WKSRC;
}SRC;
typedef struct
{
unsigned char Reg0;
unsigned char Reg1;
}CONTEXT;
# 164
extern void DeepSleepWakeUpSource(SRC* ptr);
extern void GotoDeepSleep( unsigned int config);
extern signed char IsResetFromDeepSleep( void );
extern void ReadDSGPR( CONTEXT* ptr );
extern void ULPWakeUpEnable( void );
# 2 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\stddef.h"
typedef int ptrdiff_t;
typedef unsigned size_t;
typedef unsigned short wchar_t;
# 13
extern int errno;
# 65 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\GenericTypeDefs.h"
typedef enum _BOOL { FALSE = 0, TRUE } BOOL;
typedef enum _BIT { CLEAR = 0, SET } BIT;
# 75
typedef signed int INT;
typedef signed char INT8;
typedef signed short int INT16;
typedef signed long int INT32;
typedef signed long long INT64;
typedef unsigned int UINT;
typedef unsigned char UINT8;
typedef unsigned short int UINT16;
# 93
typedef unsigned long int UINT32;
typedef unsigned long long UINT64;
typedef union
{
UINT8 Val;
struct
{
UINT8 b0:1;
UINT8 b1:1;
UINT8 b2:1;
UINT8 b3:1;
UINT8 b4:1;
UINT8 b5:1;
UINT8 b6:1;
UINT8 b7:1;
} bits;
} UINT8_VAL, UINT8_BITS;
typedef union
{
UINT16 Val;
UINT8 v[2] ;
struct
{
UINT8 LB;
UINT8 HB;
} byte;
struct
{
UINT8 b0:1;
UINT8 b1:1;
UINT8 b2:1;
UINT8 b3:1;
UINT8 b4:1;
UINT8 b5:1;
UINT8 b6:1;
UINT8 b7:1;
UINT8 b8:1;
UINT8 b9:1;
UINT8 b10:1;
UINT8 b11:1;
UINT8 b12:1;
UINT8 b13:1;
UINT8 b14:1;
UINT8 b15:1;
} bits;
} UINT16_VAL, UINT16_BITS;
# 187
typedef union
{
UINT32 Val;
UINT16 w[2] ;
UINT8 v[4] ;
struct
{
UINT16 LW;
UINT16 HW;
} word;
struct
{
UINT8 LB;
UINT8 HB;
UINT8 UB;
UINT8 MB;
} byte;
struct
{
UINT16_VAL low;
UINT16_VAL high;
}wordUnion;
struct
{
UINT8 b0:1;
UINT8 b1:1;
UINT8 b2:1;
UINT8 b3:1;
UINT8 b4:1;
UINT8 b5:1;
UINT8 b6:1;
UINT8 b7:1;
UINT8 b8:1;
UINT8 b9:1;
UINT8 b10:1;
UINT8 b11:1;
UINT8 b12:1;
UINT8 b13:1;
UINT8 b14:1;
UINT8 b15:1;
UINT8 b16:1;
UINT8 b17:1;
UINT8 b18:1;
UINT8 b19:1;
UINT8 b20:1;
UINT8 b21:1;
UINT8 b22:1;
UINT8 b23:1;
UINT8 b24:1;
UINT8 b25:1;
UINT8 b26:1;
UINT8 b27:1;
UINT8 b28:1;
UINT8 b29:1;
UINT8 b30:1;
UINT8 b31:1;
} bits;
} UINT32_VAL;
typedef union
{
UINT64 Val;
UINT32 d[2] ;
UINT16 w[4] ;
UINT8 v[8] ;
struct
{
UINT32 LD;
UINT32 HD;
} dword;
struct
{
UINT16 LW;
UINT16 HW;
UINT16 UW;
UINT16 MW;
} word;
struct
{
UINT8 b0:1;
UINT8 b1:1;
UINT8 b2:1;
UINT8 b3:1;
UINT8 b4:1;
UINT8 b5:1;
UINT8 b6:1;
UINT8 b7:1;
UINT8 b8:1;
UINT8 b9:1;
UINT8 b10:1;
UINT8 b11:1;
UINT8 b12:1;
UINT8 b13:1;
UINT8 b14:1;
UINT8 b15:1;
UINT8 b16:1;
UINT8 b17:1;
UINT8 b18:1;
UINT8 b19:1;
UINT8 b20:1;
UINT8 b21:1;
UINT8 b22:1;
UINT8 b23:1;
UINT8 b24:1;
UINT8 b25:1;
UINT8 b26:1;
UINT8 b27:1;
UINT8 b28:1;
UINT8 b29:1;
UINT8 b30:1;
UINT8 b31:1;
UINT8 b32:1;
UINT8 b33:1;
UINT8 b34:1;
UINT8 b35:1;
UINT8 b36:1;
UINT8 b37:1;
UINT8 b38:1;
UINT8 b39:1;
UINT8 b40:1;
UINT8 b41:1;
UINT8 b42:1;
UINT8 b43:1;
UINT8 b44:1;
UINT8 b45:1;
UINT8 b46:1;
UINT8 b47:1;
UINT8 b48:1;
UINT8 b49:1;
UINT8 b50:1;
UINT8 b51:1;
UINT8 b52:1;
UINT8 b53:1;
UINT8 b54:1;
UINT8 b55:1;
UINT8 b56:1;
UINT8 b57:1;
UINT8 b58:1;
UINT8 b59:1;
UINT8 b60:1;
UINT8 b61:1;
UINT8 b62:1;
UINT8 b63:1;
} bits;
} UINT64_VAL;
# 339
typedef void VOID;
typedef char CHAR8;
typedef unsigned char UCHAR8;
typedef unsigned char BYTE;
typedef unsigned short int WORD;
typedef unsigned long DWORD;
typedef unsigned long long QWORD;
typedef signed char CHAR;
typedef signed short int SHORT;
typedef signed long LONG;
typedef signed long long LONGLONG;
typedef union
{
BYTE Val;
struct
{
BYTE b0:1;
BYTE b1:1;
BYTE b2:1;
BYTE b3:1;
BYTE b4:1;
BYTE b5:1;
BYTE b6:1;
BYTE b7:1;
} bits;
} BYTE_VAL, BYTE_BITS;
typedef union
{
WORD Val;
BYTE v[2] ;
struct
{
BYTE LB;
BYTE HB;
} byte;
struct
{
BYTE b0:1;
BYTE b1:1;
BYTE b2:1;
BYTE b3:1;
BYTE b4:1;
BYTE b5:1;
BYTE b6:1;
BYTE b7:1;
BYTE b8:1;
BYTE b9:1;
BYTE b10:1;
BYTE b11:1;
BYTE b12:1;
BYTE b13:1;
BYTE b14:1;
BYTE b15:1;
} bits;
} WORD_VAL, WORD_BITS;
typedef union
{
DWORD Val;
WORD w[2] ;
BYTE v[4] ;
struct
{
WORD LW;
WORD HW;
} word;
struct
{
BYTE LB;
BYTE HB;
BYTE UB;
BYTE MB;
} byte;
struct
{
WORD_VAL low;
WORD_VAL high;
}wordUnion;
struct
{
BYTE b0:1;
BYTE b1:1;
BYTE b2:1;
BYTE b3:1;
BYTE b4:1;
BYTE b5:1;
BYTE b6:1;
BYTE b7:1;
BYTE b8:1;
BYTE b9:1;
BYTE b10:1;
BYTE b11:1;
BYTE b12:1;
BYTE b13:1;
BYTE b14:1;
BYTE b15:1;
BYTE b16:1;
BYTE b17:1;
BYTE b18:1;
BYTE b19:1;
BYTE b20:1;
BYTE b21:1;
BYTE b22:1;
BYTE b23:1;
BYTE b24:1;
BYTE b25:1;
BYTE b26:1;
BYTE b27:1;
BYTE b28:1;
BYTE b29:1;
BYTE b30:1;
BYTE b31:1;
} bits;
} DWORD_VAL;
typedef union
{
QWORD Val;
DWORD d[2] ;
WORD w[4] ;
BYTE v[8] ;
struct
{
DWORD LD;
DWORD HD;
} dword;
struct
{
WORD LW;
WORD HW;
WORD UW;
WORD MW;
} word;
struct
{
BYTE b0:1;
BYTE b1:1;
BYTE b2:1;
BYTE b3:1;
BYTE b4:1;
BYTE b5:1;
BYTE b6:1;
BYTE b7:1;
BYTE b8:1;
BYTE b9:1;
BYTE b10:1;
BYTE b11:1;
BYTE b12:1;
BYTE b13:1;
BYTE b14:1;
BYTE b15:1;
BYTE b16:1;
BYTE b17:1;
BYTE b18:1;
BYTE b19:1;
BYTE b20:1;
BYTE b21:1;
BYTE b22:1;
BYTE b23:1;
BYTE b24:1;
BYTE b25:1;
BYTE b26:1;
BYTE b27:1;
BYTE b28:1;
BYTE b29:1;
BYTE b30:1;
BYTE b31:1;
BYTE b32:1;
BYTE b33:1;
BYTE b34:1;
BYTE b35:1;
BYTE b36:1;
BYTE b37:1;
BYTE b38:1;
BYTE b39:1;
BYTE b40:1;
BYTE b41:1;
BYTE b42:1;
BYTE b43:1;
BYTE b44:1;
BYTE b45:1;
BYTE b46:1;
BYTE b47:1;
BYTE b48:1;
BYTE b49:1;
BYTE b50:1;
BYTE b51:1;
BYTE b52:1;
BYTE b53:1;
BYTE b54:1;
BYTE b55:1;
BYTE b56:1;
BYTE b57:1;
BYTE b58:1;
BYTE b59:1;
BYTE b60:1;
BYTE b61:1;
BYTE b62:1;
BYTE b63:1;
} bits;
} QWORD_VAL;
# 113 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\plib\flash.h"
extern void ReadFlash(unsigned long startaddr, unsigned int num_bytes, unsigned char *flash_array);
# 120
extern void EraseFlash(unsigned long startaddr, unsigned long endaddr);
extern void WriteBlockFlash(unsigned long startaddr, unsigned char num_blocks, unsigned char *flash_array);
extern void WriteBytesFlash(unsigned long startaddr, unsigned int num_bytes, unsigned char *flash_array);
extern void WriteWordFlash(unsigned long startaddr, unsigned int data);
# 244 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\plib\i2c.h"
void OpenI2C1( unsigned char sync_mode, unsigned char slew );
# 264
unsigned char ReadI2C1( void );
# 279
signed char WriteI2C1( unsigned char data_out );
# 294
signed char getsI2C1( unsigned char *rdptr, unsigned char length );
signed char putsI2C1( unsigned char *wrptr );
# 305
signed char EEAckPolling1( unsigned char control );
signed char EEByteWrite1( unsigned char control,
unsigned char address,
unsigned char data );
signed int EECurrentAddRead1( unsigned char control );
signed char EEPageWrite1( unsigned char control,
unsigned char address,
unsigned char *wrptr );
signed int EERandomRead1( unsigned char control, unsigned char address );
signed char EESequentialRead1( unsigned char control,
unsigned char address,
unsigned char *rdptr,
unsigned char length );
# 200 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\plib\mwire.h"
void OpenMwire1( unsigned char sync_mode );
unsigned char ReadMwire1( unsigned char high_byte,
unsigned char low_byte );
# 219
signed char WriteMwire1( unsigned char data_out );
# 234
void getsMwire1( unsigned char *rdptr, unsigned char length );
# 126 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\plib\portb.h"
void OpenPORTB( unsigned char config);
# 176
void OpenRB0INT( unsigned char config);
# 194
void OpenRB1INT( unsigned char config);
# 211
void OpenRB2INT( unsigned char config);
# 230
void OpenRB3INT( unsigned char config);
# 85 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\plib\pwm.h"
union PWMDC
{
unsigned int lpwm;
char bpwm[2];
};
# 467
void OpenPWM1 ( char period);
void SetDCPWM1 ( unsigned int duty_cycle);
# 477
void ClosePWM1 (void);
# 538
void OpenPWM4 ( unsigned char period, unsigned char timer_source );
void SetDCPWM4 ( unsigned int duty_cycle);
void ClosePWM4 (void);
void OpenPWM5 ( unsigned char period, unsigned char timer_source );
void SetDCPWM5 ( unsigned int duty_cycle);
void ClosePWM5 (void);
void OpenPWM6 ( unsigned char period, unsigned char timer_source );
void SetDCPWM6 ( unsigned int duty_cycle);
void ClosePWM6 (void);
void OpenPWM7 ( unsigned char period, unsigned char timer_source );
void SetDCPWM7 ( unsigned int duty_cycle);
void ClosePWM7 (void);
void OpenPWM8 ( unsigned char period, unsigned char timer_source );
void SetDCPWM8 ( unsigned int duty_cycle);
void ClosePWM8 (void);
# 586
void OpenEPWM1( unsigned char period, unsigned char timer_source );
void SetDCEPWM1 ( unsigned int duty_cycle);
void SetOutputEPWM1 ( unsigned char output_config,
unsigned char pwm_mode);
void CloseEPWM1 (void);
# 594
void OpenEPWM2( unsigned char period, unsigned char timer_source );
void SetDCEPWM2 ( unsigned int duty_cycle);
void SetOutputEPWM2 ( unsigned char output_config,
unsigned char pwm_mode);
void CloseEPWM2 (void);
void OpenEPWM3( unsigned char period, unsigned char timer_source );
void SetDCEPWM3 ( unsigned int duty_cycle);
void SetOutputEPWM3 ( unsigned char output_config,
unsigned char pwm_mode);
void CloseEPWM3 (void);
# 16 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\plib\reset.h"
char isMCLR(void);
void StatusReset(void);
char isPOR(void);
char isWU(void);
char isBOR(void);
char isWDTTO(void);
char isWDTWU(void);
char isLVD(void);
# 43 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\plib\rtcc.h"
typedef union _WORD_VAL
{
unsigned int Val;
unsigned char v[2];
struct
{
unsigned char LB;
unsigned char HB;
} byte;
struct
{
unsigned char b0:1;
unsigned char b1:1;
unsigned char b2:1;
unsigned char b3:1;
unsigned char b4:1;
unsigned char b5:1;
unsigned char b6:1;
unsigned char b7:1;
unsigned char b8:1;
unsigned char b9:1;
unsigned char b10:1;
unsigned char b11:1;
unsigned char b12:1;
unsigned char b13:1;
unsigned char b14:1;
unsigned char b15:1;
} bits;
} WORD_VAL, WORD_BITS;
typedef enum
{
RTCCFG_MASK_RTCEN = 0x80,
RTCCFG_MASK_FRZ = 0x40,
RTCCFG_MASK_RTCWREN = 0x20,
RTCCFG_MASK_RTCSYNC = 0x10,
RTCCFG_MASK_HALFSEC = 0x08,
RTCCFG_MASK_RTCOE = 0x04,
RTCCFG_MASK_RTCPTR = 0x03
}RTCCFG_MASK;
typedef enum
{
ALRMCFG_MASK_ALRMEN = 0x80,
ALRMCFG_MASK_CHIME = 0x40,
ALRMCFG_MASK_AMASK = 0x3c,
ALRMCFG_MASK_ALRMPTR = 0x03
}ALRMCFG_MASK;
typedef enum
{
RTCCPTR_MASK_SECMIN = 0x00,
RTCCPTR_MASK_HRSWEEK = 0x01,
RTCCPTR_MASK_DAYMON = 0x02,
RTCCPTR_MASK_YEAR = 0x03
}RTCCPTR_MASK;
typedef union
{
struct
{
unsigned char rsvd;
unsigned char sec;
unsigned char min;
unsigned char hour;
}f;
unsigned char b[4];
unsigned int w[2];
unsigned long l;
}rtccTime;
typedef union
{
struct
{
unsigned char wday;
unsigned char mday;
unsigned char mon;
unsigned char year;
}f;
unsigned char b[4];
unsigned int w[2];
unsigned long l;
}rtccDate;
typedef union
{
struct
{
unsigned char year;
unsigned char rsvd;
unsigned char mday;
unsigned char mon;
unsigned char hour;
unsigned char wday;
unsigned char sec;
unsigned char min;
}f;
unsigned char b[8];
unsigned int w[4];
unsigned long l[2];
}rtccTimeDate;
typedef enum
{
RTCC_RPT_HALF_SEC,
RTCC_RPT_SEC,
RTCC_RPT_TEN_SEC,
RTCC_RPT_MIN,
RTCC_RPT_TEN_MIN,
RTCC_RPT_HOUR,
RTCC_RPT_DAY,
RTCC_RPT_WEEK,
RTCC_RPT_MON,
RTCC_RPT_YEAR
}rtccRepeat;
# 646
extern void RtccInitClock(void) ;
extern void RtccReadAlrmDate(rtccDate* pDt) ;
extern void RtccReadAlrmTime(rtccTime* pTm);
extern void RtccReadAlrmTimeDate(rtccTimeDate* pTD) ;
extern void RtccReadDate(rtccDate* pDt) ;
extern void RtccReadTime(rtccTime* pTm) ;
extern void RtccReadTimeDate(rtccTimeDate* pTD) ;
extern void RtccSetAlarmRpt(rtccRepeat rpt, BOOL dsblAlrm) ;
extern void RtccSetAlarmRptCount(unsigned char rptCnt, BOOL dsblAlrm) ;
extern void RtccSetCalibration(int drift) ;
extern void RtccSetChimeEnable(BOOL enable, BOOL dsblAlrm) ;
extern BOOL RtccWriteAlrmDate(const rtccDate* pDt) ;
extern BOOL RtccWriteAlrmTime(const rtccTime* pTm) ;
extern BOOL RtccWriteAlrmTimeDate(const rtccTimeDate* pTD) ;
extern BOOL RtccWriteDate(const rtccDate* pDt , BOOL di);
extern BOOL RtccWriteTime(const rtccTime* pTm , BOOL di) ;
extern BOOL RtccWriteTimeDate(const rtccTimeDate* pTD , BOOL di) ;
extern void RtccWrOn(void);
# 687
void Open_RTCC(void);
void Close_RTCC(void);
unsigned char update_RTCC(void);
# 97 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\plib\sw_i2c.h"
void SWStopI2C ( void );
void SWStartI2C ( void );
void SWRestartI2C ( void );
void SWStopI2C ( void );
signed char SWAckI2C( void );
signed char Clock_test( void );
signed int SWReadI2C( void );
signed char SWWriteI2C( unsigned char data_out );
signed char SWGetsI2C( unsigned char *rdptr, unsigned char length );
signed char SWPutsI2C( unsigned char *wrptr );
# 84 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\plib\sw_spi.h"
void OpenSWSPI(void);
char WriteSWSPI( char output);
void SetCSSWSPI(void);
void ClearCSSWSPI(void);
# 47 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\plib\sw_uart.h"
void OpenUART(void);
unsigned char ReadUART(void);
void WriteUART( unsigned char);
void getsUART( char *, unsigned char);
void putsUART( char *);
# 79
extern void DelayRXBitUART (void);
extern void DelayRXHalfBitUART(void);
extern void DelayTXBitUART (void);
# 36 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\plib\timers.h"
union Timers
{
unsigned int lt;
char bt[2];
};
# 118
void OpenTimer0 ( unsigned char config);
void CloseTimer0 (void);
unsigned int ReadTimer0 (void);
void WriteTimer0 ( unsigned int timer0);
# 185
void OpenTimer1 ( unsigned char config, unsigned char config1);
void CloseTimer1 (void);
unsigned int ReadTimer1 (void);
void WriteTimer1 ( unsigned int timer1);
# 325
void OpenTimer2 ( unsigned char config);
void CloseTimer2 (void);
# 452
void OpenTimer3 ( unsigned char config, unsigned char config1);
void CloseTimer3 (void);
unsigned int ReadTimer3 (void);
void WriteTimer3 ( unsigned int timer3);
# 541
void OpenTimer4 ( unsigned char config);
void CloseTimer4 (void);
# 657
void OpenTimer5 ( unsigned char config, unsigned char config1);
void CloseTimer5 (void);
unsigned int ReadTimer5 (void);
void WriteTimer5 ( unsigned int Timer5);
# 746
void OpenTimer6 ( unsigned char config);
void CloseTimer6 (void);
# 892
void OpenTimer8 ( unsigned char config);
void CloseTimer8 (void);
# 200 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\plib\usart.h"
union USART1
{
unsigned char val;
struct
{
unsigned RX_NINE:1;
unsigned TX_NINE:1;
unsigned FRAME_ERROR:1;
unsigned OVERRUN_ERROR:1;
unsigned fill:4;
};
};
extern union USART1 USART1_Status;
void Open1USART ( unsigned char config, unsigned int spbrg);
# 244
char Read1USART (void);
void Write1USART ( char data);
void gets1USART ( char *buffer, unsigned char len);
void puts1USART ( char *data);
void putrs1USART ( const char *data);
# 305
union USART2
{
unsigned char val;
struct
{
unsigned RX_NINE:1;
unsigned TX_NINE:1;
unsigned FRAME_ERROR:1;
unsigned OVERRUN_ERROR:1;
unsigned fill:4;
};
};
extern union USART2 USART2_Status;
void Open2USART ( unsigned char config, unsigned int spbrg);
# 333
char Read2USART (void);
void Write2USART ( char data);
void gets2USART ( char *buffer, unsigned char len);
void puts2USART ( char *data);
void putrs2USART ( const char *data);
# 660
void baud1USART ( unsigned char baudconfig);
# 665
void baud2USART ( unsigned char baudconfig);
# 87 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\plib\xlcd.h"
void OpenXLCD( unsigned char);
# 92
void SetCGRamAddr( unsigned char);
# 97
void SetDDRamAddr( unsigned char);
# 102
unsigned char BusyXLCD(void);
# 107
unsigned char ReadAddrXLCD(void);
# 112
char ReadDataXLCD(void);
# 117
void WriteCmdXLCD( unsigned char);
# 122
void WriteDataXLCD( char);
# 132
void putsXLCD( char *);
# 137
void putrsXLCD(const char *);
extern void DelayFor18TCY(void);
extern void DelayPORXLCD(void);
extern void DelayXLCD(void);
# 18 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18.h"
__attribute__((__unsupported__("The flash_write routine is no longer supported. Please use the peripheral library functions: WriteBytesFlash, WriteBlockFlash or WriteWordFlash"))) void flash_write(const unsigned char *, unsigned int, __far unsigned char *);
# 143
#pragma intrinsic(_delay)
extern void _delay(unsigned long);
#pragma intrinsic(_delaywdt)
extern void _delaywdt(unsigned long);
#pragma intrinsic(_delay3)
extern void _delay3(unsigned char);
# 18 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\delays.h"
void Delay10TCYx(unsigned char);
# 24
void Delay100TCYx(unsigned char);
# 30
void Delay1KTCYx(unsigned char);
# 36
void Delay10KTCYx(unsigned char);
# 7 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\stdarg.h"
typedef void * va_list[1];
#pragma intrinsic(__va_start)
extern void * __va_start(void);
#pragma intrinsic(__va_arg)
extern void * __va_arg(void *, ...);
# 23 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\stdio.h"
extern int errno;
# 54
struct __prbuf
{
char * ptr;
void (* func)(char);
};
# 17 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\conio.h"
extern int errno;
extern void init_uart(void);
extern char getch(void);
extern char getche(void);
extern void putch(char);
extern void ungetch(char);
extern __bit kbhit(void);
# 31
extern char * cgets(char *);
extern void cputs(const char *);
# 99 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\stdio.h"
extern int cprintf(char *, ...);
#pragma printf_check(cprintf)
extern int _doprnt(struct __prbuf *, const register char *, register va_list);
# 191
#pragma printf_check(vprintf) const
#pragma printf_check(vsprintf) const
extern char * gets(char *);
extern int puts(const char *);
extern int scanf(const char *, ...);
extern int sscanf(const char *, const char *, ...);
extern int vprintf(const char *, va_list);
extern int vsprintf(char *, const char *, va_list) __attribute__((unsupported("vsprintf() is not supported by this compiler")));
extern int vscanf(const char *, va_list ap);
extern int vsscanf(const char *, const char *, va_list);
#pragma printf_check(printf) const
#pragma printf_check(sprintf) const
extern int sprintf(char *, const char *, ...);
extern int printf(const char *, ...);
# 11 "uart.h"
typedef struct __UART_DATA {
unsigned char buffer_in[125];
unsigned char buffer_in_read_ind;
unsigned char buffer_in_write_ind;
unsigned char buffer_in_len;
unsigned char buffer_in_len_tmp;
unsigned char buffer_out[125];
unsigned char buffer_out_ind;
unsigned char buffer_out_len;
} UART_DATA;
void UART1_Init(void);
void UART1_Recv_Interrupt_Handler(void);
void UART1_Send_Interrupt_Handler(void);
void UART1_WriteS(const char *fmt, ...);
void UART1_WriteB(const char *msg, unsigned char length);
void UART1_WriteC(const unsigned char c);
unsigned char UART1_Buffer_Len(void);
unsigned char UART1_Read_Buffer(unsigned char *buffer);
# 10 "main.c"
#pragma config CFGPLLEN = ON
#pragma config PLLDIV = 3
#pragma config WDTEN = OFF
#pragma config STVREN = OFF
#pragma config XINST = OFF
#pragma config CP0 = OFF
#pragma config CLKOEC = OFF
#pragma config SOSCSEL = LOW
#pragma config IESO = ON
#pragma config OSC = HSPLL
#pragma config FCMEN = OFF
#pragma config WDTPS = 1
#pragma config RTCOSC = T1OSCREF
#pragma config DSBOREN = ON
#pragma config DSWDTPS = M2
#pragma config DSWDTEN = OFF
#pragma config DSWDTOSC = INTOSCREF
#pragma config PLLSEL = PLL96
#pragma config ADCSEL = BIT12
#pragma config MSSP7B_EN = MSK7
#pragma config IOL1WAY = OFF
#pragma config WPCFG = ON
#pragma config WPEND = PAGE_WPFP
#pragma config WPDIS = OFF
# 95
int main() {
char buffer[255];
char buffer1[255];
char buffer2[255];
char buffer3[255];
char buffer4[255];
char buffer5[255];
char buffer6[255];
char buffer7[255];
char buffer8[255];
char buffer9[255];
char buffer10[255];
char buffer11[255];
char buffer12[100];
char buffer13[100];
char buffer14[50];
char buffer15[50];
char buffer16[50];
char buffer17[40];
char buffer18[20];
buffer[0] = 1;
buffer1[0] = 1;
buffer2[0] = 1;
buffer3[0] = 1;
buffer4[0] = 1;
buffer5[0] = 1;
buffer6[0] = 1;
buffer7[0] = 1;
buffer8[0] = 1;
buffer9[0] = 1;
buffer10[0] = 1;
buffer11[0] = 1;
buffer12[0] = 1;
buffer13[0] = 1;
buffer14[0] = 1;
buffer15[0] = 1;
buffer16[0] = 1;
buffer17[0] = 1;
buffer18[0] = 1;
}
void putch(char data) {
while (!TXIF)
continue;
TXREG = data;
}

/PIC Stuff/PICX_27J13/build/default/production/uart.p1
0,0 → 1,8517
Version 3.2 HI-TECH Software Intermediate Code
[s S1074 `uc -> 125 `i `uc 1 `uc 1 `uc 1 `uc 1 `uc -> 125 `i `uc 1 `uc 1 ]
[n S1074 __UART_DATA buffer_in buffer_in_read_ind buffer_in_write_ind buffer_in_len buffer_in_len_tmp buffer_out buffer_out_ind buffer_out_len ]
[s S491 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
[n S491 . TRISC0 TRISC1 TRISC2 TRISC3 TRISC4 TRISC5 TRISC6 TRISC7 ]
[u S490 `S491 1 ]
[n S490 . . ]
"8078 C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h
[v _TRISCbits `VS490 ~T0 @X0 0 e@3988 ]
[s S348 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
[n S348 . ABDEN WUE . BRG16 TXCKP RXDTP RCIDL ABDOVF ]
[s S349 :1 `uc 1 ]
[n S349 . ABDEN1 ]
[s S350 :7 `uc 1 :1 `uc 1 ]
[n S350 . . ABDOVF1 ]
[s S351 :3 `uc 1 :1 `uc 1 ]
[n S351 . . BRG161 ]
[s S352 :4 `uc 1 :1 `uc 1 ]
[n S352 . . CKTXP ]
[s S353 :5 `uc 1 :1 `uc 1 ]
[n S353 . . DTRXP ]
[s S354 :5 `uc 1 :1 `uc 1 ]
[n S354 . . DTRXP1 ]
[s S355 :6 `uc 1 :1 `uc 1 ]
[n S355 . . RCIDL1 ]
[s S356 :6 `uc 1 :1 `uc 1 ]
[n S356 . . RCMT ]
[s S357 :6 `uc 1 :1 `uc 1 ]
[n S357 . . RCMT1 ]
[s S358 :5 `uc 1 :1 `uc 1 ]
[n S358 . . RXDTP1 ]
[s S359 :4 `uc 1 :1 `uc 1 ]
[n S359 . . SCKP ]
[s S360 :4 `uc 1 :1 `uc 1 ]
[n S360 . . SCKP1 ]
[s S361 :4 `uc 1 :1 `uc 1 ]
[n S361 . . TXCKP1 ]
[s S362 :1 `uc 1 :1 `uc 1 ]
[n S362 . . WUE1 ]
[s S363 :5 `uc 1 :1 `uc 1 ]
[n S363 . . RXCKP ]
[s S364 :1 `uc 1 :1 `uc 1 ]
[n S364 . . W4E ]
[u S347 `S348 1 `S349 1 `S350 1 `S351 1 `S352 1 `S353 1 `S354 1 `S355 1 `S356 1 `S357 1 `S358 1 `S359 1 `S360 1 `S361 1 `S362 1 `S363 1 `S364 1 ]
[n S347 . . . . . . . . . . . . . . . . . . ]
"5709
[v _BAUDCON1bits `VS347 ~T0 @X0 0 e@3966 ]
"10341
[v _SPBRG1 `Vuc ~T0 @X0 0 e@4016 ]
[s S590 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
[n S590 . TX9D TRMT BRGH SENDB SYNC TXEN TX9 CSRC ]
[s S591 :1 `uc 1 :5 `uc 1 :1 `uc 1 ]
[n S591 . TXD8 . TX8_9 ]
[s S592 :6 `uc 1 :1 `uc 1 ]
[n S592 . . NOT_TX8 ]
[s S593 :6 `uc 1 :1 `uc 1 ]
[n S593 . . nTX8 ]
[s S594 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
[n S594 . TX9D1 TRMT1 BRGH1 SENDB1 SYNC1 TXEN1 TX91 CSRC1 ]
[u S589 `S590 1 `S591 1 `S592 1 `S593 1 `S594 1 ]
[n S589 . . . . . . ]
"10025
[v _TXSTA1bits `VS589 ~T0 @X0 0 e@4013 ]
[s S574 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
[n S574 . RX9D OERR FERR ADDEN CREN SREN RX9 SPEN ]
[s S575 :1 `uc 1 :2 `uc 1 :1 `uc 1 :2 `uc 1 :1 `uc 1 ]
[n S575 . RCD8 . ADEN . RC9 ]
[s S576 :6 `uc 1 :1 `uc 1 ]
[n S576 . . NOT_RC8 ]
[s S577 :6 `uc 1 :1 `uc 1 ]
[n S577 . . nRC8 ]
[s S578 :6 `uc 1 :1 `uc 1 ]
[n S578 . . RC8_9 ]
[s S579 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
[n S579 . RX9D1 OERR1 FERR1 ADDEN1 CREN1 SREN1 RX91 SPEN1 ]
[s S580 :5 `uc 1 :1 `uc 1 ]
[n S580 . . SRENA ]
[u S573 `S574 1 `S575 1 `S576 1 `S577 1 `S578 1 `S579 1 `S580 1 ]
[n S573 . . . . . . . . ]
"9698
[v _RCSTA1bits `VS573 ~T0 @X0 0 e@4012 ]
[s S521 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
[n S521 . TMR1IE TMR2IE CCP1IE SSP1IE TX1IE RC1IE ADIE ]
[s S522 :3 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
[n S522 . . SSPIE TXIE RCIE ]
[u S520 `S521 1 `S522 1 ]
[n S520 . . . ]
"8668
[v _PIE1bits `VS520 ~T0 @X0 0 e@3997 ]
[s S524 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
[n S524 . TMR1IF TMR2IF CCP1IF SSP1IF TX1IF RC1IF ADIF ]
[s S525 :3 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
[n S525 . . SSPIF TXIF RCIF ]
[u S523 `S524 1 `S525 1 ]
[n S523 . . . ]
"8744
[v _PIR1bits `VS523 ~T0 @X0 0 e@3998 ]
"10304
[v _RCREG1 `Vuc ~T0 @X0 0 e@4015 ]
"26 uart.h
[v _UART1_WriteS `(v ~T0 @X0 0 ev`*Cuc ]
"10267 C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h
[v _TXREG1 `Vuc ~T0 @X0 0 e@4014 ]
"10 C:\Program Files (x86)\Microchip\xc8\v1.12\include\stdarg.h
[v ___va_start `(*v ~T0 @X0 0 ef ]
[p i ___va_start ]
"198 C:\Program Files (x86)\Microchip\xc8\v1.12\include\stdio.h
[v _vprintf `(i ~T0 @X0 0 ef2`*Cuc`**v ]
"55 C:\Program Files (x86)\Microchip\xc8\v1.12\include\string.h
[v _strlen `(ui ~T0 @X0 0 ef1`*Cuc ]
[; ;pic18f27j13.h: 44: extern volatile unsigned char ADCTRIG @ 0xEB8;
"46 C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h
[; ;pic18f27j13.h: 46: asm("ADCTRIG equ 0EB8h");
[; <" ADCTRIG equ 0EB8h ;# ">
[; ;pic18f27j13.h: 49: typedef union {
[; ;pic18f27j13.h: 50: struct {
[; ;pic18f27j13.h: 51: unsigned TRIGSEL :2;
[; ;pic18f27j13.h: 52: };
[; ;pic18f27j13.h: 53: struct {
[; ;pic18f27j13.h: 54: unsigned SRC0 :1;
[; ;pic18f27j13.h: 55: unsigned SRC1 :1;
[; ;pic18f27j13.h: 56: };
[; ;pic18f27j13.h: 57: struct {
[; ;pic18f27j13.h: 58: unsigned TRIGSEL0 :1;
[; ;pic18f27j13.h: 59: unsigned TRIGSEL1 :1;
[; ;pic18f27j13.h: 60: };
[; ;pic18f27j13.h: 61: struct {
[; ;pic18f27j13.h: 62: unsigned SRC :2;
[; ;pic18f27j13.h: 63: };
[; ;pic18f27j13.h: 64: } ADCTRIGbits_t;
[; ;pic18f27j13.h: 65: extern volatile ADCTRIGbits_t ADCTRIGbits @ 0xEB8;
[; ;pic18f27j13.h: 99: extern volatile unsigned char PMDIS0 @ 0xEB9;
"101
[; ;pic18f27j13.h: 101: asm("PMDIS0 equ 0EB9h");
[; <" PMDIS0 equ 0EB9h ;# ">
[; ;pic18f27j13.h: 104: extern volatile unsigned char PD0 @ 0xEB9;
"106
[; ;pic18f27j13.h: 106: asm("PD0 equ 0EB9h");
[; <" PD0 equ 0EB9h ;# ">
[; ;pic18f27j13.h: 109: typedef union {
[; ;pic18f27j13.h: 110: struct {
[; ;pic18f27j13.h: 111: unsigned ADCMD :1;
[; ;pic18f27j13.h: 112: unsigned SPI1MD :1;
[; ;pic18f27j13.h: 113: unsigned SPI2MD :1;
[; ;pic18f27j13.h: 114: unsigned UART1MD :1;
[; ;pic18f27j13.h: 115: unsigned UART2MD :1;
[; ;pic18f27j13.h: 116: unsigned ECCP1MD :1;
[; ;pic18f27j13.h: 117: unsigned ECCP2MD :1;
[; ;pic18f27j13.h: 118: unsigned ECCP3MD :1;
[; ;pic18f27j13.h: 119: };
[; ;pic18f27j13.h: 120: struct {
[; ;pic18f27j13.h: 121: unsigned :1;
[; ;pic18f27j13.h: 122: unsigned PMDMSSP1 :1;
[; ;pic18f27j13.h: 123: unsigned PMDMSSP2 :1;
[; ;pic18f27j13.h: 124: unsigned PMDUART1 :1;
[; ;pic18f27j13.h: 125: unsigned PMDUART2 :1;
[; ;pic18f27j13.h: 126: unsigned PMDECCP1 :1;
[; ;pic18f27j13.h: 127: unsigned PMDECCP2 :1;
[; ;pic18f27j13.h: 128: unsigned PMDECCP3 :1;
[; ;pic18f27j13.h: 129: };
[; ;pic18f27j13.h: 130: struct {
[; ;pic18f27j13.h: 131: unsigned PMDADC :1;
[; ;pic18f27j13.h: 132: unsigned PMDMSSP :2;
[; ;pic18f27j13.h: 133: unsigned PMDUART :2;
[; ;pic18f27j13.h: 134: unsigned PMDECCP :3;
[; ;pic18f27j13.h: 135: };
[; ;pic18f27j13.h: 136: struct {
[; ;pic18f27j13.h: 137: unsigned :1;
[; ;pic18f27j13.h: 138: unsigned SPIMD :2;
[; ;pic18f27j13.h: 139: unsigned UARTMD :2;
[; ;pic18f27j13.h: 140: unsigned ECCPMD :3;
[; ;pic18f27j13.h: 141: };
[; ;pic18f27j13.h: 142: } PMDIS0bits_t;
[; ;pic18f27j13.h: 143: extern volatile PMDIS0bits_t PMDIS0bits @ 0xEB9;
[; ;pic18f27j13.h: 256: typedef union {
[; ;pic18f27j13.h: 257: struct {
[; ;pic18f27j13.h: 258: unsigned ADCMD :1;
[; ;pic18f27j13.h: 259: unsigned SPI1MD :1;
[; ;pic18f27j13.h: 260: unsigned SPI2MD :1;
[; ;pic18f27j13.h: 261: unsigned UART1MD :1;
[; ;pic18f27j13.h: 262: unsigned UART2MD :1;
[; ;pic18f27j13.h: 263: unsigned ECCP1MD :1;
[; ;pic18f27j13.h: 264: unsigned ECCP2MD :1;
[; ;pic18f27j13.h: 265: unsigned ECCP3MD :1;
[; ;pic18f27j13.h: 266: };
[; ;pic18f27j13.h: 267: struct {
[; ;pic18f27j13.h: 268: unsigned :1;
[; ;pic18f27j13.h: 269: unsigned PMDMSSP1 :1;
[; ;pic18f27j13.h: 270: unsigned PMDMSSP2 :1;
[; ;pic18f27j13.h: 271: unsigned PMDUART1 :1;
[; ;pic18f27j13.h: 272: unsigned PMDUART2 :1;
[; ;pic18f27j13.h: 273: unsigned PMDECCP1 :1;
[; ;pic18f27j13.h: 274: unsigned PMDECCP2 :1;
[; ;pic18f27j13.h: 275: unsigned PMDECCP3 :1;
[; ;pic18f27j13.h: 276: };
[; ;pic18f27j13.h: 277: struct {
[; ;pic18f27j13.h: 278: unsigned PMDADC :1;
[; ;pic18f27j13.h: 279: unsigned PMDMSSP :2;
[; ;pic18f27j13.h: 280: unsigned PMDUART :2;
[; ;pic18f27j13.h: 281: unsigned PMDECCP :3;
[; ;pic18f27j13.h: 282: };
[; ;pic18f27j13.h: 283: struct {
[; ;pic18f27j13.h: 284: unsigned :1;
[; ;pic18f27j13.h: 285: unsigned SPIMD :2;
[; ;pic18f27j13.h: 286: unsigned UARTMD :2;
[; ;pic18f27j13.h: 287: unsigned ECCPMD :3;
[; ;pic18f27j13.h: 288: };
[; ;pic18f27j13.h: 289: } PD0bits_t;
[; ;pic18f27j13.h: 290: extern volatile PD0bits_t PD0bits @ 0xEB9;
[; ;pic18f27j13.h: 404: extern volatile unsigned char PMDIS1 @ 0xEBA;
"406
[; ;pic18f27j13.h: 406: asm("PMDIS1 equ 0EBAh");
[; <" PMDIS1 equ 0EBAh ;# ">
[; ;pic18f27j13.h: 409: extern volatile unsigned char PD1 @ 0xEBA;
"411
[; ;pic18f27j13.h: 411: asm("PD1 equ 0EBAh");
[; <" PD1 equ 0EBAh ;# ">
[; ;pic18f27j13.h: 414: typedef union {
[; ;pic18f27j13.h: 415: struct {
[; ;pic18f27j13.h: 416: unsigned :1;
[; ;pic18f27j13.h: 417: unsigned TMR1MD :1;
[; ;pic18f27j13.h: 418: unsigned TMR2MD :1;
[; ;pic18f27j13.h: 419: unsigned TMR3MD :1;
[; ;pic18f27j13.h: 420: unsigned TMR4MD :1;
[; ;pic18f27j13.h: 421: unsigned RTCCMD :1;
[; ;pic18f27j13.h: 422: unsigned CTMUMD :1;
[; ;pic18f27j13.h: 423: };
[; ;pic18f27j13.h: 424: struct {
[; ;pic18f27j13.h: 425: unsigned :1;
[; ;pic18f27j13.h: 426: unsigned PMDTMR1 :1;
[; ;pic18f27j13.h: 427: unsigned PMDTMR2 :1;
[; ;pic18f27j13.h: 428: unsigned PMDTMR3 :1;
[; ;pic18f27j13.h: 429: unsigned PMDTMR4 :1;
[; ;pic18f27j13.h: 430: };
[; ;pic18f27j13.h: 431: struct {
[; ;pic18f27j13.h: 432: unsigned :1;
[; ;pic18f27j13.h: 433: unsigned PMDTMR :4;
[; ;pic18f27j13.h: 434: unsigned PMDRTCC :1;
[; ;pic18f27j13.h: 435: unsigned PMDCTMU :1;
[; ;pic18f27j13.h: 436: };
[; ;pic18f27j13.h: 437: struct {
[; ;pic18f27j13.h: 438: unsigned :1;
[; ;pic18f27j13.h: 439: unsigned TMRMD :4;
[; ;pic18f27j13.h: 440: };
[; ;pic18f27j13.h: 441: } PMDIS1bits_t;
[; ;pic18f27j13.h: 442: extern volatile PMDIS1bits_t PMDIS1bits @ 0xEBA;
[; ;pic18f27j13.h: 515: typedef union {
[; ;pic18f27j13.h: 516: struct {
[; ;pic18f27j13.h: 517: unsigned :1;
[; ;pic18f27j13.h: 518: unsigned TMR1MD :1;
[; ;pic18f27j13.h: 519: unsigned TMR2MD :1;
[; ;pic18f27j13.h: 520: unsigned TMR3MD :1;
[; ;pic18f27j13.h: 521: unsigned TMR4MD :1;
[; ;pic18f27j13.h: 522: unsigned RTCCMD :1;
[; ;pic18f27j13.h: 523: unsigned CTMUMD :1;
[; ;pic18f27j13.h: 524: };
[; ;pic18f27j13.h: 525: struct {
[; ;pic18f27j13.h: 526: unsigned :1;
[; ;pic18f27j13.h: 527: unsigned PMDTMR1 :1;
[; ;pic18f27j13.h: 528: unsigned PMDTMR2 :1;
[; ;pic18f27j13.h: 529: unsigned PMDTMR3 :1;
[; ;pic18f27j13.h: 530: unsigned PMDTMR4 :1;
[; ;pic18f27j13.h: 531: };
[; ;pic18f27j13.h: 532: struct {
[; ;pic18f27j13.h: 533: unsigned :1;
[; ;pic18f27j13.h: 534: unsigned PMDTMR :4;
[; ;pic18f27j13.h: 535: unsigned PMDRTCC :1;
[; ;pic18f27j13.h: 536: unsigned PMDCTMU :1;
[; ;pic18f27j13.h: 537: };
[; ;pic18f27j13.h: 538: struct {
[; ;pic18f27j13.h: 539: unsigned :1;
[; ;pic18f27j13.h: 540: unsigned TMRMD :4;
[; ;pic18f27j13.h: 541: };
[; ;pic18f27j13.h: 542: } PD1bits_t;
[; ;pic18f27j13.h: 543: extern volatile PD1bits_t PD1bits @ 0xEBA;
[; ;pic18f27j13.h: 617: extern volatile unsigned char PMDIS2 @ 0xEBB;
"619
[; ;pic18f27j13.h: 619: asm("PMDIS2 equ 0EBBh");
[; <" PMDIS2 equ 0EBBh ;# ">
[; ;pic18f27j13.h: 622: extern volatile unsigned char PD2 @ 0xEBB;
"624
[; ;pic18f27j13.h: 624: asm("PD2 equ 0EBBh");
[; <" PD2 equ 0EBBh ;# ">
[; ;pic18f27j13.h: 627: typedef union {
[; ;pic18f27j13.h: 628: struct {
[; ;pic18f27j13.h: 629: unsigned CMP1MD :1;
[; ;pic18f27j13.h: 630: unsigned CMP2MD :1;
[; ;pic18f27j13.h: 631: unsigned CMP3MD :1;
[; ;pic18f27j13.h: 632: unsigned TMR5MD :1;
[; ;pic18f27j13.h: 633: unsigned TMR6MD :1;
[; ;pic18f27j13.h: 634: unsigned :1;
[; ;pic18f27j13.h: 635: unsigned TMR8MD :1;
[; ;pic18f27j13.h: 636: };
[; ;pic18f27j13.h: 637: struct {
[; ;pic18f27j13.h: 638: unsigned PMDCMP1 :1;
[; ;pic18f27j13.h: 639: unsigned PMDCMP2 :1;
[; ;pic18f27j13.h: 640: unsigned PMDCMP3 :1;
[; ;pic18f27j13.h: 641: };
[; ;pic18f27j13.h: 642: struct {
[; ;pic18f27j13.h: 643: unsigned PMDCMP :3;
[; ;pic18f27j13.h: 644: unsigned PMDTMR5 :1;
[; ;pic18f27j13.h: 645: unsigned PMDTMR6 :1;
[; ;pic18f27j13.h: 646: unsigned :1;
[; ;pic18f27j13.h: 647: unsigned PMDTMR8 :1;
[; ;pic18f27j13.h: 648: };
[; ;pic18f27j13.h: 649: struct {
[; ;pic18f27j13.h: 650: unsigned CMPMD :3;
[; ;pic18f27j13.h: 651: };
[; ;pic18f27j13.h: 652: } PMDIS2bits_t;
[; ;pic18f27j13.h: 653: extern volatile PMDIS2bits_t PMDIS2bits @ 0xEBB;
[; ;pic18f27j13.h: 726: typedef union {
[; ;pic18f27j13.h: 727: struct {
[; ;pic18f27j13.h: 728: unsigned CMP1MD :1;
[; ;pic18f27j13.h: 729: unsigned CMP2MD :1;
[; ;pic18f27j13.h: 730: unsigned CMP3MD :1;
[; ;pic18f27j13.h: 731: unsigned TMR5MD :1;
[; ;pic18f27j13.h: 732: unsigned TMR6MD :1;
[; ;pic18f27j13.h: 733: unsigned :1;
[; ;pic18f27j13.h: 734: unsigned TMR8MD :1;
[; ;pic18f27j13.h: 735: };
[; ;pic18f27j13.h: 736: struct {
[; ;pic18f27j13.h: 737: unsigned PMDCMP1 :1;
[; ;pic18f27j13.h: 738: unsigned PMDCMP2 :1;
[; ;pic18f27j13.h: 739: unsigned PMDCMP3 :1;
[; ;pic18f27j13.h: 740: };
[; ;pic18f27j13.h: 741: struct {
[; ;pic18f27j13.h: 742: unsigned PMDCMP :3;
[; ;pic18f27j13.h: 743: unsigned PMDTMR5 :1;
[; ;pic18f27j13.h: 744: unsigned PMDTMR6 :1;
[; ;pic18f27j13.h: 745: unsigned :1;
[; ;pic18f27j13.h: 746: unsigned PMDTMR8 :1;
[; ;pic18f27j13.h: 747: };
[; ;pic18f27j13.h: 748: struct {
[; ;pic18f27j13.h: 749: unsigned CMPMD :3;
[; ;pic18f27j13.h: 750: };
[; ;pic18f27j13.h: 751: } PD2bits_t;
[; ;pic18f27j13.h: 752: extern volatile PD2bits_t PD2bits @ 0xEBB;
[; ;pic18f27j13.h: 826: extern volatile unsigned char PMDIS3 @ 0xEBC;
"828
[; ;pic18f27j13.h: 828: asm("PMDIS3 equ 0EBCh");
[; <" PMDIS3 equ 0EBCh ;# ">
[; ;pic18f27j13.h: 831: extern volatile unsigned char PD3 @ 0xEBC;
"833
[; ;pic18f27j13.h: 833: asm("PD3 equ 0EBCh");
[; <" PD3 equ 0EBCh ;# ">
[; ;pic18f27j13.h: 836: typedef union {
[; ;pic18f27j13.h: 837: struct {
[; ;pic18f27j13.h: 838: unsigned :1;
[; ;pic18f27j13.h: 839: unsigned CCP4MD :1;
[; ;pic18f27j13.h: 840: unsigned CCP5MD :1;
[; ;pic18f27j13.h: 841: unsigned CCP6MD :1;
[; ;pic18f27j13.h: 842: unsigned CCP7MD :1;
[; ;pic18f27j13.h: 843: unsigned CCP8MD :1;
[; ;pic18f27j13.h: 844: unsigned CCP9MD :1;
[; ;pic18f27j13.h: 845: unsigned CCP10MD :1;
[; ;pic18f27j13.h: 846: };
[; ;pic18f27j13.h: 847: struct {
[; ;pic18f27j13.h: 848: unsigned :1;
[; ;pic18f27j13.h: 849: unsigned PMDCCP4 :1;
[; ;pic18f27j13.h: 850: unsigned PMDCCP5 :1;
[; ;pic18f27j13.h: 851: unsigned PMDCCP6 :1;
[; ;pic18f27j13.h: 852: unsigned PMDCCP7 :1;
[; ;pic18f27j13.h: 853: unsigned PMDCCP8 :1;
[; ;pic18f27j13.h: 854: unsigned PMDCCP9 :1;
[; ;pic18f27j13.h: 855: unsigned PMDCCP10 :1;
[; ;pic18f27j13.h: 856: };
[; ;pic18f27j13.h: 857: struct {
[; ;pic18f27j13.h: 858: unsigned :1;
[; ;pic18f27j13.h: 859: unsigned PMDCCP :7;
[; ;pic18f27j13.h: 860: };
[; ;pic18f27j13.h: 861: struct {
[; ;pic18f27j13.h: 862: unsigned :1;
[; ;pic18f27j13.h: 863: unsigned CCPMD :7;
[; ;pic18f27j13.h: 864: };
[; ;pic18f27j13.h: 865: } PMDIS3bits_t;
[; ;pic18f27j13.h: 866: extern volatile PMDIS3bits_t PMDIS3bits @ 0xEBC;
[; ;pic18f27j13.h: 949: typedef union {
[; ;pic18f27j13.h: 950: struct {
[; ;pic18f27j13.h: 951: unsigned :1;
[; ;pic18f27j13.h: 952: unsigned CCP4MD :1;
[; ;pic18f27j13.h: 953: unsigned CCP5MD :1;
[; ;pic18f27j13.h: 954: unsigned CCP6MD :1;
[; ;pic18f27j13.h: 955: unsigned CCP7MD :1;
[; ;pic18f27j13.h: 956: unsigned CCP8MD :1;
[; ;pic18f27j13.h: 957: unsigned CCP9MD :1;
[; ;pic18f27j13.h: 958: unsigned CCP10MD :1;
[; ;pic18f27j13.h: 959: };
[; ;pic18f27j13.h: 960: struct {
[; ;pic18f27j13.h: 961: unsigned :1;
[; ;pic18f27j13.h: 962: unsigned PMDCCP4 :1;
[; ;pic18f27j13.h: 963: unsigned PMDCCP5 :1;
[; ;pic18f27j13.h: 964: unsigned PMDCCP6 :1;
[; ;pic18f27j13.h: 965: unsigned PMDCCP7 :1;
[; ;pic18f27j13.h: 966: unsigned PMDCCP8 :1;
[; ;pic18f27j13.h: 967: unsigned PMDCCP9 :1;
[; ;pic18f27j13.h: 968: unsigned PMDCCP10 :1;
[; ;pic18f27j13.h: 969: };
[; ;pic18f27j13.h: 970: struct {
[; ;pic18f27j13.h: 971: unsigned :1;
[; ;pic18f27j13.h: 972: unsigned PMDCCP :7;
[; ;pic18f27j13.h: 973: };
[; ;pic18f27j13.h: 974: struct {
[; ;pic18f27j13.h: 975: unsigned :1;
[; ;pic18f27j13.h: 976: unsigned CCPMD :7;
[; ;pic18f27j13.h: 977: };
[; ;pic18f27j13.h: 978: } PD3bits_t;
[; ;pic18f27j13.h: 979: extern volatile PD3bits_t PD3bits @ 0xEBC;
[; ;pic18f27j13.h: 1063: extern volatile unsigned char PPSCON @ 0xEBF;
"1065
[; ;pic18f27j13.h: 1065: asm("PPSCON equ 0EBFh");
[; <" PPSCON equ 0EBFh ;# ">
[; ;pic18f27j13.h: 1068: typedef union {
[; ;pic18f27j13.h: 1069: struct {
[; ;pic18f27j13.h: 1070: unsigned IOLOCK :1;
[; ;pic18f27j13.h: 1071: };
[; ;pic18f27j13.h: 1072: } PPSCONbits_t;
[; ;pic18f27j13.h: 1073: extern volatile PPSCONbits_t PPSCONbits @ 0xEBF;
[; ;pic18f27j13.h: 1082: extern volatile unsigned char RPOR0 @ 0xEC0;
"1084
[; ;pic18f27j13.h: 1084: asm("RPOR0 equ 0EC0h");
[; <" RPOR0 equ 0EC0h ;# ">
[; ;pic18f27j13.h: 1088: extern volatile unsigned char RPOR1 @ 0xEC1;
"1090
[; ;pic18f27j13.h: 1090: asm("RPOR1 equ 0EC1h");
[; <" RPOR1 equ 0EC1h ;# ">
[; ;pic18f27j13.h: 1094: extern volatile unsigned char RPOR2 @ 0xEC2;
"1096
[; ;pic18f27j13.h: 1096: asm("RPOR2 equ 0EC2h");
[; <" RPOR2 equ 0EC2h ;# ">
[; ;pic18f27j13.h: 1100: extern volatile unsigned char RPOR3 @ 0xEC3;
"1102
[; ;pic18f27j13.h: 1102: asm("RPOR3 equ 0EC3h");
[; <" RPOR3 equ 0EC3h ;# ">
[; ;pic18f27j13.h: 1106: extern volatile unsigned char RPOR4 @ 0xEC4;
"1108
[; ;pic18f27j13.h: 1108: asm("RPOR4 equ 0EC4h");
[; <" RPOR4 equ 0EC4h ;# ">
[; ;pic18f27j13.h: 1112: extern volatile unsigned char RPOR5 @ 0xEC5;
"1114
[; ;pic18f27j13.h: 1114: asm("RPOR5 equ 0EC5h");
[; <" RPOR5 equ 0EC5h ;# ">
[; ;pic18f27j13.h: 1118: extern volatile unsigned char RPOR6 @ 0xEC6;
"1120
[; ;pic18f27j13.h: 1120: asm("RPOR6 equ 0EC6h");
[; <" RPOR6 equ 0EC6h ;# ">
[; ;pic18f27j13.h: 1124: extern volatile unsigned char RPOR7 @ 0xEC7;
"1126
[; ;pic18f27j13.h: 1126: asm("RPOR7 equ 0EC7h");
[; <" RPOR7 equ 0EC7h ;# ">
[; ;pic18f27j13.h: 1130: extern volatile unsigned char RPOR8 @ 0xEC8;
"1132
[; ;pic18f27j13.h: 1132: asm("RPOR8 equ 0EC8h");
[; <" RPOR8 equ 0EC8h ;# ">
[; ;pic18f27j13.h: 1136: extern volatile unsigned char RPOR9 @ 0xEC9;
"1138
[; ;pic18f27j13.h: 1138: asm("RPOR9 equ 0EC9h");
[; <" RPOR9 equ 0EC9h ;# ">
[; ;pic18f27j13.h: 1142: extern volatile unsigned char RPOR10 @ 0xECA;
"1144
[; ;pic18f27j13.h: 1144: asm("RPOR10 equ 0ECAh");
[; <" RPOR10 equ 0ECAh ;# ">
[; ;pic18f27j13.h: 1148: extern volatile unsigned char RPOR11 @ 0xECB;
"1150
[; ;pic18f27j13.h: 1150: asm("RPOR11 equ 0ECBh");
[; <" RPOR11 equ 0ECBh ;# ">
[; ;pic18f27j13.h: 1154: extern volatile unsigned char RPOR12 @ 0xECC;
"1156
[; ;pic18f27j13.h: 1156: asm("RPOR12 equ 0ECCh");
[; <" RPOR12 equ 0ECCh ;# ">
[; ;pic18f27j13.h: 1160: extern volatile unsigned char RPOR13 @ 0xECD;
"1162
[; ;pic18f27j13.h: 1162: asm("RPOR13 equ 0ECDh");
[; <" RPOR13 equ 0ECDh ;# ">
[; ;pic18f27j13.h: 1166: extern volatile unsigned char RPOR14 @ 0xECE;
"1168
[; ;pic18f27j13.h: 1168: asm("RPOR14 equ 0ECEh");
[; <" RPOR14 equ 0ECEh ;# ">
[; ;pic18f27j13.h: 1172: extern volatile unsigned char RPOR15 @ 0xECF;
"1174
[; ;pic18f27j13.h: 1174: asm("RPOR15 equ 0ECFh");
[; <" RPOR15 equ 0ECFh ;# ">
[; ;pic18f27j13.h: 1178: extern volatile unsigned char RPOR16 @ 0xED0;
"1180
[; ;pic18f27j13.h: 1180: asm("RPOR16 equ 0ED0h");
[; <" RPOR16 equ 0ED0h ;# ">
[; ;pic18f27j13.h: 1184: extern volatile unsigned char RPOR17 @ 0xED1;
"1186
[; ;pic18f27j13.h: 1186: asm("RPOR17 equ 0ED1h");
[; <" RPOR17 equ 0ED1h ;# ">
[; ;pic18f27j13.h: 1190: extern volatile unsigned char RPOR18 @ 0xED2;
"1192
[; ;pic18f27j13.h: 1192: asm("RPOR18 equ 0ED2h");
[; <" RPOR18 equ 0ED2h ;# ">
[; ;pic18f27j13.h: 1196: extern volatile unsigned char RPINR1 @ 0xEE1;
"1198
[; ;pic18f27j13.h: 1198: asm("RPINR1 equ 0EE1h");
[; <" RPINR1 equ 0EE1h ;# ">
[; ;pic18f27j13.h: 1202: extern volatile unsigned char RPINR2 @ 0xEE2;
"1204
[; ;pic18f27j13.h: 1204: asm("RPINR2 equ 0EE2h");
[; <" RPINR2 equ 0EE2h ;# ">
[; ;pic18f27j13.h: 1208: extern volatile unsigned char RPINR3 @ 0xEE3;
"1210
[; ;pic18f27j13.h: 1210: asm("RPINR3 equ 0EE3h");
[; <" RPINR3 equ 0EE3h ;# ">
[; ;pic18f27j13.h: 1214: extern volatile unsigned char RPINR4 @ 0xEE4;
"1216
[; ;pic18f27j13.h: 1216: asm("RPINR4 equ 0EE4h");
[; <" RPINR4 equ 0EE4h ;# ">
[; ;pic18f27j13.h: 1220: extern volatile unsigned char RPINR6 @ 0xEE6;
"1222
[; ;pic18f27j13.h: 1222: asm("RPINR6 equ 0EE6h");
[; <" RPINR6 equ 0EE6h ;# ">
[; ;pic18f27j13.h: 1226: extern volatile unsigned char RPINR15 @ 0xEE7;
"1228
[; ;pic18f27j13.h: 1228: asm("RPINR15 equ 0EE7h");
[; <" RPINR15 equ 0EE7h ;# ">
[; ;pic18f27j13.h: 1232: extern volatile unsigned char RPINR7 @ 0xEE8;
"1234
[; ;pic18f27j13.h: 1234: asm("RPINR7 equ 0EE8h");
[; <" RPINR7 equ 0EE8h ;# ">
[; ;pic18f27j13.h: 1238: extern volatile unsigned char RPINR8 @ 0xEE9;
"1240
[; ;pic18f27j13.h: 1240: asm("RPINR8 equ 0EE9h");
[; <" RPINR8 equ 0EE9h ;# ">
[; ;pic18f27j13.h: 1244: extern volatile unsigned char RPINR9 @ 0xEEA;
"1246
[; ;pic18f27j13.h: 1246: asm("RPINR9 equ 0EEAh");
[; <" RPINR9 equ 0EEAh ;# ">
[; ;pic18f27j13.h: 1250: extern volatile unsigned char RPINR12 @ 0xEF2;
"1252
[; ;pic18f27j13.h: 1252: asm("RPINR12 equ 0EF2h");
[; <" RPINR12 equ 0EF2h ;# ">
[; ;pic18f27j13.h: 1256: extern volatile unsigned char RPINR13 @ 0xEF3;
"1258
[; ;pic18f27j13.h: 1258: asm("RPINR13 equ 0EF3h");
[; <" RPINR13 equ 0EF3h ;# ">
[; ;pic18f27j13.h: 1262: extern volatile unsigned char RPINR14 @ 0xEF4;
"1264
[; ;pic18f27j13.h: 1264: asm("RPINR14 equ 0EF4h");
[; <" RPINR14 equ 0EF4h ;# ">
[; ;pic18f27j13.h: 1268: extern volatile unsigned char RPINR16 @ 0xEF7;
"1270
[; ;pic18f27j13.h: 1270: asm("RPINR16 equ 0EF7h");
[; <" RPINR16 equ 0EF7h ;# ">
[; ;pic18f27j13.h: 1274: extern volatile unsigned char RPINR17 @ 0xEF8;
"1276
[; ;pic18f27j13.h: 1276: asm("RPINR17 equ 0EF8h");
[; <" RPINR17 equ 0EF8h ;# ">
[; ;pic18f27j13.h: 1280: extern volatile unsigned char RPINR21 @ 0xEFC;
"1282
[; ;pic18f27j13.h: 1282: asm("RPINR21 equ 0EFCh");
[; <" RPINR21 equ 0EFCh ;# ">
[; ;pic18f27j13.h: 1286: extern volatile unsigned char RPINR22 @ 0xEFD;
"1288
[; ;pic18f27j13.h: 1288: asm("RPINR22 equ 0EFDh");
[; <" RPINR22 equ 0EFDh ;# ">
[; ;pic18f27j13.h: 1292: extern volatile unsigned char RPINR23 @ 0xEFE;
"1294
[; ;pic18f27j13.h: 1294: asm("RPINR23 equ 0EFEh");
[; <" RPINR23 equ 0EFEh ;# ">
[; ;pic18f27j13.h: 1298: extern volatile unsigned char RPINR24 @ 0xEFF;
"1300
[; ;pic18f27j13.h: 1300: asm("RPINR24 equ 0EFFh");
[; <" RPINR24 equ 0EFFh ;# ">
[; ;pic18f27j13.h: 1304: extern volatile unsigned char CCP10CON @ 0xF00;
"1306
[; ;pic18f27j13.h: 1306: asm("CCP10CON equ 0F00h");
[; <" CCP10CON equ 0F00h ;# ">
[; ;pic18f27j13.h: 1309: typedef union {
[; ;pic18f27j13.h: 1310: struct {
[; ;pic18f27j13.h: 1311: unsigned CCP10M :4;
[; ;pic18f27j13.h: 1312: unsigned DC10B :2;
[; ;pic18f27j13.h: 1313: };
[; ;pic18f27j13.h: 1314: struct {
[; ;pic18f27j13.h: 1315: unsigned CCP10M0 :1;
[; ;pic18f27j13.h: 1316: unsigned CCP10M1 :1;
[; ;pic18f27j13.h: 1317: unsigned CCP10M2 :1;
[; ;pic18f27j13.h: 1318: unsigned CCP10M3 :1;
[; ;pic18f27j13.h: 1319: unsigned DC10B0 :1;
[; ;pic18f27j13.h: 1320: unsigned DC10B1 :1;
[; ;pic18f27j13.h: 1321: };
[; ;pic18f27j13.h: 1322: } CCP10CONbits_t;
[; ;pic18f27j13.h: 1323: extern volatile CCP10CONbits_t CCP10CONbits @ 0xF00;
[; ;pic18f27j13.h: 1367: extern volatile unsigned char CCPR10L @ 0xF01;
"1369
[; ;pic18f27j13.h: 1369: asm("CCPR10L equ 0F01h");
[; <" CCPR10L equ 0F01h ;# ">
[; ;pic18f27j13.h: 1372: typedef union {
[; ;pic18f27j13.h: 1373: struct {
[; ;pic18f27j13.h: 1374: unsigned CCPR10L :8;
[; ;pic18f27j13.h: 1375: };
[; ;pic18f27j13.h: 1376: } CCPR10Lbits_t;
[; ;pic18f27j13.h: 1377: extern volatile CCPR10Lbits_t CCPR10Lbits @ 0xF01;
[; ;pic18f27j13.h: 1386: extern volatile unsigned char CCPR10H @ 0xF02;
"1388
[; ;pic18f27j13.h: 1388: asm("CCPR10H equ 0F02h");
[; <" CCPR10H equ 0F02h ;# ">
[; ;pic18f27j13.h: 1391: typedef union {
[; ;pic18f27j13.h: 1392: struct {
[; ;pic18f27j13.h: 1393: unsigned CCPR10H :8;
[; ;pic18f27j13.h: 1394: };
[; ;pic18f27j13.h: 1395: } CCPR10Hbits_t;
[; ;pic18f27j13.h: 1396: extern volatile CCPR10Hbits_t CCPR10Hbits @ 0xF02;
[; ;pic18f27j13.h: 1405: extern volatile unsigned char CCP9CON @ 0xF03;
"1407
[; ;pic18f27j13.h: 1407: asm("CCP9CON equ 0F03h");
[; <" CCP9CON equ 0F03h ;# ">
[; ;pic18f27j13.h: 1410: typedef union {
[; ;pic18f27j13.h: 1411: struct {
[; ;pic18f27j13.h: 1412: unsigned CCP9M :4;
[; ;pic18f27j13.h: 1413: unsigned DC9B :2;
[; ;pic18f27j13.h: 1414: };
[; ;pic18f27j13.h: 1415: struct {
[; ;pic18f27j13.h: 1416: unsigned CCP9M0 :1;
[; ;pic18f27j13.h: 1417: unsigned CCP9M1 :1;
[; ;pic18f27j13.h: 1418: unsigned CCP9M2 :1;
[; ;pic18f27j13.h: 1419: unsigned CCP9M3 :1;
[; ;pic18f27j13.h: 1420: unsigned DC9B0 :1;
[; ;pic18f27j13.h: 1421: unsigned DC9B1 :1;
[; ;pic18f27j13.h: 1422: };
[; ;pic18f27j13.h: 1423: } CCP9CONbits_t;
[; ;pic18f27j13.h: 1424: extern volatile CCP9CONbits_t CCP9CONbits @ 0xF03;
[; ;pic18f27j13.h: 1468: extern volatile unsigned char CCPR9L @ 0xF04;
"1470
[; ;pic18f27j13.h: 1470: asm("CCPR9L equ 0F04h");
[; <" CCPR9L equ 0F04h ;# ">
[; ;pic18f27j13.h: 1473: typedef union {
[; ;pic18f27j13.h: 1474: struct {
[; ;pic18f27j13.h: 1475: unsigned CCPR9L :8;
[; ;pic18f27j13.h: 1476: };
[; ;pic18f27j13.h: 1477: } CCPR9Lbits_t;
[; ;pic18f27j13.h: 1478: extern volatile CCPR9Lbits_t CCPR9Lbits @ 0xF04;
[; ;pic18f27j13.h: 1487: extern volatile unsigned char CCPR9H @ 0xF05;
"1489
[; ;pic18f27j13.h: 1489: asm("CCPR9H equ 0F05h");
[; <" CCPR9H equ 0F05h ;# ">
[; ;pic18f27j13.h: 1492: typedef union {
[; ;pic18f27j13.h: 1493: struct {
[; ;pic18f27j13.h: 1494: unsigned CCPR9H :8;
[; ;pic18f27j13.h: 1495: };
[; ;pic18f27j13.h: 1496: } CCPR9Hbits_t;
[; ;pic18f27j13.h: 1497: extern volatile CCPR9Hbits_t CCPR9Hbits @ 0xF05;
[; ;pic18f27j13.h: 1506: extern volatile unsigned char CCP8CON @ 0xF06;
"1508
[; ;pic18f27j13.h: 1508: asm("CCP8CON equ 0F06h");
[; <" CCP8CON equ 0F06h ;# ">
[; ;pic18f27j13.h: 1511: typedef union {
[; ;pic18f27j13.h: 1512: struct {
[; ;pic18f27j13.h: 1513: unsigned CCP8M :4;
[; ;pic18f27j13.h: 1514: unsigned DC8B :2;
[; ;pic18f27j13.h: 1515: };
[; ;pic18f27j13.h: 1516: struct {
[; ;pic18f27j13.h: 1517: unsigned CCP8M0 :1;
[; ;pic18f27j13.h: 1518: unsigned CCP8M1 :1;
[; ;pic18f27j13.h: 1519: unsigned CCP8M2 :1;
[; ;pic18f27j13.h: 1520: unsigned CCP8M3 :1;
[; ;pic18f27j13.h: 1521: unsigned DC8B0 :1;
[; ;pic18f27j13.h: 1522: unsigned DC8B1 :1;
[; ;pic18f27j13.h: 1523: };
[; ;pic18f27j13.h: 1524: } CCP8CONbits_t;
[; ;pic18f27j13.h: 1525: extern volatile CCP8CONbits_t CCP8CONbits @ 0xF06;
[; ;pic18f27j13.h: 1569: extern volatile unsigned char CCPR8L @ 0xF07;
"1571
[; ;pic18f27j13.h: 1571: asm("CCPR8L equ 0F07h");
[; <" CCPR8L equ 0F07h ;# ">
[; ;pic18f27j13.h: 1574: typedef union {
[; ;pic18f27j13.h: 1575: struct {
[; ;pic18f27j13.h: 1576: unsigned CCPR8L :8;
[; ;pic18f27j13.h: 1577: };
[; ;pic18f27j13.h: 1578: } CCPR8Lbits_t;
[; ;pic18f27j13.h: 1579: extern volatile CCPR8Lbits_t CCPR8Lbits @ 0xF07;
[; ;pic18f27j13.h: 1588: extern volatile unsigned char CCPR8H @ 0xF08;
"1590
[; ;pic18f27j13.h: 1590: asm("CCPR8H equ 0F08h");
[; <" CCPR8H equ 0F08h ;# ">
[; ;pic18f27j13.h: 1593: typedef union {
[; ;pic18f27j13.h: 1594: struct {
[; ;pic18f27j13.h: 1595: unsigned CCPR8H :8;
[; ;pic18f27j13.h: 1596: };
[; ;pic18f27j13.h: 1597: } CCPR8Hbits_t;
[; ;pic18f27j13.h: 1598: extern volatile CCPR8Hbits_t CCPR8Hbits @ 0xF08;
[; ;pic18f27j13.h: 1607: extern volatile unsigned char CCP7CON @ 0xF09;
"1609
[; ;pic18f27j13.h: 1609: asm("CCP7CON equ 0F09h");
[; <" CCP7CON equ 0F09h ;# ">
[; ;pic18f27j13.h: 1612: typedef union {
[; ;pic18f27j13.h: 1613: struct {
[; ;pic18f27j13.h: 1614: unsigned CCP7M :4;
[; ;pic18f27j13.h: 1615: unsigned DC7B :2;
[; ;pic18f27j13.h: 1616: };
[; ;pic18f27j13.h: 1617: struct {
[; ;pic18f27j13.h: 1618: unsigned CCP7M0 :1;
[; ;pic18f27j13.h: 1619: unsigned CCP7M1 :1;
[; ;pic18f27j13.h: 1620: unsigned CCP7M2 :1;
[; ;pic18f27j13.h: 1621: unsigned CCP7M3 :1;
[; ;pic18f27j13.h: 1622: unsigned DC7B0 :1;
[; ;pic18f27j13.h: 1623: unsigned DC7B1 :1;
[; ;pic18f27j13.h: 1624: };
[; ;pic18f27j13.h: 1625: } CCP7CONbits_t;
[; ;pic18f27j13.h: 1626: extern volatile CCP7CONbits_t CCP7CONbits @ 0xF09;
[; ;pic18f27j13.h: 1670: extern volatile unsigned char CCPR7L @ 0xF0A;
"1672
[; ;pic18f27j13.h: 1672: asm("CCPR7L equ 0F0Ah");
[; <" CCPR7L equ 0F0Ah ;# ">
[; ;pic18f27j13.h: 1675: typedef union {
[; ;pic18f27j13.h: 1676: struct {
[; ;pic18f27j13.h: 1677: unsigned CCPR7L :8;
[; ;pic18f27j13.h: 1678: };
[; ;pic18f27j13.h: 1679: } CCPR7Lbits_t;
[; ;pic18f27j13.h: 1680: extern volatile CCPR7Lbits_t CCPR7Lbits @ 0xF0A;
[; ;pic18f27j13.h: 1689: extern volatile unsigned char CCPR7H @ 0xF0B;
"1691
[; ;pic18f27j13.h: 1691: asm("CCPR7H equ 0F0Bh");
[; <" CCPR7H equ 0F0Bh ;# ">
[; ;pic18f27j13.h: 1694: typedef union {
[; ;pic18f27j13.h: 1695: struct {
[; ;pic18f27j13.h: 1696: unsigned CCPR7H :8;
[; ;pic18f27j13.h: 1697: };
[; ;pic18f27j13.h: 1698: } CCPR7Hbits_t;
[; ;pic18f27j13.h: 1699: extern volatile CCPR7Hbits_t CCPR7Hbits @ 0xF0B;
[; ;pic18f27j13.h: 1708: extern volatile unsigned char CCP6CON @ 0xF0C;
"1710
[; ;pic18f27j13.h: 1710: asm("CCP6CON equ 0F0Ch");
[; <" CCP6CON equ 0F0Ch ;# ">
[; ;pic18f27j13.h: 1713: typedef union {
[; ;pic18f27j13.h: 1714: struct {
[; ;pic18f27j13.h: 1715: unsigned CCP6M :4;
[; ;pic18f27j13.h: 1716: unsigned DC6B :2;
[; ;pic18f27j13.h: 1717: };
[; ;pic18f27j13.h: 1718: struct {
[; ;pic18f27j13.h: 1719: unsigned CCP6M0 :1;
[; ;pic18f27j13.h: 1720: unsigned CCP6M1 :1;
[; ;pic18f27j13.h: 1721: unsigned CCP6M2 :1;
[; ;pic18f27j13.h: 1722: unsigned CCP6M3 :1;
[; ;pic18f27j13.h: 1723: unsigned DC6B0 :1;
[; ;pic18f27j13.h: 1724: unsigned DC6B1 :1;
[; ;pic18f27j13.h: 1725: };
[; ;pic18f27j13.h: 1726: } CCP6CONbits_t;
[; ;pic18f27j13.h: 1727: extern volatile CCP6CONbits_t CCP6CONbits @ 0xF0C;
[; ;pic18f27j13.h: 1771: extern volatile unsigned char CCPR6L @ 0xF0D;
"1773
[; ;pic18f27j13.h: 1773: asm("CCPR6L equ 0F0Dh");
[; <" CCPR6L equ 0F0Dh ;# ">
[; ;pic18f27j13.h: 1776: typedef union {
[; ;pic18f27j13.h: 1777: struct {
[; ;pic18f27j13.h: 1778: unsigned CCPR6L :8;
[; ;pic18f27j13.h: 1779: };
[; ;pic18f27j13.h: 1780: } CCPR6Lbits_t;
[; ;pic18f27j13.h: 1781: extern volatile CCPR6Lbits_t CCPR6Lbits @ 0xF0D;
[; ;pic18f27j13.h: 1790: extern volatile unsigned char CCPR6H @ 0xF0E;
"1792
[; ;pic18f27j13.h: 1792: asm("CCPR6H equ 0F0Eh");
[; <" CCPR6H equ 0F0Eh ;# ">
[; ;pic18f27j13.h: 1795: typedef union {
[; ;pic18f27j13.h: 1796: struct {
[; ;pic18f27j13.h: 1797: unsigned CCPR6H :8;
[; ;pic18f27j13.h: 1798: };
[; ;pic18f27j13.h: 1799: } CCPR6Hbits_t;
[; ;pic18f27j13.h: 1800: extern volatile CCPR6Hbits_t CCPR6Hbits @ 0xF0E;
[; ;pic18f27j13.h: 1809: extern volatile unsigned char CCP5CON @ 0xF0F;
"1811
[; ;pic18f27j13.h: 1811: asm("CCP5CON equ 0F0Fh");
[; <" CCP5CON equ 0F0Fh ;# ">
[; ;pic18f27j13.h: 1814: typedef union {
[; ;pic18f27j13.h: 1815: struct {
[; ;pic18f27j13.h: 1816: unsigned CCP5M :4;
[; ;pic18f27j13.h: 1817: unsigned DC5B :2;
[; ;pic18f27j13.h: 1818: };
[; ;pic18f27j13.h: 1819: struct {
[; ;pic18f27j13.h: 1820: unsigned CCP5M0 :1;
[; ;pic18f27j13.h: 1821: unsigned CCP5M1 :1;
[; ;pic18f27j13.h: 1822: unsigned CCP5M2 :1;
[; ;pic18f27j13.h: 1823: unsigned CCP5M3 :1;
[; ;pic18f27j13.h: 1824: unsigned DC5B0 :1;
[; ;pic18f27j13.h: 1825: unsigned DC5B1 :1;
[; ;pic18f27j13.h: 1826: };
[; ;pic18f27j13.h: 1827: } CCP5CONbits_t;
[; ;pic18f27j13.h: 1828: extern volatile CCP5CONbits_t CCP5CONbits @ 0xF0F;
[; ;pic18f27j13.h: 1872: extern volatile unsigned char CCPR5L @ 0xF10;
"1874
[; ;pic18f27j13.h: 1874: asm("CCPR5L equ 0F10h");
[; <" CCPR5L equ 0F10h ;# ">
[; ;pic18f27j13.h: 1877: typedef union {
[; ;pic18f27j13.h: 1878: struct {
[; ;pic18f27j13.h: 1879: unsigned CCPR5L :8;
[; ;pic18f27j13.h: 1880: };
[; ;pic18f27j13.h: 1881: } CCPR5Lbits_t;
[; ;pic18f27j13.h: 1882: extern volatile CCPR5Lbits_t CCPR5Lbits @ 0xF10;
[; ;pic18f27j13.h: 1891: extern volatile unsigned char CCPR5H @ 0xF11;
"1893
[; ;pic18f27j13.h: 1893: asm("CCPR5H equ 0F11h");
[; <" CCPR5H equ 0F11h ;# ">
[; ;pic18f27j13.h: 1896: typedef union {
[; ;pic18f27j13.h: 1897: struct {
[; ;pic18f27j13.h: 1898: unsigned CCPR5H :8;
[; ;pic18f27j13.h: 1899: };
[; ;pic18f27j13.h: 1900: } CCPR5Hbits_t;
[; ;pic18f27j13.h: 1901: extern volatile CCPR5Hbits_t CCPR5Hbits @ 0xF11;
[; ;pic18f27j13.h: 1910: extern volatile unsigned char CCP4CON @ 0xF12;
"1912
[; ;pic18f27j13.h: 1912: asm("CCP4CON equ 0F12h");
[; <" CCP4CON equ 0F12h ;# ">
[; ;pic18f27j13.h: 1915: typedef union {
[; ;pic18f27j13.h: 1916: struct {
[; ;pic18f27j13.h: 1917: unsigned CCP4M :4;
[; ;pic18f27j13.h: 1918: unsigned DC4B :2;
[; ;pic18f27j13.h: 1919: };
[; ;pic18f27j13.h: 1920: struct {
[; ;pic18f27j13.h: 1921: unsigned CCP4M0 :1;
[; ;pic18f27j13.h: 1922: unsigned CCP4M1 :1;
[; ;pic18f27j13.h: 1923: unsigned CCP4M2 :1;
[; ;pic18f27j13.h: 1924: unsigned CCP4M3 :1;
[; ;pic18f27j13.h: 1925: unsigned DC4B0 :1;
[; ;pic18f27j13.h: 1926: unsigned DC4B1 :1;
[; ;pic18f27j13.h: 1927: };
[; ;pic18f27j13.h: 1928: } CCP4CONbits_t;
[; ;pic18f27j13.h: 1929: extern volatile CCP4CONbits_t CCP4CONbits @ 0xF12;
[; ;pic18f27j13.h: 1973: extern volatile unsigned char CCPR4L @ 0xF13;
"1975
[; ;pic18f27j13.h: 1975: asm("CCPR4L equ 0F13h");
[; <" CCPR4L equ 0F13h ;# ">
[; ;pic18f27j13.h: 1978: typedef union {
[; ;pic18f27j13.h: 1979: struct {
[; ;pic18f27j13.h: 1980: unsigned CCPR4L :8;
[; ;pic18f27j13.h: 1981: };
[; ;pic18f27j13.h: 1982: } CCPR4Lbits_t;
[; ;pic18f27j13.h: 1983: extern volatile CCPR4Lbits_t CCPR4Lbits @ 0xF13;
[; ;pic18f27j13.h: 1992: extern volatile unsigned char CCPR4H @ 0xF14;
"1994
[; ;pic18f27j13.h: 1994: asm("CCPR4H equ 0F14h");
[; <" CCPR4H equ 0F14h ;# ">
[; ;pic18f27j13.h: 1997: typedef union {
[; ;pic18f27j13.h: 1998: struct {
[; ;pic18f27j13.h: 1999: unsigned CCPR4H :8;
[; ;pic18f27j13.h: 2000: };
[; ;pic18f27j13.h: 2001: } CCPR4Hbits_t;
[; ;pic18f27j13.h: 2002: extern volatile CCPR4Hbits_t CCPR4Hbits @ 0xF14;
[; ;pic18f27j13.h: 2011: extern volatile unsigned char CCP3CON @ 0xF15;
"2013
[; ;pic18f27j13.h: 2013: asm("CCP3CON equ 0F15h");
[; <" CCP3CON equ 0F15h ;# ">
[; ;pic18f27j13.h: 2016: typedef union {
[; ;pic18f27j13.h: 2017: struct {
[; ;pic18f27j13.h: 2018: unsigned CCP3M :4;
[; ;pic18f27j13.h: 2019: unsigned DC3B :2;
[; ;pic18f27j13.h: 2020: unsigned P3M :2;
[; ;pic18f27j13.h: 2021: };
[; ;pic18f27j13.h: 2022: struct {
[; ;pic18f27j13.h: 2023: unsigned CCP3M0 :1;
[; ;pic18f27j13.h: 2024: unsigned CCP3M1 :1;
[; ;pic18f27j13.h: 2025: unsigned CCP3M2 :1;
[; ;pic18f27j13.h: 2026: unsigned CCP3M3 :1;
[; ;pic18f27j13.h: 2027: unsigned DC3B0 :1;
[; ;pic18f27j13.h: 2028: unsigned DC3B1 :1;
[; ;pic18f27j13.h: 2029: unsigned P3M0 :1;
[; ;pic18f27j13.h: 2030: unsigned P3M1 :1;
[; ;pic18f27j13.h: 2031: };
[; ;pic18f27j13.h: 2032: } CCP3CONbits_t;
[; ;pic18f27j13.h: 2033: extern volatile CCP3CONbits_t CCP3CONbits @ 0xF15;
[; ;pic18f27j13.h: 2092: extern volatile unsigned char CCPR3L @ 0xF16;
"2094
[; ;pic18f27j13.h: 2094: asm("CCPR3L equ 0F16h");
[; <" CCPR3L equ 0F16h ;# ">
[; ;pic18f27j13.h: 2097: typedef union {
[; ;pic18f27j13.h: 2098: struct {
[; ;pic18f27j13.h: 2099: unsigned CCPR3L :8;
[; ;pic18f27j13.h: 2100: };
[; ;pic18f27j13.h: 2101: } CCPR3Lbits_t;
[; ;pic18f27j13.h: 2102: extern volatile CCPR3Lbits_t CCPR3Lbits @ 0xF16;
[; ;pic18f27j13.h: 2111: extern volatile unsigned char CCPR3H @ 0xF17;
"2113
[; ;pic18f27j13.h: 2113: asm("CCPR3H equ 0F17h");
[; <" CCPR3H equ 0F17h ;# ">
[; ;pic18f27j13.h: 2116: typedef union {
[; ;pic18f27j13.h: 2117: struct {
[; ;pic18f27j13.h: 2118: unsigned CCPR3H :8;
[; ;pic18f27j13.h: 2119: };
[; ;pic18f27j13.h: 2120: } CCPR3Hbits_t;
[; ;pic18f27j13.h: 2121: extern volatile CCPR3Hbits_t CCPR3Hbits @ 0xF17;
[; ;pic18f27j13.h: 2130: extern volatile unsigned char ECCP3DEL @ 0xF18;
"2132
[; ;pic18f27j13.h: 2132: asm("ECCP3DEL equ 0F18h");
[; <" ECCP3DEL equ 0F18h ;# ">
[; ;pic18f27j13.h: 2135: typedef union {
[; ;pic18f27j13.h: 2136: struct {
[; ;pic18f27j13.h: 2137: unsigned P3DC :7;
[; ;pic18f27j13.h: 2138: unsigned P3RSEN :1;
[; ;pic18f27j13.h: 2139: };
[; ;pic18f27j13.h: 2140: struct {
[; ;pic18f27j13.h: 2141: unsigned P3DC0 :1;
[; ;pic18f27j13.h: 2142: unsigned P3DC1 :1;
[; ;pic18f27j13.h: 2143: unsigned P3DC2 :1;
[; ;pic18f27j13.h: 2144: unsigned P3DC3 :1;
[; ;pic18f27j13.h: 2145: unsigned P3DC4 :1;
[; ;pic18f27j13.h: 2146: unsigned P3DC5 :1;
[; ;pic18f27j13.h: 2147: unsigned P3DC6 :1;
[; ;pic18f27j13.h: 2148: };
[; ;pic18f27j13.h: 2149: } ECCP3DELbits_t;
[; ;pic18f27j13.h: 2150: extern volatile ECCP3DELbits_t ECCP3DELbits @ 0xF18;
[; ;pic18f27j13.h: 2199: extern volatile unsigned char ECCP3AS @ 0xF19;
"2201
[; ;pic18f27j13.h: 2201: asm("ECCP3AS equ 0F19h");
[; <" ECCP3AS equ 0F19h ;# ">
[; ;pic18f27j13.h: 2204: typedef union {
[; ;pic18f27j13.h: 2205: struct {
[; ;pic18f27j13.h: 2206: unsigned PSS3BD :2;
[; ;pic18f27j13.h: 2207: unsigned PSS3AC :2;
[; ;pic18f27j13.h: 2208: unsigned ECCP3AS :3;
[; ;pic18f27j13.h: 2209: unsigned ECCP3ASE :1;
[; ;pic18f27j13.h: 2210: };
[; ;pic18f27j13.h: 2211: struct {
[; ;pic18f27j13.h: 2212: unsigned PSS3BD0 :1;
[; ;pic18f27j13.h: 2213: unsigned PSS3BD1 :1;
[; ;pic18f27j13.h: 2214: unsigned PSS3AC0 :1;
[; ;pic18f27j13.h: 2215: unsigned PSS3AC1 :1;
[; ;pic18f27j13.h: 2216: unsigned ECCP3AS0 :1;
[; ;pic18f27j13.h: 2217: unsigned ECCP3AS1 :1;
[; ;pic18f27j13.h: 2218: unsigned ECCP3AS2 :1;
[; ;pic18f27j13.h: 2219: };
[; ;pic18f27j13.h: 2220: } ECCP3ASbits_t;
[; ;pic18f27j13.h: 2221: extern volatile ECCP3ASbits_t ECCP3ASbits @ 0xF19;
[; ;pic18f27j13.h: 2280: extern volatile unsigned char PSTR3CON @ 0xF1A;
"2282
[; ;pic18f27j13.h: 2282: asm("PSTR3CON equ 0F1Ah");
[; <" PSTR3CON equ 0F1Ah ;# ">
[; ;pic18f27j13.h: 2285: typedef union {
[; ;pic18f27j13.h: 2286: struct {
[; ;pic18f27j13.h: 2287: unsigned STRA :1;
[; ;pic18f27j13.h: 2288: unsigned STRB :1;
[; ;pic18f27j13.h: 2289: unsigned STRC :1;
[; ;pic18f27j13.h: 2290: unsigned STRD :1;
[; ;pic18f27j13.h: 2291: unsigned STRSYNC :1;
[; ;pic18f27j13.h: 2292: unsigned :1;
[; ;pic18f27j13.h: 2293: unsigned CMPL :2;
[; ;pic18f27j13.h: 2294: };
[; ;pic18f27j13.h: 2295: struct {
[; ;pic18f27j13.h: 2296: unsigned :6;
[; ;pic18f27j13.h: 2297: unsigned CMPL0 :1;
[; ;pic18f27j13.h: 2298: unsigned CMPL1 :1;
[; ;pic18f27j13.h: 2299: };
[; ;pic18f27j13.h: 2300: struct {
[; ;pic18f27j13.h: 2301: unsigned :6;
[; ;pic18f27j13.h: 2302: unsigned CMPL03 :1;
[; ;pic18f27j13.h: 2303: };
[; ;pic18f27j13.h: 2304: struct {
[; ;pic18f27j13.h: 2305: unsigned :7;
[; ;pic18f27j13.h: 2306: unsigned CMPL13 :1;
[; ;pic18f27j13.h: 2307: };
[; ;pic18f27j13.h: 2308: struct {
[; ;pic18f27j13.h: 2309: unsigned STRA3 :1;
[; ;pic18f27j13.h: 2310: };
[; ;pic18f27j13.h: 2311: struct {
[; ;pic18f27j13.h: 2312: unsigned :1;
[; ;pic18f27j13.h: 2313: unsigned STRB3 :1;
[; ;pic18f27j13.h: 2314: };
[; ;pic18f27j13.h: 2315: struct {
[; ;pic18f27j13.h: 2316: unsigned :2;
[; ;pic18f27j13.h: 2317: unsigned STRC3 :1;
[; ;pic18f27j13.h: 2318: };
[; ;pic18f27j13.h: 2319: struct {
[; ;pic18f27j13.h: 2320: unsigned :3;
[; ;pic18f27j13.h: 2321: unsigned STRD3 :1;
[; ;pic18f27j13.h: 2322: };
[; ;pic18f27j13.h: 2323: struct {
[; ;pic18f27j13.h: 2324: unsigned :4;
[; ;pic18f27j13.h: 2325: unsigned STRSYNC3 :1;
[; ;pic18f27j13.h: 2326: };
[; ;pic18f27j13.h: 2327: } PSTR3CONbits_t;
[; ;pic18f27j13.h: 2328: extern volatile PSTR3CONbits_t PSTR3CONbits @ 0xF1A;
[; ;pic18f27j13.h: 2407: extern volatile unsigned char T8CON @ 0xF1B;
"2409
[; ;pic18f27j13.h: 2409: asm("T8CON equ 0F1Bh");
[; <" T8CON equ 0F1Bh ;# ">
[; ;pic18f27j13.h: 2412: typedef union {
[; ;pic18f27j13.h: 2413: struct {
[; ;pic18f27j13.h: 2414: unsigned T8CKPS :2;
[; ;pic18f27j13.h: 2415: unsigned TMR8ON :1;
[; ;pic18f27j13.h: 2416: unsigned T8OUTPS :4;
[; ;pic18f27j13.h: 2417: };
[; ;pic18f27j13.h: 2418: struct {
[; ;pic18f27j13.h: 2419: unsigned T8CKPS0 :1;
[; ;pic18f27j13.h: 2420: unsigned T8CKPS1 :1;
[; ;pic18f27j13.h: 2421: unsigned :1;
[; ;pic18f27j13.h: 2422: unsigned T8OUTPS0 :1;
[; ;pic18f27j13.h: 2423: unsigned T8OUTPS1 :1;
[; ;pic18f27j13.h: 2424: unsigned T8OUTPS2 :1;
[; ;pic18f27j13.h: 2425: unsigned T8OUTPS3 :1;
[; ;pic18f27j13.h: 2426: };
[; ;pic18f27j13.h: 2427: } T8CONbits_t;
[; ;pic18f27j13.h: 2428: extern volatile T8CONbits_t T8CONbits @ 0xF1B;
[; ;pic18f27j13.h: 2477: extern volatile unsigned char PR8 @ 0xF1C;
"2479
[; ;pic18f27j13.h: 2479: asm("PR8 equ 0F1Ch");
[; <" PR8 equ 0F1Ch ;# ">
[; ;pic18f27j13.h: 2482: typedef union {
[; ;pic18f27j13.h: 2483: struct {
[; ;pic18f27j13.h: 2484: unsigned PR8 :8;
[; ;pic18f27j13.h: 2485: };
[; ;pic18f27j13.h: 2486: } PR8bits_t;
[; ;pic18f27j13.h: 2487: extern volatile PR8bits_t PR8bits @ 0xF1C;
[; ;pic18f27j13.h: 2496: extern volatile unsigned char TMR8 @ 0xF1D;
"2498
[; ;pic18f27j13.h: 2498: asm("TMR8 equ 0F1Dh");
[; <" TMR8 equ 0F1Dh ;# ">
[; ;pic18f27j13.h: 2501: typedef union {
[; ;pic18f27j13.h: 2502: struct {
[; ;pic18f27j13.h: 2503: unsigned TMR8 :8;
[; ;pic18f27j13.h: 2504: };
[; ;pic18f27j13.h: 2505: } TMR8bits_t;
[; ;pic18f27j13.h: 2506: extern volatile TMR8bits_t TMR8bits @ 0xF1D;
[; ;pic18f27j13.h: 2515: extern volatile unsigned char T6CON @ 0xF1E;
"2517
[; ;pic18f27j13.h: 2517: asm("T6CON equ 0F1Eh");
[; <" T6CON equ 0F1Eh ;# ">
[; ;pic18f27j13.h: 2520: typedef union {
[; ;pic18f27j13.h: 2521: struct {
[; ;pic18f27j13.h: 2522: unsigned T6CKPS :2;
[; ;pic18f27j13.h: 2523: unsigned TMR6ON :1;
[; ;pic18f27j13.h: 2524: unsigned T6OUTPS :4;
[; ;pic18f27j13.h: 2525: };
[; ;pic18f27j13.h: 2526: struct {
[; ;pic18f27j13.h: 2527: unsigned T6CKPS0 :1;
[; ;pic18f27j13.h: 2528: unsigned T6CKPS1 :1;
[; ;pic18f27j13.h: 2529: unsigned :1;
[; ;pic18f27j13.h: 2530: unsigned T6OUTPS0 :1;
[; ;pic18f27j13.h: 2531: unsigned T6OUTPS1 :1;
[; ;pic18f27j13.h: 2532: unsigned T6OUTPS2 :1;
[; ;pic18f27j13.h: 2533: unsigned T6OUTPS3 :1;
[; ;pic18f27j13.h: 2534: };
[; ;pic18f27j13.h: 2535: } T6CONbits_t;
[; ;pic18f27j13.h: 2536: extern volatile T6CONbits_t T6CONbits @ 0xF1E;
[; ;pic18f27j13.h: 2585: extern volatile unsigned char PR6 @ 0xF1F;
"2587
[; ;pic18f27j13.h: 2587: asm("PR6 equ 0F1Fh");
[; <" PR6 equ 0F1Fh ;# ">
[; ;pic18f27j13.h: 2590: typedef union {
[; ;pic18f27j13.h: 2591: struct {
[; ;pic18f27j13.h: 2592: unsigned PR6 :8;
[; ;pic18f27j13.h: 2593: };
[; ;pic18f27j13.h: 2594: } PR6bits_t;
[; ;pic18f27j13.h: 2595: extern volatile PR6bits_t PR6bits @ 0xF1F;
[; ;pic18f27j13.h: 2604: extern volatile unsigned char TMR6 @ 0xF20;
"2606
[; ;pic18f27j13.h: 2606: asm("TMR6 equ 0F20h");
[; <" TMR6 equ 0F20h ;# ">
[; ;pic18f27j13.h: 2609: typedef union {
[; ;pic18f27j13.h: 2610: struct {
[; ;pic18f27j13.h: 2611: unsigned TMR6 :8;
[; ;pic18f27j13.h: 2612: };
[; ;pic18f27j13.h: 2613: } TMR6bits_t;
[; ;pic18f27j13.h: 2614: extern volatile TMR6bits_t TMR6bits @ 0xF20;
[; ;pic18f27j13.h: 2623: extern volatile unsigned char T5GCON @ 0xF21;
"2625
[; ;pic18f27j13.h: 2625: asm("T5GCON equ 0F21h");
[; <" T5GCON equ 0F21h ;# ">
[; ;pic18f27j13.h: 2628: typedef union {
[; ;pic18f27j13.h: 2629: struct {
[; ;pic18f27j13.h: 2630: unsigned :3;
[; ;pic18f27j13.h: 2631: unsigned T5GGO_NOT_T5DONE :1;
[; ;pic18f27j13.h: 2632: };
[; ;pic18f27j13.h: 2633: struct {
[; ;pic18f27j13.h: 2634: unsigned T5GSS :2;
[; ;pic18f27j13.h: 2635: unsigned T5GVAL :1;
[; ;pic18f27j13.h: 2636: unsigned T5GGO_nT5DONE :1;
[; ;pic18f27j13.h: 2637: unsigned T5GSPM :1;
[; ;pic18f27j13.h: 2638: unsigned T5GTM :1;
[; ;pic18f27j13.h: 2639: unsigned T5GPOL :1;
[; ;pic18f27j13.h: 2640: unsigned TMR5GE :1;
[; ;pic18f27j13.h: 2641: };
[; ;pic18f27j13.h: 2642: struct {
[; ;pic18f27j13.h: 2643: unsigned T5GSS0 :1;
[; ;pic18f27j13.h: 2644: unsigned T5GSS1 :1;
[; ;pic18f27j13.h: 2645: unsigned :1;
[; ;pic18f27j13.h: 2646: unsigned T5GGO :1;
[; ;pic18f27j13.h: 2647: };
[; ;pic18f27j13.h: 2648: struct {
[; ;pic18f27j13.h: 2649: unsigned :3;
[; ;pic18f27j13.h: 2650: unsigned NOT_T5DONE :1;
[; ;pic18f27j13.h: 2651: };
[; ;pic18f27j13.h: 2652: struct {
[; ;pic18f27j13.h: 2653: unsigned :3;
[; ;pic18f27j13.h: 2654: unsigned nT5DONE :1;
[; ;pic18f27j13.h: 2655: };
[; ;pic18f27j13.h: 2656: struct {
[; ;pic18f27j13.h: 2657: unsigned :3;
[; ;pic18f27j13.h: 2658: unsigned T5DONE :1;
[; ;pic18f27j13.h: 2659: };
[; ;pic18f27j13.h: 2660: } T5GCONbits_t;
[; ;pic18f27j13.h: 2661: extern volatile T5GCONbits_t T5GCONbits @ 0xF21;
[; ;pic18f27j13.h: 2735: extern volatile unsigned char T5CON @ 0xF22;
"2737
[; ;pic18f27j13.h: 2737: asm("T5CON equ 0F22h");
[; <" T5CON equ 0F22h ;# ">
[; ;pic18f27j13.h: 2740: typedef union {
[; ;pic18f27j13.h: 2741: struct {
[; ;pic18f27j13.h: 2742: unsigned :2;
[; ;pic18f27j13.h: 2743: unsigned NOT_T5SYNC :1;
[; ;pic18f27j13.h: 2744: };
[; ;pic18f27j13.h: 2745: struct {
[; ;pic18f27j13.h: 2746: unsigned TMR5ON :1;
[; ;pic18f27j13.h: 2747: unsigned RD16 :1;
[; ;pic18f27j13.h: 2748: unsigned nT5SYNC :1;
[; ;pic18f27j13.h: 2749: unsigned T5OSCEN :1;
[; ;pic18f27j13.h: 2750: unsigned T5CKPS :2;
[; ;pic18f27j13.h: 2751: unsigned TMR5CS :2;
[; ;pic18f27j13.h: 2752: };
[; ;pic18f27j13.h: 2753: struct {
[; ;pic18f27j13.h: 2754: unsigned :4;
[; ;pic18f27j13.h: 2755: unsigned T5CKPS0 :1;
[; ;pic18f27j13.h: 2756: unsigned T5CKPS1 :1;
[; ;pic18f27j13.h: 2757: unsigned TMR5CS0 :1;
[; ;pic18f27j13.h: 2758: unsigned TMR5CS1 :1;
[; ;pic18f27j13.h: 2759: };
[; ;pic18f27j13.h: 2760: struct {
[; ;pic18f27j13.h: 2761: unsigned :1;
[; ;pic18f27j13.h: 2762: unsigned RD165 :1;
[; ;pic18f27j13.h: 2763: };
[; ;pic18f27j13.h: 2764: struct {
[; ;pic18f27j13.h: 2765: unsigned :3;
[; ;pic18f27j13.h: 2766: unsigned SOSCEN5 :1;
[; ;pic18f27j13.h: 2767: };
[; ;pic18f27j13.h: 2768: } T5CONbits_t;
[; ;pic18f27j13.h: 2769: extern volatile T5CONbits_t T5CONbits @ 0xF22;
[; ;pic18f27j13.h: 2838: extern volatile unsigned char TMR5L @ 0xF23;
"2840
[; ;pic18f27j13.h: 2840: asm("TMR5L equ 0F23h");
[; <" TMR5L equ 0F23h ;# ">
[; ;pic18f27j13.h: 2843: typedef union {
[; ;pic18f27j13.h: 2844: struct {
[; ;pic18f27j13.h: 2845: unsigned TMR5L :8;
[; ;pic18f27j13.h: 2846: };
[; ;pic18f27j13.h: 2847: } TMR5Lbits_t;
[; ;pic18f27j13.h: 2848: extern volatile TMR5Lbits_t TMR5Lbits @ 0xF23;
[; ;pic18f27j13.h: 2857: extern volatile unsigned char TMR5H @ 0xF24;
"2859
[; ;pic18f27j13.h: 2859: asm("TMR5H equ 0F24h");
[; <" TMR5H equ 0F24h ;# ">
[; ;pic18f27j13.h: 2862: typedef union {
[; ;pic18f27j13.h: 2863: struct {
[; ;pic18f27j13.h: 2864: unsigned TMR5H :8;
[; ;pic18f27j13.h: 2865: };
[; ;pic18f27j13.h: 2866: } TMR5Hbits_t;
[; ;pic18f27j13.h: 2867: extern volatile TMR5Hbits_t TMR5Hbits @ 0xF24;
[; ;pic18f27j13.h: 2876: extern volatile unsigned char CM3CON @ 0xF25;
"2878
[; ;pic18f27j13.h: 2878: asm("CM3CON equ 0F25h");
[; <" CM3CON equ 0F25h ;# ">
[; ;pic18f27j13.h: 2881: typedef union {
[; ;pic18f27j13.h: 2882: struct {
[; ;pic18f27j13.h: 2883: unsigned CCH :2;
[; ;pic18f27j13.h: 2884: unsigned CREF :1;
[; ;pic18f27j13.h: 2885: unsigned EVPOL :2;
[; ;pic18f27j13.h: 2886: unsigned CPOL :1;
[; ;pic18f27j13.h: 2887: unsigned COE :1;
[; ;pic18f27j13.h: 2888: unsigned CON :1;
[; ;pic18f27j13.h: 2889: };
[; ;pic18f27j13.h: 2890: struct {
[; ;pic18f27j13.h: 2891: unsigned CCH0 :1;
[; ;pic18f27j13.h: 2892: unsigned CCH1 :1;
[; ;pic18f27j13.h: 2893: unsigned :1;
[; ;pic18f27j13.h: 2894: unsigned EVPOL0 :1;
[; ;pic18f27j13.h: 2895: unsigned EVPOL1 :1;
[; ;pic18f27j13.h: 2896: };
[; ;pic18f27j13.h: 2897: struct {
[; ;pic18f27j13.h: 2898: unsigned CCH03 :1;
[; ;pic18f27j13.h: 2899: };
[; ;pic18f27j13.h: 2900: struct {
[; ;pic18f27j13.h: 2901: unsigned :1;
[; ;pic18f27j13.h: 2902: unsigned CCH13 :1;
[; ;pic18f27j13.h: 2903: };
[; ;pic18f27j13.h: 2904: struct {
[; ;pic18f27j13.h: 2905: unsigned :6;
[; ;pic18f27j13.h: 2906: unsigned COE3 :1;
[; ;pic18f27j13.h: 2907: };
[; ;pic18f27j13.h: 2908: struct {
[; ;pic18f27j13.h: 2909: unsigned :7;
[; ;pic18f27j13.h: 2910: unsigned CON3 :1;
[; ;pic18f27j13.h: 2911: };
[; ;pic18f27j13.h: 2912: struct {
[; ;pic18f27j13.h: 2913: unsigned :5;
[; ;pic18f27j13.h: 2914: unsigned CPOL3 :1;
[; ;pic18f27j13.h: 2915: };
[; ;pic18f27j13.h: 2916: struct {
[; ;pic18f27j13.h: 2917: unsigned :2;
[; ;pic18f27j13.h: 2918: unsigned CREF3 :1;
[; ;pic18f27j13.h: 2919: };
[; ;pic18f27j13.h: 2920: struct {
[; ;pic18f27j13.h: 2921: unsigned :3;
[; ;pic18f27j13.h: 2922: unsigned EVPOL03 :1;
[; ;pic18f27j13.h: 2923: };
[; ;pic18f27j13.h: 2924: struct {
[; ;pic18f27j13.h: 2925: unsigned :4;
[; ;pic18f27j13.h: 2926: unsigned EVPOL13 :1;
[; ;pic18f27j13.h: 2927: };
[; ;pic18f27j13.h: 2928: } CM3CONbits_t;
[; ;pic18f27j13.h: 2929: extern volatile CM3CONbits_t CM3CONbits @ 0xF25;
[; ;pic18f27j13.h: 3023: extern volatile unsigned char RTCVALL @ 0xF3A;
"3025
[; ;pic18f27j13.h: 3025: asm("RTCVALL equ 0F3Ah");
[; <" RTCVALL equ 0F3Ah ;# ">
[; ;pic18f27j13.h: 3028: typedef union {
[; ;pic18f27j13.h: 3029: struct {
[; ;pic18f27j13.h: 3030: unsigned RTCVALL :8;
[; ;pic18f27j13.h: 3031: };
[; ;pic18f27j13.h: 3032: } RTCVALLbits_t;
[; ;pic18f27j13.h: 3033: extern volatile RTCVALLbits_t RTCVALLbits @ 0xF3A;
[; ;pic18f27j13.h: 3042: extern volatile unsigned char RTCVALH @ 0xF3B;
"3044
[; ;pic18f27j13.h: 3044: asm("RTCVALH equ 0F3Bh");
[; <" RTCVALH equ 0F3Bh ;# ">
[; ;pic18f27j13.h: 3047: typedef union {
[; ;pic18f27j13.h: 3048: struct {
[; ;pic18f27j13.h: 3049: unsigned RTCVALH :8;
[; ;pic18f27j13.h: 3050: };
[; ;pic18f27j13.h: 3051: struct {
[; ;pic18f27j13.h: 3052: unsigned :6;
[; ;pic18f27j13.h: 3053: unsigned WAITB0 :1;
[; ;pic18f27j13.h: 3054: };
[; ;pic18f27j13.h: 3055: struct {
[; ;pic18f27j13.h: 3056: unsigned :7;
[; ;pic18f27j13.h: 3057: unsigned WAITB1 :1;
[; ;pic18f27j13.h: 3058: };
[; ;pic18f27j13.h: 3059: struct {
[; ;pic18f27j13.h: 3060: unsigned WAITE0 :1;
[; ;pic18f27j13.h: 3061: };
[; ;pic18f27j13.h: 3062: struct {
[; ;pic18f27j13.h: 3063: unsigned :1;
[; ;pic18f27j13.h: 3064: unsigned WAITE1 :1;
[; ;pic18f27j13.h: 3065: };
[; ;pic18f27j13.h: 3066: struct {
[; ;pic18f27j13.h: 3067: unsigned :2;
[; ;pic18f27j13.h: 3068: unsigned WAITM0 :1;
[; ;pic18f27j13.h: 3069: };
[; ;pic18f27j13.h: 3070: struct {
[; ;pic18f27j13.h: 3071: unsigned :3;
[; ;pic18f27j13.h: 3072: unsigned WAITM1 :1;
[; ;pic18f27j13.h: 3073: };
[; ;pic18f27j13.h: 3074: struct {
[; ;pic18f27j13.h: 3075: unsigned :4;
[; ;pic18f27j13.h: 3076: unsigned WAITM2 :1;
[; ;pic18f27j13.h: 3077: };
[; ;pic18f27j13.h: 3078: struct {
[; ;pic18f27j13.h: 3079: unsigned :5;
[; ;pic18f27j13.h: 3080: unsigned WAITM3 :1;
[; ;pic18f27j13.h: 3081: };
[; ;pic18f27j13.h: 3082: } RTCVALHbits_t;
[; ;pic18f27j13.h: 3083: extern volatile RTCVALHbits_t RTCVALHbits @ 0xF3B;
[; ;pic18f27j13.h: 3132: extern volatile unsigned char PADCFG1 @ 0xF3C;
"3134
[; ;pic18f27j13.h: 3134: asm("PADCFG1 equ 0F3Ch");
[; <" PADCFG1 equ 0F3Ch ;# ">
[; ;pic18f27j13.h: 3137: typedef union {
[; ;pic18f27j13.h: 3138: struct {
[; ;pic18f27j13.h: 3139: unsigned :1;
[; ;pic18f27j13.h: 3140: unsigned RTSECSEL0 :1;
[; ;pic18f27j13.h: 3141: unsigned RTSECSEL1 :1;
[; ;pic18f27j13.h: 3142: };
[; ;pic18f27j13.h: 3143: } PADCFG1bits_t;
[; ;pic18f27j13.h: 3144: extern volatile PADCFG1bits_t PADCFG1bits @ 0xF3C;
[; ;pic18f27j13.h: 3158: extern volatile unsigned char REFOCON @ 0xF3D;
"3160
[; ;pic18f27j13.h: 3160: asm("REFOCON equ 0F3Dh");
[; <" REFOCON equ 0F3Dh ;# ">
[; ;pic18f27j13.h: 3163: typedef union {
[; ;pic18f27j13.h: 3164: struct {
[; ;pic18f27j13.h: 3165: unsigned RODIV :4;
[; ;pic18f27j13.h: 3166: unsigned ROSEL :1;
[; ;pic18f27j13.h: 3167: unsigned ROSSLP :1;
[; ;pic18f27j13.h: 3168: unsigned :1;
[; ;pic18f27j13.h: 3169: unsigned ROON :1;
[; ;pic18f27j13.h: 3170: };
[; ;pic18f27j13.h: 3171: struct {
[; ;pic18f27j13.h: 3172: unsigned RODIV0 :1;
[; ;pic18f27j13.h: 3173: unsigned RODIV1 :1;
[; ;pic18f27j13.h: 3174: unsigned RODIV2 :1;
[; ;pic18f27j13.h: 3175: unsigned RODIV3 :1;
[; ;pic18f27j13.h: 3176: };
[; ;pic18f27j13.h: 3177: } REFOCONbits_t;
[; ;pic18f27j13.h: 3178: extern volatile REFOCONbits_t REFOCONbits @ 0xF3D;
[; ;pic18f27j13.h: 3222: extern volatile unsigned char RTCCAL @ 0xF3E;
"3224
[; ;pic18f27j13.h: 3224: asm("RTCCAL equ 0F3Eh");
[; <" RTCCAL equ 0F3Eh ;# ">
[; ;pic18f27j13.h: 3227: typedef union {
[; ;pic18f27j13.h: 3228: struct {
[; ;pic18f27j13.h: 3229: unsigned CAL :8;
[; ;pic18f27j13.h: 3230: };
[; ;pic18f27j13.h: 3231: struct {
[; ;pic18f27j13.h: 3232: unsigned CAL0 :1;
[; ;pic18f27j13.h: 3233: unsigned CAL1 :1;
[; ;pic18f27j13.h: 3234: unsigned CAL2 :1;
[; ;pic18f27j13.h: 3235: unsigned CAL3 :1;
[; ;pic18f27j13.h: 3236: unsigned CAL4 :1;
[; ;pic18f27j13.h: 3237: unsigned CAL5 :1;
[; ;pic18f27j13.h: 3238: unsigned CAL6 :1;
[; ;pic18f27j13.h: 3239: unsigned CAL7 :1;
[; ;pic18f27j13.h: 3240: };
[; ;pic18f27j13.h: 3241: } RTCCALbits_t;
[; ;pic18f27j13.h: 3242: extern volatile RTCCALbits_t RTCCALbits @ 0xF3E;
[; ;pic18f27j13.h: 3291: extern volatile unsigned char RTCCFG @ 0xF3F;
"3293
[; ;pic18f27j13.h: 3293: asm("RTCCFG equ 0F3Fh");
[; <" RTCCFG equ 0F3Fh ;# ">
[; ;pic18f27j13.h: 3296: typedef union {
[; ;pic18f27j13.h: 3297: struct {
[; ;pic18f27j13.h: 3298: unsigned RTCPTR0 :1;
[; ;pic18f27j13.h: 3299: unsigned RTCPTR1 :1;
[; ;pic18f27j13.h: 3300: unsigned RTCOE :1;
[; ;pic18f27j13.h: 3301: unsigned HALFSEC :1;
[; ;pic18f27j13.h: 3302: unsigned RTCSYNC :1;
[; ;pic18f27j13.h: 3303: unsigned RTCWREN :1;
[; ;pic18f27j13.h: 3304: unsigned :1;
[; ;pic18f27j13.h: 3305: unsigned RTCEN :1;
[; ;pic18f27j13.h: 3306: };
[; ;pic18f27j13.h: 3307: } RTCCFGbits_t;
[; ;pic18f27j13.h: 3308: extern volatile RTCCFGbits_t RTCCFGbits @ 0xF3F;
[; ;pic18f27j13.h: 3347: extern volatile unsigned char ODCON3 @ 0xF40;
"3349
[; ;pic18f27j13.h: 3349: asm("ODCON3 equ 0F40h");
[; <" ODCON3 equ 0F40h ;# ">
[; ;pic18f27j13.h: 3352: typedef union {
[; ;pic18f27j13.h: 3353: struct {
[; ;pic18f27j13.h: 3354: unsigned SPI1OD :1;
[; ;pic18f27j13.h: 3355: unsigned SPI2OD :1;
[; ;pic18f27j13.h: 3356: unsigned :5;
[; ;pic18f27j13.h: 3357: unsigned CTMUDS :1;
[; ;pic18f27j13.h: 3358: };
[; ;pic18f27j13.h: 3359: } ODCON3bits_t;
[; ;pic18f27j13.h: 3360: extern volatile ODCON3bits_t ODCON3bits @ 0xF40;
[; ;pic18f27j13.h: 3379: extern volatile unsigned char ODCON2 @ 0xF41;
"3381
[; ;pic18f27j13.h: 3381: asm("ODCON2 equ 0F41h");
[; <" ODCON2 equ 0F41h ;# ">
[; ;pic18f27j13.h: 3384: typedef union {
[; ;pic18f27j13.h: 3385: struct {
[; ;pic18f27j13.h: 3386: unsigned U1OD :1;
[; ;pic18f27j13.h: 3387: unsigned U2OD :1;
[; ;pic18f27j13.h: 3388: unsigned CCP9OD :1;
[; ;pic18f27j13.h: 3389: unsigned CCP10OD :1;
[; ;pic18f27j13.h: 3390: };
[; ;pic18f27j13.h: 3391: } ODCON2bits_t;
[; ;pic18f27j13.h: 3392: extern volatile ODCON2bits_t ODCON2bits @ 0xF41;
[; ;pic18f27j13.h: 3416: extern volatile unsigned char ODCON1 @ 0xF42;
"3418
[; ;pic18f27j13.h: 3418: asm("ODCON1 equ 0F42h");
[; <" ODCON1 equ 0F42h ;# ">
[; ;pic18f27j13.h: 3421: typedef union {
[; ;pic18f27j13.h: 3422: struct {
[; ;pic18f27j13.h: 3423: unsigned ECCP1OD :1;
[; ;pic18f27j13.h: 3424: unsigned ECCP2OD :1;
[; ;pic18f27j13.h: 3425: unsigned ECCP3OD :1;
[; ;pic18f27j13.h: 3426: unsigned CCP4OD :1;
[; ;pic18f27j13.h: 3427: unsigned CCP5OD :1;
[; ;pic18f27j13.h: 3428: unsigned CCP6OD :1;
[; ;pic18f27j13.h: 3429: unsigned CCP7OD :1;
[; ;pic18f27j13.h: 3430: unsigned CCP8OD :1;
[; ;pic18f27j13.h: 3431: };
[; ;pic18f27j13.h: 3432: } ODCON1bits_t;
[; ;pic18f27j13.h: 3433: extern volatile ODCON1bits_t ODCON1bits @ 0xF42;
[; ;pic18f27j13.h: 3477: extern volatile unsigned char ALRMVALL @ 0xF44;
"3479
[; ;pic18f27j13.h: 3479: asm("ALRMVALL equ 0F44h");
[; <" ALRMVALL equ 0F44h ;# ">
[; ;pic18f27j13.h: 3482: typedef union {
[; ;pic18f27j13.h: 3483: struct {
[; ;pic18f27j13.h: 3484: unsigned ALRMVALL :8;
[; ;pic18f27j13.h: 3485: };
[; ;pic18f27j13.h: 3486: } ALRMVALLbits_t;
[; ;pic18f27j13.h: 3487: extern volatile ALRMVALLbits_t ALRMVALLbits @ 0xF44;
[; ;pic18f27j13.h: 3496: extern volatile unsigned char ALRMVALH @ 0xF45;
"3498
[; ;pic18f27j13.h: 3498: asm("ALRMVALH equ 0F45h");
[; <" ALRMVALH equ 0F45h ;# ">
[; ;pic18f27j13.h: 3501: typedef union {
[; ;pic18f27j13.h: 3502: struct {
[; ;pic18f27j13.h: 3503: unsigned ALRMVALH :8;
[; ;pic18f27j13.h: 3504: };
[; ;pic18f27j13.h: 3505: } ALRMVALHbits_t;
[; ;pic18f27j13.h: 3506: extern volatile ALRMVALHbits_t ALRMVALHbits @ 0xF45;
[; ;pic18f27j13.h: 3515: extern volatile unsigned char ALRMRPT @ 0xF46;
"3517
[; ;pic18f27j13.h: 3517: asm("ALRMRPT equ 0F46h");
[; <" ALRMRPT equ 0F46h ;# ">
[; ;pic18f27j13.h: 3520: typedef union {
[; ;pic18f27j13.h: 3521: struct {
[; ;pic18f27j13.h: 3522: unsigned ARPT :8;
[; ;pic18f27j13.h: 3523: };
[; ;pic18f27j13.h: 3524: struct {
[; ;pic18f27j13.h: 3525: unsigned ARPT0 :1;
[; ;pic18f27j13.h: 3526: unsigned ARPT1 :1;
[; ;pic18f27j13.h: 3527: unsigned ARPT2 :1;
[; ;pic18f27j13.h: 3528: unsigned ARPT3 :1;
[; ;pic18f27j13.h: 3529: unsigned ARPT4 :1;
[; ;pic18f27j13.h: 3530: unsigned ARPT5 :1;
[; ;pic18f27j13.h: 3531: unsigned ARPT6 :1;
[; ;pic18f27j13.h: 3532: unsigned ARPT7 :1;
[; ;pic18f27j13.h: 3533: };
[; ;pic18f27j13.h: 3534: } ALRMRPTbits_t;
[; ;pic18f27j13.h: 3535: extern volatile ALRMRPTbits_t ALRMRPTbits @ 0xF46;
[; ;pic18f27j13.h: 3584: extern volatile unsigned char ALRMCFG @ 0xF47;
"3586
[; ;pic18f27j13.h: 3586: asm("ALRMCFG equ 0F47h");
[; <" ALRMCFG equ 0F47h ;# ">
[; ;pic18f27j13.h: 3589: typedef union {
[; ;pic18f27j13.h: 3590: struct {
[; ;pic18f27j13.h: 3591: unsigned ALRMPTR :2;
[; ;pic18f27j13.h: 3592: unsigned AMASK :4;
[; ;pic18f27j13.h: 3593: unsigned CHIME :1;
[; ;pic18f27j13.h: 3594: unsigned ALRMEN :1;
[; ;pic18f27j13.h: 3595: };
[; ;pic18f27j13.h: 3596: struct {
[; ;pic18f27j13.h: 3597: unsigned ALRMPTR0 :1;
[; ;pic18f27j13.h: 3598: unsigned ALRMPTR1 :1;
[; ;pic18f27j13.h: 3599: unsigned AMASK0 :1;
[; ;pic18f27j13.h: 3600: unsigned AMASK1 :1;
[; ;pic18f27j13.h: 3601: unsigned AMASK2 :1;
[; ;pic18f27j13.h: 3602: unsigned AMASK3 :1;
[; ;pic18f27j13.h: 3603: };
[; ;pic18f27j13.h: 3604: } ALRMCFGbits_t;
[; ;pic18f27j13.h: 3605: extern volatile ALRMCFGbits_t ALRMCFGbits @ 0xF47;
[; ;pic18f27j13.h: 3659: extern volatile unsigned char ANCON0 @ 0xF48;
"3661
[; ;pic18f27j13.h: 3661: asm("ANCON0 equ 0F48h");
[; <" ANCON0 equ 0F48h ;# ">
[; ;pic18f27j13.h: 3664: typedef union {
[; ;pic18f27j13.h: 3665: struct {
[; ;pic18f27j13.h: 3666: unsigned PCFG0 :1;
[; ;pic18f27j13.h: 3667: unsigned PCFG1 :1;
[; ;pic18f27j13.h: 3668: unsigned PCFG2 :1;
[; ;pic18f27j13.h: 3669: unsigned PCFG3 :1;
[; ;pic18f27j13.h: 3670: unsigned PCFG4 :1;
[; ;pic18f27j13.h: 3671: };
[; ;pic18f27j13.h: 3672: } ANCON0bits_t;
[; ;pic18f27j13.h: 3673: extern volatile ANCON0bits_t ANCON0bits @ 0xF48;
[; ;pic18f27j13.h: 3702: extern volatile unsigned char ANCON1 @ 0xF49;
"3704
[; ;pic18f27j13.h: 3704: asm("ANCON1 equ 0F49h");
[; <" ANCON1 equ 0F49h ;# ">
[; ;pic18f27j13.h: 3707: typedef union {
[; ;pic18f27j13.h: 3708: struct {
[; ;pic18f27j13.h: 3709: unsigned PCFG8 :1;
[; ;pic18f27j13.h: 3710: unsigned PCFG9 :1;
[; ;pic18f27j13.h: 3711: unsigned PCFG10 :1;
[; ;pic18f27j13.h: 3712: unsigned PCFG11 :1;
[; ;pic18f27j13.h: 3713: unsigned PCFG12 :1;
[; ;pic18f27j13.h: 3714: unsigned :2;
[; ;pic18f27j13.h: 3715: unsigned VBGEN :1;
[; ;pic18f27j13.h: 3716: };
[; ;pic18f27j13.h: 3717: struct {
[; ;pic18f27j13.h: 3718: unsigned :7;
[; ;pic18f27j13.h: 3719: unsigned PCFG15 :1;
[; ;pic18f27j13.h: 3720: };
[; ;pic18f27j13.h: 3721: } ANCON1bits_t;
[; ;pic18f27j13.h: 3722: extern volatile ANCON1bits_t ANCON1bits @ 0xF49;
[; ;pic18f27j13.h: 3761: extern volatile unsigned char DSWAKEL @ 0xF4A;
"3763
[; ;pic18f27j13.h: 3763: asm("DSWAKEL equ 0F4Ah");
[; <" DSWAKEL equ 0F4Ah ;# ">
[; ;pic18f27j13.h: 3766: typedef union {
[; ;pic18f27j13.h: 3767: struct {
[; ;pic18f27j13.h: 3768: unsigned DSPOR :1;
[; ;pic18f27j13.h: 3769: unsigned :1;
[; ;pic18f27j13.h: 3770: unsigned DSMCLR :1;
[; ;pic18f27j13.h: 3771: unsigned DSRTC :1;
[; ;pic18f27j13.h: 3772: unsigned DSWDT :1;
[; ;pic18f27j13.h: 3773: unsigned DSULP :1;
[; ;pic18f27j13.h: 3774: unsigned :1;
[; ;pic18f27j13.h: 3775: unsigned DSFLT :1;
[; ;pic18f27j13.h: 3776: };
[; ;pic18f27j13.h: 3777: } DSWAKELbits_t;
[; ;pic18f27j13.h: 3778: extern volatile DSWAKELbits_t DSWAKELbits @ 0xF4A;
[; ;pic18f27j13.h: 3812: extern volatile unsigned char DSWAKEH @ 0xF4B;
"3814
[; ;pic18f27j13.h: 3814: asm("DSWAKEH equ 0F4Bh");
[; <" DSWAKEH equ 0F4Bh ;# ">
[; ;pic18f27j13.h: 3817: typedef union {
[; ;pic18f27j13.h: 3818: struct {
[; ;pic18f27j13.h: 3819: unsigned DSINT0 :1;
[; ;pic18f27j13.h: 3820: };
[; ;pic18f27j13.h: 3821: } DSWAKEHbits_t;
[; ;pic18f27j13.h: 3822: extern volatile DSWAKEHbits_t DSWAKEHbits @ 0xF4B;
[; ;pic18f27j13.h: 3831: extern volatile unsigned char DSCONL @ 0xF4C;
"3833
[; ;pic18f27j13.h: 3833: asm("DSCONL equ 0F4Ch");
[; <" DSCONL equ 0F4Ch ;# ">
[; ;pic18f27j13.h: 3836: typedef union {
[; ;pic18f27j13.h: 3837: struct {
[; ;pic18f27j13.h: 3838: unsigned RELEASE :1;
[; ;pic18f27j13.h: 3839: unsigned DSBOR :1;
[; ;pic18f27j13.h: 3840: unsigned ULPWDIS :1;
[; ;pic18f27j13.h: 3841: };
[; ;pic18f27j13.h: 3842: } DSCONLbits_t;
[; ;pic18f27j13.h: 3843: extern volatile DSCONLbits_t DSCONLbits @ 0xF4C;
[; ;pic18f27j13.h: 3862: extern volatile unsigned char DSCONH @ 0xF4D;
"3864
[; ;pic18f27j13.h: 3864: asm("DSCONH equ 0F4Dh");
[; <" DSCONH equ 0F4Dh ;# ">
[; ;pic18f27j13.h: 3867: typedef union {
[; ;pic18f27j13.h: 3868: struct {
[; ;pic18f27j13.h: 3869: unsigned RTCWDIS :1;
[; ;pic18f27j13.h: 3870: unsigned DSULPEN :1;
[; ;pic18f27j13.h: 3871: unsigned :5;
[; ;pic18f27j13.h: 3872: unsigned DSEN :1;
[; ;pic18f27j13.h: 3873: };
[; ;pic18f27j13.h: 3874: } DSCONHbits_t;
[; ;pic18f27j13.h: 3875: extern volatile DSCONHbits_t DSCONHbits @ 0xF4D;
[; ;pic18f27j13.h: 3894: extern volatile unsigned char DSGPR0 @ 0xF4E;
"3896
[; ;pic18f27j13.h: 3896: asm("DSGPR0 equ 0F4Eh");
[; <" DSGPR0 equ 0F4Eh ;# ">
[; ;pic18f27j13.h: 3899: typedef union {
[; ;pic18f27j13.h: 3900: struct {
[; ;pic18f27j13.h: 3901: unsigned DSGPR0 :8;
[; ;pic18f27j13.h: 3902: };
[; ;pic18f27j13.h: 3903: } DSGPR0bits_t;
[; ;pic18f27j13.h: 3904: extern volatile DSGPR0bits_t DSGPR0bits @ 0xF4E;
[; ;pic18f27j13.h: 3913: extern volatile unsigned char DSGPR1 @ 0xF4F;
"3915
[; ;pic18f27j13.h: 3915: asm("DSGPR1 equ 0F4Fh");
[; <" DSGPR1 equ 0F4Fh ;# ">
[; ;pic18f27j13.h: 3918: typedef union {
[; ;pic18f27j13.h: 3919: struct {
[; ;pic18f27j13.h: 3920: unsigned DSGPR1 :8;
[; ;pic18f27j13.h: 3921: };
[; ;pic18f27j13.h: 3922: } DSGPR1bits_t;
[; ;pic18f27j13.h: 3923: extern volatile DSGPR1bits_t DSGPR1bits @ 0xF4F;
[; ;pic18f27j13.h: 3932: extern volatile unsigned char CCPTMRS2 @ 0xF50;
"3934
[; ;pic18f27j13.h: 3934: asm("CCPTMRS2 equ 0F50h");
[; <" CCPTMRS2 equ 0F50h ;# ">
[; ;pic18f27j13.h: 3937: typedef union {
[; ;pic18f27j13.h: 3938: struct {
[; ;pic18f27j13.h: 3939: unsigned C8TSEL :2;
[; ;pic18f27j13.h: 3940: unsigned C9TSEL0 :1;
[; ;pic18f27j13.h: 3941: unsigned :1;
[; ;pic18f27j13.h: 3942: unsigned C10TSEL0 :1;
[; ;pic18f27j13.h: 3943: };
[; ;pic18f27j13.h: 3944: struct {
[; ;pic18f27j13.h: 3945: unsigned C8TSEL0 :1;
[; ;pic18f27j13.h: 3946: unsigned C8TSEL1 :1;
[; ;pic18f27j13.h: 3947: };
[; ;pic18f27j13.h: 3948: } CCPTMRS2bits_t;
[; ;pic18f27j13.h: 3949: extern volatile CCPTMRS2bits_t CCPTMRS2bits @ 0xF50;
[; ;pic18f27j13.h: 3978: extern volatile unsigned char CCPTMRS1 @ 0xF51;
"3980
[; ;pic18f27j13.h: 3980: asm("CCPTMRS1 equ 0F51h");
[; <" CCPTMRS1 equ 0F51h ;# ">
[; ;pic18f27j13.h: 3983: typedef union {
[; ;pic18f27j13.h: 3984: struct {
[; ;pic18f27j13.h: 3985: unsigned C4TSEL :2;
[; ;pic18f27j13.h: 3986: unsigned C5TSEL0 :1;
[; ;pic18f27j13.h: 3987: unsigned :1;
[; ;pic18f27j13.h: 3988: unsigned C6TSEL0 :1;
[; ;pic18f27j13.h: 3989: unsigned :1;
[; ;pic18f27j13.h: 3990: unsigned C7TSEL :2;
[; ;pic18f27j13.h: 3991: };
[; ;pic18f27j13.h: 3992: struct {
[; ;pic18f27j13.h: 3993: unsigned C4TSEL0 :1;
[; ;pic18f27j13.h: 3994: unsigned C4TSEL1 :1;
[; ;pic18f27j13.h: 3995: unsigned :4;
[; ;pic18f27j13.h: 3996: unsigned C7TSEL0 :1;
[; ;pic18f27j13.h: 3997: unsigned C7TSEL1 :1;
[; ;pic18f27j13.h: 3998: };
[; ;pic18f27j13.h: 3999: } CCPTMRS1bits_t;
[; ;pic18f27j13.h: 4000: extern volatile CCPTMRS1bits_t CCPTMRS1bits @ 0xF51;
[; ;pic18f27j13.h: 4044: extern volatile unsigned char CCPTMRS0 @ 0xF52;
"4046
[; ;pic18f27j13.h: 4046: asm("CCPTMRS0 equ 0F52h");
[; <" CCPTMRS0 equ 0F52h ;# ">
[; ;pic18f27j13.h: 4049: typedef union {
[; ;pic18f27j13.h: 4050: struct {
[; ;pic18f27j13.h: 4051: unsigned C1TSEL :3;
[; ;pic18f27j13.h: 4052: unsigned C2TSEL :3;
[; ;pic18f27j13.h: 4053: unsigned C3TSEL :2;
[; ;pic18f27j13.h: 4054: };
[; ;pic18f27j13.h: 4055: struct {
[; ;pic18f27j13.h: 4056: unsigned C1TSEL0 :1;
[; ;pic18f27j13.h: 4057: unsigned C1TSEL1 :1;
[; ;pic18f27j13.h: 4058: unsigned C1TSEL2 :1;
[; ;pic18f27j13.h: 4059: unsigned C2TSEL0 :1;
[; ;pic18f27j13.h: 4060: unsigned C2TSEL1 :1;
[; ;pic18f27j13.h: 4061: unsigned C2TSEL2 :1;
[; ;pic18f27j13.h: 4062: unsigned C3TSEL0 :1;
[; ;pic18f27j13.h: 4063: unsigned C3TSEL1 :1;
[; ;pic18f27j13.h: 4064: };
[; ;pic18f27j13.h: 4065: } CCPTMRS0bits_t;
[; ;pic18f27j13.h: 4066: extern volatile CCPTMRS0bits_t CCPTMRS0bits @ 0xF52;
[; ;pic18f27j13.h: 4125: extern volatile unsigned char CVRCON @ 0xF53;
"4127
[; ;pic18f27j13.h: 4127: asm("CVRCON equ 0F53h");
[; <" CVRCON equ 0F53h ;# ">
[; ;pic18f27j13.h: 4130: typedef union {
[; ;pic18f27j13.h: 4131: struct {
[; ;pic18f27j13.h: 4132: unsigned CVR :4;
[; ;pic18f27j13.h: 4133: unsigned CVRSS :1;
[; ;pic18f27j13.h: 4134: unsigned CVRR :1;
[; ;pic18f27j13.h: 4135: unsigned CVROE :1;
[; ;pic18f27j13.h: 4136: unsigned CVREN :1;
[; ;pic18f27j13.h: 4137: };
[; ;pic18f27j13.h: 4138: struct {
[; ;pic18f27j13.h: 4139: unsigned CVR0 :1;
[; ;pic18f27j13.h: 4140: unsigned CVR1 :1;
[; ;pic18f27j13.h: 4141: unsigned CVR2 :1;
[; ;pic18f27j13.h: 4142: unsigned CVR3 :1;
[; ;pic18f27j13.h: 4143: };
[; ;pic18f27j13.h: 4144: struct {
[; ;pic18f27j13.h: 4145: unsigned :6;
[; ;pic18f27j13.h: 4146: unsigned CVROEN :1;
[; ;pic18f27j13.h: 4147: };
[; ;pic18f27j13.h: 4148: } CVRCONbits_t;
[; ;pic18f27j13.h: 4149: extern volatile CVRCONbits_t CVRCONbits @ 0xF53;
[; ;pic18f27j13.h: 4203: extern volatile unsigned char DMABCH @ 0xF66;
"4205
[; ;pic18f27j13.h: 4205: asm("DMABCH equ 0F66h");
[; <" DMABCH equ 0F66h ;# ">
[; ;pic18f27j13.h: 4208: typedef union {
[; ;pic18f27j13.h: 4209: struct {
[; ;pic18f27j13.h: 4210: unsigned DMACNTHB :2;
[; ;pic18f27j13.h: 4211: };
[; ;pic18f27j13.h: 4212: } DMABCHbits_t;
[; ;pic18f27j13.h: 4213: extern volatile DMABCHbits_t DMABCHbits @ 0xF66;
[; ;pic18f27j13.h: 4222: extern volatile unsigned char DMABCL @ 0xF67;
"4224
[; ;pic18f27j13.h: 4224: asm("DMABCL equ 0F67h");
[; <" DMABCL equ 0F67h ;# ">
[; ;pic18f27j13.h: 4227: typedef union {
[; ;pic18f27j13.h: 4228: struct {
[; ;pic18f27j13.h: 4229: unsigned DMACNTLB :8;
[; ;pic18f27j13.h: 4230: };
[; ;pic18f27j13.h: 4231: } DMABCLbits_t;
[; ;pic18f27j13.h: 4232: extern volatile DMABCLbits_t DMABCLbits @ 0xF67;
[; ;pic18f27j13.h: 4241: extern volatile unsigned char RXADDRH @ 0xF68;
"4243
[; ;pic18f27j13.h: 4243: asm("RXADDRH equ 0F68h");
[; <" RXADDRH equ 0F68h ;# ">
[; ;pic18f27j13.h: 4246: typedef union {
[; ;pic18f27j13.h: 4247: struct {
[; ;pic18f27j13.h: 4248: unsigned DMARCVPTRHB :4;
[; ;pic18f27j13.h: 4249: };
[; ;pic18f27j13.h: 4250: } RXADDRHbits_t;
[; ;pic18f27j13.h: 4251: extern volatile RXADDRHbits_t RXADDRHbits @ 0xF68;
[; ;pic18f27j13.h: 4260: extern volatile unsigned char RXADDRL @ 0xF69;
"4262
[; ;pic18f27j13.h: 4262: asm("RXADDRL equ 0F69h");
[; <" RXADDRL equ 0F69h ;# ">
[; ;pic18f27j13.h: 4265: typedef union {
[; ;pic18f27j13.h: 4266: struct {
[; ;pic18f27j13.h: 4267: unsigned DMARCVPTRLB :8;
[; ;pic18f27j13.h: 4268: };
[; ;pic18f27j13.h: 4269: } RXADDRLbits_t;
[; ;pic18f27j13.h: 4270: extern volatile RXADDRLbits_t RXADDRLbits @ 0xF69;
[; ;pic18f27j13.h: 4279: extern volatile unsigned char TXADDRH @ 0xF6A;
"4281
[; ;pic18f27j13.h: 4281: asm("TXADDRH equ 0F6Ah");
[; <" TXADDRH equ 0F6Ah ;# ">
[; ;pic18f27j13.h: 4284: typedef union {
[; ;pic18f27j13.h: 4285: struct {
[; ;pic18f27j13.h: 4286: unsigned DMATXPTRHB :4;
[; ;pic18f27j13.h: 4287: };
[; ;pic18f27j13.h: 4288: } TXADDRHbits_t;
[; ;pic18f27j13.h: 4289: extern volatile TXADDRHbits_t TXADDRHbits @ 0xF6A;
[; ;pic18f27j13.h: 4298: extern volatile unsigned char TXADDRL @ 0xF6B;
"4300
[; ;pic18f27j13.h: 4300: asm("TXADDRL equ 0F6Bh");
[; <" TXADDRL equ 0F6Bh ;# ">
[; ;pic18f27j13.h: 4303: typedef union {
[; ;pic18f27j13.h: 4304: struct {
[; ;pic18f27j13.h: 4305: unsigned DMATXPTRLB :8;
[; ;pic18f27j13.h: 4306: };
[; ;pic18f27j13.h: 4307: } TXADDRLbits_t;
[; ;pic18f27j13.h: 4308: extern volatile TXADDRLbits_t TXADDRLbits @ 0xF6B;
[; ;pic18f27j13.h: 4317: extern volatile unsigned char CMSTAT @ 0xF70;
"4319
[; ;pic18f27j13.h: 4319: asm("CMSTAT equ 0F70h");
[; <" CMSTAT equ 0F70h ;# ">
[; ;pic18f27j13.h: 4322: extern volatile unsigned char CMSTATUS @ 0xF70;
"4324
[; ;pic18f27j13.h: 4324: asm("CMSTATUS equ 0F70h");
[; <" CMSTATUS equ 0F70h ;# ">
[; ;pic18f27j13.h: 4327: typedef union {
[; ;pic18f27j13.h: 4328: struct {
[; ;pic18f27j13.h: 4329: unsigned COUT1 :1;
[; ;pic18f27j13.h: 4330: unsigned COUT2 :1;
[; ;pic18f27j13.h: 4331: unsigned COUT3 :1;
[; ;pic18f27j13.h: 4332: };
[; ;pic18f27j13.h: 4333: } CMSTATbits_t;
[; ;pic18f27j13.h: 4334: extern volatile CMSTATbits_t CMSTATbits @ 0xF70;
[; ;pic18f27j13.h: 4352: typedef union {
[; ;pic18f27j13.h: 4353: struct {
[; ;pic18f27j13.h: 4354: unsigned COUT1 :1;
[; ;pic18f27j13.h: 4355: unsigned COUT2 :1;
[; ;pic18f27j13.h: 4356: unsigned COUT3 :1;
[; ;pic18f27j13.h: 4357: };
[; ;pic18f27j13.h: 4358: } CMSTATUSbits_t;
[; ;pic18f27j13.h: 4359: extern volatile CMSTATUSbits_t CMSTATUSbits @ 0xF70;
[; ;pic18f27j13.h: 4378: extern volatile unsigned char SSP2CON2 @ 0xF71;
"4380
[; ;pic18f27j13.h: 4380: asm("SSP2CON2 equ 0F71h");
[; <" SSP2CON2 equ 0F71h ;# ">
[; ;pic18f27j13.h: 4383: typedef union {
[; ;pic18f27j13.h: 4384: struct {
[; ;pic18f27j13.h: 4385: unsigned SEN :1;
[; ;pic18f27j13.h: 4386: unsigned RSEN :1;
[; ;pic18f27j13.h: 4387: unsigned PEN :1;
[; ;pic18f27j13.h: 4388: unsigned RCEN :1;
[; ;pic18f27j13.h: 4389: unsigned ACKEN :1;
[; ;pic18f27j13.h: 4390: unsigned ACKDT :1;
[; ;pic18f27j13.h: 4391: unsigned ACKSTAT :1;
[; ;pic18f27j13.h: 4392: unsigned GCEN :1;
[; ;pic18f27j13.h: 4393: };
[; ;pic18f27j13.h: 4394: struct {
[; ;pic18f27j13.h: 4395: unsigned :1;
[; ;pic18f27j13.h: 4396: unsigned ADMSK1 :1;
[; ;pic18f27j13.h: 4397: unsigned ADMSK2 :1;
[; ;pic18f27j13.h: 4398: unsigned ADMSK3 :1;
[; ;pic18f27j13.h: 4399: unsigned ADMSK4 :1;
[; ;pic18f27j13.h: 4400: unsigned ADMSK5 :1;
[; ;pic18f27j13.h: 4401: };
[; ;pic18f27j13.h: 4402: struct {
[; ;pic18f27j13.h: 4403: unsigned :5;
[; ;pic18f27j13.h: 4404: unsigned ACKDT2 :1;
[; ;pic18f27j13.h: 4405: };
[; ;pic18f27j13.h: 4406: struct {
[; ;pic18f27j13.h: 4407: unsigned :4;
[; ;pic18f27j13.h: 4408: unsigned ACKEN2 :1;
[; ;pic18f27j13.h: 4409: };
[; ;pic18f27j13.h: 4410: struct {
[; ;pic18f27j13.h: 4411: unsigned :6;
[; ;pic18f27j13.h: 4412: unsigned ACKSTAT2 :1;
[; ;pic18f27j13.h: 4413: };
[; ;pic18f27j13.h: 4414: struct {
[; ;pic18f27j13.h: 4415: unsigned :1;
[; ;pic18f27j13.h: 4416: unsigned ADMSK12 :1;
[; ;pic18f27j13.h: 4417: };
[; ;pic18f27j13.h: 4418: struct {
[; ;pic18f27j13.h: 4419: unsigned :2;
[; ;pic18f27j13.h: 4420: unsigned ADMSK22 :1;
[; ;pic18f27j13.h: 4421: };
[; ;pic18f27j13.h: 4422: struct {
[; ;pic18f27j13.h: 4423: unsigned :3;
[; ;pic18f27j13.h: 4424: unsigned ADMSK32 :1;
[; ;pic18f27j13.h: 4425: };
[; ;pic18f27j13.h: 4426: struct {
[; ;pic18f27j13.h: 4427: unsigned :4;
[; ;pic18f27j13.h: 4428: unsigned ADMSK42 :1;
[; ;pic18f27j13.h: 4429: };
[; ;pic18f27j13.h: 4430: struct {
[; ;pic18f27j13.h: 4431: unsigned :5;
[; ;pic18f27j13.h: 4432: unsigned ADMSK52 :1;
[; ;pic18f27j13.h: 4433: };
[; ;pic18f27j13.h: 4434: struct {
[; ;pic18f27j13.h: 4435: unsigned :7;
[; ;pic18f27j13.h: 4436: unsigned GCEN2 :1;
[; ;pic18f27j13.h: 4437: };
[; ;pic18f27j13.h: 4438: struct {
[; ;pic18f27j13.h: 4439: unsigned :2;
[; ;pic18f27j13.h: 4440: unsigned PEN2 :1;
[; ;pic18f27j13.h: 4441: };
[; ;pic18f27j13.h: 4442: struct {
[; ;pic18f27j13.h: 4443: unsigned :3;
[; ;pic18f27j13.h: 4444: unsigned RCEN2 :1;
[; ;pic18f27j13.h: 4445: };
[; ;pic18f27j13.h: 4446: struct {
[; ;pic18f27j13.h: 4447: unsigned :1;
[; ;pic18f27j13.h: 4448: unsigned RSEN2 :1;
[; ;pic18f27j13.h: 4449: };
[; ;pic18f27j13.h: 4450: struct {
[; ;pic18f27j13.h: 4451: unsigned SEN2 :1;
[; ;pic18f27j13.h: 4452: };
[; ;pic18f27j13.h: 4453: } SSP2CON2bits_t;
[; ;pic18f27j13.h: 4454: extern volatile SSP2CON2bits_t SSP2CON2bits @ 0xF71;
[; ;pic18f27j13.h: 4588: extern volatile unsigned char SSP2CON1 @ 0xF72;
"4590
[; ;pic18f27j13.h: 4590: asm("SSP2CON1 equ 0F72h");
[; <" SSP2CON1 equ 0F72h ;# ">
[; ;pic18f27j13.h: 4593: typedef union {
[; ;pic18f27j13.h: 4594: struct {
[; ;pic18f27j13.h: 4595: unsigned SSPM :4;
[; ;pic18f27j13.h: 4596: unsigned CKP :1;
[; ;pic18f27j13.h: 4597: unsigned SSPEN :1;
[; ;pic18f27j13.h: 4598: unsigned SSPOV :1;
[; ;pic18f27j13.h: 4599: unsigned WCOL :1;
[; ;pic18f27j13.h: 4600: };
[; ;pic18f27j13.h: 4601: struct {
[; ;pic18f27j13.h: 4602: unsigned SSPM0 :1;
[; ;pic18f27j13.h: 4603: unsigned SSPM1 :1;
[; ;pic18f27j13.h: 4604: unsigned SSPM2 :1;
[; ;pic18f27j13.h: 4605: unsigned SSPM3 :1;
[; ;pic18f27j13.h: 4606: };
[; ;pic18f27j13.h: 4607: struct {
[; ;pic18f27j13.h: 4608: unsigned :4;
[; ;pic18f27j13.h: 4609: unsigned CKP2 :1;
[; ;pic18f27j13.h: 4610: };
[; ;pic18f27j13.h: 4611: struct {
[; ;pic18f27j13.h: 4612: unsigned :5;
[; ;pic18f27j13.h: 4613: unsigned SSPEN2 :1;
[; ;pic18f27j13.h: 4614: };
[; ;pic18f27j13.h: 4615: struct {
[; ;pic18f27j13.h: 4616: unsigned SSPM02 :1;
[; ;pic18f27j13.h: 4617: };
[; ;pic18f27j13.h: 4618: struct {
[; ;pic18f27j13.h: 4619: unsigned :1;
[; ;pic18f27j13.h: 4620: unsigned SSPM12 :1;
[; ;pic18f27j13.h: 4621: };
[; ;pic18f27j13.h: 4622: struct {
[; ;pic18f27j13.h: 4623: unsigned :2;
[; ;pic18f27j13.h: 4624: unsigned SSPM22 :1;
[; ;pic18f27j13.h: 4625: };
[; ;pic18f27j13.h: 4626: struct {
[; ;pic18f27j13.h: 4627: unsigned :3;
[; ;pic18f27j13.h: 4628: unsigned SSPM32 :1;
[; ;pic18f27j13.h: 4629: };
[; ;pic18f27j13.h: 4630: struct {
[; ;pic18f27j13.h: 4631: unsigned :6;
[; ;pic18f27j13.h: 4632: unsigned SSPOV2 :1;
[; ;pic18f27j13.h: 4633: };
[; ;pic18f27j13.h: 4634: struct {
[; ;pic18f27j13.h: 4635: unsigned :7;
[; ;pic18f27j13.h: 4636: unsigned WCOL2 :1;
[; ;pic18f27j13.h: 4637: };
[; ;pic18f27j13.h: 4638: } SSP2CON1bits_t;
[; ;pic18f27j13.h: 4639: extern volatile SSP2CON1bits_t SSP2CON1bits @ 0xF72;
[; ;pic18f27j13.h: 4728: extern volatile unsigned char SSP2STAT @ 0xF73;
"4730
[; ;pic18f27j13.h: 4730: asm("SSP2STAT equ 0F73h");
[; <" SSP2STAT equ 0F73h ;# ">
[; ;pic18f27j13.h: 4733: typedef union {
[; ;pic18f27j13.h: 4734: struct {
[; ;pic18f27j13.h: 4735: unsigned :2;
[; ;pic18f27j13.h: 4736: unsigned R_NOT_W :1;
[; ;pic18f27j13.h: 4737: };
[; ;pic18f27j13.h: 4738: struct {
[; ;pic18f27j13.h: 4739: unsigned :5;
[; ;pic18f27j13.h: 4740: unsigned D_NOT_A :1;
[; ;pic18f27j13.h: 4741: };
[; ;pic18f27j13.h: 4742: struct {
[; ;pic18f27j13.h: 4743: unsigned BF :1;
[; ;pic18f27j13.h: 4744: unsigned UA :1;
[; ;pic18f27j13.h: 4745: unsigned R_nW :1;
[; ;pic18f27j13.h: 4746: unsigned S :1;
[; ;pic18f27j13.h: 4747: unsigned P :1;
[; ;pic18f27j13.h: 4748: unsigned D_nA :1;
[; ;pic18f27j13.h: 4749: unsigned CKE :1;
[; ;pic18f27j13.h: 4750: unsigned SMP :1;
[; ;pic18f27j13.h: 4751: };
[; ;pic18f27j13.h: 4752: struct {
[; ;pic18f27j13.h: 4753: unsigned BF2 :1;
[; ;pic18f27j13.h: 4754: };
[; ;pic18f27j13.h: 4755: struct {
[; ;pic18f27j13.h: 4756: unsigned :6;
[; ;pic18f27j13.h: 4757: unsigned CKE2 :1;
[; ;pic18f27j13.h: 4758: };
[; ;pic18f27j13.h: 4759: struct {
[; ;pic18f27j13.h: 4760: unsigned :5;
[; ;pic18f27j13.h: 4761: unsigned DA2 :1;
[; ;pic18f27j13.h: 4762: };
[; ;pic18f27j13.h: 4763: struct {
[; ;pic18f27j13.h: 4764: unsigned :5;
[; ;pic18f27j13.h: 4765: unsigned DATA_ADDRESS2 :1;
[; ;pic18f27j13.h: 4766: };
[; ;pic18f27j13.h: 4767: struct {
[; ;pic18f27j13.h: 4768: unsigned :5;
[; ;pic18f27j13.h: 4769: unsigned D_A2 :1;
[; ;pic18f27j13.h: 4770: };
[; ;pic18f27j13.h: 4771: struct {
[; ;pic18f27j13.h: 4772: unsigned :5;
[; ;pic18f27j13.h: 4773: unsigned D_nA2 :1;
[; ;pic18f27j13.h: 4774: };
[; ;pic18f27j13.h: 4775: struct {
[; ;pic18f27j13.h: 4776: unsigned :5;
[; ;pic18f27j13.h: 4777: unsigned I2C_DAT2 :1;
[; ;pic18f27j13.h: 4778: };
[; ;pic18f27j13.h: 4779: struct {
[; ;pic18f27j13.h: 4780: unsigned :2;
[; ;pic18f27j13.h: 4781: unsigned I2C_READ2 :1;
[; ;pic18f27j13.h: 4782: };
[; ;pic18f27j13.h: 4783: struct {
[; ;pic18f27j13.h: 4784: unsigned :3;
[; ;pic18f27j13.h: 4785: unsigned I2C_START2 :1;
[; ;pic18f27j13.h: 4786: };
[; ;pic18f27j13.h: 4787: struct {
[; ;pic18f27j13.h: 4788: unsigned :4;
[; ;pic18f27j13.h: 4789: unsigned I2C_STOP2 :1;
[; ;pic18f27j13.h: 4790: };
[; ;pic18f27j13.h: 4791: struct {
[; ;pic18f27j13.h: 4792: unsigned :4;
[; ;pic18f27j13.h: 4793: unsigned P2 :1;
[; ;pic18f27j13.h: 4794: };
[; ;pic18f27j13.h: 4795: struct {
[; ;pic18f27j13.h: 4796: unsigned :2;
[; ;pic18f27j13.h: 4797: unsigned READ_WRITE2 :1;
[; ;pic18f27j13.h: 4798: };
[; ;pic18f27j13.h: 4799: struct {
[; ;pic18f27j13.h: 4800: unsigned :2;
[; ;pic18f27j13.h: 4801: unsigned RW2 :1;
[; ;pic18f27j13.h: 4802: };
[; ;pic18f27j13.h: 4803: struct {
[; ;pic18f27j13.h: 4804: unsigned :2;
[; ;pic18f27j13.h: 4805: unsigned R_W2 :1;
[; ;pic18f27j13.h: 4806: };
[; ;pic18f27j13.h: 4807: struct {
[; ;pic18f27j13.h: 4808: unsigned :2;
[; ;pic18f27j13.h: 4809: unsigned R_nW2 :1;
[; ;pic18f27j13.h: 4810: };
[; ;pic18f27j13.h: 4811: struct {
[; ;pic18f27j13.h: 4812: unsigned :3;
[; ;pic18f27j13.h: 4813: unsigned S2 :1;
[; ;pic18f27j13.h: 4814: };
[; ;pic18f27j13.h: 4815: struct {
[; ;pic18f27j13.h: 4816: unsigned :7;
[; ;pic18f27j13.h: 4817: unsigned SMP2 :1;
[; ;pic18f27j13.h: 4818: };
[; ;pic18f27j13.h: 4819: struct {
[; ;pic18f27j13.h: 4820: unsigned :3;
[; ;pic18f27j13.h: 4821: unsigned START2 :1;
[; ;pic18f27j13.h: 4822: };
[; ;pic18f27j13.h: 4823: struct {
[; ;pic18f27j13.h: 4824: unsigned :4;
[; ;pic18f27j13.h: 4825: unsigned STOP2 :1;
[; ;pic18f27j13.h: 4826: };
[; ;pic18f27j13.h: 4827: struct {
[; ;pic18f27j13.h: 4828: unsigned :1;
[; ;pic18f27j13.h: 4829: unsigned UA2 :1;
[; ;pic18f27j13.h: 4830: };
[; ;pic18f27j13.h: 4831: struct {
[; ;pic18f27j13.h: 4832: unsigned :5;
[; ;pic18f27j13.h: 4833: unsigned nA2 :1;
[; ;pic18f27j13.h: 4834: };
[; ;pic18f27j13.h: 4835: struct {
[; ;pic18f27j13.h: 4836: unsigned :5;
[; ;pic18f27j13.h: 4837: unsigned nADDRESS2 :1;
[; ;pic18f27j13.h: 4838: };
[; ;pic18f27j13.h: 4839: struct {
[; ;pic18f27j13.h: 4840: unsigned :2;
[; ;pic18f27j13.h: 4841: unsigned nW2 :1;
[; ;pic18f27j13.h: 4842: };
[; ;pic18f27j13.h: 4843: struct {
[; ;pic18f27j13.h: 4844: unsigned :2;
[; ;pic18f27j13.h: 4845: unsigned nWRITE2 :1;
[; ;pic18f27j13.h: 4846: };
[; ;pic18f27j13.h: 4847: } SSP2STATbits_t;
[; ;pic18f27j13.h: 4848: extern volatile SSP2STATbits_t SSP2STATbits @ 0xF73;
[; ;pic18f27j13.h: 5022: extern volatile unsigned char SSP2ADD @ 0xF74;
"5024
[; ;pic18f27j13.h: 5024: asm("SSP2ADD equ 0F74h");
[; <" SSP2ADD equ 0F74h ;# ">
[; ;pic18f27j13.h: 5027: typedef union {
[; ;pic18f27j13.h: 5028: struct {
[; ;pic18f27j13.h: 5029: unsigned SSPADD :8;
[; ;pic18f27j13.h: 5030: };
[; ;pic18f27j13.h: 5031: struct {
[; ;pic18f27j13.h: 5032: unsigned MSK02 :1;
[; ;pic18f27j13.h: 5033: };
[; ;pic18f27j13.h: 5034: struct {
[; ;pic18f27j13.h: 5035: unsigned :1;
[; ;pic18f27j13.h: 5036: unsigned MSK12 :1;
[; ;pic18f27j13.h: 5037: };
[; ;pic18f27j13.h: 5038: struct {
[; ;pic18f27j13.h: 5039: unsigned :2;
[; ;pic18f27j13.h: 5040: unsigned MSK22 :1;
[; ;pic18f27j13.h: 5041: };
[; ;pic18f27j13.h: 5042: struct {
[; ;pic18f27j13.h: 5043: unsigned :3;
[; ;pic18f27j13.h: 5044: unsigned MSK32 :1;
[; ;pic18f27j13.h: 5045: };
[; ;pic18f27j13.h: 5046: struct {
[; ;pic18f27j13.h: 5047: unsigned :4;
[; ;pic18f27j13.h: 5048: unsigned MSK42 :1;
[; ;pic18f27j13.h: 5049: };
[; ;pic18f27j13.h: 5050: struct {
[; ;pic18f27j13.h: 5051: unsigned :5;
[; ;pic18f27j13.h: 5052: unsigned MSK52 :1;
[; ;pic18f27j13.h: 5053: };
[; ;pic18f27j13.h: 5054: struct {
[; ;pic18f27j13.h: 5055: unsigned :6;
[; ;pic18f27j13.h: 5056: unsigned MSK62 :1;
[; ;pic18f27j13.h: 5057: };
[; ;pic18f27j13.h: 5058: struct {
[; ;pic18f27j13.h: 5059: unsigned :7;
[; ;pic18f27j13.h: 5060: unsigned MSK72 :1;
[; ;pic18f27j13.h: 5061: };
[; ;pic18f27j13.h: 5062: } SSP2ADDbits_t;
[; ;pic18f27j13.h: 5063: extern volatile SSP2ADDbits_t SSP2ADDbits @ 0xF74;
[; ;pic18f27j13.h: 5112: extern volatile unsigned char SSP2MSK @ 0xF74;
"5114
[; ;pic18f27j13.h: 5114: asm("SSP2MSK equ 0F74h");
[; <" SSP2MSK equ 0F74h ;# ">
[; ;pic18f27j13.h: 5117: typedef union {
[; ;pic18f27j13.h: 5118: struct {
[; ;pic18f27j13.h: 5119: unsigned MSK0 :1;
[; ;pic18f27j13.h: 5120: unsigned MSK1 :1;
[; ;pic18f27j13.h: 5121: unsigned MSK2 :1;
[; ;pic18f27j13.h: 5122: unsigned MSK3 :1;
[; ;pic18f27j13.h: 5123: unsigned MSK4 :1;
[; ;pic18f27j13.h: 5124: unsigned MSK5 :1;
[; ;pic18f27j13.h: 5125: unsigned MSK6 :1;
[; ;pic18f27j13.h: 5126: unsigned MSK7 :1;
[; ;pic18f27j13.h: 5127: };
[; ;pic18f27j13.h: 5128: } SSP2MSKbits_t;
[; ;pic18f27j13.h: 5129: extern volatile SSP2MSKbits_t SSP2MSKbits @ 0xF74;
[; ;pic18f27j13.h: 5173: extern volatile unsigned char SSP2BUF @ 0xF75;
"5175
[; ;pic18f27j13.h: 5175: asm("SSP2BUF equ 0F75h");
[; <" SSP2BUF equ 0F75h ;# ">
[; ;pic18f27j13.h: 5178: typedef union {
[; ;pic18f27j13.h: 5179: struct {
[; ;pic18f27j13.h: 5180: unsigned SSPBUF :8;
[; ;pic18f27j13.h: 5181: };
[; ;pic18f27j13.h: 5182: } SSP2BUFbits_t;
[; ;pic18f27j13.h: 5183: extern volatile SSP2BUFbits_t SSP2BUFbits @ 0xF75;
[; ;pic18f27j13.h: 5192: extern volatile unsigned char T4CON @ 0xF76;
"5194
[; ;pic18f27j13.h: 5194: asm("T4CON equ 0F76h");
[; <" T4CON equ 0F76h ;# ">
[; ;pic18f27j13.h: 5197: typedef union {
[; ;pic18f27j13.h: 5198: struct {
[; ;pic18f27j13.h: 5199: unsigned T4CKPS :2;
[; ;pic18f27j13.h: 5200: unsigned TMR4ON :1;
[; ;pic18f27j13.h: 5201: unsigned T4OUTPS :4;
[; ;pic18f27j13.h: 5202: };
[; ;pic18f27j13.h: 5203: struct {
[; ;pic18f27j13.h: 5204: unsigned T4CKPS0 :1;
[; ;pic18f27j13.h: 5205: unsigned T4CKPS1 :1;
[; ;pic18f27j13.h: 5206: unsigned :1;
[; ;pic18f27j13.h: 5207: unsigned T4OUTPS0 :1;
[; ;pic18f27j13.h: 5208: unsigned T4OUTPS1 :1;
[; ;pic18f27j13.h: 5209: unsigned T4OUTPS2 :1;
[; ;pic18f27j13.h: 5210: unsigned T4OUTPS3 :1;
[; ;pic18f27j13.h: 5211: };
[; ;pic18f27j13.h: 5212: } T4CONbits_t;
[; ;pic18f27j13.h: 5213: extern volatile T4CONbits_t T4CONbits @ 0xF76;
[; ;pic18f27j13.h: 5262: extern volatile unsigned char PR4 @ 0xF77;
"5264
[; ;pic18f27j13.h: 5264: asm("PR4 equ 0F77h");
[; <" PR4 equ 0F77h ;# ">
[; ;pic18f27j13.h: 5267: typedef union {
[; ;pic18f27j13.h: 5268: struct {
[; ;pic18f27j13.h: 5269: unsigned PR4 :8;
[; ;pic18f27j13.h: 5270: };
[; ;pic18f27j13.h: 5271: } PR4bits_t;
[; ;pic18f27j13.h: 5272: extern volatile PR4bits_t PR4bits @ 0xF77;
[; ;pic18f27j13.h: 5281: extern volatile unsigned char TMR4 @ 0xF78;
"5283
[; ;pic18f27j13.h: 5283: asm("TMR4 equ 0F78h");
[; <" TMR4 equ 0F78h ;# ">
[; ;pic18f27j13.h: 5286: typedef union {
[; ;pic18f27j13.h: 5287: struct {
[; ;pic18f27j13.h: 5288: unsigned TMR4 :8;
[; ;pic18f27j13.h: 5289: };
[; ;pic18f27j13.h: 5290: } TMR4bits_t;
[; ;pic18f27j13.h: 5291: extern volatile TMR4bits_t TMR4bits @ 0xF78;
[; ;pic18f27j13.h: 5300: extern volatile unsigned char T3CON @ 0xF79;
"5302
[; ;pic18f27j13.h: 5302: asm("T3CON equ 0F79h");
[; <" T3CON equ 0F79h ;# ">
[; ;pic18f27j13.h: 5305: typedef union {
[; ;pic18f27j13.h: 5306: struct {
[; ;pic18f27j13.h: 5307: unsigned :2;
[; ;pic18f27j13.h: 5308: unsigned NOT_T3SYNC :1;
[; ;pic18f27j13.h: 5309: };
[; ;pic18f27j13.h: 5310: struct {
[; ;pic18f27j13.h: 5311: unsigned TMR3ON :1;
[; ;pic18f27j13.h: 5312: unsigned RD16 :1;
[; ;pic18f27j13.h: 5313: unsigned nT3SYNC :1;
[; ;pic18f27j13.h: 5314: unsigned T3OSCEN :1;
[; ;pic18f27j13.h: 5315: unsigned T3CKPS :2;
[; ;pic18f27j13.h: 5316: unsigned TMR3CS :2;
[; ;pic18f27j13.h: 5317: };
[; ;pic18f27j13.h: 5318: struct {
[; ;pic18f27j13.h: 5319: unsigned :4;
[; ;pic18f27j13.h: 5320: unsigned T3CKPS0 :1;
[; ;pic18f27j13.h: 5321: unsigned T3CKPS1 :1;
[; ;pic18f27j13.h: 5322: unsigned TMR3CS0 :1;
[; ;pic18f27j13.h: 5323: unsigned TMR3CS1 :1;
[; ;pic18f27j13.h: 5324: };
[; ;pic18f27j13.h: 5325: struct {
[; ;pic18f27j13.h: 5326: unsigned :7;
[; ;pic18f27j13.h: 5327: unsigned RD163 :1;
[; ;pic18f27j13.h: 5328: };
[; ;pic18f27j13.h: 5329: struct {
[; ;pic18f27j13.h: 5330: unsigned :3;
[; ;pic18f27j13.h: 5331: unsigned SOSCEN3 :1;
[; ;pic18f27j13.h: 5332: };
[; ;pic18f27j13.h: 5333: struct {
[; ;pic18f27j13.h: 5334: unsigned :7;
[; ;pic18f27j13.h: 5335: unsigned T3RD16 :1;
[; ;pic18f27j13.h: 5336: };
[; ;pic18f27j13.h: 5337: } T3CONbits_t;
[; ;pic18f27j13.h: 5338: extern volatile T3CONbits_t T3CONbits @ 0xF79;
[; ;pic18f27j13.h: 5412: extern volatile unsigned short TMR3 @ 0xF7A;
"5414
[; ;pic18f27j13.h: 5414: asm("TMR3 equ 0F7Ah");
[; <" TMR3 equ 0F7Ah ;# ">
[; ;pic18f27j13.h: 5418: extern volatile unsigned char TMR3L @ 0xF7A;
"5420
[; ;pic18f27j13.h: 5420: asm("TMR3L equ 0F7Ah");
[; <" TMR3L equ 0F7Ah ;# ">
[; ;pic18f27j13.h: 5423: typedef union {
[; ;pic18f27j13.h: 5424: struct {
[; ;pic18f27j13.h: 5425: unsigned TMR3L :8;
[; ;pic18f27j13.h: 5426: };
[; ;pic18f27j13.h: 5427: } TMR3Lbits_t;
[; ;pic18f27j13.h: 5428: extern volatile TMR3Lbits_t TMR3Lbits @ 0xF7A;
[; ;pic18f27j13.h: 5437: extern volatile unsigned char TMR3H @ 0xF7B;
"5439
[; ;pic18f27j13.h: 5439: asm("TMR3H equ 0F7Bh");
[; <" TMR3H equ 0F7Bh ;# ">
[; ;pic18f27j13.h: 5442: typedef union {
[; ;pic18f27j13.h: 5443: struct {
[; ;pic18f27j13.h: 5444: unsigned TMR3H :8;
[; ;pic18f27j13.h: 5445: };
[; ;pic18f27j13.h: 5446: } TMR3Hbits_t;
[; ;pic18f27j13.h: 5447: extern volatile TMR3Hbits_t TMR3Hbits @ 0xF7B;
[; ;pic18f27j13.h: 5456: extern volatile unsigned char BAUDCON2 @ 0xF7C;
"5458
[; ;pic18f27j13.h: 5458: asm("BAUDCON2 equ 0F7Ch");
[; <" BAUDCON2 equ 0F7Ch ;# ">
[; ;pic18f27j13.h: 5461: typedef union {
[; ;pic18f27j13.h: 5462: struct {
[; ;pic18f27j13.h: 5463: unsigned ABDEN :1;
[; ;pic18f27j13.h: 5464: unsigned WUE :1;
[; ;pic18f27j13.h: 5465: unsigned :1;
[; ;pic18f27j13.h: 5466: unsigned BRG16 :1;
[; ;pic18f27j13.h: 5467: unsigned TXCKP :1;
[; ;pic18f27j13.h: 5468: unsigned RXDTP :1;
[; ;pic18f27j13.h: 5469: unsigned RCIDL :1;
[; ;pic18f27j13.h: 5470: unsigned ABDOVF :1;
[; ;pic18f27j13.h: 5471: };
[; ;pic18f27j13.h: 5472: struct {
[; ;pic18f27j13.h: 5473: unsigned ABDEN2 :1;
[; ;pic18f27j13.h: 5474: };
[; ;pic18f27j13.h: 5475: struct {
[; ;pic18f27j13.h: 5476: unsigned :7;
[; ;pic18f27j13.h: 5477: unsigned ABDOVF2 :1;
[; ;pic18f27j13.h: 5478: };
[; ;pic18f27j13.h: 5479: struct {
[; ;pic18f27j13.h: 5480: unsigned :3;
[; ;pic18f27j13.h: 5481: unsigned BRG162 :1;
[; ;pic18f27j13.h: 5482: };
[; ;pic18f27j13.h: 5483: struct {
[; ;pic18f27j13.h: 5484: unsigned :5;
[; ;pic18f27j13.h: 5485: unsigned DTRXP2 :1;
[; ;pic18f27j13.h: 5486: };
[; ;pic18f27j13.h: 5487: struct {
[; ;pic18f27j13.h: 5488: unsigned :6;
[; ;pic18f27j13.h: 5489: unsigned RCIDL2 :1;
[; ;pic18f27j13.h: 5490: };
[; ;pic18f27j13.h: 5491: struct {
[; ;pic18f27j13.h: 5492: unsigned :6;
[; ;pic18f27j13.h: 5493: unsigned RCMT2 :1;
[; ;pic18f27j13.h: 5494: };
[; ;pic18f27j13.h: 5495: struct {
[; ;pic18f27j13.h: 5496: unsigned :5;
[; ;pic18f27j13.h: 5497: unsigned RXDTP2 :1;
[; ;pic18f27j13.h: 5498: };
[; ;pic18f27j13.h: 5499: struct {
[; ;pic18f27j13.h: 5500: unsigned :4;
[; ;pic18f27j13.h: 5501: unsigned SCKP2 :1;
[; ;pic18f27j13.h: 5502: };
[; ;pic18f27j13.h: 5503: struct {
[; ;pic18f27j13.h: 5504: unsigned :4;
[; ;pic18f27j13.h: 5505: unsigned TXCKP2 :1;
[; ;pic18f27j13.h: 5506: };
[; ;pic18f27j13.h: 5507: struct {
[; ;pic18f27j13.h: 5508: unsigned :1;
[; ;pic18f27j13.h: 5509: unsigned WUE2 :1;
[; ;pic18f27j13.h: 5510: };
[; ;pic18f27j13.h: 5511: } BAUDCON2bits_t;
[; ;pic18f27j13.h: 5512: extern volatile BAUDCON2bits_t BAUDCON2bits @ 0xF7C;
[; ;pic18f27j13.h: 5601: extern volatile unsigned char SPBRGH2 @ 0xF7D;
"5603
[; ;pic18f27j13.h: 5603: asm("SPBRGH2 equ 0F7Dh");
[; <" SPBRGH2 equ 0F7Dh ;# ">
[; ;pic18f27j13.h: 5606: typedef union {
[; ;pic18f27j13.h: 5607: struct {
[; ;pic18f27j13.h: 5608: unsigned SPBRGH2 :8;
[; ;pic18f27j13.h: 5609: };
[; ;pic18f27j13.h: 5610: } SPBRGH2bits_t;
[; ;pic18f27j13.h: 5611: extern volatile SPBRGH2bits_t SPBRGH2bits @ 0xF7D;
[; ;pic18f27j13.h: 5620: extern volatile unsigned char BAUDCON1 @ 0xF7E;
"5622
[; ;pic18f27j13.h: 5622: asm("BAUDCON1 equ 0F7Eh");
[; <" BAUDCON1 equ 0F7Eh ;# ">
[; ;pic18f27j13.h: 5625: extern volatile unsigned char BAUDCON @ 0xF7E;
"5627
[; ;pic18f27j13.h: 5627: asm("BAUDCON equ 0F7Eh");
[; <" BAUDCON equ 0F7Eh ;# ">
[; ;pic18f27j13.h: 5629: extern volatile unsigned char BAUDCTL @ 0xF7E;
"5631
[; ;pic18f27j13.h: 5631: asm("BAUDCTL equ 0F7Eh");
[; <" BAUDCTL equ 0F7Eh ;# ">
[; ;pic18f27j13.h: 5634: typedef union {
[; ;pic18f27j13.h: 5635: struct {
[; ;pic18f27j13.h: 5636: unsigned ABDEN :1;
[; ;pic18f27j13.h: 5637: unsigned WUE :1;
[; ;pic18f27j13.h: 5638: unsigned :1;
[; ;pic18f27j13.h: 5639: unsigned BRG16 :1;
[; ;pic18f27j13.h: 5640: unsigned TXCKP :1;
[; ;pic18f27j13.h: 5641: unsigned RXDTP :1;
[; ;pic18f27j13.h: 5642: unsigned RCIDL :1;
[; ;pic18f27j13.h: 5643: unsigned ABDOVF :1;
[; ;pic18f27j13.h: 5644: };
[; ;pic18f27j13.h: 5645: struct {
[; ;pic18f27j13.h: 5646: unsigned ABDEN1 :1;
[; ;pic18f27j13.h: 5647: };
[; ;pic18f27j13.h: 5648: struct {
[; ;pic18f27j13.h: 5649: unsigned :7;
[; ;pic18f27j13.h: 5650: unsigned ABDOVF1 :1;
[; ;pic18f27j13.h: 5651: };
[; ;pic18f27j13.h: 5652: struct {
[; ;pic18f27j13.h: 5653: unsigned :3;
[; ;pic18f27j13.h: 5654: unsigned BRG161 :1;
[; ;pic18f27j13.h: 5655: };
[; ;pic18f27j13.h: 5656: struct {
[; ;pic18f27j13.h: 5657: unsigned :4;
[; ;pic18f27j13.h: 5658: unsigned CKTXP :1;
[; ;pic18f27j13.h: 5659: };
[; ;pic18f27j13.h: 5660: struct {
[; ;pic18f27j13.h: 5661: unsigned :5;
[; ;pic18f27j13.h: 5662: unsigned DTRXP :1;
[; ;pic18f27j13.h: 5663: };
[; ;pic18f27j13.h: 5664: struct {
[; ;pic18f27j13.h: 5665: unsigned :5;
[; ;pic18f27j13.h: 5666: unsigned DTRXP1 :1;
[; ;pic18f27j13.h: 5667: };
[; ;pic18f27j13.h: 5668: struct {
[; ;pic18f27j13.h: 5669: unsigned :6;
[; ;pic18f27j13.h: 5670: unsigned RCIDL1 :1;
[; ;pic18f27j13.h: 5671: };
[; ;pic18f27j13.h: 5672: struct {
[; ;pic18f27j13.h: 5673: unsigned :6;
[; ;pic18f27j13.h: 5674: unsigned RCMT :1;
[; ;pic18f27j13.h: 5675: };
[; ;pic18f27j13.h: 5676: struct {
[; ;pic18f27j13.h: 5677: unsigned :6;
[; ;pic18f27j13.h: 5678: unsigned RCMT1 :1;
[; ;pic18f27j13.h: 5679: };
[; ;pic18f27j13.h: 5680: struct {
[; ;pic18f27j13.h: 5681: unsigned :5;
[; ;pic18f27j13.h: 5682: unsigned RXDTP1 :1;
[; ;pic18f27j13.h: 5683: };
[; ;pic18f27j13.h: 5684: struct {
[; ;pic18f27j13.h: 5685: unsigned :4;
[; ;pic18f27j13.h: 5686: unsigned SCKP :1;
[; ;pic18f27j13.h: 5687: };
[; ;pic18f27j13.h: 5688: struct {
[; ;pic18f27j13.h: 5689: unsigned :4;
[; ;pic18f27j13.h: 5690: unsigned SCKP1 :1;
[; ;pic18f27j13.h: 5691: };
[; ;pic18f27j13.h: 5692: struct {
[; ;pic18f27j13.h: 5693: unsigned :4;
[; ;pic18f27j13.h: 5694: unsigned TXCKP1 :1;
[; ;pic18f27j13.h: 5695: };
[; ;pic18f27j13.h: 5696: struct {
[; ;pic18f27j13.h: 5697: unsigned :1;
[; ;pic18f27j13.h: 5698: unsigned WUE1 :1;
[; ;pic18f27j13.h: 5699: };
[; ;pic18f27j13.h: 5700: struct {
[; ;pic18f27j13.h: 5701: unsigned :5;
[; ;pic18f27j13.h: 5702: unsigned RXCKP :1;
[; ;pic18f27j13.h: 5703: };
[; ;pic18f27j13.h: 5704: struct {
[; ;pic18f27j13.h: 5705: unsigned :1;
[; ;pic18f27j13.h: 5706: unsigned W4E :1;
[; ;pic18f27j13.h: 5707: };
[; ;pic18f27j13.h: 5708: } BAUDCON1bits_t;
[; ;pic18f27j13.h: 5709: extern volatile BAUDCON1bits_t BAUDCON1bits @ 0xF7E;
[; ;pic18f27j13.h: 5827: typedef union {
[; ;pic18f27j13.h: 5828: struct {
[; ;pic18f27j13.h: 5829: unsigned ABDEN :1;
[; ;pic18f27j13.h: 5830: unsigned WUE :1;
[; ;pic18f27j13.h: 5831: unsigned :1;
[; ;pic18f27j13.h: 5832: unsigned BRG16 :1;
[; ;pic18f27j13.h: 5833: unsigned TXCKP :1;
[; ;pic18f27j13.h: 5834: unsigned RXDTP :1;
[; ;pic18f27j13.h: 5835: unsigned RCIDL :1;
[; ;pic18f27j13.h: 5836: unsigned ABDOVF :1;
[; ;pic18f27j13.h: 5837: };
[; ;pic18f27j13.h: 5838: struct {
[; ;pic18f27j13.h: 5839: unsigned ABDEN1 :1;
[; ;pic18f27j13.h: 5840: };
[; ;pic18f27j13.h: 5841: struct {
[; ;pic18f27j13.h: 5842: unsigned :7;
[; ;pic18f27j13.h: 5843: unsigned ABDOVF1 :1;
[; ;pic18f27j13.h: 5844: };
[; ;pic18f27j13.h: 5845: struct {
[; ;pic18f27j13.h: 5846: unsigned :3;
[; ;pic18f27j13.h: 5847: unsigned BRG161 :1;
[; ;pic18f27j13.h: 5848: };
[; ;pic18f27j13.h: 5849: struct {
[; ;pic18f27j13.h: 5850: unsigned :4;
[; ;pic18f27j13.h: 5851: unsigned CKTXP :1;
[; ;pic18f27j13.h: 5852: };
[; ;pic18f27j13.h: 5853: struct {
[; ;pic18f27j13.h: 5854: unsigned :5;
[; ;pic18f27j13.h: 5855: unsigned DTRXP :1;
[; ;pic18f27j13.h: 5856: };
[; ;pic18f27j13.h: 5857: struct {
[; ;pic18f27j13.h: 5858: unsigned :5;
[; ;pic18f27j13.h: 5859: unsigned DTRXP1 :1;
[; ;pic18f27j13.h: 5860: };
[; ;pic18f27j13.h: 5861: struct {
[; ;pic18f27j13.h: 5862: unsigned :6;
[; ;pic18f27j13.h: 5863: unsigned RCIDL1 :1;
[; ;pic18f27j13.h: 5864: };
[; ;pic18f27j13.h: 5865: struct {
[; ;pic18f27j13.h: 5866: unsigned :6;
[; ;pic18f27j13.h: 5867: unsigned RCMT :1;
[; ;pic18f27j13.h: 5868: };
[; ;pic18f27j13.h: 5869: struct {
[; ;pic18f27j13.h: 5870: unsigned :6;
[; ;pic18f27j13.h: 5871: unsigned RCMT1 :1;
[; ;pic18f27j13.h: 5872: };
[; ;pic18f27j13.h: 5873: struct {
[; ;pic18f27j13.h: 5874: unsigned :5;
[; ;pic18f27j13.h: 5875: unsigned RXDTP1 :1;
[; ;pic18f27j13.h: 5876: };
[; ;pic18f27j13.h: 5877: struct {
[; ;pic18f27j13.h: 5878: unsigned :4;
[; ;pic18f27j13.h: 5879: unsigned SCKP :1;
[; ;pic18f27j13.h: 5880: };
[; ;pic18f27j13.h: 5881: struct {
[; ;pic18f27j13.h: 5882: unsigned :4;
[; ;pic18f27j13.h: 5883: unsigned SCKP1 :1;
[; ;pic18f27j13.h: 5884: };
[; ;pic18f27j13.h: 5885: struct {
[; ;pic18f27j13.h: 5886: unsigned :4;
[; ;pic18f27j13.h: 5887: unsigned TXCKP1 :1;
[; ;pic18f27j13.h: 5888: };
[; ;pic18f27j13.h: 5889: struct {
[; ;pic18f27j13.h: 5890: unsigned :1;
[; ;pic18f27j13.h: 5891: unsigned WUE1 :1;
[; ;pic18f27j13.h: 5892: };
[; ;pic18f27j13.h: 5893: struct {
[; ;pic18f27j13.h: 5894: unsigned :5;
[; ;pic18f27j13.h: 5895: unsigned RXCKP :1;
[; ;pic18f27j13.h: 5896: };
[; ;pic18f27j13.h: 5897: struct {
[; ;pic18f27j13.h: 5898: unsigned :1;
[; ;pic18f27j13.h: 5899: unsigned W4E :1;
[; ;pic18f27j13.h: 5900: };
[; ;pic18f27j13.h: 5901: } BAUDCONbits_t;
[; ;pic18f27j13.h: 5902: extern volatile BAUDCONbits_t BAUDCONbits @ 0xF7E;
[; ;pic18f27j13.h: 6019: typedef union {
[; ;pic18f27j13.h: 6020: struct {
[; ;pic18f27j13.h: 6021: unsigned ABDEN :1;
[; ;pic18f27j13.h: 6022: unsigned WUE :1;
[; ;pic18f27j13.h: 6023: unsigned :1;
[; ;pic18f27j13.h: 6024: unsigned BRG16 :1;
[; ;pic18f27j13.h: 6025: unsigned TXCKP :1;
[; ;pic18f27j13.h: 6026: unsigned RXDTP :1;
[; ;pic18f27j13.h: 6027: unsigned RCIDL :1;
[; ;pic18f27j13.h: 6028: unsigned ABDOVF :1;
[; ;pic18f27j13.h: 6029: };
[; ;pic18f27j13.h: 6030: struct {
[; ;pic18f27j13.h: 6031: unsigned ABDEN1 :1;
[; ;pic18f27j13.h: 6032: };
[; ;pic18f27j13.h: 6033: struct {
[; ;pic18f27j13.h: 6034: unsigned :7;
[; ;pic18f27j13.h: 6035: unsigned ABDOVF1 :1;
[; ;pic18f27j13.h: 6036: };
[; ;pic18f27j13.h: 6037: struct {
[; ;pic18f27j13.h: 6038: unsigned :3;
[; ;pic18f27j13.h: 6039: unsigned BRG161 :1;
[; ;pic18f27j13.h: 6040: };
[; ;pic18f27j13.h: 6041: struct {
[; ;pic18f27j13.h: 6042: unsigned :4;
[; ;pic18f27j13.h: 6043: unsigned CKTXP :1;
[; ;pic18f27j13.h: 6044: };
[; ;pic18f27j13.h: 6045: struct {
[; ;pic18f27j13.h: 6046: unsigned :5;
[; ;pic18f27j13.h: 6047: unsigned DTRXP :1;
[; ;pic18f27j13.h: 6048: };
[; ;pic18f27j13.h: 6049: struct {
[; ;pic18f27j13.h: 6050: unsigned :5;
[; ;pic18f27j13.h: 6051: unsigned DTRXP1 :1;
[; ;pic18f27j13.h: 6052: };
[; ;pic18f27j13.h: 6053: struct {
[; ;pic18f27j13.h: 6054: unsigned :6;
[; ;pic18f27j13.h: 6055: unsigned RCIDL1 :1;
[; ;pic18f27j13.h: 6056: };
[; ;pic18f27j13.h: 6057: struct {
[; ;pic18f27j13.h: 6058: unsigned :6;
[; ;pic18f27j13.h: 6059: unsigned RCMT :1;
[; ;pic18f27j13.h: 6060: };
[; ;pic18f27j13.h: 6061: struct {
[; ;pic18f27j13.h: 6062: unsigned :6;
[; ;pic18f27j13.h: 6063: unsigned RCMT1 :1;
[; ;pic18f27j13.h: 6064: };
[; ;pic18f27j13.h: 6065: struct {
[; ;pic18f27j13.h: 6066: unsigned :5;
[; ;pic18f27j13.h: 6067: unsigned RXDTP1 :1;
[; ;pic18f27j13.h: 6068: };
[; ;pic18f27j13.h: 6069: struct {
[; ;pic18f27j13.h: 6070: unsigned :4;
[; ;pic18f27j13.h: 6071: unsigned SCKP :1;
[; ;pic18f27j13.h: 6072: };
[; ;pic18f27j13.h: 6073: struct {
[; ;pic18f27j13.h: 6074: unsigned :4;
[; ;pic18f27j13.h: 6075: unsigned SCKP1 :1;
[; ;pic18f27j13.h: 6076: };
[; ;pic18f27j13.h: 6077: struct {
[; ;pic18f27j13.h: 6078: unsigned :4;
[; ;pic18f27j13.h: 6079: unsigned TXCKP1 :1;
[; ;pic18f27j13.h: 6080: };
[; ;pic18f27j13.h: 6081: struct {
[; ;pic18f27j13.h: 6082: unsigned :1;
[; ;pic18f27j13.h: 6083: unsigned WUE1 :1;
[; ;pic18f27j13.h: 6084: };
[; ;pic18f27j13.h: 6085: struct {
[; ;pic18f27j13.h: 6086: unsigned :5;
[; ;pic18f27j13.h: 6087: unsigned RXCKP :1;
[; ;pic18f27j13.h: 6088: };
[; ;pic18f27j13.h: 6089: struct {
[; ;pic18f27j13.h: 6090: unsigned :1;
[; ;pic18f27j13.h: 6091: unsigned W4E :1;
[; ;pic18f27j13.h: 6092: };
[; ;pic18f27j13.h: 6093: } BAUDCTLbits_t;
[; ;pic18f27j13.h: 6094: extern volatile BAUDCTLbits_t BAUDCTLbits @ 0xF7E;
[; ;pic18f27j13.h: 6213: extern volatile unsigned char SPBRGH1 @ 0xF7F;
"6215
[; ;pic18f27j13.h: 6215: asm("SPBRGH1 equ 0F7Fh");
[; <" SPBRGH1 equ 0F7Fh ;# ">
[; ;pic18f27j13.h: 6218: extern volatile unsigned char SPBRGH @ 0xF7F;
"6220
[; ;pic18f27j13.h: 6220: asm("SPBRGH equ 0F7Fh");
[; <" SPBRGH equ 0F7Fh ;# ">
[; ;pic18f27j13.h: 6223: typedef union {
[; ;pic18f27j13.h: 6224: struct {
[; ;pic18f27j13.h: 6225: unsigned SPBRGH1 :8;
[; ;pic18f27j13.h: 6226: };
[; ;pic18f27j13.h: 6227: } SPBRGH1bits_t;
[; ;pic18f27j13.h: 6228: extern volatile SPBRGH1bits_t SPBRGH1bits @ 0xF7F;
[; ;pic18f27j13.h: 6236: typedef union {
[; ;pic18f27j13.h: 6237: struct {
[; ;pic18f27j13.h: 6238: unsigned SPBRGH1 :8;
[; ;pic18f27j13.h: 6239: };
[; ;pic18f27j13.h: 6240: } SPBRGHbits_t;
[; ;pic18f27j13.h: 6241: extern volatile SPBRGHbits_t SPBRGHbits @ 0xF7F;
[; ;pic18f27j13.h: 6250: extern volatile unsigned char PORTA @ 0xF80;
"6252
[; ;pic18f27j13.h: 6252: asm("PORTA equ 0F80h");
[; <" PORTA equ 0F80h ;# ">
[; ;pic18f27j13.h: 6255: typedef union {
[; ;pic18f27j13.h: 6256: struct {
[; ;pic18f27j13.h: 6257: unsigned RA0 :1;
[; ;pic18f27j13.h: 6258: unsigned RA1 :1;
[; ;pic18f27j13.h: 6259: unsigned RA2 :1;
[; ;pic18f27j13.h: 6260: unsigned RA3 :1;
[; ;pic18f27j13.h: 6261: unsigned :1;
[; ;pic18f27j13.h: 6262: unsigned RA5 :1;
[; ;pic18f27j13.h: 6263: unsigned RA6 :1;
[; ;pic18f27j13.h: 6264: unsigned RA7 :1;
[; ;pic18f27j13.h: 6265: };
[; ;pic18f27j13.h: 6266: struct {
[; ;pic18f27j13.h: 6267: unsigned AN0 :1;
[; ;pic18f27j13.h: 6268: unsigned AN1 :1;
[; ;pic18f27j13.h: 6269: unsigned AN2 :1;
[; ;pic18f27j13.h: 6270: unsigned AN3 :1;
[; ;pic18f27j13.h: 6271: unsigned :1;
[; ;pic18f27j13.h: 6272: unsigned AN4 :1;
[; ;pic18f27j13.h: 6273: unsigned OSC2 :1;
[; ;pic18f27j13.h: 6274: unsigned OSC1 :1;
[; ;pic18f27j13.h: 6275: };
[; ;pic18f27j13.h: 6276: struct {
[; ;pic18f27j13.h: 6277: unsigned :5;
[; ;pic18f27j13.h: 6278: unsigned NOT_SS1 :1;
[; ;pic18f27j13.h: 6279: };
[; ;pic18f27j13.h: 6280: struct {
[; ;pic18f27j13.h: 6281: unsigned C1INA :1;
[; ;pic18f27j13.h: 6282: unsigned C2INA :1;
[; ;pic18f27j13.h: 6283: unsigned VREF_MINUS :1;
[; ;pic18f27j13.h: 6284: unsigned VREF_PLUS :1;
[; ;pic18f27j13.h: 6285: unsigned :1;
[; ;pic18f27j13.h: 6286: unsigned nSS1 :1;
[; ;pic18f27j13.h: 6287: unsigned CLKO :1;
[; ;pic18f27j13.h: 6288: unsigned CLKI :1;
[; ;pic18f27j13.h: 6289: };
[; ;pic18f27j13.h: 6290: struct {
[; ;pic18f27j13.h: 6291: unsigned :2;
[; ;pic18f27j13.h: 6292: unsigned CVREF :1;
[; ;pic18f27j13.h: 6293: unsigned C1INB :1;
[; ;pic18f27j13.h: 6294: unsigned :1;
[; ;pic18f27j13.h: 6295: unsigned HLVDIN :1;
[; ;pic18f27j13.h: 6296: };
[; ;pic18f27j13.h: 6297: struct {
[; ;pic18f27j13.h: 6298: unsigned RP0 :1;
[; ;pic18f27j13.h: 6299: unsigned RP1 :1;
[; ;pic18f27j13.h: 6300: unsigned C2INB :1;
[; ;pic18f27j13.h: 6301: };
[; ;pic18f27j13.h: 6302: struct {
[; ;pic18f27j13.h: 6303: unsigned ULPWU :1;
[; ;pic18f27j13.h: 6304: unsigned VBG :1;
[; ;pic18f27j13.h: 6305: unsigned C3INB :1;
[; ;pic18f27j13.h: 6306: unsigned :2;
[; ;pic18f27j13.h: 6307: unsigned RP2 :1;
[; ;pic18f27j13.h: 6308: };
[; ;pic18f27j13.h: 6309: struct {
[; ;pic18f27j13.h: 6310: unsigned :2;
[; ;pic18f27j13.h: 6311: unsigned C1IND :1;
[; ;pic18f27j13.h: 6312: unsigned :2;
[; ;pic18f27j13.h: 6313: unsigned C1INC :1;
[; ;pic18f27j13.h: 6314: };
[; ;pic18f27j13.h: 6315: struct {
[; ;pic18f27j13.h: 6316: unsigned :5;
[; ;pic18f27j13.h: 6317: unsigned LVDIN :1;
[; ;pic18f27j13.h: 6318: };
[; ;pic18f27j13.h: 6319: struct {
[; ;pic18f27j13.h: 6320: unsigned :4;
[; ;pic18f27j13.h: 6321: unsigned RA4 :1;
[; ;pic18f27j13.h: 6322: };
[; ;pic18f27j13.h: 6323: struct {
[; ;pic18f27j13.h: 6324: unsigned :7;
[; ;pic18f27j13.h: 6325: unsigned RJPU :1;
[; ;pic18f27j13.h: 6326: };
[; ;pic18f27j13.h: 6327: struct {
[; ;pic18f27j13.h: 6328: unsigned ULPWUIN :1;
[; ;pic18f27j13.h: 6329: };
[; ;pic18f27j13.h: 6330: } PORTAbits_t;
[; ;pic18f27j13.h: 6331: extern volatile PORTAbits_t PORTAbits @ 0xF80;
[; ;pic18f27j13.h: 6525: extern volatile unsigned char PORTB @ 0xF81;
"6527
[; ;pic18f27j13.h: 6527: asm("PORTB equ 0F81h");
[; <" PORTB equ 0F81h ;# ">
[; ;pic18f27j13.h: 6530: typedef union {
[; ;pic18f27j13.h: 6531: struct {
[; ;pic18f27j13.h: 6532: unsigned RB0 :1;
[; ;pic18f27j13.h: 6533: unsigned RB1 :1;
[; ;pic18f27j13.h: 6534: unsigned RB2 :1;
[; ;pic18f27j13.h: 6535: unsigned RB3 :1;
[; ;pic18f27j13.h: 6536: unsigned RB4 :1;
[; ;pic18f27j13.h: 6537: unsigned RB5 :1;
[; ;pic18f27j13.h: 6538: unsigned RB6 :1;
[; ;pic18f27j13.h: 6539: unsigned RB7 :1;
[; ;pic18f27j13.h: 6540: };
[; ;pic18f27j13.h: 6541: struct {
[; ;pic18f27j13.h: 6542: unsigned AN12 :1;
[; ;pic18f27j13.h: 6543: unsigned AN10 :1;
[; ;pic18f27j13.h: 6544: unsigned AN8 :1;
[; ;pic18f27j13.h: 6545: unsigned AN9 :1;
[; ;pic18f27j13.h: 6546: unsigned :2;
[; ;pic18f27j13.h: 6547: unsigned KBI2 :1;
[; ;pic18f27j13.h: 6548: unsigned KBI3 :1;
[; ;pic18f27j13.h: 6549: };
[; ;pic18f27j13.h: 6550: struct {
[; ;pic18f27j13.h: 6551: unsigned INT0 :1;
[; ;pic18f27j13.h: 6552: unsigned :1;
[; ;pic18f27j13.h: 6553: unsigned CTED1 :1;
[; ;pic18f27j13.h: 6554: unsigned CTED2 :1;
[; ;pic18f27j13.h: 6555: unsigned KBI0 :1;
[; ;pic18f27j13.h: 6556: unsigned KBI1 :1;
[; ;pic18f27j13.h: 6557: unsigned PGC :1;
[; ;pic18f27j13.h: 6558: unsigned PGD :1;
[; ;pic18f27j13.h: 6559: };
[; ;pic18f27j13.h: 6560: struct {
[; ;pic18f27j13.h: 6561: unsigned RP3 :1;
[; ;pic18f27j13.h: 6562: unsigned RTCC :1;
[; ;pic18f27j13.h: 6563: unsigned :4;
[; ;pic18f27j13.h: 6564: unsigned RP9 :1;
[; ;pic18f27j13.h: 6565: unsigned RP10 :1;
[; ;pic18f27j13.h: 6566: };
[; ;pic18f27j13.h: 6567: struct {
[; ;pic18f27j13.h: 6568: unsigned C3IND :1;
[; ;pic18f27j13.h: 6569: unsigned C3INC :1;
[; ;pic18f27j13.h: 6570: unsigned C2INC :1;
[; ;pic18f27j13.h: 6571: unsigned :1;
[; ;pic18f27j13.h: 6572: unsigned SCL2 :1;
[; ;pic18f27j13.h: 6573: unsigned SDA2 :1;
[; ;pic18f27j13.h: 6574: };
[; ;pic18f27j13.h: 6575: struct {
[; ;pic18f27j13.h: 6576: unsigned :1;
[; ;pic18f27j13.h: 6577: unsigned RP4 :1;
[; ;pic18f27j13.h: 6578: unsigned REFO :1;
[; ;pic18f27j13.h: 6579: unsigned RP6 :1;
[; ;pic18f27j13.h: 6580: unsigned RP7 :1;
[; ;pic18f27j13.h: 6581: unsigned RP8 :1;
[; ;pic18f27j13.h: 6582: };
[; ;pic18f27j13.h: 6583: struct {
[; ;pic18f27j13.h: 6584: unsigned :2;
[; ;pic18f27j13.h: 6585: unsigned RP5 :1;
[; ;pic18f27j13.h: 6586: unsigned C3INA :1;
[; ;pic18f27j13.h: 6587: unsigned CCP4 :1;
[; ;pic18f27j13.h: 6588: unsigned CCP5 :1;
[; ;pic18f27j13.h: 6589: unsigned CCP6 :1;
[; ;pic18f27j13.h: 6590: unsigned CCP7 :1;
[; ;pic18f27j13.h: 6591: };
[; ;pic18f27j13.h: 6592: struct {
[; ;pic18f27j13.h: 6593: unsigned :3;
[; ;pic18f27j13.h: 6594: unsigned CCP2_PA2 :1;
[; ;pic18f27j13.h: 6595: };
[; ;pic18f27j13.h: 6596: } PORTBbits_t;
[; ;pic18f27j13.h: 6597: extern volatile PORTBbits_t PORTBbits @ 0xF81;
[; ;pic18f27j13.h: 6811: extern volatile unsigned char PORTC @ 0xF82;
"6813
[; ;pic18f27j13.h: 6813: asm("PORTC equ 0F82h");
[; <" PORTC equ 0F82h ;# ">
[; ;pic18f27j13.h: 6816: typedef union {
[; ;pic18f27j13.h: 6817: struct {
[; ;pic18f27j13.h: 6818: unsigned RC0 :1;
[; ;pic18f27j13.h: 6819: unsigned RC1 :1;
[; ;pic18f27j13.h: 6820: unsigned RC2 :1;
[; ;pic18f27j13.h: 6821: unsigned RC3 :1;
[; ;pic18f27j13.h: 6822: unsigned RC4 :1;
[; ;pic18f27j13.h: 6823: unsigned RC5 :1;
[; ;pic18f27j13.h: 6824: unsigned RC6 :1;
[; ;pic18f27j13.h: 6825: unsigned RC7 :1;
[; ;pic18f27j13.h: 6826: };
[; ;pic18f27j13.h: 6827: struct {
[; ;pic18f27j13.h: 6828: unsigned T1OSO :1;
[; ;pic18f27j13.h: 6829: unsigned T1OSI :1;
[; ;pic18f27j13.h: 6830: unsigned AN11 :1;
[; ;pic18f27j13.h: 6831: unsigned SCL1 :1;
[; ;pic18f27j13.h: 6832: unsigned SDA1 :1;
[; ;pic18f27j13.h: 6833: };
[; ;pic18f27j13.h: 6834: struct {
[; ;pic18f27j13.h: 6835: unsigned T1CKI :1;
[; ;pic18f27j13.h: 6836: unsigned :1;
[; ;pic18f27j13.h: 6837: unsigned CTPLS :1;
[; ;pic18f27j13.h: 6838: unsigned :3;
[; ;pic18f27j13.h: 6839: unsigned TX1 :1;
[; ;pic18f27j13.h: 6840: unsigned RX1 :1;
[; ;pic18f27j13.h: 6841: };
[; ;pic18f27j13.h: 6842: struct {
[; ;pic18f27j13.h: 6843: unsigned RP11 :1;
[; ;pic18f27j13.h: 6844: unsigned RP12 :1;
[; ;pic18f27j13.h: 6845: unsigned RP13 :1;
[; ;pic18f27j13.h: 6846: unsigned RP14 :1;
[; ;pic18f27j13.h: 6847: unsigned RP15 :1;
[; ;pic18f27j13.h: 6848: unsigned RP16 :1;
[; ;pic18f27j13.h: 6849: unsigned CK1 :1;
[; ;pic18f27j13.h: 6850: unsigned DT1 :1;
[; ;pic18f27j13.h: 6851: };
[; ;pic18f27j13.h: 6852: struct {
[; ;pic18f27j13.h: 6853: unsigned :1;
[; ;pic18f27j13.h: 6854: unsigned CCP8 :1;
[; ;pic18f27j13.h: 6855: unsigned C2IND :1;
[; ;pic18f27j13.h: 6856: unsigned SCK1 :1;
[; ;pic18f27j13.h: 6857: unsigned SDI1 :1;
[; ;pic18f27j13.h: 6858: unsigned SDO1 :1;
[; ;pic18f27j13.h: 6859: unsigned CCP9 :1;
[; ;pic18f27j13.h: 6860: unsigned CCP10 :1;
[; ;pic18f27j13.h: 6861: };
[; ;pic18f27j13.h: 6862: struct {
[; ;pic18f27j13.h: 6863: unsigned :6;
[; ;pic18f27j13.h: 6864: unsigned RP17 :1;
[; ;pic18f27j13.h: 6865: unsigned RP18 :1;
[; ;pic18f27j13.h: 6866: };
[; ;pic18f27j13.h: 6867: struct {
[; ;pic18f27j13.h: 6868: unsigned :1;
[; ;pic18f27j13.h: 6869: unsigned CCP2 :1;
[; ;pic18f27j13.h: 6870: };
[; ;pic18f27j13.h: 6871: struct {
[; ;pic18f27j13.h: 6872: unsigned :2;
[; ;pic18f27j13.h: 6873: unsigned PA1 :1;
[; ;pic18f27j13.h: 6874: };
[; ;pic18f27j13.h: 6875: struct {
[; ;pic18f27j13.h: 6876: unsigned :1;
[; ;pic18f27j13.h: 6877: unsigned PA2 :1;
[; ;pic18f27j13.h: 6878: };
[; ;pic18f27j13.h: 6879: } PORTCbits_t;
[; ;pic18f27j13.h: 6880: extern volatile PORTCbits_t PORTCbits @ 0xF82;
[; ;pic18f27j13.h: 7069: extern volatile unsigned char HLVDCON @ 0xF85;
"7071
[; ;pic18f27j13.h: 7071: asm("HLVDCON equ 0F85h");
[; <" HLVDCON equ 0F85h ;# ">
[; ;pic18f27j13.h: 7074: typedef union {
[; ;pic18f27j13.h: 7075: struct {
[; ;pic18f27j13.h: 7076: unsigned HLVDL :4;
[; ;pic18f27j13.h: 7077: unsigned HLVDEN :1;
[; ;pic18f27j13.h: 7078: unsigned IRVST :1;
[; ;pic18f27j13.h: 7079: unsigned BGVST :1;
[; ;pic18f27j13.h: 7080: unsigned VDIRMAG :1;
[; ;pic18f27j13.h: 7081: };
[; ;pic18f27j13.h: 7082: struct {
[; ;pic18f27j13.h: 7083: unsigned HLVDL0 :1;
[; ;pic18f27j13.h: 7084: unsigned HLVDL1 :1;
[; ;pic18f27j13.h: 7085: unsigned HLVDL2 :1;
[; ;pic18f27j13.h: 7086: unsigned HLVDL3 :1;
[; ;pic18f27j13.h: 7087: };
[; ;pic18f27j13.h: 7088: } HLVDCONbits_t;
[; ;pic18f27j13.h: 7089: extern volatile HLVDCONbits_t HLVDCONbits @ 0xF85;
[; ;pic18f27j13.h: 7138: extern volatile unsigned char DMACON2 @ 0xF86;
"7140
[; ;pic18f27j13.h: 7140: asm("DMACON2 equ 0F86h");
[; <" DMACON2 equ 0F86h ;# ">
[; ;pic18f27j13.h: 7143: typedef union {
[; ;pic18f27j13.h: 7144: struct {
[; ;pic18f27j13.h: 7145: unsigned INTLVL :4;
[; ;pic18f27j13.h: 7146: unsigned DLYCYC :4;
[; ;pic18f27j13.h: 7147: };
[; ;pic18f27j13.h: 7148: struct {
[; ;pic18f27j13.h: 7149: unsigned INTLVL0 :1;
[; ;pic18f27j13.h: 7150: unsigned INTLVL1 :1;
[; ;pic18f27j13.h: 7151: unsigned INTLVL2 :1;
[; ;pic18f27j13.h: 7152: unsigned INTLVL3 :1;
[; ;pic18f27j13.h: 7153: unsigned DLYCYC0 :1;
[; ;pic18f27j13.h: 7154: unsigned DLYCYC1 :1;
[; ;pic18f27j13.h: 7155: unsigned DLYCYC2 :1;
[; ;pic18f27j13.h: 7156: unsigned DLYCYC3 :1;
[; ;pic18f27j13.h: 7157: };
[; ;pic18f27j13.h: 7158: } DMACON2bits_t;
[; ;pic18f27j13.h: 7159: extern volatile DMACON2bits_t DMACON2bits @ 0xF86;
[; ;pic18f27j13.h: 7213: extern volatile unsigned char OSCCON2 @ 0xF87;
"7215
[; ;pic18f27j13.h: 7215: asm("OSCCON2 equ 0F87h");
[; <" OSCCON2 equ 0F87h ;# ">
[; ;pic18f27j13.h: 7218: typedef union {
[; ;pic18f27j13.h: 7219: struct {
[; ;pic18f27j13.h: 7220: unsigned :2;
[; ;pic18f27j13.h: 7221: unsigned PRISD :1;
[; ;pic18f27j13.h: 7222: unsigned SOSCGO :1;
[; ;pic18f27j13.h: 7223: unsigned SOSCDRV :1;
[; ;pic18f27j13.h: 7224: unsigned :1;
[; ;pic18f27j13.h: 7225: unsigned SOSCRUN :1;
[; ;pic18f27j13.h: 7226: };
[; ;pic18f27j13.h: 7227: } OSCCON2bits_t;
[; ;pic18f27j13.h: 7228: extern volatile OSCCON2bits_t OSCCON2bits @ 0xF87;
[; ;pic18f27j13.h: 7252: extern volatile unsigned char DMACON1 @ 0xF88;
"7254
[; ;pic18f27j13.h: 7254: asm("DMACON1 equ 0F88h");
[; <" DMACON1 equ 0F88h ;# ">
[; ;pic18f27j13.h: 7257: typedef union {
[; ;pic18f27j13.h: 7258: struct {
[; ;pic18f27j13.h: 7259: unsigned DMAEN :1;
[; ;pic18f27j13.h: 7260: unsigned DLYINTEN :1;
[; ;pic18f27j13.h: 7261: unsigned DUPLEX0 :1;
[; ;pic18f27j13.h: 7262: unsigned DUPLEX1 :1;
[; ;pic18f27j13.h: 7263: unsigned RXINC :1;
[; ;pic18f27j13.h: 7264: unsigned TXINC :1;
[; ;pic18f27j13.h: 7265: unsigned SSCON0 :1;
[; ;pic18f27j13.h: 7266: unsigned SSCON1 :1;
[; ;pic18f27j13.h: 7267: };
[; ;pic18f27j13.h: 7268: } DMACON1bits_t;
[; ;pic18f27j13.h: 7269: extern volatile DMACON1bits_t DMACON1bits @ 0xF88;
[; ;pic18f27j13.h: 7313: extern volatile unsigned char LATA @ 0xF89;
"7315
[; ;pic18f27j13.h: 7315: asm("LATA equ 0F89h");
[; <" LATA equ 0F89h ;# ">
[; ;pic18f27j13.h: 7318: typedef union {
[; ;pic18f27j13.h: 7319: struct {
[; ;pic18f27j13.h: 7320: unsigned LATA0 :1;
[; ;pic18f27j13.h: 7321: unsigned LATA1 :1;
[; ;pic18f27j13.h: 7322: unsigned LATA2 :1;
[; ;pic18f27j13.h: 7323: unsigned LATA3 :1;
[; ;pic18f27j13.h: 7324: unsigned :1;
[; ;pic18f27j13.h: 7325: unsigned LATA5 :1;
[; ;pic18f27j13.h: 7326: unsigned LATA6 :1;
[; ;pic18f27j13.h: 7327: unsigned LATA7 :1;
[; ;pic18f27j13.h: 7328: };
[; ;pic18f27j13.h: 7329: struct {
[; ;pic18f27j13.h: 7330: unsigned LA0 :1;
[; ;pic18f27j13.h: 7331: };
[; ;pic18f27j13.h: 7332: struct {
[; ;pic18f27j13.h: 7333: unsigned :1;
[; ;pic18f27j13.h: 7334: unsigned LA1 :1;
[; ;pic18f27j13.h: 7335: };
[; ;pic18f27j13.h: 7336: struct {
[; ;pic18f27j13.h: 7337: unsigned :2;
[; ;pic18f27j13.h: 7338: unsigned LA2 :1;
[; ;pic18f27j13.h: 7339: };
[; ;pic18f27j13.h: 7340: struct {
[; ;pic18f27j13.h: 7341: unsigned :3;
[; ;pic18f27j13.h: 7342: unsigned LA3 :1;
[; ;pic18f27j13.h: 7343: };
[; ;pic18f27j13.h: 7344: struct {
[; ;pic18f27j13.h: 7345: unsigned :4;
[; ;pic18f27j13.h: 7346: unsigned LA4 :1;
[; ;pic18f27j13.h: 7347: };
[; ;pic18f27j13.h: 7348: struct {
[; ;pic18f27j13.h: 7349: unsigned :5;
[; ;pic18f27j13.h: 7350: unsigned LA5 :1;
[; ;pic18f27j13.h: 7351: };
[; ;pic18f27j13.h: 7352: struct {
[; ;pic18f27j13.h: 7353: unsigned :6;
[; ;pic18f27j13.h: 7354: unsigned LA6 :1;
[; ;pic18f27j13.h: 7355: };
[; ;pic18f27j13.h: 7356: struct {
[; ;pic18f27j13.h: 7357: unsigned :7;
[; ;pic18f27j13.h: 7358: unsigned LA7 :1;
[; ;pic18f27j13.h: 7359: };
[; ;pic18f27j13.h: 7360: } LATAbits_t;
[; ;pic18f27j13.h: 7361: extern volatile LATAbits_t LATAbits @ 0xF89;
[; ;pic18f27j13.h: 7440: extern volatile unsigned char LATB @ 0xF8A;
"7442
[; ;pic18f27j13.h: 7442: asm("LATB equ 0F8Ah");
[; <" LATB equ 0F8Ah ;# ">
[; ;pic18f27j13.h: 7445: typedef union {
[; ;pic18f27j13.h: 7446: struct {
[; ;pic18f27j13.h: 7447: unsigned LATB0 :1;
[; ;pic18f27j13.h: 7448: unsigned LATB1 :1;
[; ;pic18f27j13.h: 7449: unsigned LATB2 :1;
[; ;pic18f27j13.h: 7450: unsigned LATB3 :1;
[; ;pic18f27j13.h: 7451: unsigned LATB4 :1;
[; ;pic18f27j13.h: 7452: unsigned LATB5 :1;
[; ;pic18f27j13.h: 7453: unsigned LATB6 :1;
[; ;pic18f27j13.h: 7454: unsigned LATB7 :1;
[; ;pic18f27j13.h: 7455: };
[; ;pic18f27j13.h: 7456: struct {
[; ;pic18f27j13.h: 7457: unsigned LB0 :1;
[; ;pic18f27j13.h: 7458: };
[; ;pic18f27j13.h: 7459: struct {
[; ;pic18f27j13.h: 7460: unsigned :1;
[; ;pic18f27j13.h: 7461: unsigned LB1 :1;
[; ;pic18f27j13.h: 7462: };
[; ;pic18f27j13.h: 7463: struct {
[; ;pic18f27j13.h: 7464: unsigned :2;
[; ;pic18f27j13.h: 7465: unsigned LB2 :1;
[; ;pic18f27j13.h: 7466: };
[; ;pic18f27j13.h: 7467: struct {
[; ;pic18f27j13.h: 7468: unsigned :3;
[; ;pic18f27j13.h: 7469: unsigned LB3 :1;
[; ;pic18f27j13.h: 7470: };
[; ;pic18f27j13.h: 7471: struct {
[; ;pic18f27j13.h: 7472: unsigned :4;
[; ;pic18f27j13.h: 7473: unsigned LB4 :1;
[; ;pic18f27j13.h: 7474: };
[; ;pic18f27j13.h: 7475: struct {
[; ;pic18f27j13.h: 7476: unsigned :5;
[; ;pic18f27j13.h: 7477: unsigned LB5 :1;
[; ;pic18f27j13.h: 7478: };
[; ;pic18f27j13.h: 7479: struct {
[; ;pic18f27j13.h: 7480: unsigned :6;
[; ;pic18f27j13.h: 7481: unsigned LB6 :1;
[; ;pic18f27j13.h: 7482: };
[; ;pic18f27j13.h: 7483: struct {
[; ;pic18f27j13.h: 7484: unsigned :7;
[; ;pic18f27j13.h: 7485: unsigned LB7 :1;
[; ;pic18f27j13.h: 7486: };
[; ;pic18f27j13.h: 7487: } LATBbits_t;
[; ;pic18f27j13.h: 7488: extern volatile LATBbits_t LATBbits @ 0xF8A;
[; ;pic18f27j13.h: 7572: extern volatile unsigned char LATC @ 0xF8B;
"7574
[; ;pic18f27j13.h: 7574: asm("LATC equ 0F8Bh");
[; <" LATC equ 0F8Bh ;# ">
[; ;pic18f27j13.h: 7577: typedef union {
[; ;pic18f27j13.h: 7578: struct {
[; ;pic18f27j13.h: 7579: unsigned LATC0 :1;
[; ;pic18f27j13.h: 7580: unsigned LATC1 :1;
[; ;pic18f27j13.h: 7581: unsigned LATC2 :1;
[; ;pic18f27j13.h: 7582: unsigned LATC3 :1;
[; ;pic18f27j13.h: 7583: unsigned LATC4 :1;
[; ;pic18f27j13.h: 7584: unsigned LATC5 :1;
[; ;pic18f27j13.h: 7585: unsigned LATC6 :1;
[; ;pic18f27j13.h: 7586: unsigned LATC7 :1;
[; ;pic18f27j13.h: 7587: };
[; ;pic18f27j13.h: 7588: struct {
[; ;pic18f27j13.h: 7589: unsigned LC0 :1;
[; ;pic18f27j13.h: 7590: };
[; ;pic18f27j13.h: 7591: struct {
[; ;pic18f27j13.h: 7592: unsigned :1;
[; ;pic18f27j13.h: 7593: unsigned LC1 :1;
[; ;pic18f27j13.h: 7594: };
[; ;pic18f27j13.h: 7595: struct {
[; ;pic18f27j13.h: 7596: unsigned :2;
[; ;pic18f27j13.h: 7597: unsigned LC2 :1;
[; ;pic18f27j13.h: 7598: };
[; ;pic18f27j13.h: 7599: struct {
[; ;pic18f27j13.h: 7600: unsigned :3;
[; ;pic18f27j13.h: 7601: unsigned LC3 :1;
[; ;pic18f27j13.h: 7602: };
[; ;pic18f27j13.h: 7603: struct {
[; ;pic18f27j13.h: 7604: unsigned :4;
[; ;pic18f27j13.h: 7605: unsigned LC4 :1;
[; ;pic18f27j13.h: 7606: };
[; ;pic18f27j13.h: 7607: struct {
[; ;pic18f27j13.h: 7608: unsigned :5;
[; ;pic18f27j13.h: 7609: unsigned LC5 :1;
[; ;pic18f27j13.h: 7610: };
[; ;pic18f27j13.h: 7611: struct {
[; ;pic18f27j13.h: 7612: unsigned :6;
[; ;pic18f27j13.h: 7613: unsigned LC6 :1;
[; ;pic18f27j13.h: 7614: };
[; ;pic18f27j13.h: 7615: struct {
[; ;pic18f27j13.h: 7616: unsigned :7;
[; ;pic18f27j13.h: 7617: unsigned LC7 :1;
[; ;pic18f27j13.h: 7618: };
[; ;pic18f27j13.h: 7619: } LATCbits_t;
[; ;pic18f27j13.h: 7620: extern volatile LATCbits_t LATCbits @ 0xF8B;
[; ;pic18f27j13.h: 7704: extern volatile unsigned char PIE4 @ 0xF8E;
"7706
[; ;pic18f27j13.h: 7706: asm("PIE4 equ 0F8Eh");
[; <" PIE4 equ 0F8Eh ;# ">
[; ;pic18f27j13.h: 7709: typedef union {
[; ;pic18f27j13.h: 7710: struct {
[; ;pic18f27j13.h: 7711: unsigned CCP3IE :1;
[; ;pic18f27j13.h: 7712: unsigned CCP4IE :1;
[; ;pic18f27j13.h: 7713: unsigned CCP5IE :1;
[; ;pic18f27j13.h: 7714: unsigned CCP6IE :1;
[; ;pic18f27j13.h: 7715: unsigned CCP7IE :1;
[; ;pic18f27j13.h: 7716: unsigned CCP8IE :1;
[; ;pic18f27j13.h: 7717: unsigned CCP9IE :1;
[; ;pic18f27j13.h: 7718: unsigned CCP10IE :1;
[; ;pic18f27j13.h: 7719: };
[; ;pic18f27j13.h: 7720: } PIE4bits_t;
[; ;pic18f27j13.h: 7721: extern volatile PIE4bits_t PIE4bits @ 0xF8E;
[; ;pic18f27j13.h: 7765: extern volatile unsigned char PIR4 @ 0xF8F;
"7767
[; ;pic18f27j13.h: 7767: asm("PIR4 equ 0F8Fh");
[; <" PIR4 equ 0F8Fh ;# ">
[; ;pic18f27j13.h: 7770: typedef union {
[; ;pic18f27j13.h: 7771: struct {
[; ;pic18f27j13.h: 7772: unsigned CCP3IF :1;
[; ;pic18f27j13.h: 7773: unsigned CCP4IF :1;
[; ;pic18f27j13.h: 7774: unsigned CCP5IF :1;
[; ;pic18f27j13.h: 7775: unsigned CCP6IF :1;
[; ;pic18f27j13.h: 7776: unsigned CCP7IF :1;
[; ;pic18f27j13.h: 7777: unsigned CCP8IF :1;
[; ;pic18f27j13.h: 7778: unsigned CCP9IF :1;
[; ;pic18f27j13.h: 7779: unsigned CCP10IF :1;
[; ;pic18f27j13.h: 7780: };
[; ;pic18f27j13.h: 7781: } PIR4bits_t;
[; ;pic18f27j13.h: 7782: extern volatile PIR4bits_t PIR4bits @ 0xF8F;
[; ;pic18f27j13.h: 7826: extern volatile unsigned char IPR4 @ 0xF90;
"7828
[; ;pic18f27j13.h: 7828: asm("IPR4 equ 0F90h");
[; <" IPR4 equ 0F90h ;# ">
[; ;pic18f27j13.h: 7831: typedef union {
[; ;pic18f27j13.h: 7832: struct {
[; ;pic18f27j13.h: 7833: unsigned CCP3IP :1;
[; ;pic18f27j13.h: 7834: unsigned CCP4IP :1;
[; ;pic18f27j13.h: 7835: unsigned CCP5IP :1;
[; ;pic18f27j13.h: 7836: unsigned CCP6IP :1;
[; ;pic18f27j13.h: 7837: unsigned CCP7IP :1;
[; ;pic18f27j13.h: 7838: unsigned CCP8IP :1;
[; ;pic18f27j13.h: 7839: unsigned CCP9IP :1;
[; ;pic18f27j13.h: 7840: unsigned CCP10IP :1;
[; ;pic18f27j13.h: 7841: };
[; ;pic18f27j13.h: 7842: struct {
[; ;pic18f27j13.h: 7843: unsigned CCIP3IP :1;
[; ;pic18f27j13.h: 7844: };
[; ;pic18f27j13.h: 7845: } IPR4bits_t;
[; ;pic18f27j13.h: 7846: extern volatile IPR4bits_t IPR4bits @ 0xF90;
[; ;pic18f27j13.h: 7895: extern volatile unsigned char PIE5 @ 0xF91;
"7897
[; ;pic18f27j13.h: 7897: asm("PIE5 equ 0F91h");
[; <" PIE5 equ 0F91h ;# ">
[; ;pic18f27j13.h: 7900: typedef union {
[; ;pic18f27j13.h: 7901: struct {
[; ;pic18f27j13.h: 7902: unsigned TMR1GIE :1;
[; ;pic18f27j13.h: 7903: unsigned TMR5GIE :1;
[; ;pic18f27j13.h: 7904: unsigned TMR5IE :1;
[; ;pic18f27j13.h: 7905: unsigned TMR6IE :1;
[; ;pic18f27j13.h: 7906: unsigned TMR8IE :1;
[; ;pic18f27j13.h: 7907: unsigned CM3IE :1;
[; ;pic18f27j13.h: 7908: };
[; ;pic18f27j13.h: 7909: } PIE5bits_t;
[; ;pic18f27j13.h: 7910: extern volatile PIE5bits_t PIE5bits @ 0xF91;
[; ;pic18f27j13.h: 7944: extern volatile unsigned char TRISA @ 0xF92;
"7946
[; ;pic18f27j13.h: 7946: asm("TRISA equ 0F92h");
[; <" TRISA equ 0F92h ;# ">
[; ;pic18f27j13.h: 7949: typedef union {
[; ;pic18f27j13.h: 7950: struct {
[; ;pic18f27j13.h: 7951: unsigned TRISA0 :1;
[; ;pic18f27j13.h: 7952: unsigned TRISA1 :1;
[; ;pic18f27j13.h: 7953: unsigned TRISA2 :1;
[; ;pic18f27j13.h: 7954: unsigned TRISA3 :1;
[; ;pic18f27j13.h: 7955: unsigned :1;
[; ;pic18f27j13.h: 7956: unsigned TRISA5 :1;
[; ;pic18f27j13.h: 7957: unsigned TRISA6 :1;
[; ;pic18f27j13.h: 7958: unsigned TRISA7 :1;
[; ;pic18f27j13.h: 7959: };
[; ;pic18f27j13.h: 7960: } TRISAbits_t;
[; ;pic18f27j13.h: 7961: extern volatile TRISAbits_t TRISAbits @ 0xF92;
[; ;pic18f27j13.h: 8000: extern volatile unsigned char TRISB @ 0xF93;
"8002
[; ;pic18f27j13.h: 8002: asm("TRISB equ 0F93h");
[; <" TRISB equ 0F93h ;# ">
[; ;pic18f27j13.h: 8005: typedef union {
[; ;pic18f27j13.h: 8006: struct {
[; ;pic18f27j13.h: 8007: unsigned TRISB0 :1;
[; ;pic18f27j13.h: 8008: unsigned TRISB1 :1;
[; ;pic18f27j13.h: 8009: unsigned TRISB2 :1;
[; ;pic18f27j13.h: 8010: unsigned TRISB3 :1;
[; ;pic18f27j13.h: 8011: unsigned TRISB4 :1;
[; ;pic18f27j13.h: 8012: unsigned TRISB5 :1;
[; ;pic18f27j13.h: 8013: unsigned TRISB6 :1;
[; ;pic18f27j13.h: 8014: unsigned TRISB7 :1;
[; ;pic18f27j13.h: 8015: };
[; ;pic18f27j13.h: 8016: } TRISBbits_t;
[; ;pic18f27j13.h: 8017: extern volatile TRISBbits_t TRISBbits @ 0xF93;
[; ;pic18f27j13.h: 8061: extern volatile unsigned char TRISC @ 0xF94;
"8063
[; ;pic18f27j13.h: 8063: asm("TRISC equ 0F94h");
[; <" TRISC equ 0F94h ;# ">
[; ;pic18f27j13.h: 8066: typedef union {
[; ;pic18f27j13.h: 8067: struct {
[; ;pic18f27j13.h: 8068: unsigned TRISC0 :1;
[; ;pic18f27j13.h: 8069: unsigned TRISC1 :1;
[; ;pic18f27j13.h: 8070: unsigned TRISC2 :1;
[; ;pic18f27j13.h: 8071: unsigned TRISC3 :1;
[; ;pic18f27j13.h: 8072: unsigned TRISC4 :1;
[; ;pic18f27j13.h: 8073: unsigned TRISC5 :1;
[; ;pic18f27j13.h: 8074: unsigned TRISC6 :1;
[; ;pic18f27j13.h: 8075: unsigned TRISC7 :1;
[; ;pic18f27j13.h: 8076: };
[; ;pic18f27j13.h: 8077: } TRISCbits_t;
[; ;pic18f27j13.h: 8078: extern volatile TRISCbits_t TRISCbits @ 0xF94;
[; ;pic18f27j13.h: 8122: extern volatile unsigned char T3GCON @ 0xF97;
"8124
[; ;pic18f27j13.h: 8124: asm("T3GCON equ 0F97h");
[; <" T3GCON equ 0F97h ;# ">
[; ;pic18f27j13.h: 8127: typedef union {
[; ;pic18f27j13.h: 8128: struct {
[; ;pic18f27j13.h: 8129: unsigned T3GSS0 :1;
[; ;pic18f27j13.h: 8130: unsigned T3GSS1 :1;
[; ;pic18f27j13.h: 8131: unsigned T3GVAL :1;
[; ;pic18f27j13.h: 8132: unsigned T3GGO_T3DONE :1;
[; ;pic18f27j13.h: 8133: unsigned T3GSPM :1;
[; ;pic18f27j13.h: 8134: unsigned T3GTM :1;
[; ;pic18f27j13.h: 8135: unsigned T3GPOL :1;
[; ;pic18f27j13.h: 8136: unsigned TMR3GE :1;
[; ;pic18f27j13.h: 8137: };
[; ;pic18f27j13.h: 8138: struct {
[; ;pic18f27j13.h: 8139: unsigned :3;
[; ;pic18f27j13.h: 8140: unsigned T3GGO :1;
[; ;pic18f27j13.h: 8141: };
[; ;pic18f27j13.h: 8142: struct {
[; ;pic18f27j13.h: 8143: unsigned :3;
[; ;pic18f27j13.h: 8144: unsigned T3DONE :1;
[; ;pic18f27j13.h: 8145: };
[; ;pic18f27j13.h: 8146: } T3GCONbits_t;
[; ;pic18f27j13.h: 8147: extern volatile T3GCONbits_t T3GCONbits @ 0xF97;
[; ;pic18f27j13.h: 8201: extern volatile unsigned char PIR5 @ 0xF98;
"8203
[; ;pic18f27j13.h: 8203: asm("PIR5 equ 0F98h");
[; <" PIR5 equ 0F98h ;# ">
[; ;pic18f27j13.h: 8206: typedef union {
[; ;pic18f27j13.h: 8207: struct {
[; ;pic18f27j13.h: 8208: unsigned TMR1GIF :1;
[; ;pic18f27j13.h: 8209: unsigned TMR5GIF :1;
[; ;pic18f27j13.h: 8210: unsigned TMR5IF :1;
[; ;pic18f27j13.h: 8211: unsigned TMR6IF :1;
[; ;pic18f27j13.h: 8212: unsigned TMR8IF :1;
[; ;pic18f27j13.h: 8213: unsigned CM3IF :1;
[; ;pic18f27j13.h: 8214: };
[; ;pic18f27j13.h: 8215: } PIR5bits_t;
[; ;pic18f27j13.h: 8216: extern volatile PIR5bits_t PIR5bits @ 0xF98;
[; ;pic18f27j13.h: 8250: extern volatile unsigned char IPR5 @ 0xF99;
"8252
[; ;pic18f27j13.h: 8252: asm("IPR5 equ 0F99h");
[; <" IPR5 equ 0F99h ;# ">
[; ;pic18f27j13.h: 8255: typedef union {
[; ;pic18f27j13.h: 8256: struct {
[; ;pic18f27j13.h: 8257: unsigned TMR1GIP :1;
[; ;pic18f27j13.h: 8258: unsigned TMR5GIP :1;
[; ;pic18f27j13.h: 8259: unsigned TMR5IP :1;
[; ;pic18f27j13.h: 8260: unsigned TMR6IP :1;
[; ;pic18f27j13.h: 8261: unsigned TMR8IP :1;
[; ;pic18f27j13.h: 8262: unsigned CM3IP :1;
[; ;pic18f27j13.h: 8263: };
[; ;pic18f27j13.h: 8264: struct {
[; ;pic18f27j13.h: 8265: unsigned CCH05 :1;
[; ;pic18f27j13.h: 8266: };
[; ;pic18f27j13.h: 8267: struct {
[; ;pic18f27j13.h: 8268: unsigned :1;
[; ;pic18f27j13.h: 8269: unsigned CCH15 :1;
[; ;pic18f27j13.h: 8270: };
[; ;pic18f27j13.h: 8271: struct {
[; ;pic18f27j13.h: 8272: unsigned :3;
[; ;pic18f27j13.h: 8273: unsigned EVPOL05 :1;
[; ;pic18f27j13.h: 8274: };
[; ;pic18f27j13.h: 8275: struct {
[; ;pic18f27j13.h: 8276: unsigned :4;
[; ;pic18f27j13.h: 8277: unsigned EVPOL15 :1;
[; ;pic18f27j13.h: 8278: };
[; ;pic18f27j13.h: 8279: } IPR5bits_t;
[; ;pic18f27j13.h: 8280: extern volatile IPR5bits_t IPR5bits @ 0xF99;
[; ;pic18f27j13.h: 8334: extern volatile unsigned char T1GCON @ 0xF9A;
"8336
[; ;pic18f27j13.h: 8336: asm("T1GCON equ 0F9Ah");
[; <" T1GCON equ 0F9Ah ;# ">
[; ;pic18f27j13.h: 8339: typedef union {
[; ;pic18f27j13.h: 8340: struct {
[; ;pic18f27j13.h: 8341: unsigned :3;
[; ;pic18f27j13.h: 8342: unsigned T1GGO_NOT_T1DONE :1;
[; ;pic18f27j13.h: 8343: };
[; ;pic18f27j13.h: 8344: struct {
[; ;pic18f27j13.h: 8345: unsigned T1GSS0 :1;
[; ;pic18f27j13.h: 8346: unsigned T1GSS1 :1;
[; ;pic18f27j13.h: 8347: unsigned T1GVAL :1;
[; ;pic18f27j13.h: 8348: unsigned T1GGO_nT1DONE :1;
[; ;pic18f27j13.h: 8349: unsigned T1GSPM :1;
[; ;pic18f27j13.h: 8350: unsigned T1GTM :1;
[; ;pic18f27j13.h: 8351: unsigned T1GPOL :1;
[; ;pic18f27j13.h: 8352: unsigned TMR1GE :1;
[; ;pic18f27j13.h: 8353: };
[; ;pic18f27j13.h: 8354: struct {
[; ;pic18f27j13.h: 8355: unsigned :3;
[; ;pic18f27j13.h: 8356: unsigned T1GGO :1;
[; ;pic18f27j13.h: 8357: };
[; ;pic18f27j13.h: 8358: struct {
[; ;pic18f27j13.h: 8359: unsigned :3;
[; ;pic18f27j13.h: 8360: unsigned NOT_T1DONE :1;
[; ;pic18f27j13.h: 8361: };
[; ;pic18f27j13.h: 8362: struct {
[; ;pic18f27j13.h: 8363: unsigned :3;
[; ;pic18f27j13.h: 8364: unsigned nT1DONE :1;
[; ;pic18f27j13.h: 8365: };
[; ;pic18f27j13.h: 8366: struct {
[; ;pic18f27j13.h: 8367: unsigned :3;
[; ;pic18f27j13.h: 8368: unsigned T1DONE :1;
[; ;pic18f27j13.h: 8369: };
[; ;pic18f27j13.h: 8370: } T1GCONbits_t;
[; ;pic18f27j13.h: 8371: extern volatile T1GCONbits_t T1GCONbits @ 0xF9A;
[; ;pic18f27j13.h: 8440: extern volatile unsigned char OSCTUNE @ 0xF9B;
"8442
[; ;pic18f27j13.h: 8442: asm("OSCTUNE equ 0F9Bh");
[; <" OSCTUNE equ 0F9Bh ;# ">
[; ;pic18f27j13.h: 8445: typedef union {
[; ;pic18f27j13.h: 8446: struct {
[; ;pic18f27j13.h: 8447: unsigned TUN :6;
[; ;pic18f27j13.h: 8448: unsigned PLLEN :1;
[; ;pic18f27j13.h: 8449: unsigned INTSRC :1;
[; ;pic18f27j13.h: 8450: };
[; ;pic18f27j13.h: 8451: struct {
[; ;pic18f27j13.h: 8452: unsigned TUN0 :1;
[; ;pic18f27j13.h: 8453: unsigned TUN1 :1;
[; ;pic18f27j13.h: 8454: unsigned TUN2 :1;
[; ;pic18f27j13.h: 8455: unsigned TUN3 :1;
[; ;pic18f27j13.h: 8456: unsigned TUN4 :1;
[; ;pic18f27j13.h: 8457: unsigned TUN5 :1;
[; ;pic18f27j13.h: 8458: };
[; ;pic18f27j13.h: 8459: } OSCTUNEbits_t;
[; ;pic18f27j13.h: 8460: extern volatile OSCTUNEbits_t OSCTUNEbits @ 0xF9B;
[; ;pic18f27j13.h: 8509: extern volatile unsigned char RCSTA2 @ 0xF9C;
"8511
[; ;pic18f27j13.h: 8511: asm("RCSTA2 equ 0F9Ch");
[; <" RCSTA2 equ 0F9Ch ;# ">
[; ;pic18f27j13.h: 8514: typedef union {
[; ;pic18f27j13.h: 8515: struct {
[; ;pic18f27j13.h: 8516: unsigned RX9D :1;
[; ;pic18f27j13.h: 8517: unsigned OERR :1;
[; ;pic18f27j13.h: 8518: unsigned FERR :1;
[; ;pic18f27j13.h: 8519: unsigned ADDEN :1;
[; ;pic18f27j13.h: 8520: unsigned CREN :1;
[; ;pic18f27j13.h: 8521: unsigned SREN :1;
[; ;pic18f27j13.h: 8522: unsigned RX9 :1;
[; ;pic18f27j13.h: 8523: unsigned SPEN :1;
[; ;pic18f27j13.h: 8524: };
[; ;pic18f27j13.h: 8525: struct {
[; ;pic18f27j13.h: 8526: unsigned RX9D2 :1;
[; ;pic18f27j13.h: 8527: unsigned OERR2 :1;
[; ;pic18f27j13.h: 8528: unsigned FERR2 :1;
[; ;pic18f27j13.h: 8529: unsigned ADDEN2 :1;
[; ;pic18f27j13.h: 8530: unsigned CREN2 :1;
[; ;pic18f27j13.h: 8531: unsigned SREN2 :1;
[; ;pic18f27j13.h: 8532: unsigned RX92 :1;
[; ;pic18f27j13.h: 8533: unsigned SPEN2 :1;
[; ;pic18f27j13.h: 8534: };
[; ;pic18f27j13.h: 8535: struct {
[; ;pic18f27j13.h: 8536: unsigned :6;
[; ;pic18f27j13.h: 8537: unsigned RC8_92 :1;
[; ;pic18f27j13.h: 8538: };
[; ;pic18f27j13.h: 8539: struct {
[; ;pic18f27j13.h: 8540: unsigned :6;
[; ;pic18f27j13.h: 8541: unsigned RC92 :1;
[; ;pic18f27j13.h: 8542: };
[; ;pic18f27j13.h: 8543: struct {
[; ;pic18f27j13.h: 8544: unsigned RCD82 :1;
[; ;pic18f27j13.h: 8545: };
[; ;pic18f27j13.h: 8546: } RCSTA2bits_t;
[; ;pic18f27j13.h: 8547: extern volatile RCSTA2bits_t RCSTA2bits @ 0xF9C;
[; ;pic18f27j13.h: 8646: extern volatile unsigned char PIE1 @ 0xF9D;
"8648
[; ;pic18f27j13.h: 8648: asm("PIE1 equ 0F9Dh");
[; <" PIE1 equ 0F9Dh ;# ">
[; ;pic18f27j13.h: 8651: typedef union {
[; ;pic18f27j13.h: 8652: struct {
[; ;pic18f27j13.h: 8653: unsigned TMR1IE :1;
[; ;pic18f27j13.h: 8654: unsigned TMR2IE :1;
[; ;pic18f27j13.h: 8655: unsigned CCP1IE :1;
[; ;pic18f27j13.h: 8656: unsigned SSP1IE :1;
[; ;pic18f27j13.h: 8657: unsigned TX1IE :1;
[; ;pic18f27j13.h: 8658: unsigned RC1IE :1;
[; ;pic18f27j13.h: 8659: unsigned ADIE :1;
[; ;pic18f27j13.h: 8660: };
[; ;pic18f27j13.h: 8661: struct {
[; ;pic18f27j13.h: 8662: unsigned :3;
[; ;pic18f27j13.h: 8663: unsigned SSPIE :1;
[; ;pic18f27j13.h: 8664: unsigned TXIE :1;
[; ;pic18f27j13.h: 8665: unsigned RCIE :1;
[; ;pic18f27j13.h: 8666: };
[; ;pic18f27j13.h: 8667: } PIE1bits_t;
[; ;pic18f27j13.h: 8668: extern volatile PIE1bits_t PIE1bits @ 0xF9D;
[; ;pic18f27j13.h: 8722: extern volatile unsigned char PIR1 @ 0xF9E;
"8724
[; ;pic18f27j13.h: 8724: asm("PIR1 equ 0F9Eh");
[; <" PIR1 equ 0F9Eh ;# ">
[; ;pic18f27j13.h: 8727: typedef union {
[; ;pic18f27j13.h: 8728: struct {
[; ;pic18f27j13.h: 8729: unsigned TMR1IF :1;
[; ;pic18f27j13.h: 8730: unsigned TMR2IF :1;
[; ;pic18f27j13.h: 8731: unsigned CCP1IF :1;
[; ;pic18f27j13.h: 8732: unsigned SSP1IF :1;
[; ;pic18f27j13.h: 8733: unsigned TX1IF :1;
[; ;pic18f27j13.h: 8734: unsigned RC1IF :1;
[; ;pic18f27j13.h: 8735: unsigned ADIF :1;
[; ;pic18f27j13.h: 8736: };
[; ;pic18f27j13.h: 8737: struct {
[; ;pic18f27j13.h: 8738: unsigned :3;
[; ;pic18f27j13.h: 8739: unsigned SSPIF :1;
[; ;pic18f27j13.h: 8740: unsigned TXIF :1;
[; ;pic18f27j13.h: 8741: unsigned RCIF :1;
[; ;pic18f27j13.h: 8742: };
[; ;pic18f27j13.h: 8743: } PIR1bits_t;
[; ;pic18f27j13.h: 8744: extern volatile PIR1bits_t PIR1bits @ 0xF9E;
[; ;pic18f27j13.h: 8798: extern volatile unsigned char IPR1 @ 0xF9F;
"8800
[; ;pic18f27j13.h: 8800: asm("IPR1 equ 0F9Fh");
[; <" IPR1 equ 0F9Fh ;# ">
[; ;pic18f27j13.h: 8803: typedef union {
[; ;pic18f27j13.h: 8804: struct {
[; ;pic18f27j13.h: 8805: unsigned TMR1IP :1;
[; ;pic18f27j13.h: 8806: unsigned TMR2IP :1;
[; ;pic18f27j13.h: 8807: unsigned CCP1IP :1;
[; ;pic18f27j13.h: 8808: unsigned SSP1IP :1;
[; ;pic18f27j13.h: 8809: unsigned TX1IP :1;
[; ;pic18f27j13.h: 8810: unsigned RC1IP :1;
[; ;pic18f27j13.h: 8811: unsigned ADIP :1;
[; ;pic18f27j13.h: 8812: };
[; ;pic18f27j13.h: 8813: struct {
[; ;pic18f27j13.h: 8814: unsigned :3;
[; ;pic18f27j13.h: 8815: unsigned SSPIP :1;
[; ;pic18f27j13.h: 8816: unsigned TXIP :1;
[; ;pic18f27j13.h: 8817: unsigned RCIP :1;
[; ;pic18f27j13.h: 8818: };
[; ;pic18f27j13.h: 8819: } IPR1bits_t;
[; ;pic18f27j13.h: 8820: extern volatile IPR1bits_t IPR1bits @ 0xF9F;
[; ;pic18f27j13.h: 8874: extern volatile unsigned char PIE2 @ 0xFA0;
"8876
[; ;pic18f27j13.h: 8876: asm("PIE2 equ 0FA0h");
[; <" PIE2 equ 0FA0h ;# ">
[; ;pic18f27j13.h: 8879: typedef union {
[; ;pic18f27j13.h: 8880: struct {
[; ;pic18f27j13.h: 8881: unsigned CCP2IE :1;
[; ;pic18f27j13.h: 8882: unsigned TMR3IE :1;
[; ;pic18f27j13.h: 8883: unsigned LVDIE :1;
[; ;pic18f27j13.h: 8884: unsigned BCL1IE :1;
[; ;pic18f27j13.h: 8885: unsigned :1;
[; ;pic18f27j13.h: 8886: unsigned CM1IE :1;
[; ;pic18f27j13.h: 8887: unsigned CM2IE :1;
[; ;pic18f27j13.h: 8888: unsigned OSCFIE :1;
[; ;pic18f27j13.h: 8889: };
[; ;pic18f27j13.h: 8890: struct {
[; ;pic18f27j13.h: 8891: unsigned :2;
[; ;pic18f27j13.h: 8892: unsigned HLVDIE :1;
[; ;pic18f27j13.h: 8893: unsigned BCLIE :1;
[; ;pic18f27j13.h: 8894: };
[; ;pic18f27j13.h: 8895: struct {
[; ;pic18f27j13.h: 8896: unsigned :6;
[; ;pic18f27j13.h: 8897: unsigned CMIE :1;
[; ;pic18f27j13.h: 8898: };
[; ;pic18f27j13.h: 8899: } PIE2bits_t;
[; ;pic18f27j13.h: 8900: extern volatile PIE2bits_t PIE2bits @ 0xFA0;
[; ;pic18f27j13.h: 8954: extern volatile unsigned char PIR2 @ 0xFA1;
"8956
[; ;pic18f27j13.h: 8956: asm("PIR2 equ 0FA1h");
[; <" PIR2 equ 0FA1h ;# ">
[; ;pic18f27j13.h: 8959: typedef union {
[; ;pic18f27j13.h: 8960: struct {
[; ;pic18f27j13.h: 8961: unsigned CCP2IF :1;
[; ;pic18f27j13.h: 8962: unsigned TMR3IF :1;
[; ;pic18f27j13.h: 8963: unsigned LVDIF :1;
[; ;pic18f27j13.h: 8964: unsigned BCL1IF :1;
[; ;pic18f27j13.h: 8965: unsigned :1;
[; ;pic18f27j13.h: 8966: unsigned CM1IF :1;
[; ;pic18f27j13.h: 8967: unsigned CM2IF :1;
[; ;pic18f27j13.h: 8968: unsigned OSCFIF :1;
[; ;pic18f27j13.h: 8969: };
[; ;pic18f27j13.h: 8970: struct {
[; ;pic18f27j13.h: 8971: unsigned :2;
[; ;pic18f27j13.h: 8972: unsigned HLVDIF :1;
[; ;pic18f27j13.h: 8973: unsigned BCLIF :1;
[; ;pic18f27j13.h: 8974: };
[; ;pic18f27j13.h: 8975: struct {
[; ;pic18f27j13.h: 8976: unsigned :6;
[; ;pic18f27j13.h: 8977: unsigned CMIF :1;
[; ;pic18f27j13.h: 8978: };
[; ;pic18f27j13.h: 8979: } PIR2bits_t;
[; ;pic18f27j13.h: 8980: extern volatile PIR2bits_t PIR2bits @ 0xFA1;
[; ;pic18f27j13.h: 9034: extern volatile unsigned char IPR2 @ 0xFA2;
"9036
[; ;pic18f27j13.h: 9036: asm("IPR2 equ 0FA2h");
[; <" IPR2 equ 0FA2h ;# ">
[; ;pic18f27j13.h: 9039: typedef union {
[; ;pic18f27j13.h: 9040: struct {
[; ;pic18f27j13.h: 9041: unsigned CCP2IP :1;
[; ;pic18f27j13.h: 9042: unsigned TMR3IP :1;
[; ;pic18f27j13.h: 9043: unsigned LVDIP :1;
[; ;pic18f27j13.h: 9044: unsigned BCL1IP :1;
[; ;pic18f27j13.h: 9045: unsigned :1;
[; ;pic18f27j13.h: 9046: unsigned CM1IP :1;
[; ;pic18f27j13.h: 9047: unsigned CM2IP :1;
[; ;pic18f27j13.h: 9048: unsigned OSCFIP :1;
[; ;pic18f27j13.h: 9049: };
[; ;pic18f27j13.h: 9050: struct {
[; ;pic18f27j13.h: 9051: unsigned :2;
[; ;pic18f27j13.h: 9052: unsigned HLVDIP :1;
[; ;pic18f27j13.h: 9053: unsigned BCLIP :1;
[; ;pic18f27j13.h: 9054: };
[; ;pic18f27j13.h: 9055: struct {
[; ;pic18f27j13.h: 9056: unsigned :6;
[; ;pic18f27j13.h: 9057: unsigned CMIP :1;
[; ;pic18f27j13.h: 9058: };
[; ;pic18f27j13.h: 9059: } IPR2bits_t;
[; ;pic18f27j13.h: 9060: extern volatile IPR2bits_t IPR2bits @ 0xFA2;
[; ;pic18f27j13.h: 9114: extern volatile unsigned char PIE3 @ 0xFA3;
"9116
[; ;pic18f27j13.h: 9116: asm("PIE3 equ 0FA3h");
[; <" PIE3 equ 0FA3h ;# ">
[; ;pic18f27j13.h: 9119: typedef union {
[; ;pic18f27j13.h: 9120: struct {
[; ;pic18f27j13.h: 9121: unsigned RTCCIE :1;
[; ;pic18f27j13.h: 9122: unsigned TMR3GIE :1;
[; ;pic18f27j13.h: 9123: unsigned CTMUIE :1;
[; ;pic18f27j13.h: 9124: unsigned TMR4IE :1;
[; ;pic18f27j13.h: 9125: unsigned TX2IE :1;
[; ;pic18f27j13.h: 9126: unsigned RC2IE :1;
[; ;pic18f27j13.h: 9127: unsigned BCL2IE :1;
[; ;pic18f27j13.h: 9128: unsigned SSP2IE :1;
[; ;pic18f27j13.h: 9129: };
[; ;pic18f27j13.h: 9130: struct {
[; ;pic18f27j13.h: 9131: unsigned RXB0IE :1;
[; ;pic18f27j13.h: 9132: };
[; ;pic18f27j13.h: 9133: struct {
[; ;pic18f27j13.h: 9134: unsigned :1;
[; ;pic18f27j13.h: 9135: unsigned RXB1IE :1;
[; ;pic18f27j13.h: 9136: };
[; ;pic18f27j13.h: 9137: struct {
[; ;pic18f27j13.h: 9138: unsigned :1;
[; ;pic18f27j13.h: 9139: unsigned RXBNIE :1;
[; ;pic18f27j13.h: 9140: };
[; ;pic18f27j13.h: 9141: struct {
[; ;pic18f27j13.h: 9142: unsigned :2;
[; ;pic18f27j13.h: 9143: unsigned TXB0IE :1;
[; ;pic18f27j13.h: 9144: };
[; ;pic18f27j13.h: 9145: struct {
[; ;pic18f27j13.h: 9146: unsigned :3;
[; ;pic18f27j13.h: 9147: unsigned TXB1IE :1;
[; ;pic18f27j13.h: 9148: };
[; ;pic18f27j13.h: 9149: struct {
[; ;pic18f27j13.h: 9150: unsigned :4;
[; ;pic18f27j13.h: 9151: unsigned TXB2IE :1;
[; ;pic18f27j13.h: 9152: };
[; ;pic18f27j13.h: 9153: struct {
[; ;pic18f27j13.h: 9154: unsigned :4;
[; ;pic18f27j13.h: 9155: unsigned TXBNIE :1;
[; ;pic18f27j13.h: 9156: };
[; ;pic18f27j13.h: 9157: } PIE3bits_t;
[; ;pic18f27j13.h: 9158: extern volatile PIE3bits_t PIE3bits @ 0xFA3;
[; ;pic18f27j13.h: 9237: extern volatile unsigned char PIR3 @ 0xFA4;
"9239
[; ;pic18f27j13.h: 9239: asm("PIR3 equ 0FA4h");
[; <" PIR3 equ 0FA4h ;# ">
[; ;pic18f27j13.h: 9242: typedef union {
[; ;pic18f27j13.h: 9243: struct {
[; ;pic18f27j13.h: 9244: unsigned RTCCIF :1;
[; ;pic18f27j13.h: 9245: unsigned TMR3GIF :1;
[; ;pic18f27j13.h: 9246: unsigned CTMUIF :1;
[; ;pic18f27j13.h: 9247: unsigned TMR4IF :1;
[; ;pic18f27j13.h: 9248: unsigned TX2IF :1;
[; ;pic18f27j13.h: 9249: unsigned RC2IF :1;
[; ;pic18f27j13.h: 9250: unsigned BCL2IF :1;
[; ;pic18f27j13.h: 9251: unsigned SSP2IF :1;
[; ;pic18f27j13.h: 9252: };
[; ;pic18f27j13.h: 9253: struct {
[; ;pic18f27j13.h: 9254: unsigned :1;
[; ;pic18f27j13.h: 9255: unsigned RXBNIF :1;
[; ;pic18f27j13.h: 9256: };
[; ;pic18f27j13.h: 9257: struct {
[; ;pic18f27j13.h: 9258: unsigned :4;
[; ;pic18f27j13.h: 9259: unsigned TXBNIF :1;
[; ;pic18f27j13.h: 9260: };
[; ;pic18f27j13.h: 9261: } PIR3bits_t;
[; ;pic18f27j13.h: 9262: extern volatile PIR3bits_t PIR3bits @ 0xFA4;
[; ;pic18f27j13.h: 9316: extern volatile unsigned char IPR3 @ 0xFA5;
"9318
[; ;pic18f27j13.h: 9318: asm("IPR3 equ 0FA5h");
[; <" IPR3 equ 0FA5h ;# ">
[; ;pic18f27j13.h: 9321: typedef union {
[; ;pic18f27j13.h: 9322: struct {
[; ;pic18f27j13.h: 9323: unsigned RTCCIP :1;
[; ;pic18f27j13.h: 9324: unsigned TMR3GIP :1;
[; ;pic18f27j13.h: 9325: unsigned CTMUIP :1;
[; ;pic18f27j13.h: 9326: unsigned TMR4IP :1;
[; ;pic18f27j13.h: 9327: unsigned TX2IP :1;
[; ;pic18f27j13.h: 9328: unsigned RC2IP :1;
[; ;pic18f27j13.h: 9329: unsigned BCL2IP :1;
[; ;pic18f27j13.h: 9330: unsigned SSP2IP :1;
[; ;pic18f27j13.h: 9331: };
[; ;pic18f27j13.h: 9332: struct {
[; ;pic18f27j13.h: 9333: unsigned :1;
[; ;pic18f27j13.h: 9334: unsigned RXBNIP :1;
[; ;pic18f27j13.h: 9335: };
[; ;pic18f27j13.h: 9336: struct {
[; ;pic18f27j13.h: 9337: unsigned :4;
[; ;pic18f27j13.h: 9338: unsigned TXBNIP :1;
[; ;pic18f27j13.h: 9339: };
[; ;pic18f27j13.h: 9340: } IPR3bits_t;
[; ;pic18f27j13.h: 9341: extern volatile IPR3bits_t IPR3bits @ 0xFA5;
[; ;pic18f27j13.h: 9395: extern volatile unsigned char EECON1 @ 0xFA6;
"9397
[; ;pic18f27j13.h: 9397: asm("EECON1 equ 0FA6h");
[; <" EECON1 equ 0FA6h ;# ">
[; ;pic18f27j13.h: 9400: typedef union {
[; ;pic18f27j13.h: 9401: struct {
[; ;pic18f27j13.h: 9402: unsigned :1;
[; ;pic18f27j13.h: 9403: unsigned WR :1;
[; ;pic18f27j13.h: 9404: unsigned WREN :1;
[; ;pic18f27j13.h: 9405: unsigned WRERR :1;
[; ;pic18f27j13.h: 9406: unsigned FREE :1;
[; ;pic18f27j13.h: 9407: unsigned WPROG :1;
[; ;pic18f27j13.h: 9408: };
[; ;pic18f27j13.h: 9409: } EECON1bits_t;
[; ;pic18f27j13.h: 9410: extern volatile EECON1bits_t EECON1bits @ 0xFA6;
[; ;pic18f27j13.h: 9439: extern volatile unsigned char EECON2 @ 0xFA7;
"9441
[; ;pic18f27j13.h: 9441: asm("EECON2 equ 0FA7h");
[; <" EECON2 equ 0FA7h ;# ">
[; ;pic18f27j13.h: 9444: typedef union {
[; ;pic18f27j13.h: 9445: struct {
[; ;pic18f27j13.h: 9446: unsigned EECON2 :8;
[; ;pic18f27j13.h: 9447: };
[; ;pic18f27j13.h: 9448: } EECON2bits_t;
[; ;pic18f27j13.h: 9449: extern volatile EECON2bits_t EECON2bits @ 0xFA7;
[; ;pic18f27j13.h: 9458: extern volatile unsigned char TXSTA2 @ 0xFA8;
"9460
[; ;pic18f27j13.h: 9460: asm("TXSTA2 equ 0FA8h");
[; <" TXSTA2 equ 0FA8h ;# ">
[; ;pic18f27j13.h: 9463: typedef union {
[; ;pic18f27j13.h: 9464: struct {
[; ;pic18f27j13.h: 9465: unsigned TX9D :1;
[; ;pic18f27j13.h: 9466: unsigned TRMT :1;
[; ;pic18f27j13.h: 9467: unsigned BRGH :1;
[; ;pic18f27j13.h: 9468: unsigned SENDB :1;
[; ;pic18f27j13.h: 9469: unsigned SYNC :1;
[; ;pic18f27j13.h: 9470: unsigned TXEN :1;
[; ;pic18f27j13.h: 9471: unsigned TX9 :1;
[; ;pic18f27j13.h: 9472: unsigned CSRC :1;
[; ;pic18f27j13.h: 9473: };
[; ;pic18f27j13.h: 9474: struct {
[; ;pic18f27j13.h: 9475: unsigned TX9D2 :1;
[; ;pic18f27j13.h: 9476: unsigned TRMT2 :1;
[; ;pic18f27j13.h: 9477: unsigned BRGH2 :1;
[; ;pic18f27j13.h: 9478: unsigned SENDB2 :1;
[; ;pic18f27j13.h: 9479: unsigned SYNC2 :1;
[; ;pic18f27j13.h: 9480: unsigned TXEN2 :1;
[; ;pic18f27j13.h: 9481: unsigned TX92 :1;
[; ;pic18f27j13.h: 9482: unsigned CSRC2 :1;
[; ;pic18f27j13.h: 9483: };
[; ;pic18f27j13.h: 9484: struct {
[; ;pic18f27j13.h: 9485: unsigned :6;
[; ;pic18f27j13.h: 9486: unsigned TX8_92 :1;
[; ;pic18f27j13.h: 9487: };
[; ;pic18f27j13.h: 9488: struct {
[; ;pic18f27j13.h: 9489: unsigned TXD82 :1;
[; ;pic18f27j13.h: 9490: };
[; ;pic18f27j13.h: 9491: } TXSTA2bits_t;
[; ;pic18f27j13.h: 9492: extern volatile TXSTA2bits_t TXSTA2bits @ 0xFA8;
[; ;pic18f27j13.h: 9586: extern volatile unsigned char TXREG2 @ 0xFA9;
"9588
[; ;pic18f27j13.h: 9588: asm("TXREG2 equ 0FA9h");
[; <" TXREG2 equ 0FA9h ;# ">
[; ;pic18f27j13.h: 9591: typedef union {
[; ;pic18f27j13.h: 9592: struct {
[; ;pic18f27j13.h: 9593: unsigned TXREG2 :8;
[; ;pic18f27j13.h: 9594: };
[; ;pic18f27j13.h: 9595: } TXREG2bits_t;
[; ;pic18f27j13.h: 9596: extern volatile TXREG2bits_t TXREG2bits @ 0xFA9;
[; ;pic18f27j13.h: 9605: extern volatile unsigned char RCREG2 @ 0xFAA;
"9607
[; ;pic18f27j13.h: 9607: asm("RCREG2 equ 0FAAh");
[; <" RCREG2 equ 0FAAh ;# ">
[; ;pic18f27j13.h: 9610: typedef union {
[; ;pic18f27j13.h: 9611: struct {
[; ;pic18f27j13.h: 9612: unsigned RCREG2 :8;
[; ;pic18f27j13.h: 9613: };
[; ;pic18f27j13.h: 9614: } RCREG2bits_t;
[; ;pic18f27j13.h: 9615: extern volatile RCREG2bits_t RCREG2bits @ 0xFAA;
[; ;pic18f27j13.h: 9624: extern volatile unsigned char SPBRG2 @ 0xFAB;
"9626
[; ;pic18f27j13.h: 9626: asm("SPBRG2 equ 0FABh");
[; <" SPBRG2 equ 0FABh ;# ">
[; ;pic18f27j13.h: 9629: typedef union {
[; ;pic18f27j13.h: 9630: struct {
[; ;pic18f27j13.h: 9631: unsigned SPBRG2 :8;
[; ;pic18f27j13.h: 9632: };
[; ;pic18f27j13.h: 9633: } SPBRG2bits_t;
[; ;pic18f27j13.h: 9634: extern volatile SPBRG2bits_t SPBRG2bits @ 0xFAB;
[; ;pic18f27j13.h: 9643: extern volatile unsigned char RCSTA1 @ 0xFAC;
"9645
[; ;pic18f27j13.h: 9645: asm("RCSTA1 equ 0FACh");
[; <" RCSTA1 equ 0FACh ;# ">
[; ;pic18f27j13.h: 9648: extern volatile unsigned char RCSTA @ 0xFAC;
"9650
[; ;pic18f27j13.h: 9650: asm("RCSTA equ 0FACh");
[; <" RCSTA equ 0FACh ;# ">
[; ;pic18f27j13.h: 9653: typedef union {
[; ;pic18f27j13.h: 9654: struct {
[; ;pic18f27j13.h: 9655: unsigned RX9D :1;
[; ;pic18f27j13.h: 9656: unsigned OERR :1;
[; ;pic18f27j13.h: 9657: unsigned FERR :1;
[; ;pic18f27j13.h: 9658: unsigned ADDEN :1;
[; ;pic18f27j13.h: 9659: unsigned CREN :1;
[; ;pic18f27j13.h: 9660: unsigned SREN :1;
[; ;pic18f27j13.h: 9661: unsigned RX9 :1;
[; ;pic18f27j13.h: 9662: unsigned SPEN :1;
[; ;pic18f27j13.h: 9663: };
[; ;pic18f27j13.h: 9664: struct {
[; ;pic18f27j13.h: 9665: unsigned RCD8 :1;
[; ;pic18f27j13.h: 9666: unsigned :2;
[; ;pic18f27j13.h: 9667: unsigned ADEN :1;
[; ;pic18f27j13.h: 9668: unsigned :2;
[; ;pic18f27j13.h: 9669: unsigned RC9 :1;
[; ;pic18f27j13.h: 9670: };
[; ;pic18f27j13.h: 9671: struct {
[; ;pic18f27j13.h: 9672: unsigned :6;
[; ;pic18f27j13.h: 9673: unsigned NOT_RC8 :1;
[; ;pic18f27j13.h: 9674: };
[; ;pic18f27j13.h: 9675: struct {
[; ;pic18f27j13.h: 9676: unsigned :6;
[; ;pic18f27j13.h: 9677: unsigned nRC8 :1;
[; ;pic18f27j13.h: 9678: };
[; ;pic18f27j13.h: 9679: struct {
[; ;pic18f27j13.h: 9680: unsigned :6;
[; ;pic18f27j13.h: 9681: unsigned RC8_9 :1;
[; ;pic18f27j13.h: 9682: };
[; ;pic18f27j13.h: 9683: struct {
[; ;pic18f27j13.h: 9684: unsigned RX9D1 :1;
[; ;pic18f27j13.h: 9685: unsigned OERR1 :1;
[; ;pic18f27j13.h: 9686: unsigned FERR1 :1;
[; ;pic18f27j13.h: 9687: unsigned ADDEN1 :1;
[; ;pic18f27j13.h: 9688: unsigned CREN1 :1;
[; ;pic18f27j13.h: 9689: unsigned SREN1 :1;
[; ;pic18f27j13.h: 9690: unsigned RX91 :1;
[; ;pic18f27j13.h: 9691: unsigned SPEN1 :1;
[; ;pic18f27j13.h: 9692: };
[; ;pic18f27j13.h: 9693: struct {
[; ;pic18f27j13.h: 9694: unsigned :5;
[; ;pic18f27j13.h: 9695: unsigned SRENA :1;
[; ;pic18f27j13.h: 9696: };
[; ;pic18f27j13.h: 9697: } RCSTA1bits_t;
[; ;pic18f27j13.h: 9698: extern volatile RCSTA1bits_t RCSTA1bits @ 0xFAC;
[; ;pic18f27j13.h: 9816: typedef union {
[; ;pic18f27j13.h: 9817: struct {
[; ;pic18f27j13.h: 9818: unsigned RX9D :1;
[; ;pic18f27j13.h: 9819: unsigned OERR :1;
[; ;pic18f27j13.h: 9820: unsigned FERR :1;
[; ;pic18f27j13.h: 9821: unsigned ADDEN :1;
[; ;pic18f27j13.h: 9822: unsigned CREN :1;
[; ;pic18f27j13.h: 9823: unsigned SREN :1;
[; ;pic18f27j13.h: 9824: unsigned RX9 :1;
[; ;pic18f27j13.h: 9825: unsigned SPEN :1;
[; ;pic18f27j13.h: 9826: };
[; ;pic18f27j13.h: 9827: struct {
[; ;pic18f27j13.h: 9828: unsigned RCD8 :1;
[; ;pic18f27j13.h: 9829: unsigned :2;
[; ;pic18f27j13.h: 9830: unsigned ADEN :1;
[; ;pic18f27j13.h: 9831: unsigned :2;
[; ;pic18f27j13.h: 9832: unsigned RC9 :1;
[; ;pic18f27j13.h: 9833: };
[; ;pic18f27j13.h: 9834: struct {
[; ;pic18f27j13.h: 9835: unsigned :6;
[; ;pic18f27j13.h: 9836: unsigned NOT_RC8 :1;
[; ;pic18f27j13.h: 9837: };
[; ;pic18f27j13.h: 9838: struct {
[; ;pic18f27j13.h: 9839: unsigned :6;
[; ;pic18f27j13.h: 9840: unsigned nRC8 :1;
[; ;pic18f27j13.h: 9841: };
[; ;pic18f27j13.h: 9842: struct {
[; ;pic18f27j13.h: 9843: unsigned :6;
[; ;pic18f27j13.h: 9844: unsigned RC8_9 :1;
[; ;pic18f27j13.h: 9845: };
[; ;pic18f27j13.h: 9846: struct {
[; ;pic18f27j13.h: 9847: unsigned RX9D1 :1;
[; ;pic18f27j13.h: 9848: unsigned OERR1 :1;
[; ;pic18f27j13.h: 9849: unsigned FERR1 :1;
[; ;pic18f27j13.h: 9850: unsigned ADDEN1 :1;
[; ;pic18f27j13.h: 9851: unsigned CREN1 :1;
[; ;pic18f27j13.h: 9852: unsigned SREN1 :1;
[; ;pic18f27j13.h: 9853: unsigned RX91 :1;
[; ;pic18f27j13.h: 9854: unsigned SPEN1 :1;
[; ;pic18f27j13.h: 9855: };
[; ;pic18f27j13.h: 9856: struct {
[; ;pic18f27j13.h: 9857: unsigned :5;
[; ;pic18f27j13.h: 9858: unsigned SRENA :1;
[; ;pic18f27j13.h: 9859: };
[; ;pic18f27j13.h: 9860: } RCSTAbits_t;
[; ;pic18f27j13.h: 9861: extern volatile RCSTAbits_t RCSTAbits @ 0xFAC;
[; ;pic18f27j13.h: 9980: extern volatile unsigned char TXSTA1 @ 0xFAD;
"9982
[; ;pic18f27j13.h: 9982: asm("TXSTA1 equ 0FADh");
[; <" TXSTA1 equ 0FADh ;# ">
[; ;pic18f27j13.h: 9985: extern volatile unsigned char TXSTA @ 0xFAD;
"9987
[; ;pic18f27j13.h: 9987: asm("TXSTA equ 0FADh");
[; <" TXSTA equ 0FADh ;# ">
[; ;pic18f27j13.h: 9990: typedef union {
[; ;pic18f27j13.h: 9991: struct {
[; ;pic18f27j13.h: 9992: unsigned TX9D :1;
[; ;pic18f27j13.h: 9993: unsigned TRMT :1;
[; ;pic18f27j13.h: 9994: unsigned BRGH :1;
[; ;pic18f27j13.h: 9995: unsigned SENDB :1;
[; ;pic18f27j13.h: 9996: unsigned SYNC :1;
[; ;pic18f27j13.h: 9997: unsigned TXEN :1;
[; ;pic18f27j13.h: 9998: unsigned TX9 :1;
[; ;pic18f27j13.h: 9999: unsigned CSRC :1;
[; ;pic18f27j13.h: 10000: };
[; ;pic18f27j13.h: 10001: struct {
[; ;pic18f27j13.h: 10002: unsigned TXD8 :1;
[; ;pic18f27j13.h: 10003: unsigned :5;
[; ;pic18f27j13.h: 10004: unsigned TX8_9 :1;
[; ;pic18f27j13.h: 10005: };
[; ;pic18f27j13.h: 10006: struct {
[; ;pic18f27j13.h: 10007: unsigned :6;
[; ;pic18f27j13.h: 10008: unsigned NOT_TX8 :1;
[; ;pic18f27j13.h: 10009: };
[; ;pic18f27j13.h: 10010: struct {
[; ;pic18f27j13.h: 10011: unsigned :6;
[; ;pic18f27j13.h: 10012: unsigned nTX8 :1;
[; ;pic18f27j13.h: 10013: };
[; ;pic18f27j13.h: 10014: struct {
[; ;pic18f27j13.h: 10015: unsigned TX9D1 :1;
[; ;pic18f27j13.h: 10016: unsigned TRMT1 :1;
[; ;pic18f27j13.h: 10017: unsigned BRGH1 :1;
[; ;pic18f27j13.h: 10018: unsigned SENDB1 :1;
[; ;pic18f27j13.h: 10019: unsigned SYNC1 :1;
[; ;pic18f27j13.h: 10020: unsigned TXEN1 :1;
[; ;pic18f27j13.h: 10021: unsigned TX91 :1;
[; ;pic18f27j13.h: 10022: unsigned CSRC1 :1;
[; ;pic18f27j13.h: 10023: };
[; ;pic18f27j13.h: 10024: } TXSTA1bits_t;
[; ;pic18f27j13.h: 10025: extern volatile TXSTA1bits_t TXSTA1bits @ 0xFAD;
[; ;pic18f27j13.h: 10128: typedef union {
[; ;pic18f27j13.h: 10129: struct {
[; ;pic18f27j13.h: 10130: unsigned TX9D :1;
[; ;pic18f27j13.h: 10131: unsigned TRMT :1;
[; ;pic18f27j13.h: 10132: unsigned BRGH :1;
[; ;pic18f27j13.h: 10133: unsigned SENDB :1;
[; ;pic18f27j13.h: 10134: unsigned SYNC :1;
[; ;pic18f27j13.h: 10135: unsigned TXEN :1;
[; ;pic18f27j13.h: 10136: unsigned TX9 :1;
[; ;pic18f27j13.h: 10137: unsigned CSRC :1;
[; ;pic18f27j13.h: 10138: };
[; ;pic18f27j13.h: 10139: struct {
[; ;pic18f27j13.h: 10140: unsigned TXD8 :1;
[; ;pic18f27j13.h: 10141: unsigned :5;
[; ;pic18f27j13.h: 10142: unsigned TX8_9 :1;
[; ;pic18f27j13.h: 10143: };
[; ;pic18f27j13.h: 10144: struct {
[; ;pic18f27j13.h: 10145: unsigned :6;
[; ;pic18f27j13.h: 10146: unsigned NOT_TX8 :1;
[; ;pic18f27j13.h: 10147: };
[; ;pic18f27j13.h: 10148: struct {
[; ;pic18f27j13.h: 10149: unsigned :6;
[; ;pic18f27j13.h: 10150: unsigned nTX8 :1;
[; ;pic18f27j13.h: 10151: };
[; ;pic18f27j13.h: 10152: struct {
[; ;pic18f27j13.h: 10153: unsigned TX9D1 :1;
[; ;pic18f27j13.h: 10154: unsigned TRMT1 :1;
[; ;pic18f27j13.h: 10155: unsigned BRGH1 :1;
[; ;pic18f27j13.h: 10156: unsigned SENDB1 :1;
[; ;pic18f27j13.h: 10157: unsigned SYNC1 :1;
[; ;pic18f27j13.h: 10158: unsigned TXEN1 :1;
[; ;pic18f27j13.h: 10159: unsigned TX91 :1;
[; ;pic18f27j13.h: 10160: unsigned CSRC1 :1;
[; ;pic18f27j13.h: 10161: };
[; ;pic18f27j13.h: 10162: } TXSTAbits_t;
[; ;pic18f27j13.h: 10163: extern volatile TXSTAbits_t TXSTAbits @ 0xFAD;
[; ;pic18f27j13.h: 10267: extern volatile unsigned char TXREG1 @ 0xFAE;
"10269
[; ;pic18f27j13.h: 10269: asm("TXREG1 equ 0FAEh");
[; <" TXREG1 equ 0FAEh ;# ">
[; ;pic18f27j13.h: 10272: extern volatile unsigned char TXREG @ 0xFAE;
"10274
[; ;pic18f27j13.h: 10274: asm("TXREG equ 0FAEh");
[; <" TXREG equ 0FAEh ;# ">
[; ;pic18f27j13.h: 10277: typedef union {
[; ;pic18f27j13.h: 10278: struct {
[; ;pic18f27j13.h: 10279: unsigned TXREG1 :8;
[; ;pic18f27j13.h: 10280: };
[; ;pic18f27j13.h: 10281: } TXREG1bits_t;
[; ;pic18f27j13.h: 10282: extern volatile TXREG1bits_t TXREG1bits @ 0xFAE;
[; ;pic18f27j13.h: 10290: typedef union {
[; ;pic18f27j13.h: 10291: struct {
[; ;pic18f27j13.h: 10292: unsigned TXREG1 :8;
[; ;pic18f27j13.h: 10293: };
[; ;pic18f27j13.h: 10294: } TXREGbits_t;
[; ;pic18f27j13.h: 10295: extern volatile TXREGbits_t TXREGbits @ 0xFAE;
[; ;pic18f27j13.h: 10304: extern volatile unsigned char RCREG1 @ 0xFAF;
"10306
[; ;pic18f27j13.h: 10306: asm("RCREG1 equ 0FAFh");
[; <" RCREG1 equ 0FAFh ;# ">
[; ;pic18f27j13.h: 10309: extern volatile unsigned char RCREG @ 0xFAF;
"10311
[; ;pic18f27j13.h: 10311: asm("RCREG equ 0FAFh");
[; <" RCREG equ 0FAFh ;# ">
[; ;pic18f27j13.h: 10314: typedef union {
[; ;pic18f27j13.h: 10315: struct {
[; ;pic18f27j13.h: 10316: unsigned RCREG1 :8;
[; ;pic18f27j13.h: 10317: };
[; ;pic18f27j13.h: 10318: } RCREG1bits_t;
[; ;pic18f27j13.h: 10319: extern volatile RCREG1bits_t RCREG1bits @ 0xFAF;
[; ;pic18f27j13.h: 10327: typedef union {
[; ;pic18f27j13.h: 10328: struct {
[; ;pic18f27j13.h: 10329: unsigned RCREG1 :8;
[; ;pic18f27j13.h: 10330: };
[; ;pic18f27j13.h: 10331: } RCREGbits_t;
[; ;pic18f27j13.h: 10332: extern volatile RCREGbits_t RCREGbits @ 0xFAF;
[; ;pic18f27j13.h: 10341: extern volatile unsigned char SPBRG1 @ 0xFB0;
"10343
[; ;pic18f27j13.h: 10343: asm("SPBRG1 equ 0FB0h");
[; <" SPBRG1 equ 0FB0h ;# ">
[; ;pic18f27j13.h: 10346: extern volatile unsigned char SPBRG @ 0xFB0;
"10348
[; ;pic18f27j13.h: 10348: asm("SPBRG equ 0FB0h");
[; <" SPBRG equ 0FB0h ;# ">
[; ;pic18f27j13.h: 10351: typedef union {
[; ;pic18f27j13.h: 10352: struct {
[; ;pic18f27j13.h: 10353: unsigned SPBRG1 :8;
[; ;pic18f27j13.h: 10354: };
[; ;pic18f27j13.h: 10355: } SPBRG1bits_t;
[; ;pic18f27j13.h: 10356: extern volatile SPBRG1bits_t SPBRG1bits @ 0xFB0;
[; ;pic18f27j13.h: 10364: typedef union {
[; ;pic18f27j13.h: 10365: struct {
[; ;pic18f27j13.h: 10366: unsigned SPBRG1 :8;
[; ;pic18f27j13.h: 10367: };
[; ;pic18f27j13.h: 10368: } SPBRGbits_t;
[; ;pic18f27j13.h: 10369: extern volatile SPBRGbits_t SPBRGbits @ 0xFB0;
[; ;pic18f27j13.h: 10378: extern volatile unsigned char CTMUICON @ 0xFB1;
"10380
[; ;pic18f27j13.h: 10380: asm("CTMUICON equ 0FB1h");
[; <" CTMUICON equ 0FB1h ;# ">
[; ;pic18f27j13.h: 10383: typedef union {
[; ;pic18f27j13.h: 10384: struct {
[; ;pic18f27j13.h: 10385: unsigned IRNG :2;
[; ;pic18f27j13.h: 10386: unsigned ITRIM :6;
[; ;pic18f27j13.h: 10387: };
[; ;pic18f27j13.h: 10388: struct {
[; ;pic18f27j13.h: 10389: unsigned IRNG0 :1;
[; ;pic18f27j13.h: 10390: unsigned IRNG1 :1;
[; ;pic18f27j13.h: 10391: unsigned ITRIM0 :1;
[; ;pic18f27j13.h: 10392: unsigned ITRIM1 :1;
[; ;pic18f27j13.h: 10393: unsigned ITRIM2 :1;
[; ;pic18f27j13.h: 10394: unsigned ITRIM3 :1;
[; ;pic18f27j13.h: 10395: unsigned ITRIM4 :1;
[; ;pic18f27j13.h: 10396: unsigned ITRIM5 :1;
[; ;pic18f27j13.h: 10397: };
[; ;pic18f27j13.h: 10398: } CTMUICONbits_t;
[; ;pic18f27j13.h: 10399: extern volatile CTMUICONbits_t CTMUICONbits @ 0xFB1;
[; ;pic18f27j13.h: 10453: extern volatile unsigned char CTMUCONL @ 0xFB2;
"10455
[; ;pic18f27j13.h: 10455: asm("CTMUCONL equ 0FB2h");
[; <" CTMUCONL equ 0FB2h ;# ">
[; ;pic18f27j13.h: 10458: typedef union {
[; ;pic18f27j13.h: 10459: struct {
[; ;pic18f27j13.h: 10460: unsigned EDG1STAT :1;
[; ;pic18f27j13.h: 10461: unsigned EDG2STAT :1;
[; ;pic18f27j13.h: 10462: unsigned EDG1SEL0 :1;
[; ;pic18f27j13.h: 10463: unsigned EDG1SEL1 :1;
[; ;pic18f27j13.h: 10464: unsigned EDG1POL :1;
[; ;pic18f27j13.h: 10465: unsigned EDG2SEL0 :1;
[; ;pic18f27j13.h: 10466: unsigned EDG2SEL1 :1;
[; ;pic18f27j13.h: 10467: unsigned EDG2POL :1;
[; ;pic18f27j13.h: 10468: };
[; ;pic18f27j13.h: 10469: } CTMUCONLbits_t;
[; ;pic18f27j13.h: 10470: extern volatile CTMUCONLbits_t CTMUCONLbits @ 0xFB2;
[; ;pic18f27j13.h: 10514: extern volatile unsigned char CTMUCONH @ 0xFB3;
"10516
[; ;pic18f27j13.h: 10516: asm("CTMUCONH equ 0FB3h");
[; <" CTMUCONH equ 0FB3h ;# ">
[; ;pic18f27j13.h: 10519: typedef union {
[; ;pic18f27j13.h: 10520: struct {
[; ;pic18f27j13.h: 10521: unsigned CTTRIG :1;
[; ;pic18f27j13.h: 10522: unsigned IDISSEN :1;
[; ;pic18f27j13.h: 10523: unsigned EDGSEQEN :1;
[; ;pic18f27j13.h: 10524: unsigned EDGEN :1;
[; ;pic18f27j13.h: 10525: unsigned TGEN :1;
[; ;pic18f27j13.h: 10526: unsigned CTMUSIDL :1;
[; ;pic18f27j13.h: 10527: unsigned :1;
[; ;pic18f27j13.h: 10528: unsigned CTMUEN :1;
[; ;pic18f27j13.h: 10529: };
[; ;pic18f27j13.h: 10530: } CTMUCONHbits_t;
[; ;pic18f27j13.h: 10531: extern volatile CTMUCONHbits_t CTMUCONHbits @ 0xFB3;
[; ;pic18f27j13.h: 10570: extern volatile unsigned char CCP2CON @ 0xFB4;
"10572
[; ;pic18f27j13.h: 10572: asm("CCP2CON equ 0FB4h");
[; <" CCP2CON equ 0FB4h ;# ">
[; ;pic18f27j13.h: 10575: extern volatile unsigned char ECCP2CON @ 0xFB4;
"10577
[; ;pic18f27j13.h: 10577: asm("ECCP2CON equ 0FB4h");
[; <" ECCP2CON equ 0FB4h ;# ">
[; ;pic18f27j13.h: 10580: typedef union {
[; ;pic18f27j13.h: 10581: struct {
[; ;pic18f27j13.h: 10582: unsigned CCP2M :4;
[; ;pic18f27j13.h: 10583: unsigned DC2B :2;
[; ;pic18f27j13.h: 10584: unsigned P2M :2;
[; ;pic18f27j13.h: 10585: };
[; ;pic18f27j13.h: 10586: struct {
[; ;pic18f27j13.h: 10587: unsigned CCP2M0 :1;
[; ;pic18f27j13.h: 10588: unsigned CCP2M1 :1;
[; ;pic18f27j13.h: 10589: unsigned CCP2M2 :1;
[; ;pic18f27j13.h: 10590: unsigned CCP2M3 :1;
[; ;pic18f27j13.h: 10591: unsigned DC2B0 :1;
[; ;pic18f27j13.h: 10592: unsigned DC2B1 :1;
[; ;pic18f27j13.h: 10593: unsigned P2M0 :1;
[; ;pic18f27j13.h: 10594: unsigned P2M1 :1;
[; ;pic18f27j13.h: 10595: };
[; ;pic18f27j13.h: 10596: struct {
[; ;pic18f27j13.h: 10597: unsigned :4;
[; ;pic18f27j13.h: 10598: unsigned CCP2Y :1;
[; ;pic18f27j13.h: 10599: unsigned CCP2X :1;
[; ;pic18f27j13.h: 10600: };
[; ;pic18f27j13.h: 10601: } CCP2CONbits_t;
[; ;pic18f27j13.h: 10602: extern volatile CCP2CONbits_t CCP2CONbits @ 0xFB4;
[; ;pic18f27j13.h: 10670: typedef union {
[; ;pic18f27j13.h: 10671: struct {
[; ;pic18f27j13.h: 10672: unsigned CCP2M :4;
[; ;pic18f27j13.h: 10673: unsigned DC2B :2;
[; ;pic18f27j13.h: 10674: unsigned P2M :2;
[; ;pic18f27j13.h: 10675: };
[; ;pic18f27j13.h: 10676: struct {
[; ;pic18f27j13.h: 10677: unsigned CCP2M0 :1;
[; ;pic18f27j13.h: 10678: unsigned CCP2M1 :1;
[; ;pic18f27j13.h: 10679: unsigned CCP2M2 :1;
[; ;pic18f27j13.h: 10680: unsigned CCP2M3 :1;
[; ;pic18f27j13.h: 10681: unsigned DC2B0 :1;
[; ;pic18f27j13.h: 10682: unsigned DC2B1 :1;
[; ;pic18f27j13.h: 10683: unsigned P2M0 :1;
[; ;pic18f27j13.h: 10684: unsigned P2M1 :1;
[; ;pic18f27j13.h: 10685: };
[; ;pic18f27j13.h: 10686: struct {
[; ;pic18f27j13.h: 10687: unsigned :4;
[; ;pic18f27j13.h: 10688: unsigned CCP2Y :1;
[; ;pic18f27j13.h: 10689: unsigned CCP2X :1;
[; ;pic18f27j13.h: 10690: };
[; ;pic18f27j13.h: 10691: } ECCP2CONbits_t;
[; ;pic18f27j13.h: 10692: extern volatile ECCP2CONbits_t ECCP2CONbits @ 0xFB4;
[; ;pic18f27j13.h: 10761: extern volatile unsigned short CCPR2 @ 0xFB5;
"10763
[; ;pic18f27j13.h: 10763: asm("CCPR2 equ 0FB5h");
[; <" CCPR2 equ 0FB5h ;# ">
[; ;pic18f27j13.h: 10767: extern volatile unsigned char CCPR2L @ 0xFB5;
"10769
[; ;pic18f27j13.h: 10769: asm("CCPR2L equ 0FB5h");
[; <" CCPR2L equ 0FB5h ;# ">
[; ;pic18f27j13.h: 10772: typedef union {
[; ;pic18f27j13.h: 10773: struct {
[; ;pic18f27j13.h: 10774: unsigned CCPR2L :8;
[; ;pic18f27j13.h: 10775: };
[; ;pic18f27j13.h: 10776: } CCPR2Lbits_t;
[; ;pic18f27j13.h: 10777: extern volatile CCPR2Lbits_t CCPR2Lbits @ 0xFB5;
[; ;pic18f27j13.h: 10786: extern volatile unsigned char CCPR2H @ 0xFB6;
"10788
[; ;pic18f27j13.h: 10788: asm("CCPR2H equ 0FB6h");
[; <" CCPR2H equ 0FB6h ;# ">
[; ;pic18f27j13.h: 10791: typedef union {
[; ;pic18f27j13.h: 10792: struct {
[; ;pic18f27j13.h: 10793: unsigned CCPR2H :8;
[; ;pic18f27j13.h: 10794: };
[; ;pic18f27j13.h: 10795: } CCPR2Hbits_t;
[; ;pic18f27j13.h: 10796: extern volatile CCPR2Hbits_t CCPR2Hbits @ 0xFB6;
[; ;pic18f27j13.h: 10805: extern volatile unsigned char ECCP2DEL @ 0xFB7;
"10807
[; ;pic18f27j13.h: 10807: asm("ECCP2DEL equ 0FB7h");
[; <" ECCP2DEL equ 0FB7h ;# ">
[; ;pic18f27j13.h: 10810: extern volatile unsigned char PWM2CON @ 0xFB7;
"10812
[; ;pic18f27j13.h: 10812: asm("PWM2CON equ 0FB7h");
[; <" PWM2CON equ 0FB7h ;# ">
[; ;pic18f27j13.h: 10815: typedef union {
[; ;pic18f27j13.h: 10816: struct {
[; ;pic18f27j13.h: 10817: unsigned P2DC :7;
[; ;pic18f27j13.h: 10818: unsigned P2RSEN :1;
[; ;pic18f27j13.h: 10819: };
[; ;pic18f27j13.h: 10820: struct {
[; ;pic18f27j13.h: 10821: unsigned P2DC0 :1;
[; ;pic18f27j13.h: 10822: unsigned P2DC1 :1;
[; ;pic18f27j13.h: 10823: unsigned P2DC2 :1;
[; ;pic18f27j13.h: 10824: unsigned P2DC3 :1;
[; ;pic18f27j13.h: 10825: unsigned P2DC4 :1;
[; ;pic18f27j13.h: 10826: unsigned P2DC5 :1;
[; ;pic18f27j13.h: 10827: unsigned P2DC6 :1;
[; ;pic18f27j13.h: 10828: };
[; ;pic18f27j13.h: 10829: } ECCP2DELbits_t;
[; ;pic18f27j13.h: 10830: extern volatile ECCP2DELbits_t ECCP2DELbits @ 0xFB7;
[; ;pic18f27j13.h: 10878: typedef union {
[; ;pic18f27j13.h: 10879: struct {
[; ;pic18f27j13.h: 10880: unsigned P2DC :7;
[; ;pic18f27j13.h: 10881: unsigned P2RSEN :1;
[; ;pic18f27j13.h: 10882: };
[; ;pic18f27j13.h: 10883: struct {
[; ;pic18f27j13.h: 10884: unsigned P2DC0 :1;
[; ;pic18f27j13.h: 10885: unsigned P2DC1 :1;
[; ;pic18f27j13.h: 10886: unsigned P2DC2 :1;
[; ;pic18f27j13.h: 10887: unsigned P2DC3 :1;
[; ;pic18f27j13.h: 10888: unsigned P2DC4 :1;
[; ;pic18f27j13.h: 10889: unsigned P2DC5 :1;
[; ;pic18f27j13.h: 10890: unsigned P2DC6 :1;
[; ;pic18f27j13.h: 10891: };
[; ;pic18f27j13.h: 10892: } PWM2CONbits_t;
[; ;pic18f27j13.h: 10893: extern volatile PWM2CONbits_t PWM2CONbits @ 0xFB7;
[; ;pic18f27j13.h: 10942: extern volatile unsigned char ECCP2AS @ 0xFB8;
"10944
[; ;pic18f27j13.h: 10944: asm("ECCP2AS equ 0FB8h");
[; <" ECCP2AS equ 0FB8h ;# ">
[; ;pic18f27j13.h: 10947: typedef union {
[; ;pic18f27j13.h: 10948: struct {
[; ;pic18f27j13.h: 10949: unsigned PSS2BD :2;
[; ;pic18f27j13.h: 10950: unsigned PSS2AC :2;
[; ;pic18f27j13.h: 10951: unsigned ECCP2AS :3;
[; ;pic18f27j13.h: 10952: unsigned ECCP2ASE :1;
[; ;pic18f27j13.h: 10953: };
[; ;pic18f27j13.h: 10954: struct {
[; ;pic18f27j13.h: 10955: unsigned PSS2BD0 :1;
[; ;pic18f27j13.h: 10956: unsigned PSS2BD1 :1;
[; ;pic18f27j13.h: 10957: unsigned PSS2AC0 :1;
[; ;pic18f27j13.h: 10958: unsigned PSS2AC1 :1;
[; ;pic18f27j13.h: 10959: unsigned ECCP2AS0 :1;
[; ;pic18f27j13.h: 10960: unsigned ECCP2AS1 :1;
[; ;pic18f27j13.h: 10961: unsigned ECCP2AS2 :1;
[; ;pic18f27j13.h: 10962: };
[; ;pic18f27j13.h: 10963: } ECCP2ASbits_t;
[; ;pic18f27j13.h: 10964: extern volatile ECCP2ASbits_t ECCP2ASbits @ 0xFB8;
[; ;pic18f27j13.h: 11023: extern volatile unsigned char PSTR2CON @ 0xFB9;
"11025
[; ;pic18f27j13.h: 11025: asm("PSTR2CON equ 0FB9h");
[; <" PSTR2CON equ 0FB9h ;# ">
[; ;pic18f27j13.h: 11028: typedef union {
[; ;pic18f27j13.h: 11029: struct {
[; ;pic18f27j13.h: 11030: unsigned STRA :1;
[; ;pic18f27j13.h: 11031: unsigned STRB :1;
[; ;pic18f27j13.h: 11032: unsigned STRC :1;
[; ;pic18f27j13.h: 11033: unsigned STRD :1;
[; ;pic18f27j13.h: 11034: unsigned STRSYNC :1;
[; ;pic18f27j13.h: 11035: unsigned :1;
[; ;pic18f27j13.h: 11036: unsigned CMPL0 :1;
[; ;pic18f27j13.h: 11037: unsigned CMPL1 :1;
[; ;pic18f27j13.h: 11038: };
[; ;pic18f27j13.h: 11039: struct {
[; ;pic18f27j13.h: 11040: unsigned P2DC0 :1;
[; ;pic18f27j13.h: 11041: unsigned P2DC1 :1;
[; ;pic18f27j13.h: 11042: unsigned P2DC2 :1;
[; ;pic18f27j13.h: 11043: unsigned P2DC3 :1;
[; ;pic18f27j13.h: 11044: unsigned P2DC4 :1;
[; ;pic18f27j13.h: 11045: unsigned P2DC5 :1;
[; ;pic18f27j13.h: 11046: unsigned P2DC6 :1;
[; ;pic18f27j13.h: 11047: };
[; ;pic18f27j13.h: 11048: struct {
[; ;pic18f27j13.h: 11049: unsigned :6;
[; ;pic18f27j13.h: 11050: unsigned CMPL02 :1;
[; ;pic18f27j13.h: 11051: };
[; ;pic18f27j13.h: 11052: struct {
[; ;pic18f27j13.h: 11053: unsigned :7;
[; ;pic18f27j13.h: 11054: unsigned CMPL12 :1;
[; ;pic18f27j13.h: 11055: };
[; ;pic18f27j13.h: 11056: struct {
[; ;pic18f27j13.h: 11057: unsigned P2DC02 :1;
[; ;pic18f27j13.h: 11058: };
[; ;pic18f27j13.h: 11059: struct {
[; ;pic18f27j13.h: 11060: unsigned P2DC0CON :1;
[; ;pic18f27j13.h: 11061: };
[; ;pic18f27j13.h: 11062: struct {
[; ;pic18f27j13.h: 11063: unsigned :1;
[; ;pic18f27j13.h: 11064: unsigned P2DC12 :1;
[; ;pic18f27j13.h: 11065: };
[; ;pic18f27j13.h: 11066: struct {
[; ;pic18f27j13.h: 11067: unsigned :1;
[; ;pic18f27j13.h: 11068: unsigned P2DC1CON :1;
[; ;pic18f27j13.h: 11069: };
[; ;pic18f27j13.h: 11070: struct {
[; ;pic18f27j13.h: 11071: unsigned :2;
[; ;pic18f27j13.h: 11072: unsigned P2DC22 :1;
[; ;pic18f27j13.h: 11073: };
[; ;pic18f27j13.h: 11074: struct {
[; ;pic18f27j13.h: 11075: unsigned :2;
[; ;pic18f27j13.h: 11076: unsigned P2DC2CON :1;
[; ;pic18f27j13.h: 11077: };
[; ;pic18f27j13.h: 11078: struct {
[; ;pic18f27j13.h: 11079: unsigned :3;
[; ;pic18f27j13.h: 11080: unsigned P2DC32 :1;
[; ;pic18f27j13.h: 11081: };
[; ;pic18f27j13.h: 11082: struct {
[; ;pic18f27j13.h: 11083: unsigned :3;
[; ;pic18f27j13.h: 11084: unsigned P2DC3CON :1;
[; ;pic18f27j13.h: 11085: };
[; ;pic18f27j13.h: 11086: struct {
[; ;pic18f27j13.h: 11087: unsigned :4;
[; ;pic18f27j13.h: 11088: unsigned P2DC42 :1;
[; ;pic18f27j13.h: 11089: };
[; ;pic18f27j13.h: 11090: struct {
[; ;pic18f27j13.h: 11091: unsigned :4;
[; ;pic18f27j13.h: 11092: unsigned P2DC4CON :1;
[; ;pic18f27j13.h: 11093: };
[; ;pic18f27j13.h: 11094: struct {
[; ;pic18f27j13.h: 11095: unsigned :5;
[; ;pic18f27j13.h: 11096: unsigned P2DC52 :1;
[; ;pic18f27j13.h: 11097: };
[; ;pic18f27j13.h: 11098: struct {
[; ;pic18f27j13.h: 11099: unsigned :5;
[; ;pic18f27j13.h: 11100: unsigned P2DC5CON :1;
[; ;pic18f27j13.h: 11101: };
[; ;pic18f27j13.h: 11102: struct {
[; ;pic18f27j13.h: 11103: unsigned :6;
[; ;pic18f27j13.h: 11104: unsigned P2DC62 :1;
[; ;pic18f27j13.h: 11105: };
[; ;pic18f27j13.h: 11106: struct {
[; ;pic18f27j13.h: 11107: unsigned :6;
[; ;pic18f27j13.h: 11108: unsigned P2DC6CON :1;
[; ;pic18f27j13.h: 11109: };
[; ;pic18f27j13.h: 11110: struct {
[; ;pic18f27j13.h: 11111: unsigned STRA2 :1;
[; ;pic18f27j13.h: 11112: };
[; ;pic18f27j13.h: 11113: struct {
[; ;pic18f27j13.h: 11114: unsigned :1;
[; ;pic18f27j13.h: 11115: unsigned STRB2 :1;
[; ;pic18f27j13.h: 11116: };
[; ;pic18f27j13.h: 11117: struct {
[; ;pic18f27j13.h: 11118: unsigned :2;
[; ;pic18f27j13.h: 11119: unsigned STRC2 :1;
[; ;pic18f27j13.h: 11120: };
[; ;pic18f27j13.h: 11121: struct {
[; ;pic18f27j13.h: 11122: unsigned :3;
[; ;pic18f27j13.h: 11123: unsigned STRD2 :1;
[; ;pic18f27j13.h: 11124: };
[; ;pic18f27j13.h: 11125: struct {
[; ;pic18f27j13.h: 11126: unsigned :4;
[; ;pic18f27j13.h: 11127: unsigned STRSYNC2 :1;
[; ;pic18f27j13.h: 11128: };
[; ;pic18f27j13.h: 11129: } PSTR2CONbits_t;
[; ;pic18f27j13.h: 11130: extern volatile PSTR2CONbits_t PSTR2CONbits @ 0xFB9;
[; ;pic18f27j13.h: 11309: extern volatile unsigned char CCP1CON @ 0xFBA;
"11311
[; ;pic18f27j13.h: 11311: asm("CCP1CON equ 0FBAh");
[; <" CCP1CON equ 0FBAh ;# ">
[; ;pic18f27j13.h: 11314: extern volatile unsigned char ECCP1CON @ 0xFBA;
"11316
[; ;pic18f27j13.h: 11316: asm("ECCP1CON equ 0FBAh");
[; <" ECCP1CON equ 0FBAh ;# ">
[; ;pic18f27j13.h: 11319: typedef union {
[; ;pic18f27j13.h: 11320: struct {
[; ;pic18f27j13.h: 11321: unsigned CCP1M :4;
[; ;pic18f27j13.h: 11322: unsigned DC1B :2;
[; ;pic18f27j13.h: 11323: unsigned P1M :2;
[; ;pic18f27j13.h: 11324: };
[; ;pic18f27j13.h: 11325: struct {
[; ;pic18f27j13.h: 11326: unsigned CCP1M0 :1;
[; ;pic18f27j13.h: 11327: unsigned CCP1M1 :1;
[; ;pic18f27j13.h: 11328: unsigned CCP1M2 :1;
[; ;pic18f27j13.h: 11329: unsigned CCP1M3 :1;
[; ;pic18f27j13.h: 11330: unsigned DC1B0 :1;
[; ;pic18f27j13.h: 11331: unsigned DC1B1 :1;
[; ;pic18f27j13.h: 11332: unsigned P1M0 :1;
[; ;pic18f27j13.h: 11333: unsigned P1M1 :1;
[; ;pic18f27j13.h: 11334: };
[; ;pic18f27j13.h: 11335: struct {
[; ;pic18f27j13.h: 11336: unsigned :4;
[; ;pic18f27j13.h: 11337: unsigned CCP1Y :1;
[; ;pic18f27j13.h: 11338: unsigned CCP1X :1;
[; ;pic18f27j13.h: 11339: };
[; ;pic18f27j13.h: 11340: } CCP1CONbits_t;
[; ;pic18f27j13.h: 11341: extern volatile CCP1CONbits_t CCP1CONbits @ 0xFBA;
[; ;pic18f27j13.h: 11409: typedef union {
[; ;pic18f27j13.h: 11410: struct {
[; ;pic18f27j13.h: 11411: unsigned CCP1M :4;
[; ;pic18f27j13.h: 11412: unsigned DC1B :2;
[; ;pic18f27j13.h: 11413: unsigned P1M :2;
[; ;pic18f27j13.h: 11414: };
[; ;pic18f27j13.h: 11415: struct {
[; ;pic18f27j13.h: 11416: unsigned CCP1M0 :1;
[; ;pic18f27j13.h: 11417: unsigned CCP1M1 :1;
[; ;pic18f27j13.h: 11418: unsigned CCP1M2 :1;
[; ;pic18f27j13.h: 11419: unsigned CCP1M3 :1;
[; ;pic18f27j13.h: 11420: unsigned DC1B0 :1;
[; ;pic18f27j13.h: 11421: unsigned DC1B1 :1;
[; ;pic18f27j13.h: 11422: unsigned P1M0 :1;
[; ;pic18f27j13.h: 11423: unsigned P1M1 :1;
[; ;pic18f27j13.h: 11424: };
[; ;pic18f27j13.h: 11425: struct {
[; ;pic18f27j13.h: 11426: unsigned :4;
[; ;pic18f27j13.h: 11427: unsigned CCP1Y :1;
[; ;pic18f27j13.h: 11428: unsigned CCP1X :1;
[; ;pic18f27j13.h: 11429: };
[; ;pic18f27j13.h: 11430: } ECCP1CONbits_t;
[; ;pic18f27j13.h: 11431: extern volatile ECCP1CONbits_t ECCP1CONbits @ 0xFBA;
[; ;pic18f27j13.h: 11500: extern volatile unsigned short CCPR1 @ 0xFBB;
"11502
[; ;pic18f27j13.h: 11502: asm("CCPR1 equ 0FBBh");
[; <" CCPR1 equ 0FBBh ;# ">
[; ;pic18f27j13.h: 11506: extern volatile unsigned char CCPR1L @ 0xFBB;
"11508
[; ;pic18f27j13.h: 11508: asm("CCPR1L equ 0FBBh");
[; <" CCPR1L equ 0FBBh ;# ">
[; ;pic18f27j13.h: 11511: typedef union {
[; ;pic18f27j13.h: 11512: struct {
[; ;pic18f27j13.h: 11513: unsigned CCPR1L :8;
[; ;pic18f27j13.h: 11514: };
[; ;pic18f27j13.h: 11515: } CCPR1Lbits_t;
[; ;pic18f27j13.h: 11516: extern volatile CCPR1Lbits_t CCPR1Lbits @ 0xFBB;
[; ;pic18f27j13.h: 11525: extern volatile unsigned char CCPR1H @ 0xFBC;
"11527
[; ;pic18f27j13.h: 11527: asm("CCPR1H equ 0FBCh");
[; <" CCPR1H equ 0FBCh ;# ">
[; ;pic18f27j13.h: 11530: typedef union {
[; ;pic18f27j13.h: 11531: struct {
[; ;pic18f27j13.h: 11532: unsigned CCPR1H :8;
[; ;pic18f27j13.h: 11533: };
[; ;pic18f27j13.h: 11534: } CCPR1Hbits_t;
[; ;pic18f27j13.h: 11535: extern volatile CCPR1Hbits_t CCPR1Hbits @ 0xFBC;
[; ;pic18f27j13.h: 11544: extern volatile unsigned char ECCP1DEL @ 0xFBD;
"11546
[; ;pic18f27j13.h: 11546: asm("ECCP1DEL equ 0FBDh");
[; <" ECCP1DEL equ 0FBDh ;# ">
[; ;pic18f27j13.h: 11549: extern volatile unsigned char PWM1CON @ 0xFBD;
"11551
[; ;pic18f27j13.h: 11551: asm("PWM1CON equ 0FBDh");
[; <" PWM1CON equ 0FBDh ;# ">
[; ;pic18f27j13.h: 11554: typedef union {
[; ;pic18f27j13.h: 11555: struct {
[; ;pic18f27j13.h: 11556: unsigned P1DC :7;
[; ;pic18f27j13.h: 11557: unsigned P1RSEN :1;
[; ;pic18f27j13.h: 11558: };
[; ;pic18f27j13.h: 11559: struct {
[; ;pic18f27j13.h: 11560: unsigned P1DC0 :1;
[; ;pic18f27j13.h: 11561: unsigned P1DC1 :1;
[; ;pic18f27j13.h: 11562: unsigned P1DC2 :1;
[; ;pic18f27j13.h: 11563: unsigned P1DC3 :1;
[; ;pic18f27j13.h: 11564: unsigned P1DC4 :1;
[; ;pic18f27j13.h: 11565: unsigned P1DC5 :1;
[; ;pic18f27j13.h: 11566: unsigned P1DC6 :1;
[; ;pic18f27j13.h: 11567: };
[; ;pic18f27j13.h: 11568: } ECCP1DELbits_t;
[; ;pic18f27j13.h: 11569: extern volatile ECCP1DELbits_t ECCP1DELbits @ 0xFBD;
[; ;pic18f27j13.h: 11617: typedef union {
[; ;pic18f27j13.h: 11618: struct {
[; ;pic18f27j13.h: 11619: unsigned P1DC :7;
[; ;pic18f27j13.h: 11620: unsigned P1RSEN :1;
[; ;pic18f27j13.h: 11621: };
[; ;pic18f27j13.h: 11622: struct {
[; ;pic18f27j13.h: 11623: unsigned P1DC0 :1;
[; ;pic18f27j13.h: 11624: unsigned P1DC1 :1;
[; ;pic18f27j13.h: 11625: unsigned P1DC2 :1;
[; ;pic18f27j13.h: 11626: unsigned P1DC3 :1;
[; ;pic18f27j13.h: 11627: unsigned P1DC4 :1;
[; ;pic18f27j13.h: 11628: unsigned P1DC5 :1;
[; ;pic18f27j13.h: 11629: unsigned P1DC6 :1;
[; ;pic18f27j13.h: 11630: };
[; ;pic18f27j13.h: 11631: } PWM1CONbits_t;
[; ;pic18f27j13.h: 11632: extern volatile PWM1CONbits_t PWM1CONbits @ 0xFBD;
[; ;pic18f27j13.h: 11681: extern volatile unsigned char ECCP1AS @ 0xFBE;
"11683
[; ;pic18f27j13.h: 11683: asm("ECCP1AS equ 0FBEh");
[; <" ECCP1AS equ 0FBEh ;# ">
[; ;pic18f27j13.h: 11686: typedef union {
[; ;pic18f27j13.h: 11687: struct {
[; ;pic18f27j13.h: 11688: unsigned PSS1BD :2;
[; ;pic18f27j13.h: 11689: unsigned PSS1AC :2;
[; ;pic18f27j13.h: 11690: unsigned ECCP1AS :3;
[; ;pic18f27j13.h: 11691: unsigned ECCP1ASE :1;
[; ;pic18f27j13.h: 11692: };
[; ;pic18f27j13.h: 11693: struct {
[; ;pic18f27j13.h: 11694: unsigned PSS1BD0 :1;
[; ;pic18f27j13.h: 11695: unsigned PSS1BD1 :1;
[; ;pic18f27j13.h: 11696: unsigned PSS1AC0 :1;
[; ;pic18f27j13.h: 11697: unsigned PSS1AC1 :1;
[; ;pic18f27j13.h: 11698: unsigned ECCP1AS0 :1;
[; ;pic18f27j13.h: 11699: unsigned ECCP1AS1 :1;
[; ;pic18f27j13.h: 11700: unsigned ECCP1AS2 :1;
[; ;pic18f27j13.h: 11701: };
[; ;pic18f27j13.h: 11702: } ECCP1ASbits_t;
[; ;pic18f27j13.h: 11703: extern volatile ECCP1ASbits_t ECCP1ASbits @ 0xFBE;
[; ;pic18f27j13.h: 11762: extern volatile unsigned char PSTR1CON @ 0xFBF;
"11764
[; ;pic18f27j13.h: 11764: asm("PSTR1CON equ 0FBFh");
[; <" PSTR1CON equ 0FBFh ;# ">
[; ;pic18f27j13.h: 11767: typedef union {
[; ;pic18f27j13.h: 11768: struct {
[; ;pic18f27j13.h: 11769: unsigned STRA :1;
[; ;pic18f27j13.h: 11770: unsigned STRB :1;
[; ;pic18f27j13.h: 11771: unsigned STRC :1;
[; ;pic18f27j13.h: 11772: unsigned STRD :1;
[; ;pic18f27j13.h: 11773: unsigned STRSYNC :1;
[; ;pic18f27j13.h: 11774: unsigned :1;
[; ;pic18f27j13.h: 11775: unsigned CMPL0 :1;
[; ;pic18f27j13.h: 11776: unsigned CMPL1 :1;
[; ;pic18f27j13.h: 11777: };
[; ;pic18f27j13.h: 11778: } PSTR1CONbits_t;
[; ;pic18f27j13.h: 11779: extern volatile PSTR1CONbits_t PSTR1CONbits @ 0xFBF;
[; ;pic18f27j13.h: 11818: extern volatile unsigned char WDTCON @ 0xFC0;
"11820
[; ;pic18f27j13.h: 11820: asm("WDTCON equ 0FC0h");
[; <" WDTCON equ 0FC0h ;# ">
[; ;pic18f27j13.h: 11823: typedef union {
[; ;pic18f27j13.h: 11824: struct {
[; ;pic18f27j13.h: 11825: unsigned SWDTEN :1;
[; ;pic18f27j13.h: 11826: unsigned ULPSINK :1;
[; ;pic18f27j13.h: 11827: unsigned ULPEN :1;
[; ;pic18f27j13.h: 11828: unsigned DS :1;
[; ;pic18f27j13.h: 11829: unsigned VBGOE :1;
[; ;pic18f27j13.h: 11830: unsigned ULPLVL :1;
[; ;pic18f27j13.h: 11831: unsigned LVDSTAT :1;
[; ;pic18f27j13.h: 11832: unsigned REGSLP :1;
[; ;pic18f27j13.h: 11833: };
[; ;pic18f27j13.h: 11834: struct {
[; ;pic18f27j13.h: 11835: unsigned SWDTE :1;
[; ;pic18f27j13.h: 11836: };
[; ;pic18f27j13.h: 11837: } WDTCONbits_t;
[; ;pic18f27j13.h: 11838: extern volatile WDTCONbits_t WDTCONbits @ 0xFC0;
[; ;pic18f27j13.h: 11887: extern volatile unsigned char ADCON1 @ 0xFC1;
"11889
[; ;pic18f27j13.h: 11889: asm("ADCON1 equ 0FC1h");
[; <" ADCON1 equ 0FC1h ;# ">
[; ;pic18f27j13.h: 11892: typedef union {
[; ;pic18f27j13.h: 11893: struct {
[; ;pic18f27j13.h: 11894: unsigned ADCS :3;
[; ;pic18f27j13.h: 11895: unsigned ACQT :3;
[; ;pic18f27j13.h: 11896: unsigned ADCAL :1;
[; ;pic18f27j13.h: 11897: unsigned ADFM :1;
[; ;pic18f27j13.h: 11898: };
[; ;pic18f27j13.h: 11899: struct {
[; ;pic18f27j13.h: 11900: unsigned ADCS0 :1;
[; ;pic18f27j13.h: 11901: unsigned ADCS1 :1;
[; ;pic18f27j13.h: 11902: unsigned ADCS2 :1;
[; ;pic18f27j13.h: 11903: unsigned ACQT0 :1;
[; ;pic18f27j13.h: 11904: unsigned ACQT1 :1;
[; ;pic18f27j13.h: 11905: unsigned ACQT2 :1;
[; ;pic18f27j13.h: 11906: };
[; ;pic18f27j13.h: 11907: struct {
[; ;pic18f27j13.h: 11908: unsigned :3;
[; ;pic18f27j13.h: 11909: unsigned CHSN3 :1;
[; ;pic18f27j13.h: 11910: };
[; ;pic18f27j13.h: 11911: struct {
[; ;pic18f27j13.h: 11912: unsigned :4;
[; ;pic18f27j13.h: 11913: unsigned VCFG01 :1;
[; ;pic18f27j13.h: 11914: };
[; ;pic18f27j13.h: 11915: struct {
[; ;pic18f27j13.h: 11916: unsigned :5;
[; ;pic18f27j13.h: 11917: unsigned VCFG11 :1;
[; ;pic18f27j13.h: 11918: };
[; ;pic18f27j13.h: 11919: } ADCON1bits_t;
[; ;pic18f27j13.h: 11920: extern volatile ADCON1bits_t ADCON1bits @ 0xFC1;
[; ;pic18f27j13.h: 11989: extern volatile unsigned char ADCON0 @ 0xFC2;
"11991
[; ;pic18f27j13.h: 11991: asm("ADCON0 equ 0FC2h");
[; <" ADCON0 equ 0FC2h ;# ">
[; ;pic18f27j13.h: 11994: typedef union {
[; ;pic18f27j13.h: 11995: struct {
[; ;pic18f27j13.h: 11996: unsigned :1;
[; ;pic18f27j13.h: 11997: unsigned GO_NOT_DONE :1;
[; ;pic18f27j13.h: 11998: };
[; ;pic18f27j13.h: 11999: struct {
[; ;pic18f27j13.h: 12000: unsigned ADON :1;
[; ;pic18f27j13.h: 12001: unsigned GO_nDONE :1;
[; ;pic18f27j13.h: 12002: unsigned CHS :4;
[; ;pic18f27j13.h: 12003: unsigned VCFG :2;
[; ;pic18f27j13.h: 12004: };
[; ;pic18f27j13.h: 12005: struct {
[; ;pic18f27j13.h: 12006: unsigned :1;
[; ;pic18f27j13.h: 12007: unsigned GO_DONE :1;
[; ;pic18f27j13.h: 12008: unsigned CHS0 :1;
[; ;pic18f27j13.h: 12009: unsigned CHS1 :1;
[; ;pic18f27j13.h: 12010: unsigned CHS2 :1;
[; ;pic18f27j13.h: 12011: unsigned CHS3 :1;
[; ;pic18f27j13.h: 12012: unsigned VCFG0 :1;
[; ;pic18f27j13.h: 12013: unsigned VCFG1 :1;
[; ;pic18f27j13.h: 12014: };
[; ;pic18f27j13.h: 12015: struct {
[; ;pic18f27j13.h: 12016: unsigned :1;
[; ;pic18f27j13.h: 12017: unsigned DONE :1;
[; ;pic18f27j13.h: 12018: };
[; ;pic18f27j13.h: 12019: struct {
[; ;pic18f27j13.h: 12020: unsigned :1;
[; ;pic18f27j13.h: 12021: unsigned GO :1;
[; ;pic18f27j13.h: 12022: };
[; ;pic18f27j13.h: 12023: struct {
[; ;pic18f27j13.h: 12024: unsigned :1;
[; ;pic18f27j13.h: 12025: unsigned NOT_DONE :1;
[; ;pic18f27j13.h: 12026: };
[; ;pic18f27j13.h: 12027: struct {
[; ;pic18f27j13.h: 12028: unsigned :1;
[; ;pic18f27j13.h: 12029: unsigned nDONE :1;
[; ;pic18f27j13.h: 12030: };
[; ;pic18f27j13.h: 12031: struct {
[; ;pic18f27j13.h: 12032: unsigned :7;
[; ;pic18f27j13.h: 12033: unsigned ADCAL :1;
[; ;pic18f27j13.h: 12034: };
[; ;pic18f27j13.h: 12035: struct {
[; ;pic18f27j13.h: 12036: unsigned :1;
[; ;pic18f27j13.h: 12037: unsigned GODONE :1;
[; ;pic18f27j13.h: 12038: };
[; ;pic18f27j13.h: 12039: } ADCON0bits_t;
[; ;pic18f27j13.h: 12040: extern volatile ADCON0bits_t ADCON0bits @ 0xFC2;
[; ;pic18f27j13.h: 12134: extern volatile unsigned short ADRES @ 0xFC3;
"12136
[; ;pic18f27j13.h: 12136: asm("ADRES equ 0FC3h");
[; <" ADRES equ 0FC3h ;# ">
[; ;pic18f27j13.h: 12140: extern volatile unsigned char ADRESL @ 0xFC3;
"12142
[; ;pic18f27j13.h: 12142: asm("ADRESL equ 0FC3h");
[; <" ADRESL equ 0FC3h ;# ">
[; ;pic18f27j13.h: 12145: typedef union {
[; ;pic18f27j13.h: 12146: struct {
[; ;pic18f27j13.h: 12147: unsigned ADRESL :8;
[; ;pic18f27j13.h: 12148: };
[; ;pic18f27j13.h: 12149: } ADRESLbits_t;
[; ;pic18f27j13.h: 12150: extern volatile ADRESLbits_t ADRESLbits @ 0xFC3;
[; ;pic18f27j13.h: 12159: extern volatile unsigned char ADRESH @ 0xFC4;
"12161
[; ;pic18f27j13.h: 12161: asm("ADRESH equ 0FC4h");
[; <" ADRESH equ 0FC4h ;# ">
[; ;pic18f27j13.h: 12164: typedef union {
[; ;pic18f27j13.h: 12165: struct {
[; ;pic18f27j13.h: 12166: unsigned ADRESH :8;
[; ;pic18f27j13.h: 12167: };
[; ;pic18f27j13.h: 12168: } ADRESHbits_t;
[; ;pic18f27j13.h: 12169: extern volatile ADRESHbits_t ADRESHbits @ 0xFC4;
[; ;pic18f27j13.h: 12178: extern volatile unsigned char SSP1CON2 @ 0xFC5;
"12180
[; ;pic18f27j13.h: 12180: asm("SSP1CON2 equ 0FC5h");
[; <" SSP1CON2 equ 0FC5h ;# ">
[; ;pic18f27j13.h: 12183: extern volatile unsigned char SSPCON2 @ 0xFC5;
"12185
[; ;pic18f27j13.h: 12185: asm("SSPCON2 equ 0FC5h");
[; <" SSPCON2 equ 0FC5h ;# ">
[; ;pic18f27j13.h: 12188: typedef union {
[; ;pic18f27j13.h: 12189: struct {
[; ;pic18f27j13.h: 12190: unsigned SEN :1;
[; ;pic18f27j13.h: 12191: unsigned RSEN :1;
[; ;pic18f27j13.h: 12192: unsigned PEN :1;
[; ;pic18f27j13.h: 12193: unsigned RCEN :1;
[; ;pic18f27j13.h: 12194: unsigned ACKEN :1;
[; ;pic18f27j13.h: 12195: unsigned ACKDT :1;
[; ;pic18f27j13.h: 12196: unsigned ACKSTAT :1;
[; ;pic18f27j13.h: 12197: unsigned GCEN :1;
[; ;pic18f27j13.h: 12198: };
[; ;pic18f27j13.h: 12199: struct {
[; ;pic18f27j13.h: 12200: unsigned :1;
[; ;pic18f27j13.h: 12201: unsigned ADMSK1 :1;
[; ;pic18f27j13.h: 12202: unsigned ADMSK2 :1;
[; ;pic18f27j13.h: 12203: unsigned ADMSK3 :1;
[; ;pic18f27j13.h: 12204: unsigned ADMSK4 :1;
[; ;pic18f27j13.h: 12205: unsigned ADMSK5 :1;
[; ;pic18f27j13.h: 12206: };
[; ;pic18f27j13.h: 12207: struct {
[; ;pic18f27j13.h: 12208: unsigned :5;
[; ;pic18f27j13.h: 12209: unsigned ACKDT1 :1;
[; ;pic18f27j13.h: 12210: };
[; ;pic18f27j13.h: 12211: struct {
[; ;pic18f27j13.h: 12212: unsigned :4;
[; ;pic18f27j13.h: 12213: unsigned ACKEN1 :1;
[; ;pic18f27j13.h: 12214: };
[; ;pic18f27j13.h: 12215: struct {
[; ;pic18f27j13.h: 12216: unsigned :6;
[; ;pic18f27j13.h: 12217: unsigned ACKSTAT1 :1;
[; ;pic18f27j13.h: 12218: };
[; ;pic18f27j13.h: 12219: struct {
[; ;pic18f27j13.h: 12220: unsigned :1;
[; ;pic18f27j13.h: 12221: unsigned ADMSK11 :1;
[; ;pic18f27j13.h: 12222: };
[; ;pic18f27j13.h: 12223: struct {
[; ;pic18f27j13.h: 12224: unsigned :2;
[; ;pic18f27j13.h: 12225: unsigned ADMSK21 :1;
[; ;pic18f27j13.h: 12226: };
[; ;pic18f27j13.h: 12227: struct {
[; ;pic18f27j13.h: 12228: unsigned :3;
[; ;pic18f27j13.h: 12229: unsigned ADMSK31 :1;
[; ;pic18f27j13.h: 12230: };
[; ;pic18f27j13.h: 12231: struct {
[; ;pic18f27j13.h: 12232: unsigned :4;
[; ;pic18f27j13.h: 12233: unsigned ADMSK41 :1;
[; ;pic18f27j13.h: 12234: };
[; ;pic18f27j13.h: 12235: struct {
[; ;pic18f27j13.h: 12236: unsigned :5;
[; ;pic18f27j13.h: 12237: unsigned ADMSK51 :1;
[; ;pic18f27j13.h: 12238: };
[; ;pic18f27j13.h: 12239: struct {
[; ;pic18f27j13.h: 12240: unsigned :7;
[; ;pic18f27j13.h: 12241: unsigned GCEN1 :1;
[; ;pic18f27j13.h: 12242: };
[; ;pic18f27j13.h: 12243: struct {
[; ;pic18f27j13.h: 12244: unsigned :2;
[; ;pic18f27j13.h: 12245: unsigned PEN1 :1;
[; ;pic18f27j13.h: 12246: };
[; ;pic18f27j13.h: 12247: struct {
[; ;pic18f27j13.h: 12248: unsigned :3;
[; ;pic18f27j13.h: 12249: unsigned RCEN1 :1;
[; ;pic18f27j13.h: 12250: };
[; ;pic18f27j13.h: 12251: struct {
[; ;pic18f27j13.h: 12252: unsigned :1;
[; ;pic18f27j13.h: 12253: unsigned RSEN1 :1;
[; ;pic18f27j13.h: 12254: };
[; ;pic18f27j13.h: 12255: struct {
[; ;pic18f27j13.h: 12256: unsigned SEN1 :1;
[; ;pic18f27j13.h: 12257: };
[; ;pic18f27j13.h: 12258: } SSP1CON2bits_t;
[; ;pic18f27j13.h: 12259: extern volatile SSP1CON2bits_t SSP1CON2bits @ 0xFC5;
[; ;pic18f27j13.h: 12392: typedef union {
[; ;pic18f27j13.h: 12393: struct {
[; ;pic18f27j13.h: 12394: unsigned SEN :1;
[; ;pic18f27j13.h: 12395: unsigned RSEN :1;
[; ;pic18f27j13.h: 12396: unsigned PEN :1;
[; ;pic18f27j13.h: 12397: unsigned RCEN :1;
[; ;pic18f27j13.h: 12398: unsigned ACKEN :1;
[; ;pic18f27j13.h: 12399: unsigned ACKDT :1;
[; ;pic18f27j13.h: 12400: unsigned ACKSTAT :1;
[; ;pic18f27j13.h: 12401: unsigned GCEN :1;
[; ;pic18f27j13.h: 12402: };
[; ;pic18f27j13.h: 12403: struct {
[; ;pic18f27j13.h: 12404: unsigned :1;
[; ;pic18f27j13.h: 12405: unsigned ADMSK1 :1;
[; ;pic18f27j13.h: 12406: unsigned ADMSK2 :1;
[; ;pic18f27j13.h: 12407: unsigned ADMSK3 :1;
[; ;pic18f27j13.h: 12408: unsigned ADMSK4 :1;
[; ;pic18f27j13.h: 12409: unsigned ADMSK5 :1;
[; ;pic18f27j13.h: 12410: };
[; ;pic18f27j13.h: 12411: struct {
[; ;pic18f27j13.h: 12412: unsigned :5;
[; ;pic18f27j13.h: 12413: unsigned ACKDT1 :1;
[; ;pic18f27j13.h: 12414: };
[; ;pic18f27j13.h: 12415: struct {
[; ;pic18f27j13.h: 12416: unsigned :4;
[; ;pic18f27j13.h: 12417: unsigned ACKEN1 :1;
[; ;pic18f27j13.h: 12418: };
[; ;pic18f27j13.h: 12419: struct {
[; ;pic18f27j13.h: 12420: unsigned :6;
[; ;pic18f27j13.h: 12421: unsigned ACKSTAT1 :1;
[; ;pic18f27j13.h: 12422: };
[; ;pic18f27j13.h: 12423: struct {
[; ;pic18f27j13.h: 12424: unsigned :1;
[; ;pic18f27j13.h: 12425: unsigned ADMSK11 :1;
[; ;pic18f27j13.h: 12426: };
[; ;pic18f27j13.h: 12427: struct {
[; ;pic18f27j13.h: 12428: unsigned :2;
[; ;pic18f27j13.h: 12429: unsigned ADMSK21 :1;
[; ;pic18f27j13.h: 12430: };
[; ;pic18f27j13.h: 12431: struct {
[; ;pic18f27j13.h: 12432: unsigned :3;
[; ;pic18f27j13.h: 12433: unsigned ADMSK31 :1;
[; ;pic18f27j13.h: 12434: };
[; ;pic18f27j13.h: 12435: struct {
[; ;pic18f27j13.h: 12436: unsigned :4;
[; ;pic18f27j13.h: 12437: unsigned ADMSK41 :1;
[; ;pic18f27j13.h: 12438: };
[; ;pic18f27j13.h: 12439: struct {
[; ;pic18f27j13.h: 12440: unsigned :5;
[; ;pic18f27j13.h: 12441: unsigned ADMSK51 :1;
[; ;pic18f27j13.h: 12442: };
[; ;pic18f27j13.h: 12443: struct {
[; ;pic18f27j13.h: 12444: unsigned :7;
[; ;pic18f27j13.h: 12445: unsigned GCEN1 :1;
[; ;pic18f27j13.h: 12446: };
[; ;pic18f27j13.h: 12447: struct {
[; ;pic18f27j13.h: 12448: unsigned :2;
[; ;pic18f27j13.h: 12449: unsigned PEN1 :1;
[; ;pic18f27j13.h: 12450: };
[; ;pic18f27j13.h: 12451: struct {
[; ;pic18f27j13.h: 12452: unsigned :3;
[; ;pic18f27j13.h: 12453: unsigned RCEN1 :1;
[; ;pic18f27j13.h: 12454: };
[; ;pic18f27j13.h: 12455: struct {
[; ;pic18f27j13.h: 12456: unsigned :1;
[; ;pic18f27j13.h: 12457: unsigned RSEN1 :1;
[; ;pic18f27j13.h: 12458: };
[; ;pic18f27j13.h: 12459: struct {
[; ;pic18f27j13.h: 12460: unsigned SEN1 :1;
[; ;pic18f27j13.h: 12461: };
[; ;pic18f27j13.h: 12462: } SSPCON2bits_t;
[; ;pic18f27j13.h: 12463: extern volatile SSPCON2bits_t SSPCON2bits @ 0xFC5;
[; ;pic18f27j13.h: 12597: extern volatile unsigned char SSP1CON1 @ 0xFC6;
"12599
[; ;pic18f27j13.h: 12599: asm("SSP1CON1 equ 0FC6h");
[; <" SSP1CON1 equ 0FC6h ;# ">
[; ;pic18f27j13.h: 12602: extern volatile unsigned char SSPCON1 @ 0xFC6;
"12604
[; ;pic18f27j13.h: 12604: asm("SSPCON1 equ 0FC6h");
[; <" SSPCON1 equ 0FC6h ;# ">
[; ;pic18f27j13.h: 12607: typedef union {
[; ;pic18f27j13.h: 12608: struct {
[; ;pic18f27j13.h: 12609: unsigned SSPM :4;
[; ;pic18f27j13.h: 12610: unsigned CKP :1;
[; ;pic18f27j13.h: 12611: unsigned SSPEN :1;
[; ;pic18f27j13.h: 12612: unsigned SSPOV :1;
[; ;pic18f27j13.h: 12613: unsigned WCOL :1;
[; ;pic18f27j13.h: 12614: };
[; ;pic18f27j13.h: 12615: struct {
[; ;pic18f27j13.h: 12616: unsigned SSPM0 :1;
[; ;pic18f27j13.h: 12617: unsigned SSPM1 :1;
[; ;pic18f27j13.h: 12618: unsigned SSPM2 :1;
[; ;pic18f27j13.h: 12619: unsigned SSPM3 :1;
[; ;pic18f27j13.h: 12620: };
[; ;pic18f27j13.h: 12621: struct {
[; ;pic18f27j13.h: 12622: unsigned :4;
[; ;pic18f27j13.h: 12623: unsigned CKP1 :1;
[; ;pic18f27j13.h: 12624: };
[; ;pic18f27j13.h: 12625: struct {
[; ;pic18f27j13.h: 12626: unsigned :5;
[; ;pic18f27j13.h: 12627: unsigned SSPEN1 :1;
[; ;pic18f27j13.h: 12628: };
[; ;pic18f27j13.h: 12629: struct {
[; ;pic18f27j13.h: 12630: unsigned SSPM01 :1;
[; ;pic18f27j13.h: 12631: };
[; ;pic18f27j13.h: 12632: struct {
[; ;pic18f27j13.h: 12633: unsigned :1;
[; ;pic18f27j13.h: 12634: unsigned SSPM11 :1;
[; ;pic18f27j13.h: 12635: };
[; ;pic18f27j13.h: 12636: struct {
[; ;pic18f27j13.h: 12637: unsigned :2;
[; ;pic18f27j13.h: 12638: unsigned SSPM21 :1;
[; ;pic18f27j13.h: 12639: };
[; ;pic18f27j13.h: 12640: struct {
[; ;pic18f27j13.h: 12641: unsigned :3;
[; ;pic18f27j13.h: 12642: unsigned SSPM31 :1;
[; ;pic18f27j13.h: 12643: };
[; ;pic18f27j13.h: 12644: struct {
[; ;pic18f27j13.h: 12645: unsigned :6;
[; ;pic18f27j13.h: 12646: unsigned SSPOV1 :1;
[; ;pic18f27j13.h: 12647: };
[; ;pic18f27j13.h: 12648: struct {
[; ;pic18f27j13.h: 12649: unsigned :7;
[; ;pic18f27j13.h: 12650: unsigned WCOL1 :1;
[; ;pic18f27j13.h: 12651: };
[; ;pic18f27j13.h: 12652: } SSP1CON1bits_t;
[; ;pic18f27j13.h: 12653: extern volatile SSP1CON1bits_t SSP1CON1bits @ 0xFC6;
[; ;pic18f27j13.h: 12741: typedef union {
[; ;pic18f27j13.h: 12742: struct {
[; ;pic18f27j13.h: 12743: unsigned SSPM :4;
[; ;pic18f27j13.h: 12744: unsigned CKP :1;
[; ;pic18f27j13.h: 12745: unsigned SSPEN :1;
[; ;pic18f27j13.h: 12746: unsigned SSPOV :1;
[; ;pic18f27j13.h: 12747: unsigned WCOL :1;
[; ;pic18f27j13.h: 12748: };
[; ;pic18f27j13.h: 12749: struct {
[; ;pic18f27j13.h: 12750: unsigned SSPM0 :1;
[; ;pic18f27j13.h: 12751: unsigned SSPM1 :1;
[; ;pic18f27j13.h: 12752: unsigned SSPM2 :1;
[; ;pic18f27j13.h: 12753: unsigned SSPM3 :1;
[; ;pic18f27j13.h: 12754: };
[; ;pic18f27j13.h: 12755: struct {
[; ;pic18f27j13.h: 12756: unsigned :4;
[; ;pic18f27j13.h: 12757: unsigned CKP1 :1;
[; ;pic18f27j13.h: 12758: };
[; ;pic18f27j13.h: 12759: struct {
[; ;pic18f27j13.h: 12760: unsigned :5;
[; ;pic18f27j13.h: 12761: unsigned SSPEN1 :1;
[; ;pic18f27j13.h: 12762: };
[; ;pic18f27j13.h: 12763: struct {
[; ;pic18f27j13.h: 12764: unsigned SSPM01 :1;
[; ;pic18f27j13.h: 12765: };
[; ;pic18f27j13.h: 12766: struct {
[; ;pic18f27j13.h: 12767: unsigned :1;
[; ;pic18f27j13.h: 12768: unsigned SSPM11 :1;
[; ;pic18f27j13.h: 12769: };
[; ;pic18f27j13.h: 12770: struct {
[; ;pic18f27j13.h: 12771: unsigned :2;
[; ;pic18f27j13.h: 12772: unsigned SSPM21 :1;
[; ;pic18f27j13.h: 12773: };
[; ;pic18f27j13.h: 12774: struct {
[; ;pic18f27j13.h: 12775: unsigned :3;
[; ;pic18f27j13.h: 12776: unsigned SSPM31 :1;
[; ;pic18f27j13.h: 12777: };
[; ;pic18f27j13.h: 12778: struct {
[; ;pic18f27j13.h: 12779: unsigned :6;
[; ;pic18f27j13.h: 12780: unsigned SSPOV1 :1;
[; ;pic18f27j13.h: 12781: };
[; ;pic18f27j13.h: 12782: struct {
[; ;pic18f27j13.h: 12783: unsigned :7;
[; ;pic18f27j13.h: 12784: unsigned WCOL1 :1;
[; ;pic18f27j13.h: 12785: };
[; ;pic18f27j13.h: 12786: } SSPCON1bits_t;
[; ;pic18f27j13.h: 12787: extern volatile SSPCON1bits_t SSPCON1bits @ 0xFC6;
[; ;pic18f27j13.h: 12876: extern volatile unsigned char SSP1STAT @ 0xFC7;
"12878
[; ;pic18f27j13.h: 12878: asm("SSP1STAT equ 0FC7h");
[; <" SSP1STAT equ 0FC7h ;# ">
[; ;pic18f27j13.h: 12881: extern volatile unsigned char SSPSTAT @ 0xFC7;
"12883
[; ;pic18f27j13.h: 12883: asm("SSPSTAT equ 0FC7h");
[; <" SSPSTAT equ 0FC7h ;# ">
[; ;pic18f27j13.h: 12886: typedef union {
[; ;pic18f27j13.h: 12887: struct {
[; ;pic18f27j13.h: 12888: unsigned :2;
[; ;pic18f27j13.h: 12889: unsigned R_NOT_W :1;
[; ;pic18f27j13.h: 12890: };
[; ;pic18f27j13.h: 12891: struct {
[; ;pic18f27j13.h: 12892: unsigned :5;
[; ;pic18f27j13.h: 12893: unsigned D_NOT_A :1;
[; ;pic18f27j13.h: 12894: };
[; ;pic18f27j13.h: 12895: struct {
[; ;pic18f27j13.h: 12896: unsigned BF :1;
[; ;pic18f27j13.h: 12897: unsigned UA :1;
[; ;pic18f27j13.h: 12898: unsigned R_nW :1;
[; ;pic18f27j13.h: 12899: unsigned S :1;
[; ;pic18f27j13.h: 12900: unsigned P :1;
[; ;pic18f27j13.h: 12901: unsigned D_nA :1;
[; ;pic18f27j13.h: 12902: unsigned CKE :1;
[; ;pic18f27j13.h: 12903: unsigned SMP :1;
[; ;pic18f27j13.h: 12904: };
[; ;pic18f27j13.h: 12905: struct {
[; ;pic18f27j13.h: 12906: unsigned :2;
[; ;pic18f27j13.h: 12907: unsigned R :1;
[; ;pic18f27j13.h: 12908: unsigned :2;
[; ;pic18f27j13.h: 12909: unsigned D :1;
[; ;pic18f27j13.h: 12910: };
[; ;pic18f27j13.h: 12911: struct {
[; ;pic18f27j13.h: 12912: unsigned :2;
[; ;pic18f27j13.h: 12913: unsigned R_W :1;
[; ;pic18f27j13.h: 12914: unsigned :2;
[; ;pic18f27j13.h: 12915: unsigned D_A :1;
[; ;pic18f27j13.h: 12916: };
[; ;pic18f27j13.h: 12917: struct {
[; ;pic18f27j13.h: 12918: unsigned :2;
[; ;pic18f27j13.h: 12919: unsigned nW :1;
[; ;pic18f27j13.h: 12920: unsigned :2;
[; ;pic18f27j13.h: 12921: unsigned nA :1;
[; ;pic18f27j13.h: 12922: };
[; ;pic18f27j13.h: 12923: struct {
[; ;pic18f27j13.h: 12924: unsigned :2;
[; ;pic18f27j13.h: 12925: unsigned NOT_WRITE :1;
[; ;pic18f27j13.h: 12926: };
[; ;pic18f27j13.h: 12927: struct {
[; ;pic18f27j13.h: 12928: unsigned :5;
[; ;pic18f27j13.h: 12929: unsigned NOT_ADDRESS :1;
[; ;pic18f27j13.h: 12930: };
[; ;pic18f27j13.h: 12931: struct {
[; ;pic18f27j13.h: 12932: unsigned :2;
[; ;pic18f27j13.h: 12933: unsigned nWRITE :1;
[; ;pic18f27j13.h: 12934: unsigned :2;
[; ;pic18f27j13.h: 12935: unsigned nADDRESS :1;
[; ;pic18f27j13.h: 12936: };
[; ;pic18f27j13.h: 12937: struct {
[; ;pic18f27j13.h: 12938: unsigned :2;
[; ;pic18f27j13.h: 12939: unsigned READ_WRITE :1;
[; ;pic18f27j13.h: 12940: unsigned :2;
[; ;pic18f27j13.h: 12941: unsigned DATA_ADDRESS :1;
[; ;pic18f27j13.h: 12942: };
[; ;pic18f27j13.h: 12943: struct {
[; ;pic18f27j13.h: 12944: unsigned :2;
[; ;pic18f27j13.h: 12945: unsigned I2C_READ :1;
[; ;pic18f27j13.h: 12946: unsigned I2C_START :1;
[; ;pic18f27j13.h: 12947: unsigned I2C_STOP :1;
[; ;pic18f27j13.h: 12948: unsigned I2C_DAT :1;
[; ;pic18f27j13.h: 12949: };
[; ;pic18f27j13.h: 12950: struct {
[; ;pic18f27j13.h: 12951: unsigned BF1 :1;
[; ;pic18f27j13.h: 12952: };
[; ;pic18f27j13.h: 12953: struct {
[; ;pic18f27j13.h: 12954: unsigned :6;
[; ;pic18f27j13.h: 12955: unsigned CKE1 :1;
[; ;pic18f27j13.h: 12956: };
[; ;pic18f27j13.h: 12957: struct {
[; ;pic18f27j13.h: 12958: unsigned :5;
[; ;pic18f27j13.h: 12959: unsigned DA :1;
[; ;pic18f27j13.h: 12960: };
[; ;pic18f27j13.h: 12961: struct {
[; ;pic18f27j13.h: 12962: unsigned :5;
[; ;pic18f27j13.h: 12963: unsigned DA1 :1;
[; ;pic18f27j13.h: 12964: };
[; ;pic18f27j13.h: 12965: struct {
[; ;pic18f27j13.h: 12966: unsigned :2;
[; ;pic18f27j13.h: 12967: unsigned RW :1;
[; ;pic18f27j13.h: 12968: };
[; ;pic18f27j13.h: 12969: struct {
[; ;pic18f27j13.h: 12970: unsigned :2;
[; ;pic18f27j13.h: 12971: unsigned RW1 :1;
[; ;pic18f27j13.h: 12972: };
[; ;pic18f27j13.h: 12973: struct {
[; ;pic18f27j13.h: 12974: unsigned :7;
[; ;pic18f27j13.h: 12975: unsigned SMP1 :1;
[; ;pic18f27j13.h: 12976: };
[; ;pic18f27j13.h: 12977: struct {
[; ;pic18f27j13.h: 12978: unsigned :3;
[; ;pic18f27j13.h: 12979: unsigned START :1;
[; ;pic18f27j13.h: 12980: };
[; ;pic18f27j13.h: 12981: struct {
[; ;pic18f27j13.h: 12982: unsigned :3;
[; ;pic18f27j13.h: 12983: unsigned START1 :1;
[; ;pic18f27j13.h: 12984: };
[; ;pic18f27j13.h: 12985: struct {
[; ;pic18f27j13.h: 12986: unsigned :4;
[; ;pic18f27j13.h: 12987: unsigned STOP :1;
[; ;pic18f27j13.h: 12988: };
[; ;pic18f27j13.h: 12989: struct {
[; ;pic18f27j13.h: 12990: unsigned :4;
[; ;pic18f27j13.h: 12991: unsigned STOP1 :1;
[; ;pic18f27j13.h: 12992: };
[; ;pic18f27j13.h: 12993: struct {
[; ;pic18f27j13.h: 12994: unsigned :1;
[; ;pic18f27j13.h: 12995: unsigned UA1 :1;
[; ;pic18f27j13.h: 12996: };
[; ;pic18f27j13.h: 12997: struct {
[; ;pic18f27j13.h: 12998: unsigned :2;
[; ;pic18f27j13.h: 12999: unsigned NOT_W :1;
[; ;pic18f27j13.h: 13000: };
[; ;pic18f27j13.h: 13001: struct {
[; ;pic18f27j13.h: 13002: unsigned :5;
[; ;pic18f27j13.h: 13003: unsigned NOT_A :1;
[; ;pic18f27j13.h: 13004: };
[; ;pic18f27j13.h: 13005: } SSP1STATbits_t;
[; ;pic18f27j13.h: 13006: extern volatile SSP1STATbits_t SSP1STATbits @ 0xFC7;
[; ;pic18f27j13.h: 13209: typedef union {
[; ;pic18f27j13.h: 13210: struct {
[; ;pic18f27j13.h: 13211: unsigned :2;
[; ;pic18f27j13.h: 13212: unsigned R_NOT_W :1;
[; ;pic18f27j13.h: 13213: };
[; ;pic18f27j13.h: 13214: struct {
[; ;pic18f27j13.h: 13215: unsigned :5;
[; ;pic18f27j13.h: 13216: unsigned D_NOT_A :1;
[; ;pic18f27j13.h: 13217: };
[; ;pic18f27j13.h: 13218: struct {
[; ;pic18f27j13.h: 13219: unsigned BF :1;
[; ;pic18f27j13.h: 13220: unsigned UA :1;
[; ;pic18f27j13.h: 13221: unsigned R_nW :1;
[; ;pic18f27j13.h: 13222: unsigned S :1;
[; ;pic18f27j13.h: 13223: unsigned P :1;
[; ;pic18f27j13.h: 13224: unsigned D_nA :1;
[; ;pic18f27j13.h: 13225: unsigned CKE :1;
[; ;pic18f27j13.h: 13226: unsigned SMP :1;
[; ;pic18f27j13.h: 13227: };
[; ;pic18f27j13.h: 13228: struct {
[; ;pic18f27j13.h: 13229: unsigned :2;
[; ;pic18f27j13.h: 13230: unsigned R :1;
[; ;pic18f27j13.h: 13231: unsigned :2;
[; ;pic18f27j13.h: 13232: unsigned D :1;
[; ;pic18f27j13.h: 13233: };
[; ;pic18f27j13.h: 13234: struct {
[; ;pic18f27j13.h: 13235: unsigned :2;
[; ;pic18f27j13.h: 13236: unsigned R_W :1;
[; ;pic18f27j13.h: 13237: unsigned :2;
[; ;pic18f27j13.h: 13238: unsigned D_A :1;
[; ;pic18f27j13.h: 13239: };
[; ;pic18f27j13.h: 13240: struct {
[; ;pic18f27j13.h: 13241: unsigned :2;
[; ;pic18f27j13.h: 13242: unsigned nW :1;
[; ;pic18f27j13.h: 13243: unsigned :2;
[; ;pic18f27j13.h: 13244: unsigned nA :1;
[; ;pic18f27j13.h: 13245: };
[; ;pic18f27j13.h: 13246: struct {
[; ;pic18f27j13.h: 13247: unsigned :2;
[; ;pic18f27j13.h: 13248: unsigned NOT_WRITE :1;
[; ;pic18f27j13.h: 13249: };
[; ;pic18f27j13.h: 13250: struct {
[; ;pic18f27j13.h: 13251: unsigned :5;
[; ;pic18f27j13.h: 13252: unsigned NOT_ADDRESS :1;
[; ;pic18f27j13.h: 13253: };
[; ;pic18f27j13.h: 13254: struct {
[; ;pic18f27j13.h: 13255: unsigned :2;
[; ;pic18f27j13.h: 13256: unsigned nWRITE :1;
[; ;pic18f27j13.h: 13257: unsigned :2;
[; ;pic18f27j13.h: 13258: unsigned nADDRESS :1;
[; ;pic18f27j13.h: 13259: };
[; ;pic18f27j13.h: 13260: struct {
[; ;pic18f27j13.h: 13261: unsigned :2;
[; ;pic18f27j13.h: 13262: unsigned READ_WRITE :1;
[; ;pic18f27j13.h: 13263: unsigned :2;
[; ;pic18f27j13.h: 13264: unsigned DATA_ADDRESS :1;
[; ;pic18f27j13.h: 13265: };
[; ;pic18f27j13.h: 13266: struct {
[; ;pic18f27j13.h: 13267: unsigned :2;
[; ;pic18f27j13.h: 13268: unsigned I2C_READ :1;
[; ;pic18f27j13.h: 13269: unsigned I2C_START :1;
[; ;pic18f27j13.h: 13270: unsigned I2C_STOP :1;
[; ;pic18f27j13.h: 13271: unsigned I2C_DAT :1;
[; ;pic18f27j13.h: 13272: };
[; ;pic18f27j13.h: 13273: struct {
[; ;pic18f27j13.h: 13274: unsigned BF1 :1;
[; ;pic18f27j13.h: 13275: };
[; ;pic18f27j13.h: 13276: struct {
[; ;pic18f27j13.h: 13277: unsigned :6;
[; ;pic18f27j13.h: 13278: unsigned CKE1 :1;
[; ;pic18f27j13.h: 13279: };
[; ;pic18f27j13.h: 13280: struct {
[; ;pic18f27j13.h: 13281: unsigned :5;
[; ;pic18f27j13.h: 13282: unsigned DA :1;
[; ;pic18f27j13.h: 13283: };
[; ;pic18f27j13.h: 13284: struct {
[; ;pic18f27j13.h: 13285: unsigned :5;
[; ;pic18f27j13.h: 13286: unsigned DA1 :1;
[; ;pic18f27j13.h: 13287: };
[; ;pic18f27j13.h: 13288: struct {
[; ;pic18f27j13.h: 13289: unsigned :2;
[; ;pic18f27j13.h: 13290: unsigned RW :1;
[; ;pic18f27j13.h: 13291: };
[; ;pic18f27j13.h: 13292: struct {
[; ;pic18f27j13.h: 13293: unsigned :2;
[; ;pic18f27j13.h: 13294: unsigned RW1 :1;
[; ;pic18f27j13.h: 13295: };
[; ;pic18f27j13.h: 13296: struct {
[; ;pic18f27j13.h: 13297: unsigned :7;
[; ;pic18f27j13.h: 13298: unsigned SMP1 :1;
[; ;pic18f27j13.h: 13299: };
[; ;pic18f27j13.h: 13300: struct {
[; ;pic18f27j13.h: 13301: unsigned :3;
[; ;pic18f27j13.h: 13302: unsigned START :1;
[; ;pic18f27j13.h: 13303: };
[; ;pic18f27j13.h: 13304: struct {
[; ;pic18f27j13.h: 13305: unsigned :3;
[; ;pic18f27j13.h: 13306: unsigned START1 :1;
[; ;pic18f27j13.h: 13307: };
[; ;pic18f27j13.h: 13308: struct {
[; ;pic18f27j13.h: 13309: unsigned :4;
[; ;pic18f27j13.h: 13310: unsigned STOP :1;
[; ;pic18f27j13.h: 13311: };
[; ;pic18f27j13.h: 13312: struct {
[; ;pic18f27j13.h: 13313: unsigned :4;
[; ;pic18f27j13.h: 13314: unsigned STOP1 :1;
[; ;pic18f27j13.h: 13315: };
[; ;pic18f27j13.h: 13316: struct {
[; ;pic18f27j13.h: 13317: unsigned :1;
[; ;pic18f27j13.h: 13318: unsigned UA1 :1;
[; ;pic18f27j13.h: 13319: };
[; ;pic18f27j13.h: 13320: struct {
[; ;pic18f27j13.h: 13321: unsigned :2;
[; ;pic18f27j13.h: 13322: unsigned NOT_W :1;
[; ;pic18f27j13.h: 13323: };
[; ;pic18f27j13.h: 13324: struct {
[; ;pic18f27j13.h: 13325: unsigned :5;
[; ;pic18f27j13.h: 13326: unsigned NOT_A :1;
[; ;pic18f27j13.h: 13327: };
[; ;pic18f27j13.h: 13328: } SSPSTATbits_t;
[; ;pic18f27j13.h: 13329: extern volatile SSPSTATbits_t SSPSTATbits @ 0xFC7;
[; ;pic18f27j13.h: 13533: extern volatile unsigned char SSP1ADD @ 0xFC8;
"13535
[; ;pic18f27j13.h: 13535: asm("SSP1ADD equ 0FC8h");
[; <" SSP1ADD equ 0FC8h ;# ">
[; ;pic18f27j13.h: 13538: extern volatile unsigned char SSPADD @ 0xFC8;
"13540
[; ;pic18f27j13.h: 13540: asm("SSPADD equ 0FC8h");
[; <" SSPADD equ 0FC8h ;# ">
[; ;pic18f27j13.h: 13543: typedef union {
[; ;pic18f27j13.h: 13544: struct {
[; ;pic18f27j13.h: 13545: unsigned SSPADD :8;
[; ;pic18f27j13.h: 13546: };
[; ;pic18f27j13.h: 13547: struct {
[; ;pic18f27j13.h: 13548: unsigned MSK0 :1;
[; ;pic18f27j13.h: 13549: };
[; ;pic18f27j13.h: 13550: struct {
[; ;pic18f27j13.h: 13551: unsigned MSK01 :1;
[; ;pic18f27j13.h: 13552: };
[; ;pic18f27j13.h: 13553: struct {
[; ;pic18f27j13.h: 13554: unsigned :1;
[; ;pic18f27j13.h: 13555: unsigned MSK1 :1;
[; ;pic18f27j13.h: 13556: };
[; ;pic18f27j13.h: 13557: struct {
[; ;pic18f27j13.h: 13558: unsigned :1;
[; ;pic18f27j13.h: 13559: unsigned MSK11 :1;
[; ;pic18f27j13.h: 13560: };
[; ;pic18f27j13.h: 13561: struct {
[; ;pic18f27j13.h: 13562: unsigned :2;
[; ;pic18f27j13.h: 13563: unsigned MSK2 :1;
[; ;pic18f27j13.h: 13564: };
[; ;pic18f27j13.h: 13565: struct {
[; ;pic18f27j13.h: 13566: unsigned :2;
[; ;pic18f27j13.h: 13567: unsigned MSK21 :1;
[; ;pic18f27j13.h: 13568: };
[; ;pic18f27j13.h: 13569: struct {
[; ;pic18f27j13.h: 13570: unsigned :3;
[; ;pic18f27j13.h: 13571: unsigned MSK3 :1;
[; ;pic18f27j13.h: 13572: };
[; ;pic18f27j13.h: 13573: struct {
[; ;pic18f27j13.h: 13574: unsigned :3;
[; ;pic18f27j13.h: 13575: unsigned MSK31 :1;
[; ;pic18f27j13.h: 13576: };
[; ;pic18f27j13.h: 13577: struct {
[; ;pic18f27j13.h: 13578: unsigned :4;
[; ;pic18f27j13.h: 13579: unsigned MSK4 :1;
[; ;pic18f27j13.h: 13580: };
[; ;pic18f27j13.h: 13581: struct {
[; ;pic18f27j13.h: 13582: unsigned :4;
[; ;pic18f27j13.h: 13583: unsigned MSK41 :1;
[; ;pic18f27j13.h: 13584: };
[; ;pic18f27j13.h: 13585: struct {
[; ;pic18f27j13.h: 13586: unsigned :5;
[; ;pic18f27j13.h: 13587: unsigned MSK5 :1;
[; ;pic18f27j13.h: 13588: };
[; ;pic18f27j13.h: 13589: struct {
[; ;pic18f27j13.h: 13590: unsigned :5;
[; ;pic18f27j13.h: 13591: unsigned MSK51 :1;
[; ;pic18f27j13.h: 13592: };
[; ;pic18f27j13.h: 13593: struct {
[; ;pic18f27j13.h: 13594: unsigned :6;
[; ;pic18f27j13.h: 13595: unsigned MSK6 :1;
[; ;pic18f27j13.h: 13596: };
[; ;pic18f27j13.h: 13597: struct {
[; ;pic18f27j13.h: 13598: unsigned :6;
[; ;pic18f27j13.h: 13599: unsigned MSK61 :1;
[; ;pic18f27j13.h: 13600: };
[; ;pic18f27j13.h: 13601: struct {
[; ;pic18f27j13.h: 13602: unsigned :7;
[; ;pic18f27j13.h: 13603: unsigned MSK7 :1;
[; ;pic18f27j13.h: 13604: };
[; ;pic18f27j13.h: 13605: struct {
[; ;pic18f27j13.h: 13606: unsigned :7;
[; ;pic18f27j13.h: 13607: unsigned MSK71 :1;
[; ;pic18f27j13.h: 13608: };
[; ;pic18f27j13.h: 13609: } SSP1ADDbits_t;
[; ;pic18f27j13.h: 13610: extern volatile SSP1ADDbits_t SSP1ADDbits @ 0xFC8;
[; ;pic18f27j13.h: 13698: typedef union {
[; ;pic18f27j13.h: 13699: struct {
[; ;pic18f27j13.h: 13700: unsigned SSPADD :8;
[; ;pic18f27j13.h: 13701: };
[; ;pic18f27j13.h: 13702: struct {
[; ;pic18f27j13.h: 13703: unsigned MSK0 :1;
[; ;pic18f27j13.h: 13704: };
[; ;pic18f27j13.h: 13705: struct {
[; ;pic18f27j13.h: 13706: unsigned MSK01 :1;
[; ;pic18f27j13.h: 13707: };
[; ;pic18f27j13.h: 13708: struct {
[; ;pic18f27j13.h: 13709: unsigned :1;
[; ;pic18f27j13.h: 13710: unsigned MSK1 :1;
[; ;pic18f27j13.h: 13711: };
[; ;pic18f27j13.h: 13712: struct {
[; ;pic18f27j13.h: 13713: unsigned :1;
[; ;pic18f27j13.h: 13714: unsigned MSK11 :1;
[; ;pic18f27j13.h: 13715: };
[; ;pic18f27j13.h: 13716: struct {
[; ;pic18f27j13.h: 13717: unsigned :2;
[; ;pic18f27j13.h: 13718: unsigned MSK2 :1;
[; ;pic18f27j13.h: 13719: };
[; ;pic18f27j13.h: 13720: struct {
[; ;pic18f27j13.h: 13721: unsigned :2;
[; ;pic18f27j13.h: 13722: unsigned MSK21 :1;
[; ;pic18f27j13.h: 13723: };
[; ;pic18f27j13.h: 13724: struct {
[; ;pic18f27j13.h: 13725: unsigned :3;
[; ;pic18f27j13.h: 13726: unsigned MSK3 :1;
[; ;pic18f27j13.h: 13727: };
[; ;pic18f27j13.h: 13728: struct {
[; ;pic18f27j13.h: 13729: unsigned :3;
[; ;pic18f27j13.h: 13730: unsigned MSK31 :1;
[; ;pic18f27j13.h: 13731: };
[; ;pic18f27j13.h: 13732: struct {
[; ;pic18f27j13.h: 13733: unsigned :4;
[; ;pic18f27j13.h: 13734: unsigned MSK4 :1;
[; ;pic18f27j13.h: 13735: };
[; ;pic18f27j13.h: 13736: struct {
[; ;pic18f27j13.h: 13737: unsigned :4;
[; ;pic18f27j13.h: 13738: unsigned MSK41 :1;
[; ;pic18f27j13.h: 13739: };
[; ;pic18f27j13.h: 13740: struct {
[; ;pic18f27j13.h: 13741: unsigned :5;
[; ;pic18f27j13.h: 13742: unsigned MSK5 :1;
[; ;pic18f27j13.h: 13743: };
[; ;pic18f27j13.h: 13744: struct {
[; ;pic18f27j13.h: 13745: unsigned :5;
[; ;pic18f27j13.h: 13746: unsigned MSK51 :1;
[; ;pic18f27j13.h: 13747: };
[; ;pic18f27j13.h: 13748: struct {
[; ;pic18f27j13.h: 13749: unsigned :6;
[; ;pic18f27j13.h: 13750: unsigned MSK6 :1;
[; ;pic18f27j13.h: 13751: };
[; ;pic18f27j13.h: 13752: struct {
[; ;pic18f27j13.h: 13753: unsigned :6;
[; ;pic18f27j13.h: 13754: unsigned MSK61 :1;
[; ;pic18f27j13.h: 13755: };
[; ;pic18f27j13.h: 13756: struct {
[; ;pic18f27j13.h: 13757: unsigned :7;
[; ;pic18f27j13.h: 13758: unsigned MSK7 :1;
[; ;pic18f27j13.h: 13759: };
[; ;pic18f27j13.h: 13760: struct {
[; ;pic18f27j13.h: 13761: unsigned :7;
[; ;pic18f27j13.h: 13762: unsigned MSK71 :1;
[; ;pic18f27j13.h: 13763: };
[; ;pic18f27j13.h: 13764: } SSPADDbits_t;
[; ;pic18f27j13.h: 13765: extern volatile SSPADDbits_t SSPADDbits @ 0xFC8;
[; ;pic18f27j13.h: 13854: extern volatile unsigned char SSP1MSK @ 0xFC8;
"13856
[; ;pic18f27j13.h: 13856: asm("SSP1MSK equ 0FC8h");
[; <" SSP1MSK equ 0FC8h ;# ">
[; ;pic18f27j13.h: 13859: typedef union {
[; ;pic18f27j13.h: 13860: struct {
[; ;pic18f27j13.h: 13861: unsigned MSK0 :1;
[; ;pic18f27j13.h: 13862: unsigned MSK1 :1;
[; ;pic18f27j13.h: 13863: unsigned MSK2 :1;
[; ;pic18f27j13.h: 13864: unsigned MSK3 :1;
[; ;pic18f27j13.h: 13865: unsigned MSK4 :1;
[; ;pic18f27j13.h: 13866: unsigned MSK5 :1;
[; ;pic18f27j13.h: 13867: unsigned MSK6 :1;
[; ;pic18f27j13.h: 13868: unsigned MSK7 :1;
[; ;pic18f27j13.h: 13869: };
[; ;pic18f27j13.h: 13870: } SSP1MSKbits_t;
[; ;pic18f27j13.h: 13871: extern volatile SSP1MSKbits_t SSP1MSKbits @ 0xFC8;
[; ;pic18f27j13.h: 13915: extern volatile unsigned char SSP1BUF @ 0xFC9;
"13917
[; ;pic18f27j13.h: 13917: asm("SSP1BUF equ 0FC9h");
[; <" SSP1BUF equ 0FC9h ;# ">
[; ;pic18f27j13.h: 13920: extern volatile unsigned char SSPBUF @ 0xFC9;
"13922
[; ;pic18f27j13.h: 13922: asm("SSPBUF equ 0FC9h");
[; <" SSPBUF equ 0FC9h ;# ">
[; ;pic18f27j13.h: 13925: typedef union {
[; ;pic18f27j13.h: 13926: struct {
[; ;pic18f27j13.h: 13927: unsigned SSPBUF :8;
[; ;pic18f27j13.h: 13928: };
[; ;pic18f27j13.h: 13929: } SSP1BUFbits_t;
[; ;pic18f27j13.h: 13930: extern volatile SSP1BUFbits_t SSP1BUFbits @ 0xFC9;
[; ;pic18f27j13.h: 13938: typedef union {
[; ;pic18f27j13.h: 13939: struct {
[; ;pic18f27j13.h: 13940: unsigned SSPBUF :8;
[; ;pic18f27j13.h: 13941: };
[; ;pic18f27j13.h: 13942: } SSPBUFbits_t;
[; ;pic18f27j13.h: 13943: extern volatile SSPBUFbits_t SSPBUFbits @ 0xFC9;
[; ;pic18f27j13.h: 13952: extern volatile unsigned char T2CON @ 0xFCA;
"13954
[; ;pic18f27j13.h: 13954: asm("T2CON equ 0FCAh");
[; <" T2CON equ 0FCAh ;# ">
[; ;pic18f27j13.h: 13957: typedef union {
[; ;pic18f27j13.h: 13958: struct {
[; ;pic18f27j13.h: 13959: unsigned T2CKPS :2;
[; ;pic18f27j13.h: 13960: unsigned TMR2ON :1;
[; ;pic18f27j13.h: 13961: unsigned T2OUTPS :4;
[; ;pic18f27j13.h: 13962: };
[; ;pic18f27j13.h: 13963: struct {
[; ;pic18f27j13.h: 13964: unsigned T2CKPS0 :1;
[; ;pic18f27j13.h: 13965: unsigned T2CKPS1 :1;
[; ;pic18f27j13.h: 13966: unsigned :1;
[; ;pic18f27j13.h: 13967: unsigned T2OUTPS0 :1;
[; ;pic18f27j13.h: 13968: unsigned T2OUTPS1 :1;
[; ;pic18f27j13.h: 13969: unsigned T2OUTPS2 :1;
[; ;pic18f27j13.h: 13970: unsigned T2OUTPS3 :1;
[; ;pic18f27j13.h: 13971: };
[; ;pic18f27j13.h: 13972: } T2CONbits_t;
[; ;pic18f27j13.h: 13973: extern volatile T2CONbits_t T2CONbits @ 0xFCA;
[; ;pic18f27j13.h: 14022: extern volatile unsigned char PR2 @ 0xFCB;
"14024
[; ;pic18f27j13.h: 14024: asm("PR2 equ 0FCBh");
[; <" PR2 equ 0FCBh ;# ">
[; ;pic18f27j13.h: 14027: extern volatile unsigned char MEMCON @ 0xFCB;
"14029
[; ;pic18f27j13.h: 14029: asm("MEMCON equ 0FCBh");
[; <" MEMCON equ 0FCBh ;# ">
[; ;pic18f27j13.h: 14032: typedef union {
[; ;pic18f27j13.h: 14033: struct {
[; ;pic18f27j13.h: 14034: unsigned PR2 :8;
[; ;pic18f27j13.h: 14035: };
[; ;pic18f27j13.h: 14036: } PR2bits_t;
[; ;pic18f27j13.h: 14037: extern volatile PR2bits_t PR2bits @ 0xFCB;
[; ;pic18f27j13.h: 14045: typedef union {
[; ;pic18f27j13.h: 14046: struct {
[; ;pic18f27j13.h: 14047: unsigned PR2 :8;
[; ;pic18f27j13.h: 14048: };
[; ;pic18f27j13.h: 14049: } MEMCONbits_t;
[; ;pic18f27j13.h: 14050: extern volatile MEMCONbits_t MEMCONbits @ 0xFCB;
[; ;pic18f27j13.h: 14059: extern volatile unsigned char TMR2 @ 0xFCC;
"14061
[; ;pic18f27j13.h: 14061: asm("TMR2 equ 0FCCh");
[; <" TMR2 equ 0FCCh ;# ">
[; ;pic18f27j13.h: 14064: typedef union {
[; ;pic18f27j13.h: 14065: struct {
[; ;pic18f27j13.h: 14066: unsigned TMR2 :8;
[; ;pic18f27j13.h: 14067: };
[; ;pic18f27j13.h: 14068: } TMR2bits_t;
[; ;pic18f27j13.h: 14069: extern volatile TMR2bits_t TMR2bits @ 0xFCC;
[; ;pic18f27j13.h: 14078: extern volatile unsigned char T1CON @ 0xFCD;
"14080
[; ;pic18f27j13.h: 14080: asm("T1CON equ 0FCDh");
[; <" T1CON equ 0FCDh ;# ">
[; ;pic18f27j13.h: 14083: typedef union {
[; ;pic18f27j13.h: 14084: struct {
[; ;pic18f27j13.h: 14085: unsigned :2;
[; ;pic18f27j13.h: 14086: unsigned NOT_T1SYNC :1;
[; ;pic18f27j13.h: 14087: };
[; ;pic18f27j13.h: 14088: struct {
[; ;pic18f27j13.h: 14089: unsigned TMR1ON :1;
[; ;pic18f27j13.h: 14090: unsigned RD16 :1;
[; ;pic18f27j13.h: 14091: unsigned nT1SYNC :1;
[; ;pic18f27j13.h: 14092: unsigned T1OSCEN :1;
[; ;pic18f27j13.h: 14093: unsigned T1CKPS :2;
[; ;pic18f27j13.h: 14094: unsigned TMR1CS :2;
[; ;pic18f27j13.h: 14095: };
[; ;pic18f27j13.h: 14096: struct {
[; ;pic18f27j13.h: 14097: unsigned :4;
[; ;pic18f27j13.h: 14098: unsigned T1CKPS0 :1;
[; ;pic18f27j13.h: 14099: unsigned T1CKPS1 :1;
[; ;pic18f27j13.h: 14100: unsigned TMR1CS0 :1;
[; ;pic18f27j13.h: 14101: unsigned TMR1CS1 :1;
[; ;pic18f27j13.h: 14102: };
[; ;pic18f27j13.h: 14103: struct {
[; ;pic18f27j13.h: 14104: unsigned :3;
[; ;pic18f27j13.h: 14105: unsigned SOSCEN :1;
[; ;pic18f27j13.h: 14106: };
[; ;pic18f27j13.h: 14107: struct {
[; ;pic18f27j13.h: 14108: unsigned :7;
[; ;pic18f27j13.h: 14109: unsigned T1RD16 :1;
[; ;pic18f27j13.h: 14110: };
[; ;pic18f27j13.h: 14111: } T1CONbits_t;
[; ;pic18f27j13.h: 14112: extern volatile T1CONbits_t T1CONbits @ 0xFCD;
[; ;pic18f27j13.h: 14181: extern volatile unsigned short TMR1 @ 0xFCE;
"14183
[; ;pic18f27j13.h: 14183: asm("TMR1 equ 0FCEh");
[; <" TMR1 equ 0FCEh ;# ">
[; ;pic18f27j13.h: 14187: extern volatile unsigned char TMR1L @ 0xFCE;
"14189
[; ;pic18f27j13.h: 14189: asm("TMR1L equ 0FCEh");
[; <" TMR1L equ 0FCEh ;# ">
[; ;pic18f27j13.h: 14192: typedef union {
[; ;pic18f27j13.h: 14193: struct {
[; ;pic18f27j13.h: 14194: unsigned TMR1L :8;
[; ;pic18f27j13.h: 14195: };
[; ;pic18f27j13.h: 14196: } TMR1Lbits_t;
[; ;pic18f27j13.h: 14197: extern volatile TMR1Lbits_t TMR1Lbits @ 0xFCE;
[; ;pic18f27j13.h: 14206: extern volatile unsigned char TMR1H @ 0xFCF;
"14208
[; ;pic18f27j13.h: 14208: asm("TMR1H equ 0FCFh");
[; <" TMR1H equ 0FCFh ;# ">
[; ;pic18f27j13.h: 14211: typedef union {
[; ;pic18f27j13.h: 14212: struct {
[; ;pic18f27j13.h: 14213: unsigned TMR1H :8;
[; ;pic18f27j13.h: 14214: };
[; ;pic18f27j13.h: 14215: } TMR1Hbits_t;
[; ;pic18f27j13.h: 14216: extern volatile TMR1Hbits_t TMR1Hbits @ 0xFCF;
[; ;pic18f27j13.h: 14225: extern volatile unsigned char RCON @ 0xFD0;
"14227
[; ;pic18f27j13.h: 14227: asm("RCON equ 0FD0h");
[; <" RCON equ 0FD0h ;# ">
[; ;pic18f27j13.h: 14230: typedef union {
[; ;pic18f27j13.h: 14231: struct {
[; ;pic18f27j13.h: 14232: unsigned NOT_BOR :1;
[; ;pic18f27j13.h: 14233: };
[; ;pic18f27j13.h: 14234: struct {
[; ;pic18f27j13.h: 14235: unsigned :1;
[; ;pic18f27j13.h: 14236: unsigned NOT_POR :1;
[; ;pic18f27j13.h: 14237: };
[; ;pic18f27j13.h: 14238: struct {
[; ;pic18f27j13.h: 14239: unsigned :2;
[; ;pic18f27j13.h: 14240: unsigned NOT_PD :1;
[; ;pic18f27j13.h: 14241: };
[; ;pic18f27j13.h: 14242: struct {
[; ;pic18f27j13.h: 14243: unsigned :3;
[; ;pic18f27j13.h: 14244: unsigned NOT_TO :1;
[; ;pic18f27j13.h: 14245: };
[; ;pic18f27j13.h: 14246: struct {
[; ;pic18f27j13.h: 14247: unsigned :4;
[; ;pic18f27j13.h: 14248: unsigned NOT_RI :1;
[; ;pic18f27j13.h: 14249: };
[; ;pic18f27j13.h: 14250: struct {
[; ;pic18f27j13.h: 14251: unsigned :5;
[; ;pic18f27j13.h: 14252: unsigned NOT_CM :1;
[; ;pic18f27j13.h: 14253: };
[; ;pic18f27j13.h: 14254: struct {
[; ;pic18f27j13.h: 14255: unsigned nBOR :1;
[; ;pic18f27j13.h: 14256: unsigned nPOR :1;
[; ;pic18f27j13.h: 14257: unsigned nPD :1;
[; ;pic18f27j13.h: 14258: unsigned nTO :1;
[; ;pic18f27j13.h: 14259: unsigned nRI :1;
[; ;pic18f27j13.h: 14260: unsigned nCM :1;
[; ;pic18f27j13.h: 14261: unsigned :1;
[; ;pic18f27j13.h: 14262: unsigned IPEN :1;
[; ;pic18f27j13.h: 14263: };
[; ;pic18f27j13.h: 14264: struct {
[; ;pic18f27j13.h: 14265: unsigned BOR :1;
[; ;pic18f27j13.h: 14266: unsigned POR :1;
[; ;pic18f27j13.h: 14267: unsigned PD :1;
[; ;pic18f27j13.h: 14268: unsigned TO :1;
[; ;pic18f27j13.h: 14269: unsigned RI :1;
[; ;pic18f27j13.h: 14270: unsigned CM :1;
[; ;pic18f27j13.h: 14271: };
[; ;pic18f27j13.h: 14272: } RCONbits_t;
[; ;pic18f27j13.h: 14273: extern volatile RCONbits_t RCONbits @ 0xFD0;
[; ;pic18f27j13.h: 14372: extern volatile unsigned char CM2CON @ 0xFD1;
"14374
[; ;pic18f27j13.h: 14374: asm("CM2CON equ 0FD1h");
[; <" CM2CON equ 0FD1h ;# ">
[; ;pic18f27j13.h: 14377: extern volatile unsigned char CM2CON1 @ 0xFD1;
"14379
[; ;pic18f27j13.h: 14379: asm("CM2CON1 equ 0FD1h");
[; <" CM2CON1 equ 0FD1h ;# ">
[; ;pic18f27j13.h: 14382: typedef union {
[; ;pic18f27j13.h: 14383: struct {
[; ;pic18f27j13.h: 14384: unsigned CCH :2;
[; ;pic18f27j13.h: 14385: unsigned CREF :1;
[; ;pic18f27j13.h: 14386: unsigned EVPOL :2;
[; ;pic18f27j13.h: 14387: unsigned CPOL :1;
[; ;pic18f27j13.h: 14388: unsigned COE :1;
[; ;pic18f27j13.h: 14389: unsigned CON :1;
[; ;pic18f27j13.h: 14390: };
[; ;pic18f27j13.h: 14391: struct {
[; ;pic18f27j13.h: 14392: unsigned CCH0 :1;
[; ;pic18f27j13.h: 14393: unsigned CCH1 :1;
[; ;pic18f27j13.h: 14394: unsigned :1;
[; ;pic18f27j13.h: 14395: unsigned EVPOL0 :1;
[; ;pic18f27j13.h: 14396: unsigned EVPOL1 :1;
[; ;pic18f27j13.h: 14397: };
[; ;pic18f27j13.h: 14398: struct {
[; ;pic18f27j13.h: 14399: unsigned CCH02 :1;
[; ;pic18f27j13.h: 14400: };
[; ;pic18f27j13.h: 14401: struct {
[; ;pic18f27j13.h: 14402: unsigned :1;
[; ;pic18f27j13.h: 14403: unsigned CCH12 :1;
[; ;pic18f27j13.h: 14404: };
[; ;pic18f27j13.h: 14405: struct {
[; ;pic18f27j13.h: 14406: unsigned :6;
[; ;pic18f27j13.h: 14407: unsigned COE2 :1;
[; ;pic18f27j13.h: 14408: };
[; ;pic18f27j13.h: 14409: struct {
[; ;pic18f27j13.h: 14410: unsigned :7;
[; ;pic18f27j13.h: 14411: unsigned CON2 :1;
[; ;pic18f27j13.h: 14412: };
[; ;pic18f27j13.h: 14413: struct {
[; ;pic18f27j13.h: 14414: unsigned :5;
[; ;pic18f27j13.h: 14415: unsigned CPOL2 :1;
[; ;pic18f27j13.h: 14416: };
[; ;pic18f27j13.h: 14417: struct {
[; ;pic18f27j13.h: 14418: unsigned :2;
[; ;pic18f27j13.h: 14419: unsigned CREF2 :1;
[; ;pic18f27j13.h: 14420: };
[; ;pic18f27j13.h: 14421: struct {
[; ;pic18f27j13.h: 14422: unsigned :3;
[; ;pic18f27j13.h: 14423: unsigned EVPOL02 :1;
[; ;pic18f27j13.h: 14424: };
[; ;pic18f27j13.h: 14425: struct {
[; ;pic18f27j13.h: 14426: unsigned :4;
[; ;pic18f27j13.h: 14427: unsigned EVPOL12 :1;
[; ;pic18f27j13.h: 14428: };
[; ;pic18f27j13.h: 14429: } CM2CONbits_t;
[; ;pic18f27j13.h: 14430: extern volatile CM2CONbits_t CM2CONbits @ 0xFD1;
[; ;pic18f27j13.h: 14523: typedef union {
[; ;pic18f27j13.h: 14524: struct {
[; ;pic18f27j13.h: 14525: unsigned CCH :2;
[; ;pic18f27j13.h: 14526: unsigned CREF :1;
[; ;pic18f27j13.h: 14527: unsigned EVPOL :2;
[; ;pic18f27j13.h: 14528: unsigned CPOL :1;
[; ;pic18f27j13.h: 14529: unsigned COE :1;
[; ;pic18f27j13.h: 14530: unsigned CON :1;
[; ;pic18f27j13.h: 14531: };
[; ;pic18f27j13.h: 14532: struct {
[; ;pic18f27j13.h: 14533: unsigned CCH0 :1;
[; ;pic18f27j13.h: 14534: unsigned CCH1 :1;
[; ;pic18f27j13.h: 14535: unsigned :1;
[; ;pic18f27j13.h: 14536: unsigned EVPOL0 :1;
[; ;pic18f27j13.h: 14537: unsigned EVPOL1 :1;
[; ;pic18f27j13.h: 14538: };
[; ;pic18f27j13.h: 14539: struct {
[; ;pic18f27j13.h: 14540: unsigned CCH02 :1;
[; ;pic18f27j13.h: 14541: };
[; ;pic18f27j13.h: 14542: struct {
[; ;pic18f27j13.h: 14543: unsigned :1;
[; ;pic18f27j13.h: 14544: unsigned CCH12 :1;
[; ;pic18f27j13.h: 14545: };
[; ;pic18f27j13.h: 14546: struct {
[; ;pic18f27j13.h: 14547: unsigned :6;
[; ;pic18f27j13.h: 14548: unsigned COE2 :1;
[; ;pic18f27j13.h: 14549: };
[; ;pic18f27j13.h: 14550: struct {
[; ;pic18f27j13.h: 14551: unsigned :7;
[; ;pic18f27j13.h: 14552: unsigned CON2 :1;
[; ;pic18f27j13.h: 14553: };
[; ;pic18f27j13.h: 14554: struct {
[; ;pic18f27j13.h: 14555: unsigned :5;
[; ;pic18f27j13.h: 14556: unsigned CPOL2 :1;
[; ;pic18f27j13.h: 14557: };
[; ;pic18f27j13.h: 14558: struct {
[; ;pic18f27j13.h: 14559: unsigned :2;
[; ;pic18f27j13.h: 14560: unsigned CREF2 :1;
[; ;pic18f27j13.h: 14561: };
[; ;pic18f27j13.h: 14562: struct {
[; ;pic18f27j13.h: 14563: unsigned :3;
[; ;pic18f27j13.h: 14564: unsigned EVPOL02 :1;
[; ;pic18f27j13.h: 14565: };
[; ;pic18f27j13.h: 14566: struct {
[; ;pic18f27j13.h: 14567: unsigned :4;
[; ;pic18f27j13.h: 14568: unsigned EVPOL12 :1;
[; ;pic18f27j13.h: 14569: };
[; ;pic18f27j13.h: 14570: } CM2CON1bits_t;
[; ;pic18f27j13.h: 14571: extern volatile CM2CON1bits_t CM2CON1bits @ 0xFD1;
[; ;pic18f27j13.h: 14665: extern volatile unsigned char CM1CON @ 0xFD2;
"14667
[; ;pic18f27j13.h: 14667: asm("CM1CON equ 0FD2h");
[; <" CM1CON equ 0FD2h ;# ">
[; ;pic18f27j13.h: 14670: extern volatile unsigned char CM1CON1 @ 0xFD2;
"14672
[; ;pic18f27j13.h: 14672: asm("CM1CON1 equ 0FD2h");
[; <" CM1CON1 equ 0FD2h ;# ">
[; ;pic18f27j13.h: 14675: typedef union {
[; ;pic18f27j13.h: 14676: struct {
[; ;pic18f27j13.h: 14677: unsigned CCH :2;
[; ;pic18f27j13.h: 14678: unsigned CREF :1;
[; ;pic18f27j13.h: 14679: unsigned EVPOL :2;
[; ;pic18f27j13.h: 14680: unsigned CPOL :1;
[; ;pic18f27j13.h: 14681: unsigned COE :1;
[; ;pic18f27j13.h: 14682: unsigned CON :1;
[; ;pic18f27j13.h: 14683: };
[; ;pic18f27j13.h: 14684: struct {
[; ;pic18f27j13.h: 14685: unsigned CCH0 :1;
[; ;pic18f27j13.h: 14686: unsigned CCH1 :1;
[; ;pic18f27j13.h: 14687: unsigned :1;
[; ;pic18f27j13.h: 14688: unsigned EVPOL0 :1;
[; ;pic18f27j13.h: 14689: unsigned EVPOL1 :1;
[; ;pic18f27j13.h: 14690: };
[; ;pic18f27j13.h: 14691: struct {
[; ;pic18f27j13.h: 14692: unsigned C1CH0 :1;
[; ;pic18f27j13.h: 14693: };
[; ;pic18f27j13.h: 14694: struct {
[; ;pic18f27j13.h: 14695: unsigned :1;
[; ;pic18f27j13.h: 14696: unsigned C1CH1 :1;
[; ;pic18f27j13.h: 14697: };
[; ;pic18f27j13.h: 14698: struct {
[; ;pic18f27j13.h: 14699: unsigned CCH01 :1;
[; ;pic18f27j13.h: 14700: };
[; ;pic18f27j13.h: 14701: struct {
[; ;pic18f27j13.h: 14702: unsigned :1;
[; ;pic18f27j13.h: 14703: unsigned CCH11 :1;
[; ;pic18f27j13.h: 14704: };
[; ;pic18f27j13.h: 14705: struct {
[; ;pic18f27j13.h: 14706: unsigned :6;
[; ;pic18f27j13.h: 14707: unsigned COE1 :1;
[; ;pic18f27j13.h: 14708: };
[; ;pic18f27j13.h: 14709: struct {
[; ;pic18f27j13.h: 14710: unsigned :7;
[; ;pic18f27j13.h: 14711: unsigned CON1 :1;
[; ;pic18f27j13.h: 14712: };
[; ;pic18f27j13.h: 14713: struct {
[; ;pic18f27j13.h: 14714: unsigned :5;
[; ;pic18f27j13.h: 14715: unsigned CPOL1 :1;
[; ;pic18f27j13.h: 14716: };
[; ;pic18f27j13.h: 14717: struct {
[; ;pic18f27j13.h: 14718: unsigned :2;
[; ;pic18f27j13.h: 14719: unsigned CREF1 :1;
[; ;pic18f27j13.h: 14720: };
[; ;pic18f27j13.h: 14721: struct {
[; ;pic18f27j13.h: 14722: unsigned :3;
[; ;pic18f27j13.h: 14723: unsigned EVPOL01 :1;
[; ;pic18f27j13.h: 14724: };
[; ;pic18f27j13.h: 14725: struct {
[; ;pic18f27j13.h: 14726: unsigned :4;
[; ;pic18f27j13.h: 14727: unsigned EVPOL11 :1;
[; ;pic18f27j13.h: 14728: };
[; ;pic18f27j13.h: 14729: } CM1CONbits_t;
[; ;pic18f27j13.h: 14730: extern volatile CM1CONbits_t CM1CONbits @ 0xFD2;
[; ;pic18f27j13.h: 14833: typedef union {
[; ;pic18f27j13.h: 14834: struct {
[; ;pic18f27j13.h: 14835: unsigned CCH :2;
[; ;pic18f27j13.h: 14836: unsigned CREF :1;
[; ;pic18f27j13.h: 14837: unsigned EVPOL :2;
[; ;pic18f27j13.h: 14838: unsigned CPOL :1;
[; ;pic18f27j13.h: 14839: unsigned COE :1;
[; ;pic18f27j13.h: 14840: unsigned CON :1;
[; ;pic18f27j13.h: 14841: };
[; ;pic18f27j13.h: 14842: struct {
[; ;pic18f27j13.h: 14843: unsigned CCH0 :1;
[; ;pic18f27j13.h: 14844: unsigned CCH1 :1;
[; ;pic18f27j13.h: 14845: unsigned :1;
[; ;pic18f27j13.h: 14846: unsigned EVPOL0 :1;
[; ;pic18f27j13.h: 14847: unsigned EVPOL1 :1;
[; ;pic18f27j13.h: 14848: };
[; ;pic18f27j13.h: 14849: struct {
[; ;pic18f27j13.h: 14850: unsigned C1CH0 :1;
[; ;pic18f27j13.h: 14851: };
[; ;pic18f27j13.h: 14852: struct {
[; ;pic18f27j13.h: 14853: unsigned :1;
[; ;pic18f27j13.h: 14854: unsigned C1CH1 :1;
[; ;pic18f27j13.h: 14855: };
[; ;pic18f27j13.h: 14856: struct {
[; ;pic18f27j13.h: 14857: unsigned CCH01 :1;
[; ;pic18f27j13.h: 14858: };
[; ;pic18f27j13.h: 14859: struct {
[; ;pic18f27j13.h: 14860: unsigned :1;
[; ;pic18f27j13.h: 14861: unsigned CCH11 :1;
[; ;pic18f27j13.h: 14862: };
[; ;pic18f27j13.h: 14863: struct {
[; ;pic18f27j13.h: 14864: unsigned :6;
[; ;pic18f27j13.h: 14865: unsigned COE1 :1;
[; ;pic18f27j13.h: 14866: };
[; ;pic18f27j13.h: 14867: struct {
[; ;pic18f27j13.h: 14868: unsigned :7;
[; ;pic18f27j13.h: 14869: unsigned CON1 :1;
[; ;pic18f27j13.h: 14870: };
[; ;pic18f27j13.h: 14871: struct {
[; ;pic18f27j13.h: 14872: unsigned :5;
[; ;pic18f27j13.h: 14873: unsigned CPOL1 :1;
[; ;pic18f27j13.h: 14874: };
[; ;pic18f27j13.h: 14875: struct {
[; ;pic18f27j13.h: 14876: unsigned :2;
[; ;pic18f27j13.h: 14877: unsigned CREF1 :1;
[; ;pic18f27j13.h: 14878: };
[; ;pic18f27j13.h: 14879: struct {
[; ;pic18f27j13.h: 14880: unsigned :3;
[; ;pic18f27j13.h: 14881: unsigned EVPOL01 :1;
[; ;pic18f27j13.h: 14882: };
[; ;pic18f27j13.h: 14883: struct {
[; ;pic18f27j13.h: 14884: unsigned :4;
[; ;pic18f27j13.h: 14885: unsigned EVPOL11 :1;
[; ;pic18f27j13.h: 14886: };
[; ;pic18f27j13.h: 14887: } CM1CON1bits_t;
[; ;pic18f27j13.h: 14888: extern volatile CM1CON1bits_t CM1CON1bits @ 0xFD2;
[; ;pic18f27j13.h: 14992: extern volatile unsigned char OSCCON @ 0xFD3;
"14994
[; ;pic18f27j13.h: 14994: asm("OSCCON equ 0FD3h");
[; <" OSCCON equ 0FD3h ;# ">
[; ;pic18f27j13.h: 14997: typedef union {
[; ;pic18f27j13.h: 14998: struct {
[; ;pic18f27j13.h: 14999: unsigned SCS :2;
[; ;pic18f27j13.h: 15000: unsigned :1;
[; ;pic18f27j13.h: 15001: unsigned OSTS :1;
[; ;pic18f27j13.h: 15002: unsigned IRCF :3;
[; ;pic18f27j13.h: 15003: unsigned IDLEN :1;
[; ;pic18f27j13.h: 15004: };
[; ;pic18f27j13.h: 15005: struct {
[; ;pic18f27j13.h: 15006: unsigned SCS0 :1;
[; ;pic18f27j13.h: 15007: unsigned SCS1 :1;
[; ;pic18f27j13.h: 15008: unsigned :2;
[; ;pic18f27j13.h: 15009: unsigned IRCF0 :1;
[; ;pic18f27j13.h: 15010: unsigned IRCF1 :1;
[; ;pic18f27j13.h: 15011: unsigned IRCF2 :1;
[; ;pic18f27j13.h: 15012: };
[; ;pic18f27j13.h: 15013: } OSCCONbits_t;
[; ;pic18f27j13.h: 15014: extern volatile OSCCONbits_t OSCCONbits @ 0xFD3;
[; ;pic18f27j13.h: 15063: extern volatile unsigned char T0CON @ 0xFD5;
"15065
[; ;pic18f27j13.h: 15065: asm("T0CON equ 0FD5h");
[; <" T0CON equ 0FD5h ;# ">
[; ;pic18f27j13.h: 15068: typedef union {
[; ;pic18f27j13.h: 15069: struct {
[; ;pic18f27j13.h: 15070: unsigned T0PS :3;
[; ;pic18f27j13.h: 15071: unsigned PSA :1;
[; ;pic18f27j13.h: 15072: unsigned T0SE :1;
[; ;pic18f27j13.h: 15073: unsigned T0CS :1;
[; ;pic18f27j13.h: 15074: unsigned T08BIT :1;
[; ;pic18f27j13.h: 15075: unsigned TMR0ON :1;
[; ;pic18f27j13.h: 15076: };
[; ;pic18f27j13.h: 15077: struct {
[; ;pic18f27j13.h: 15078: unsigned T0PS0 :1;
[; ;pic18f27j13.h: 15079: unsigned T0PS1 :1;
[; ;pic18f27j13.h: 15080: unsigned T0PS2 :1;
[; ;pic18f27j13.h: 15081: };
[; ;pic18f27j13.h: 15082: } T0CONbits_t;
[; ;pic18f27j13.h: 15083: extern volatile T0CONbits_t T0CONbits @ 0xFD5;
[; ;pic18f27j13.h: 15132: extern volatile unsigned short TMR0 @ 0xFD6;
"15134
[; ;pic18f27j13.h: 15134: asm("TMR0 equ 0FD6h");
[; <" TMR0 equ 0FD6h ;# ">
[; ;pic18f27j13.h: 15138: extern volatile unsigned char TMR0L @ 0xFD6;
"15140
[; ;pic18f27j13.h: 15140: asm("TMR0L equ 0FD6h");
[; <" TMR0L equ 0FD6h ;# ">
[; ;pic18f27j13.h: 15143: typedef union {
[; ;pic18f27j13.h: 15144: struct {
[; ;pic18f27j13.h: 15145: unsigned TMR0L :8;
[; ;pic18f27j13.h: 15146: };
[; ;pic18f27j13.h: 15147: } TMR0Lbits_t;
[; ;pic18f27j13.h: 15148: extern volatile TMR0Lbits_t TMR0Lbits @ 0xFD6;
[; ;pic18f27j13.h: 15157: extern volatile unsigned char TMR0H @ 0xFD7;
"15159
[; ;pic18f27j13.h: 15159: asm("TMR0H equ 0FD7h");
[; <" TMR0H equ 0FD7h ;# ">
[; ;pic18f27j13.h: 15162: typedef union {
[; ;pic18f27j13.h: 15163: struct {
[; ;pic18f27j13.h: 15164: unsigned TMR0H :8;
[; ;pic18f27j13.h: 15165: };
[; ;pic18f27j13.h: 15166: } TMR0Hbits_t;
[; ;pic18f27j13.h: 15167: extern volatile TMR0Hbits_t TMR0Hbits @ 0xFD7;
[; ;pic18f27j13.h: 15176: extern volatile unsigned char STATUS @ 0xFD8;
"15178
[; ;pic18f27j13.h: 15178: asm("STATUS equ 0FD8h");
[; <" STATUS equ 0FD8h ;# ">
[; ;pic18f27j13.h: 15181: typedef union {
[; ;pic18f27j13.h: 15182: struct {
[; ;pic18f27j13.h: 15183: unsigned C :1;
[; ;pic18f27j13.h: 15184: unsigned DC :1;
[; ;pic18f27j13.h: 15185: unsigned Z :1;
[; ;pic18f27j13.h: 15186: unsigned OV :1;
[; ;pic18f27j13.h: 15187: unsigned N :1;
[; ;pic18f27j13.h: 15188: };
[; ;pic18f27j13.h: 15189: struct {
[; ;pic18f27j13.h: 15190: unsigned CARRY :1;
[; ;pic18f27j13.h: 15191: };
[; ;pic18f27j13.h: 15192: struct {
[; ;pic18f27j13.h: 15193: unsigned :4;
[; ;pic18f27j13.h: 15194: unsigned NEGATIVE :1;
[; ;pic18f27j13.h: 15195: };
[; ;pic18f27j13.h: 15196: struct {
[; ;pic18f27j13.h: 15197: unsigned :3;
[; ;pic18f27j13.h: 15198: unsigned OVERFLOW :1;
[; ;pic18f27j13.h: 15199: };
[; ;pic18f27j13.h: 15200: struct {
[; ;pic18f27j13.h: 15201: unsigned :2;
[; ;pic18f27j13.h: 15202: unsigned ZERO :1;
[; ;pic18f27j13.h: 15203: };
[; ;pic18f27j13.h: 15204: } STATUSbits_t;
[; ;pic18f27j13.h: 15205: extern volatile STATUSbits_t STATUSbits @ 0xFD8;
[; ;pic18f27j13.h: 15254: extern volatile unsigned short FSR2 @ 0xFD9;
"15256
[; ;pic18f27j13.h: 15256: asm("FSR2 equ 0FD9h");
[; <" FSR2 equ 0FD9h ;# ">
[; ;pic18f27j13.h: 15260: extern volatile unsigned char FSR2L @ 0xFD9;
"15262
[; ;pic18f27j13.h: 15262: asm("FSR2L equ 0FD9h");
[; <" FSR2L equ 0FD9h ;# ">
[; ;pic18f27j13.h: 15265: typedef union {
[; ;pic18f27j13.h: 15266: struct {
[; ;pic18f27j13.h: 15267: unsigned FSR2L :8;
[; ;pic18f27j13.h: 15268: };
[; ;pic18f27j13.h: 15269: } FSR2Lbits_t;
[; ;pic18f27j13.h: 15270: extern volatile FSR2Lbits_t FSR2Lbits @ 0xFD9;
[; ;pic18f27j13.h: 15279: extern volatile unsigned char FSR2H @ 0xFDA;
"15281
[; ;pic18f27j13.h: 15281: asm("FSR2H equ 0FDAh");
[; <" FSR2H equ 0FDAh ;# ">
[; ;pic18f27j13.h: 15285: extern volatile unsigned char PLUSW2 @ 0xFDB;
"15287
[; ;pic18f27j13.h: 15287: asm("PLUSW2 equ 0FDBh");
[; <" PLUSW2 equ 0FDBh ;# ">
[; ;pic18f27j13.h: 15290: typedef union {
[; ;pic18f27j13.h: 15291: struct {
[; ;pic18f27j13.h: 15292: unsigned PLUSW2 :8;
[; ;pic18f27j13.h: 15293: };
[; ;pic18f27j13.h: 15294: } PLUSW2bits_t;
[; ;pic18f27j13.h: 15295: extern volatile PLUSW2bits_t PLUSW2bits @ 0xFDB;
[; ;pic18f27j13.h: 15304: extern volatile unsigned char PREINC2 @ 0xFDC;
"15306
[; ;pic18f27j13.h: 15306: asm("PREINC2 equ 0FDCh");
[; <" PREINC2 equ 0FDCh ;# ">
[; ;pic18f27j13.h: 15309: typedef union {
[; ;pic18f27j13.h: 15310: struct {
[; ;pic18f27j13.h: 15311: unsigned PREINC2 :8;
[; ;pic18f27j13.h: 15312: };
[; ;pic18f27j13.h: 15313: } PREINC2bits_t;
[; ;pic18f27j13.h: 15314: extern volatile PREINC2bits_t PREINC2bits @ 0xFDC;
[; ;pic18f27j13.h: 15323: extern volatile unsigned char POSTDEC2 @ 0xFDD;
"15325
[; ;pic18f27j13.h: 15325: asm("POSTDEC2 equ 0FDDh");
[; <" POSTDEC2 equ 0FDDh ;# ">
[; ;pic18f27j13.h: 15328: typedef union {
[; ;pic18f27j13.h: 15329: struct {
[; ;pic18f27j13.h: 15330: unsigned POSTDEC2 :8;
[; ;pic18f27j13.h: 15331: };
[; ;pic18f27j13.h: 15332: } POSTDEC2bits_t;
[; ;pic18f27j13.h: 15333: extern volatile POSTDEC2bits_t POSTDEC2bits @ 0xFDD;
[; ;pic18f27j13.h: 15342: extern volatile unsigned char POSTINC2 @ 0xFDE;
"15344
[; ;pic18f27j13.h: 15344: asm("POSTINC2 equ 0FDEh");
[; <" POSTINC2 equ 0FDEh ;# ">
[; ;pic18f27j13.h: 15347: typedef union {
[; ;pic18f27j13.h: 15348: struct {
[; ;pic18f27j13.h: 15349: unsigned POSTINC2 :8;
[; ;pic18f27j13.h: 15350: };
[; ;pic18f27j13.h: 15351: } POSTINC2bits_t;
[; ;pic18f27j13.h: 15352: extern volatile POSTINC2bits_t POSTINC2bits @ 0xFDE;
[; ;pic18f27j13.h: 15361: extern volatile unsigned char INDF2 @ 0xFDF;
"15363
[; ;pic18f27j13.h: 15363: asm("INDF2 equ 0FDFh");
[; <" INDF2 equ 0FDFh ;# ">
[; ;pic18f27j13.h: 15366: typedef union {
[; ;pic18f27j13.h: 15367: struct {
[; ;pic18f27j13.h: 15368: unsigned INDF2 :8;
[; ;pic18f27j13.h: 15369: };
[; ;pic18f27j13.h: 15370: } INDF2bits_t;
[; ;pic18f27j13.h: 15371: extern volatile INDF2bits_t INDF2bits @ 0xFDF;
[; ;pic18f27j13.h: 15380: extern volatile unsigned char BSR @ 0xFE0;
"15382
[; ;pic18f27j13.h: 15382: asm("BSR equ 0FE0h");
[; <" BSR equ 0FE0h ;# ">
[; ;pic18f27j13.h: 15386: extern volatile unsigned short FSR1 @ 0xFE1;
"15388
[; ;pic18f27j13.h: 15388: asm("FSR1 equ 0FE1h");
[; <" FSR1 equ 0FE1h ;# ">
[; ;pic18f27j13.h: 15392: extern volatile unsigned char FSR1L @ 0xFE1;
"15394
[; ;pic18f27j13.h: 15394: asm("FSR1L equ 0FE1h");
[; <" FSR1L equ 0FE1h ;# ">
[; ;pic18f27j13.h: 15397: typedef union {
[; ;pic18f27j13.h: 15398: struct {
[; ;pic18f27j13.h: 15399: unsigned FSR1L :8;
[; ;pic18f27j13.h: 15400: };
[; ;pic18f27j13.h: 15401: } FSR1Lbits_t;
[; ;pic18f27j13.h: 15402: extern volatile FSR1Lbits_t FSR1Lbits @ 0xFE1;
[; ;pic18f27j13.h: 15411: extern volatile unsigned char FSR1H @ 0xFE2;
"15413
[; ;pic18f27j13.h: 15413: asm("FSR1H equ 0FE2h");
[; <" FSR1H equ 0FE2h ;# ">
[; ;pic18f27j13.h: 15417: extern volatile unsigned char PLUSW1 @ 0xFE3;
"15419
[; ;pic18f27j13.h: 15419: asm("PLUSW1 equ 0FE3h");
[; <" PLUSW1 equ 0FE3h ;# ">
[; ;pic18f27j13.h: 15422: typedef union {
[; ;pic18f27j13.h: 15423: struct {
[; ;pic18f27j13.h: 15424: unsigned PLUSW1 :8;
[; ;pic18f27j13.h: 15425: };
[; ;pic18f27j13.h: 15426: } PLUSW1bits_t;
[; ;pic18f27j13.h: 15427: extern volatile PLUSW1bits_t PLUSW1bits @ 0xFE3;
[; ;pic18f27j13.h: 15436: extern volatile unsigned char PREINC1 @ 0xFE4;
"15438
[; ;pic18f27j13.h: 15438: asm("PREINC1 equ 0FE4h");
[; <" PREINC1 equ 0FE4h ;# ">
[; ;pic18f27j13.h: 15441: typedef union {
[; ;pic18f27j13.h: 15442: struct {
[; ;pic18f27j13.h: 15443: unsigned PREINC1 :8;
[; ;pic18f27j13.h: 15444: };
[; ;pic18f27j13.h: 15445: } PREINC1bits_t;
[; ;pic18f27j13.h: 15446: extern volatile PREINC1bits_t PREINC1bits @ 0xFE4;
[; ;pic18f27j13.h: 15455: extern volatile unsigned char POSTDEC1 @ 0xFE5;
"15457
[; ;pic18f27j13.h: 15457: asm("POSTDEC1 equ 0FE5h");
[; <" POSTDEC1 equ 0FE5h ;# ">
[; ;pic18f27j13.h: 15460: typedef union {
[; ;pic18f27j13.h: 15461: struct {
[; ;pic18f27j13.h: 15462: unsigned POSTDEC1 :8;
[; ;pic18f27j13.h: 15463: };
[; ;pic18f27j13.h: 15464: } POSTDEC1bits_t;
[; ;pic18f27j13.h: 15465: extern volatile POSTDEC1bits_t POSTDEC1bits @ 0xFE5;
[; ;pic18f27j13.h: 15474: extern volatile unsigned char POSTINC1 @ 0xFE6;
"15476
[; ;pic18f27j13.h: 15476: asm("POSTINC1 equ 0FE6h");
[; <" POSTINC1 equ 0FE6h ;# ">
[; ;pic18f27j13.h: 15479: typedef union {
[; ;pic18f27j13.h: 15480: struct {
[; ;pic18f27j13.h: 15481: unsigned POSTINC1 :8;
[; ;pic18f27j13.h: 15482: };
[; ;pic18f27j13.h: 15483: } POSTINC1bits_t;
[; ;pic18f27j13.h: 15484: extern volatile POSTINC1bits_t POSTINC1bits @ 0xFE6;
[; ;pic18f27j13.h: 15493: extern volatile unsigned char INDF1 @ 0xFE7;
"15495
[; ;pic18f27j13.h: 15495: asm("INDF1 equ 0FE7h");
[; <" INDF1 equ 0FE7h ;# ">
[; ;pic18f27j13.h: 15498: typedef union {
[; ;pic18f27j13.h: 15499: struct {
[; ;pic18f27j13.h: 15500: unsigned INDF1 :8;
[; ;pic18f27j13.h: 15501: };
[; ;pic18f27j13.h: 15502: } INDF1bits_t;
[; ;pic18f27j13.h: 15503: extern volatile INDF1bits_t INDF1bits @ 0xFE7;
[; ;pic18f27j13.h: 15512: extern volatile unsigned char WREG @ 0xFE8;
"15514
[; ;pic18f27j13.h: 15514: asm("WREG equ 0FE8h");
[; <" WREG equ 0FE8h ;# ">
[; ;pic18f27j13.h: 15517: typedef union {
[; ;pic18f27j13.h: 15518: struct {
[; ;pic18f27j13.h: 15519: unsigned WREG :8;
[; ;pic18f27j13.h: 15520: };
[; ;pic18f27j13.h: 15521: } WREGbits_t;
[; ;pic18f27j13.h: 15522: extern volatile WREGbits_t WREGbits @ 0xFE8;
[; ;pic18f27j13.h: 15531: extern volatile unsigned short FSR0 @ 0xFE9;
"15533
[; ;pic18f27j13.h: 15533: asm("FSR0 equ 0FE9h");
[; <" FSR0 equ 0FE9h ;# ">
[; ;pic18f27j13.h: 15537: extern volatile unsigned char FSR0L @ 0xFE9;
"15539
[; ;pic18f27j13.h: 15539: asm("FSR0L equ 0FE9h");
[; <" FSR0L equ 0FE9h ;# ">
[; ;pic18f27j13.h: 15542: typedef union {
[; ;pic18f27j13.h: 15543: struct {
[; ;pic18f27j13.h: 15544: unsigned FSR0L :8;
[; ;pic18f27j13.h: 15545: };
[; ;pic18f27j13.h: 15546: } FSR0Lbits_t;
[; ;pic18f27j13.h: 15547: extern volatile FSR0Lbits_t FSR0Lbits @ 0xFE9;
[; ;pic18f27j13.h: 15556: extern volatile unsigned char FSR0H @ 0xFEA;
"15558
[; ;pic18f27j13.h: 15558: asm("FSR0H equ 0FEAh");
[; <" FSR0H equ 0FEAh ;# ">
[; ;pic18f27j13.h: 15562: extern volatile unsigned char PLUSW0 @ 0xFEB;
"15564
[; ;pic18f27j13.h: 15564: asm("PLUSW0 equ 0FEBh");
[; <" PLUSW0 equ 0FEBh ;# ">
[; ;pic18f27j13.h: 15567: typedef union {
[; ;pic18f27j13.h: 15568: struct {
[; ;pic18f27j13.h: 15569: unsigned PLUSW0 :8;
[; ;pic18f27j13.h: 15570: };
[; ;pic18f27j13.h: 15571: } PLUSW0bits_t;
[; ;pic18f27j13.h: 15572: extern volatile PLUSW0bits_t PLUSW0bits @ 0xFEB;
[; ;pic18f27j13.h: 15581: extern volatile unsigned char PREINC0 @ 0xFEC;
"15583
[; ;pic18f27j13.h: 15583: asm("PREINC0 equ 0FECh");
[; <" PREINC0 equ 0FECh ;# ">
[; ;pic18f27j13.h: 15586: typedef union {
[; ;pic18f27j13.h: 15587: struct {
[; ;pic18f27j13.h: 15588: unsigned PREINC0 :8;
[; ;pic18f27j13.h: 15589: };
[; ;pic18f27j13.h: 15590: } PREINC0bits_t;
[; ;pic18f27j13.h: 15591: extern volatile PREINC0bits_t PREINC0bits @ 0xFEC;
[; ;pic18f27j13.h: 15600: extern volatile unsigned char POSTDEC0 @ 0xFED;
"15602
[; ;pic18f27j13.h: 15602: asm("POSTDEC0 equ 0FEDh");
[; <" POSTDEC0 equ 0FEDh ;# ">
[; ;pic18f27j13.h: 15605: typedef union {
[; ;pic18f27j13.h: 15606: struct {
[; ;pic18f27j13.h: 15607: unsigned POSTDEC0 :8;
[; ;pic18f27j13.h: 15608: };
[; ;pic18f27j13.h: 15609: } POSTDEC0bits_t;
[; ;pic18f27j13.h: 15610: extern volatile POSTDEC0bits_t POSTDEC0bits @ 0xFED;
[; ;pic18f27j13.h: 15619: extern volatile unsigned char POSTINC0 @ 0xFEE;
"15621
[; ;pic18f27j13.h: 15621: asm("POSTINC0 equ 0FEEh");
[; <" POSTINC0 equ 0FEEh ;# ">
[; ;pic18f27j13.h: 15624: typedef union {
[; ;pic18f27j13.h: 15625: struct {
[; ;pic18f27j13.h: 15626: unsigned POSTINC0 :8;
[; ;pic18f27j13.h: 15627: };
[; ;pic18f27j13.h: 15628: } POSTINC0bits_t;
[; ;pic18f27j13.h: 15629: extern volatile POSTINC0bits_t POSTINC0bits @ 0xFEE;
[; ;pic18f27j13.h: 15638: extern volatile unsigned char INDF0 @ 0xFEF;
"15640
[; ;pic18f27j13.h: 15640: asm("INDF0 equ 0FEFh");
[; <" INDF0 equ 0FEFh ;# ">
[; ;pic18f27j13.h: 15643: typedef union {
[; ;pic18f27j13.h: 15644: struct {
[; ;pic18f27j13.h: 15645: unsigned INDF0 :8;
[; ;pic18f27j13.h: 15646: };
[; ;pic18f27j13.h: 15647: } INDF0bits_t;
[; ;pic18f27j13.h: 15648: extern volatile INDF0bits_t INDF0bits @ 0xFEF;
[; ;pic18f27j13.h: 15657: extern volatile unsigned char INTCON3 @ 0xFF0;
"15659
[; ;pic18f27j13.h: 15659: asm("INTCON3 equ 0FF0h");
[; <" INTCON3 equ 0FF0h ;# ">
[; ;pic18f27j13.h: 15662: typedef union {
[; ;pic18f27j13.h: 15663: struct {
[; ;pic18f27j13.h: 15664: unsigned INT1IF :1;
[; ;pic18f27j13.h: 15665: unsigned INT2IF :1;
[; ;pic18f27j13.h: 15666: unsigned INT3IF :1;
[; ;pic18f27j13.h: 15667: unsigned INT1IE :1;
[; ;pic18f27j13.h: 15668: unsigned INT2IE :1;
[; ;pic18f27j13.h: 15669: unsigned INT3IE :1;
[; ;pic18f27j13.h: 15670: unsigned INT1IP :1;
[; ;pic18f27j13.h: 15671: unsigned INT2IP :1;
[; ;pic18f27j13.h: 15672: };
[; ;pic18f27j13.h: 15673: struct {
[; ;pic18f27j13.h: 15674: unsigned INT1F :1;
[; ;pic18f27j13.h: 15675: unsigned INT2F :1;
[; ;pic18f27j13.h: 15676: unsigned INT3F :1;
[; ;pic18f27j13.h: 15677: unsigned INT1E :1;
[; ;pic18f27j13.h: 15678: unsigned INT2E :1;
[; ;pic18f27j13.h: 15679: unsigned INT3E :1;
[; ;pic18f27j13.h: 15680: unsigned INT1P :1;
[; ;pic18f27j13.h: 15681: unsigned INT2P :1;
[; ;pic18f27j13.h: 15682: };
[; ;pic18f27j13.h: 15683: } INTCON3bits_t;
[; ;pic18f27j13.h: 15684: extern volatile INTCON3bits_t INTCON3bits @ 0xFF0;
[; ;pic18f27j13.h: 15768: extern volatile unsigned char INTCON2 @ 0xFF1;
"15770
[; ;pic18f27j13.h: 15770: asm("INTCON2 equ 0FF1h");
[; <" INTCON2 equ 0FF1h ;# ">
[; ;pic18f27j13.h: 15773: typedef union {
[; ;pic18f27j13.h: 15774: struct {
[; ;pic18f27j13.h: 15775: unsigned :7;
[; ;pic18f27j13.h: 15776: unsigned NOT_RBPU :1;
[; ;pic18f27j13.h: 15777: };
[; ;pic18f27j13.h: 15778: struct {
[; ;pic18f27j13.h: 15779: unsigned RBIP :1;
[; ;pic18f27j13.h: 15780: unsigned INT3IP :1;
[; ;pic18f27j13.h: 15781: unsigned TMR0IP :1;
[; ;pic18f27j13.h: 15782: unsigned INTEDG3 :1;
[; ;pic18f27j13.h: 15783: unsigned INTEDG2 :1;
[; ;pic18f27j13.h: 15784: unsigned INTEDG1 :1;
[; ;pic18f27j13.h: 15785: unsigned INTEDG0 :1;
[; ;pic18f27j13.h: 15786: unsigned nRBPU :1;
[; ;pic18f27j13.h: 15787: };
[; ;pic18f27j13.h: 15788: struct {
[; ;pic18f27j13.h: 15789: unsigned :1;
[; ;pic18f27j13.h: 15790: unsigned INT3P :1;
[; ;pic18f27j13.h: 15791: unsigned T0IP :1;
[; ;pic18f27j13.h: 15792: unsigned :4;
[; ;pic18f27j13.h: 15793: unsigned RBPU :1;
[; ;pic18f27j13.h: 15794: };
[; ;pic18f27j13.h: 15795: } INTCON2bits_t;
[; ;pic18f27j13.h: 15796: extern volatile INTCON2bits_t INTCON2bits @ 0xFF1;
[; ;pic18f27j13.h: 15860: extern volatile unsigned char INTCON @ 0xFF2;
"15862
[; ;pic18f27j13.h: 15862: asm("INTCON equ 0FF2h");
[; <" INTCON equ 0FF2h ;# ">
[; ;pic18f27j13.h: 15865: typedef union {
[; ;pic18f27j13.h: 15866: struct {
[; ;pic18f27j13.h: 15867: unsigned RBIF :1;
[; ;pic18f27j13.h: 15868: unsigned INT0IF :1;
[; ;pic18f27j13.h: 15869: unsigned TMR0IF :1;
[; ;pic18f27j13.h: 15870: unsigned RBIE :1;
[; ;pic18f27j13.h: 15871: unsigned INT0IE :1;
[; ;pic18f27j13.h: 15872: unsigned TMR0IE :1;
[; ;pic18f27j13.h: 15873: unsigned PEIE_GIEL :1;
[; ;pic18f27j13.h: 15874: unsigned GIE_GIEH :1;
[; ;pic18f27j13.h: 15875: };
[; ;pic18f27j13.h: 15876: struct {
[; ;pic18f27j13.h: 15877: unsigned :1;
[; ;pic18f27j13.h: 15878: unsigned INT0F :1;
[; ;pic18f27j13.h: 15879: unsigned T0IF :1;
[; ;pic18f27j13.h: 15880: unsigned :1;
[; ;pic18f27j13.h: 15881: unsigned INT0E :1;
[; ;pic18f27j13.h: 15882: unsigned T0IE :1;
[; ;pic18f27j13.h: 15883: unsigned PEIE :1;
[; ;pic18f27j13.h: 15884: unsigned GIE :1;
[; ;pic18f27j13.h: 15885: };
[; ;pic18f27j13.h: 15886: struct {
[; ;pic18f27j13.h: 15887: unsigned :6;
[; ;pic18f27j13.h: 15888: unsigned GIEL :1;
[; ;pic18f27j13.h: 15889: unsigned GIEH :1;
[; ;pic18f27j13.h: 15890: };
[; ;pic18f27j13.h: 15891: struct {
[; ;pic18f27j13.h: 15892: unsigned :1;
[; ;pic18f27j13.h: 15893: unsigned INT0F :1;
[; ;pic18f27j13.h: 15894: unsigned T0IF :1;
[; ;pic18f27j13.h: 15895: unsigned :1;
[; ;pic18f27j13.h: 15896: unsigned INT0E :1;
[; ;pic18f27j13.h: 15897: unsigned T0IE :1;
[; ;pic18f27j13.h: 15898: unsigned PEIE :1;
[; ;pic18f27j13.h: 15899: unsigned GIE :1;
[; ;pic18f27j13.h: 15900: };
[; ;pic18f27j13.h: 15901: struct {
[; ;pic18f27j13.h: 15902: unsigned :6;
[; ;pic18f27j13.h: 15903: unsigned GIEL :1;
[; ;pic18f27j13.h: 15904: unsigned GIEH :1;
[; ;pic18f27j13.h: 15905: };
[; ;pic18f27j13.h: 15906: } INTCONbits_t;
[; ;pic18f27j13.h: 15907: extern volatile INTCONbits_t INTCONbits @ 0xFF2;
[; ;pic18f27j13.h: 15991: extern volatile unsigned short PROD @ 0xFF3;
"15993
[; ;pic18f27j13.h: 15993: asm("PROD equ 0FF3h");
[; <" PROD equ 0FF3h ;# ">
[; ;pic18f27j13.h: 15997: extern volatile unsigned char PRODL @ 0xFF3;
"15999
[; ;pic18f27j13.h: 15999: asm("PRODL equ 0FF3h");
[; <" PRODL equ 0FF3h ;# ">
[; ;pic18f27j13.h: 16002: typedef union {
[; ;pic18f27j13.h: 16003: struct {
[; ;pic18f27j13.h: 16004: unsigned PRODL :8;
[; ;pic18f27j13.h: 16005: };
[; ;pic18f27j13.h: 16006: } PRODLbits_t;
[; ;pic18f27j13.h: 16007: extern volatile PRODLbits_t PRODLbits @ 0xFF3;
[; ;pic18f27j13.h: 16016: extern volatile unsigned char PRODH @ 0xFF4;
"16018
[; ;pic18f27j13.h: 16018: asm("PRODH equ 0FF4h");
[; <" PRODH equ 0FF4h ;# ">
[; ;pic18f27j13.h: 16021: typedef union {
[; ;pic18f27j13.h: 16022: struct {
[; ;pic18f27j13.h: 16023: unsigned PRODH :8;
[; ;pic18f27j13.h: 16024: };
[; ;pic18f27j13.h: 16025: } PRODHbits_t;
[; ;pic18f27j13.h: 16026: extern volatile PRODHbits_t PRODHbits @ 0xFF4;
[; ;pic18f27j13.h: 16035: extern volatile unsigned char TABLAT @ 0xFF5;
"16037
[; ;pic18f27j13.h: 16037: asm("TABLAT equ 0FF5h");
[; <" TABLAT equ 0FF5h ;# ">
[; ;pic18f27j13.h: 16040: typedef union {
[; ;pic18f27j13.h: 16041: struct {
[; ;pic18f27j13.h: 16042: unsigned TABLAT :8;
[; ;pic18f27j13.h: 16043: };
[; ;pic18f27j13.h: 16044: } TABLATbits_t;
[; ;pic18f27j13.h: 16045: extern volatile TABLATbits_t TABLATbits @ 0xFF5;
[; ;pic18f27j13.h: 16055: extern volatile unsigned short long TBLPTR @ 0xFF6;
"16058
[; ;pic18f27j13.h: 16058: asm("TBLPTR equ 0FF6h");
[; <" TBLPTR equ 0FF6h ;# ">
[; ;pic18f27j13.h: 16062: extern volatile unsigned char TBLPTRL @ 0xFF6;
"16064
[; ;pic18f27j13.h: 16064: asm("TBLPTRL equ 0FF6h");
[; <" TBLPTRL equ 0FF6h ;# ">
[; ;pic18f27j13.h: 16067: typedef union {
[; ;pic18f27j13.h: 16068: struct {
[; ;pic18f27j13.h: 16069: unsigned TBLPTRL :8;
[; ;pic18f27j13.h: 16070: };
[; ;pic18f27j13.h: 16071: } TBLPTRLbits_t;
[; ;pic18f27j13.h: 16072: extern volatile TBLPTRLbits_t TBLPTRLbits @ 0xFF6;
[; ;pic18f27j13.h: 16081: extern volatile unsigned char TBLPTRH @ 0xFF7;
"16083
[; ;pic18f27j13.h: 16083: asm("TBLPTRH equ 0FF7h");
[; <" TBLPTRH equ 0FF7h ;# ">
[; ;pic18f27j13.h: 16086: typedef union {
[; ;pic18f27j13.h: 16087: struct {
[; ;pic18f27j13.h: 16088: unsigned TBLPTRH :8;
[; ;pic18f27j13.h: 16089: };
[; ;pic18f27j13.h: 16090: } TBLPTRHbits_t;
[; ;pic18f27j13.h: 16091: extern volatile TBLPTRHbits_t TBLPTRHbits @ 0xFF7;
[; ;pic18f27j13.h: 16100: extern volatile unsigned char TBLPTRU @ 0xFF8;
"16102
[; ;pic18f27j13.h: 16102: asm("TBLPTRU equ 0FF8h");
[; <" TBLPTRU equ 0FF8h ;# ">
[; ;pic18f27j13.h: 16107: extern volatile unsigned short long PCLAT @ 0xFF9;
"16110
[; ;pic18f27j13.h: 16110: asm("PCLAT equ 0FF9h");
[; <" PCLAT equ 0FF9h ;# ">
[; ;pic18f27j13.h: 16114: extern volatile unsigned short long PC @ 0xFF9;
"16117
[; ;pic18f27j13.h: 16117: asm("PC equ 0FF9h");
[; <" PC equ 0FF9h ;# ">
[; ;pic18f27j13.h: 16121: extern volatile unsigned char PCL @ 0xFF9;
"16123
[; ;pic18f27j13.h: 16123: asm("PCL equ 0FF9h");
[; <" PCL equ 0FF9h ;# ">
[; ;pic18f27j13.h: 16126: typedef union {
[; ;pic18f27j13.h: 16127: struct {
[; ;pic18f27j13.h: 16128: unsigned PCL :8;
[; ;pic18f27j13.h: 16129: };
[; ;pic18f27j13.h: 16130: } PCLbits_t;
[; ;pic18f27j13.h: 16131: extern volatile PCLbits_t PCLbits @ 0xFF9;
[; ;pic18f27j13.h: 16140: extern volatile unsigned char PCLATH @ 0xFFA;
"16142
[; ;pic18f27j13.h: 16142: asm("PCLATH equ 0FFAh");
[; <" PCLATH equ 0FFAh ;# ">
[; ;pic18f27j13.h: 16145: typedef union {
[; ;pic18f27j13.h: 16146: struct {
[; ;pic18f27j13.h: 16147: unsigned PCH :8;
[; ;pic18f27j13.h: 16148: };
[; ;pic18f27j13.h: 16149: } PCLATHbits_t;
[; ;pic18f27j13.h: 16150: extern volatile PCLATHbits_t PCLATHbits @ 0xFFA;
[; ;pic18f27j13.h: 16159: extern volatile unsigned char PCLATU @ 0xFFB;
"16161
[; ;pic18f27j13.h: 16161: asm("PCLATU equ 0FFBh");
[; <" PCLATU equ 0FFBh ;# ">
[; ;pic18f27j13.h: 16165: extern volatile unsigned char STKPTR @ 0xFFC;
"16167
[; ;pic18f27j13.h: 16167: asm("STKPTR equ 0FFCh");
[; <" STKPTR equ 0FFCh ;# ">
[; ;pic18f27j13.h: 16170: typedef union {
[; ;pic18f27j13.h: 16171: struct {
[; ;pic18f27j13.h: 16172: unsigned STKPTR :5;
[; ;pic18f27j13.h: 16173: unsigned :1;
[; ;pic18f27j13.h: 16174: unsigned STKUNF :1;
[; ;pic18f27j13.h: 16175: unsigned STKFUL :1;
[; ;pic18f27j13.h: 16176: };
[; ;pic18f27j13.h: 16177: struct {
[; ;pic18f27j13.h: 16178: unsigned SP0 :1;
[; ;pic18f27j13.h: 16179: unsigned SP1 :1;
[; ;pic18f27j13.h: 16180: unsigned SP2 :1;
[; ;pic18f27j13.h: 16181: unsigned SP3 :1;
[; ;pic18f27j13.h: 16182: unsigned SP4 :1;
[; ;pic18f27j13.h: 16183: unsigned :2;
[; ;pic18f27j13.h: 16184: unsigned STKOVF :1;
[; ;pic18f27j13.h: 16185: };
[; ;pic18f27j13.h: 16186: } STKPTRbits_t;
[; ;pic18f27j13.h: 16187: extern volatile STKPTRbits_t STKPTRbits @ 0xFFC;
[; ;pic18f27j13.h: 16237: extern volatile unsigned short long TOS @ 0xFFD;
"16240
[; ;pic18f27j13.h: 16240: asm("TOS equ 0FFDh");
[; <" TOS equ 0FFDh ;# ">
[; ;pic18f27j13.h: 16244: extern volatile unsigned char TOSL @ 0xFFD;
"16246
[; ;pic18f27j13.h: 16246: asm("TOSL equ 0FFDh");
[; <" TOSL equ 0FFDh ;# ">
[; ;pic18f27j13.h: 16249: typedef union {
[; ;pic18f27j13.h: 16250: struct {
[; ;pic18f27j13.h: 16251: unsigned TOSL :8;
[; ;pic18f27j13.h: 16252: };
[; ;pic18f27j13.h: 16253: } TOSLbits_t;
[; ;pic18f27j13.h: 16254: extern volatile TOSLbits_t TOSLbits @ 0xFFD;
[; ;pic18f27j13.h: 16263: extern volatile unsigned char TOSH @ 0xFFE;
"16265
[; ;pic18f27j13.h: 16265: asm("TOSH equ 0FFEh");
[; <" TOSH equ 0FFEh ;# ">
[; ;pic18f27j13.h: 16268: typedef union {
[; ;pic18f27j13.h: 16269: struct {
[; ;pic18f27j13.h: 16270: unsigned TOSH :8;
[; ;pic18f27j13.h: 16271: };
[; ;pic18f27j13.h: 16272: } TOSHbits_t;
[; ;pic18f27j13.h: 16273: extern volatile TOSHbits_t TOSHbits @ 0xFFE;
[; ;pic18f27j13.h: 16282: extern volatile unsigned char TOSU @ 0xFFF;
"16284
[; ;pic18f27j13.h: 16284: asm("TOSU equ 0FFFh");
[; <" TOSU equ 0FFFh ;# ">
[; ;pic18f27j13.h: 16294: extern volatile __bit ABDEN1 @ (((unsigned) &BAUDCON1)*8) + 0;
[; ;pic18f27j13.h: 16296: extern volatile __bit ABDEN2 @ (((unsigned) &BAUDCON2)*8) + 0;
[; ;pic18f27j13.h: 16298: extern volatile __bit ABDOVF1 @ (((unsigned) &BAUDCON1)*8) + 7;
[; ;pic18f27j13.h: 16300: extern volatile __bit ABDOVF2 @ (((unsigned) &BAUDCON2)*8) + 7;
[; ;pic18f27j13.h: 16302: extern volatile __bit ACKDT1 @ (((unsigned) &SSP1CON2)*8) + 5;
[; ;pic18f27j13.h: 16304: extern volatile __bit ACKDT2 @ (((unsigned) &SSP2CON2)*8) + 5;
[; ;pic18f27j13.h: 16306: extern volatile __bit ACKEN1 @ (((unsigned) &SSP1CON2)*8) + 4;
[; ;pic18f27j13.h: 16308: extern volatile __bit ACKEN2 @ (((unsigned) &SSP2CON2)*8) + 4;
[; ;pic18f27j13.h: 16310: extern volatile __bit ACKSTAT1 @ (((unsigned) &SSP1CON2)*8) + 6;
[; ;pic18f27j13.h: 16312: extern volatile __bit ACKSTAT2 @ (((unsigned) &SSP2CON2)*8) + 6;
[; ;pic18f27j13.h: 16314: extern volatile __bit ACQT0 @ (((unsigned) &ADCON1)*8) + 3;
[; ;pic18f27j13.h: 16316: extern volatile __bit ACQT1 @ (((unsigned) &ADCON1)*8) + 4;
[; ;pic18f27j13.h: 16318: extern volatile __bit ACQT2 @ (((unsigned) &ADCON1)*8) + 5;
[; ;pic18f27j13.h: 16320: extern volatile __bit __attribute__((__deprecated__)) ADCAL @ (((unsigned) &ADCON1)*8) + 6;
[; ;pic18f27j13.h: 16322: extern volatile __bit ADCMD @ (((unsigned) &PMDIS0)*8) + 0;
[; ;pic18f27j13.h: 16324: extern volatile __bit ADCS0 @ (((unsigned) &ADCON1)*8) + 0;
[; ;pic18f27j13.h: 16326: extern volatile __bit ADCS1 @ (((unsigned) &ADCON1)*8) + 1;
[; ;pic18f27j13.h: 16328: extern volatile __bit ADCS2 @ (((unsigned) &ADCON1)*8) + 2;
[; ;pic18f27j13.h: 16330: extern volatile __bit ADDEN1 @ (((unsigned) &RCSTA1)*8) + 3;
[; ;pic18f27j13.h: 16332: extern volatile __bit ADDEN2 @ (((unsigned) &RCSTA2)*8) + 3;
[; ;pic18f27j13.h: 16334: extern volatile __bit ADEN @ (((unsigned) &RCSTA1)*8) + 3;
[; ;pic18f27j13.h: 16336: extern volatile __bit ADFM @ (((unsigned) &ADCON1)*8) + 7;
[; ;pic18f27j13.h: 16338: extern volatile __bit ADIE @ (((unsigned) &PIE1)*8) + 6;
[; ;pic18f27j13.h: 16340: extern volatile __bit ADIF @ (((unsigned) &PIR1)*8) + 6;
[; ;pic18f27j13.h: 16342: extern volatile __bit ADIP @ (((unsigned) &IPR1)*8) + 6;
[; ;pic18f27j13.h: 16344: extern volatile __bit ADMSK11 @ (((unsigned) &SSP1CON2)*8) + 1;
[; ;pic18f27j13.h: 16346: extern volatile __bit ADMSK12 @ (((unsigned) &SSP2CON2)*8) + 1;
[; ;pic18f27j13.h: 16348: extern volatile __bit ADMSK21 @ (((unsigned) &SSP1CON2)*8) + 2;
[; ;pic18f27j13.h: 16350: extern volatile __bit ADMSK22 @ (((unsigned) &SSP2CON2)*8) + 2;
[; ;pic18f27j13.h: 16352: extern volatile __bit ADMSK31 @ (((unsigned) &SSP1CON2)*8) + 3;
[; ;pic18f27j13.h: 16354: extern volatile __bit ADMSK32 @ (((unsigned) &SSP2CON2)*8) + 3;
[; ;pic18f27j13.h: 16356: extern volatile __bit ADMSK41 @ (((unsigned) &SSP1CON2)*8) + 4;
[; ;pic18f27j13.h: 16358: extern volatile __bit ADMSK42 @ (((unsigned) &SSP2CON2)*8) + 4;
[; ;pic18f27j13.h: 16360: extern volatile __bit ADMSK51 @ (((unsigned) &SSP1CON2)*8) + 5;
[; ;pic18f27j13.h: 16362: extern volatile __bit ADMSK52 @ (((unsigned) &SSP2CON2)*8) + 5;
[; ;pic18f27j13.h: 16364: extern volatile __bit ADON @ (((unsigned) &ADCON0)*8) + 0;
[; ;pic18f27j13.h: 16366: extern volatile __bit ALRMEN @ (((unsigned) &ALRMCFG)*8) + 7;
[; ;pic18f27j13.h: 16368: extern volatile __bit ALRMPTR0 @ (((unsigned) &ALRMCFG)*8) + 0;
[; ;pic18f27j13.h: 16370: extern volatile __bit ALRMPTR1 @ (((unsigned) &ALRMCFG)*8) + 1;
[; ;pic18f27j13.h: 16372: extern volatile __bit AMASK0 @ (((unsigned) &ALRMCFG)*8) + 2;
[; ;pic18f27j13.h: 16374: extern volatile __bit AMASK1 @ (((unsigned) &ALRMCFG)*8) + 3;
[; ;pic18f27j13.h: 16376: extern volatile __bit AMASK2 @ (((unsigned) &ALRMCFG)*8) + 4;
[; ;pic18f27j13.h: 16378: extern volatile __bit AMASK3 @ (((unsigned) &ALRMCFG)*8) + 5;
[; ;pic18f27j13.h: 16380: extern volatile __bit AN0 @ (((unsigned) &PORTA)*8) + 0;
[; ;pic18f27j13.h: 16382: extern volatile __bit AN1 @ (((unsigned) &PORTA)*8) + 1;
[; ;pic18f27j13.h: 16384: extern volatile __bit AN10 @ (((unsigned) &PORTB)*8) + 1;
[; ;pic18f27j13.h: 16386: extern volatile __bit AN11 @ (((unsigned) &PORTC)*8) + 2;
[; ;pic18f27j13.h: 16388: extern volatile __bit AN12 @ (((unsigned) &PORTB)*8) + 0;
[; ;pic18f27j13.h: 16390: extern volatile __bit AN2 @ (((unsigned) &PORTA)*8) + 2;
[; ;pic18f27j13.h: 16392: extern volatile __bit AN3 @ (((unsigned) &PORTA)*8) + 3;
[; ;pic18f27j13.h: 16394: extern volatile __bit AN4 @ (((unsigned) &PORTA)*8) + 5;
[; ;pic18f27j13.h: 16396: extern volatile __bit AN8 @ (((unsigned) &PORTB)*8) + 2;
[; ;pic18f27j13.h: 16398: extern volatile __bit AN9 @ (((unsigned) &PORTB)*8) + 3;
[; ;pic18f27j13.h: 16400: extern volatile __bit ARPT0 @ (((unsigned) &ALRMRPT)*8) + 0;
[; ;pic18f27j13.h: 16402: extern volatile __bit ARPT1 @ (((unsigned) &ALRMRPT)*8) + 1;
[; ;pic18f27j13.h: 16404: extern volatile __bit ARPT2 @ (((unsigned) &ALRMRPT)*8) + 2;
[; ;pic18f27j13.h: 16406: extern volatile __bit ARPT3 @ (((unsigned) &ALRMRPT)*8) + 3;
[; ;pic18f27j13.h: 16408: extern volatile __bit ARPT4 @ (((unsigned) &ALRMRPT)*8) + 4;
[; ;pic18f27j13.h: 16410: extern volatile __bit ARPT5 @ (((unsigned) &ALRMRPT)*8) + 5;
[; ;pic18f27j13.h: 16412: extern volatile __bit ARPT6 @ (((unsigned) &ALRMRPT)*8) + 6;
[; ;pic18f27j13.h: 16414: extern volatile __bit ARPT7 @ (((unsigned) &ALRMRPT)*8) + 7;
[; ;pic18f27j13.h: 16416: extern volatile __bit BCL1IE @ (((unsigned) &PIE2)*8) + 3;
[; ;pic18f27j13.h: 16418: extern volatile __bit BCL1IF @ (((unsigned) &PIR2)*8) + 3;
[; ;pic18f27j13.h: 16420: extern volatile __bit BCL1IP @ (((unsigned) &IPR2)*8) + 3;
[; ;pic18f27j13.h: 16422: extern volatile __bit BCL2IE @ (((unsigned) &PIE3)*8) + 6;
[; ;pic18f27j13.h: 16424: extern volatile __bit BCL2IF @ (((unsigned) &PIR3)*8) + 6;
[; ;pic18f27j13.h: 16426: extern volatile __bit BCL2IP @ (((unsigned) &IPR3)*8) + 6;
[; ;pic18f27j13.h: 16428: extern volatile __bit BCLIE @ (((unsigned) &PIE2)*8) + 3;
[; ;pic18f27j13.h: 16430: extern volatile __bit BCLIF @ (((unsigned) &PIR2)*8) + 3;
[; ;pic18f27j13.h: 16432: extern volatile __bit BCLIP @ (((unsigned) &IPR2)*8) + 3;
[; ;pic18f27j13.h: 16434: extern volatile __bit BF1 @ (((unsigned) &SSP1STAT)*8) + 0;
[; ;pic18f27j13.h: 16436: extern volatile __bit BF2 @ (((unsigned) &SSP2STAT)*8) + 0;
[; ;pic18f27j13.h: 16438: extern volatile __bit BGVST @ (((unsigned) &HLVDCON)*8) + 6;
[; ;pic18f27j13.h: 16440: extern volatile __bit BOR @ (((unsigned) &RCON)*8) + 0;
[; ;pic18f27j13.h: 16442: extern volatile __bit BRG161 @ (((unsigned) &BAUDCON1)*8) + 3;
[; ;pic18f27j13.h: 16444: extern volatile __bit BRG162 @ (((unsigned) &BAUDCON2)*8) + 3;
[; ;pic18f27j13.h: 16446: extern volatile __bit BRGH1 @ (((unsigned) &TXSTA1)*8) + 2;
[; ;pic18f27j13.h: 16448: extern volatile __bit BRGH2 @ (((unsigned) &TXSTA2)*8) + 2;
[; ;pic18f27j13.h: 16450: extern volatile __bit C10TSEL0 @ (((unsigned) &CCPTMRS2)*8) + 4;
[; ;pic18f27j13.h: 16452: extern volatile __bit C1CH0 @ (((unsigned) &CM1CON)*8) + 0;
[; ;pic18f27j13.h: 16454: extern volatile __bit C1CH1 @ (((unsigned) &CM1CON)*8) + 1;
[; ;pic18f27j13.h: 16456: extern volatile __bit C1INA @ (((unsigned) &PORTA)*8) + 0;
[; ;pic18f27j13.h: 16458: extern volatile __bit C1INB @ (((unsigned) &PORTA)*8) + 3;
[; ;pic18f27j13.h: 16460: extern volatile __bit C1INC @ (((unsigned) &PORTA)*8) + 5;
[; ;pic18f27j13.h: 16462: extern volatile __bit C1IND @ (((unsigned) &PORTA)*8) + 2;
[; ;pic18f27j13.h: 16464: extern volatile __bit C1TSEL0 @ (((unsigned) &CCPTMRS0)*8) + 0;
[; ;pic18f27j13.h: 16466: extern volatile __bit C1TSEL1 @ (((unsigned) &CCPTMRS0)*8) + 1;
[; ;pic18f27j13.h: 16468: extern volatile __bit C1TSEL2 @ (((unsigned) &CCPTMRS0)*8) + 2;
[; ;pic18f27j13.h: 16470: extern volatile __bit C2INA @ (((unsigned) &PORTA)*8) + 1;
[; ;pic18f27j13.h: 16472: extern volatile __bit C2INB @ (((unsigned) &PORTA)*8) + 2;
[; ;pic18f27j13.h: 16474: extern volatile __bit C2INC @ (((unsigned) &PORTB)*8) + 2;
[; ;pic18f27j13.h: 16476: extern volatile __bit C2IND @ (((unsigned) &PORTC)*8) + 2;
[; ;pic18f27j13.h: 16478: extern volatile __bit C2TSEL0 @ (((unsigned) &CCPTMRS0)*8) + 3;
[; ;pic18f27j13.h: 16480: extern volatile __bit C2TSEL1 @ (((unsigned) &CCPTMRS0)*8) + 4;
[; ;pic18f27j13.h: 16482: extern volatile __bit C2TSEL2 @ (((unsigned) &CCPTMRS0)*8) + 5;
[; ;pic18f27j13.h: 16484: extern volatile __bit C3INA @ (((unsigned) &PORTB)*8) + 3;
[; ;pic18f27j13.h: 16486: extern volatile __bit C3INB @ (((unsigned) &PORTA)*8) + 2;
[; ;pic18f27j13.h: 16488: extern volatile __bit C3INC @ (((unsigned) &PORTB)*8) + 1;
[; ;pic18f27j13.h: 16490: extern volatile __bit C3IND @ (((unsigned) &PORTB)*8) + 0;
[; ;pic18f27j13.h: 16492: extern volatile __bit C3TSEL0 @ (((unsigned) &CCPTMRS0)*8) + 6;
[; ;pic18f27j13.h: 16494: extern volatile __bit C3TSEL1 @ (((unsigned) &CCPTMRS0)*8) + 7;
[; ;pic18f27j13.h: 16496: extern volatile __bit C4TSEL0 @ (((unsigned) &CCPTMRS1)*8) + 0;
[; ;pic18f27j13.h: 16498: extern volatile __bit C4TSEL1 @ (((unsigned) &CCPTMRS1)*8) + 1;
[; ;pic18f27j13.h: 16500: extern volatile __bit C5TSEL0 @ (((unsigned) &CCPTMRS1)*8) + 2;
[; ;pic18f27j13.h: 16502: extern volatile __bit C6TSEL0 @ (((unsigned) &CCPTMRS1)*8) + 4;
[; ;pic18f27j13.h: 16504: extern volatile __bit C7TSEL0 @ (((unsigned) &CCPTMRS1)*8) + 6;
[; ;pic18f27j13.h: 16506: extern volatile __bit C7TSEL1 @ (((unsigned) &CCPTMRS1)*8) + 7;
[; ;pic18f27j13.h: 16508: extern volatile __bit C8TSEL0 @ (((unsigned) &CCPTMRS2)*8) + 0;
[; ;pic18f27j13.h: 16510: extern volatile __bit C8TSEL1 @ (((unsigned) &CCPTMRS2)*8) + 1;
[; ;pic18f27j13.h: 16512: extern volatile __bit C9TSEL0 @ (((unsigned) &CCPTMRS2)*8) + 2;
[; ;pic18f27j13.h: 16514: extern volatile __bit CAL0 @ (((unsigned) &RTCCAL)*8) + 0;
[; ;pic18f27j13.h: 16516: extern volatile __bit CAL1 @ (((unsigned) &RTCCAL)*8) + 1;
[; ;pic18f27j13.h: 16518: extern volatile __bit CAL2 @ (((unsigned) &RTCCAL)*8) + 2;
[; ;pic18f27j13.h: 16520: extern volatile __bit CAL3 @ (((unsigned) &RTCCAL)*8) + 3;
[; ;pic18f27j13.h: 16522: extern volatile __bit CAL4 @ (((unsigned) &RTCCAL)*8) + 4;
[; ;pic18f27j13.h: 16524: extern volatile __bit CAL5 @ (((unsigned) &RTCCAL)*8) + 5;
[; ;pic18f27j13.h: 16526: extern volatile __bit CAL6 @ (((unsigned) &RTCCAL)*8) + 6;
[; ;pic18f27j13.h: 16528: extern volatile __bit CAL7 @ (((unsigned) &RTCCAL)*8) + 7;
[; ;pic18f27j13.h: 16530: extern volatile __bit CARRY @ (((unsigned) &STATUS)*8) + 0;
[; ;pic18f27j13.h: 16532: extern volatile __bit CCH01 @ (((unsigned) &CM1CON)*8) + 0;
[; ;pic18f27j13.h: 16534: extern volatile __bit CCH02 @ (((unsigned) &CM2CON)*8) + 0;
[; ;pic18f27j13.h: 16536: extern volatile __bit CCH03 @ (((unsigned) &CM3CON)*8) + 0;
[; ;pic18f27j13.h: 16538: extern volatile __bit CCH05 @ (((unsigned) &IPR5)*8) + 0;
[; ;pic18f27j13.h: 16540: extern volatile __bit CCH11 @ (((unsigned) &CM1CON)*8) + 1;
[; ;pic18f27j13.h: 16542: extern volatile __bit CCH12 @ (((unsigned) &CM2CON)*8) + 1;
[; ;pic18f27j13.h: 16544: extern volatile __bit CCH13 @ (((unsigned) &CM3CON)*8) + 1;
[; ;pic18f27j13.h: 16546: extern volatile __bit CCH15 @ (((unsigned) &IPR5)*8) + 1;
[; ;pic18f27j13.h: 16548: extern volatile __bit CCIP3IP @ (((unsigned) &IPR4)*8) + 0;
[; ;pic18f27j13.h: 16550: extern volatile __bit CCP10 @ (((unsigned) &PORTC)*8) + 7;
[; ;pic18f27j13.h: 16552: extern volatile __bit CCP10IE @ (((unsigned) &PIE4)*8) + 7;
[; ;pic18f27j13.h: 16554: extern volatile __bit CCP10IF @ (((unsigned) &PIR4)*8) + 7;
[; ;pic18f27j13.h: 16556: extern volatile __bit CCP10IP @ (((unsigned) &IPR4)*8) + 7;
[; ;pic18f27j13.h: 16558: extern volatile __bit CCP10M0 @ (((unsigned) &CCP10CON)*8) + 0;
[; ;pic18f27j13.h: 16560: extern volatile __bit CCP10M1 @ (((unsigned) &CCP10CON)*8) + 1;
[; ;pic18f27j13.h: 16562: extern volatile __bit CCP10M2 @ (((unsigned) &CCP10CON)*8) + 2;
[; ;pic18f27j13.h: 16564: extern volatile __bit CCP10M3 @ (((unsigned) &CCP10CON)*8) + 3;
[; ;pic18f27j13.h: 16566: extern volatile __bit CCP10MD @ (((unsigned) &PMDIS3)*8) + 7;
[; ;pic18f27j13.h: 16568: extern volatile __bit CCP10OD @ (((unsigned) &ODCON2)*8) + 3;
[; ;pic18f27j13.h: 16570: extern volatile __bit CCP1IE @ (((unsigned) &PIE1)*8) + 2;
[; ;pic18f27j13.h: 16572: extern volatile __bit CCP1IF @ (((unsigned) &PIR1)*8) + 2;
[; ;pic18f27j13.h: 16574: extern volatile __bit CCP1IP @ (((unsigned) &IPR1)*8) + 2;
[; ;pic18f27j13.h: 16576: extern volatile __bit CCP1M0 @ (((unsigned) &CCP1CON)*8) + 0;
[; ;pic18f27j13.h: 16578: extern volatile __bit CCP1M1 @ (((unsigned) &CCP1CON)*8) + 1;
[; ;pic18f27j13.h: 16580: extern volatile __bit CCP1M2 @ (((unsigned) &CCP1CON)*8) + 2;
[; ;pic18f27j13.h: 16582: extern volatile __bit CCP1M3 @ (((unsigned) &CCP1CON)*8) + 3;
[; ;pic18f27j13.h: 16584: extern volatile __bit CCP1X @ (((unsigned) &CCP1CON)*8) + 5;
[; ;pic18f27j13.h: 16586: extern volatile __bit CCP1Y @ (((unsigned) &CCP1CON)*8) + 4;
[; ;pic18f27j13.h: 16588: extern volatile __bit CCP2 @ (((unsigned) &PORTC)*8) + 1;
[; ;pic18f27j13.h: 16590: extern volatile __bit CCP2IE @ (((unsigned) &PIE2)*8) + 0;
[; ;pic18f27j13.h: 16592: extern volatile __bit CCP2IF @ (((unsigned) &PIR2)*8) + 0;
[; ;pic18f27j13.h: 16594: extern volatile __bit CCP2IP @ (((unsigned) &IPR2)*8) + 0;
[; ;pic18f27j13.h: 16596: extern volatile __bit CCP2M0 @ (((unsigned) &CCP2CON)*8) + 0;
[; ;pic18f27j13.h: 16598: extern volatile __bit CCP2M1 @ (((unsigned) &CCP2CON)*8) + 1;
[; ;pic18f27j13.h: 16600: extern volatile __bit CCP2M2 @ (((unsigned) &CCP2CON)*8) + 2;
[; ;pic18f27j13.h: 16602: extern volatile __bit CCP2M3 @ (((unsigned) &CCP2CON)*8) + 3;
[; ;pic18f27j13.h: 16604: extern volatile __bit CCP2X @ (((unsigned) &CCP2CON)*8) + 5;
[; ;pic18f27j13.h: 16606: extern volatile __bit CCP2Y @ (((unsigned) &CCP2CON)*8) + 4;
[; ;pic18f27j13.h: 16608: extern volatile __bit CCP2_PA2 @ (((unsigned) &PORTB)*8) + 3;
[; ;pic18f27j13.h: 16610: extern volatile __bit CCP3IE @ (((unsigned) &PIE4)*8) + 0;
[; ;pic18f27j13.h: 16612: extern volatile __bit CCP3IF @ (((unsigned) &PIR4)*8) + 0;
[; ;pic18f27j13.h: 16614: extern volatile __bit CCP3IP @ (((unsigned) &IPR4)*8) + 0;
[; ;pic18f27j13.h: 16616: extern volatile __bit CCP3M0 @ (((unsigned) &CCP3CON)*8) + 0;
[; ;pic18f27j13.h: 16618: extern volatile __bit CCP3M1 @ (((unsigned) &CCP3CON)*8) + 1;
[; ;pic18f27j13.h: 16620: extern volatile __bit CCP3M2 @ (((unsigned) &CCP3CON)*8) + 2;
[; ;pic18f27j13.h: 16622: extern volatile __bit CCP3M3 @ (((unsigned) &CCP3CON)*8) + 3;
[; ;pic18f27j13.h: 16624: extern volatile __bit CCP4 @ (((unsigned) &PORTB)*8) + 4;
[; ;pic18f27j13.h: 16626: extern volatile __bit CCP4IE @ (((unsigned) &PIE4)*8) + 1;
[; ;pic18f27j13.h: 16628: extern volatile __bit CCP4IF @ (((unsigned) &PIR4)*8) + 1;
[; ;pic18f27j13.h: 16630: extern volatile __bit CCP4IP @ (((unsigned) &IPR4)*8) + 1;
[; ;pic18f27j13.h: 16632: extern volatile __bit CCP4M0 @ (((unsigned) &CCP4CON)*8) + 0;
[; ;pic18f27j13.h: 16634: extern volatile __bit CCP4M1 @ (((unsigned) &CCP4CON)*8) + 1;
[; ;pic18f27j13.h: 16636: extern volatile __bit CCP4M2 @ (((unsigned) &CCP4CON)*8) + 2;
[; ;pic18f27j13.h: 16638: extern volatile __bit CCP4M3 @ (((unsigned) &CCP4CON)*8) + 3;
[; ;pic18f27j13.h: 16640: extern volatile __bit CCP4MD @ (((unsigned) &PMDIS3)*8) + 1;
[; ;pic18f27j13.h: 16642: extern volatile __bit CCP4OD @ (((unsigned) &ODCON1)*8) + 3;
[; ;pic18f27j13.h: 16644: extern volatile __bit CCP5 @ (((unsigned) &PORTB)*8) + 5;
[; ;pic18f27j13.h: 16646: extern volatile __bit CCP5IE @ (((unsigned) &PIE4)*8) + 2;
[; ;pic18f27j13.h: 16648: extern volatile __bit CCP5IF @ (((unsigned) &PIR4)*8) + 2;
[; ;pic18f27j13.h: 16650: extern volatile __bit CCP5IP @ (((unsigned) &IPR4)*8) + 2;
[; ;pic18f27j13.h: 16652: extern volatile __bit CCP5M0 @ (((unsigned) &CCP5CON)*8) + 0;
[; ;pic18f27j13.h: 16654: extern volatile __bit CCP5M1 @ (((unsigned) &CCP5CON)*8) + 1;
[; ;pic18f27j13.h: 16656: extern volatile __bit CCP5M2 @ (((unsigned) &CCP5CON)*8) + 2;
[; ;pic18f27j13.h: 16658: extern volatile __bit CCP5M3 @ (((unsigned) &CCP5CON)*8) + 3;
[; ;pic18f27j13.h: 16660: extern volatile __bit CCP5MD @ (((unsigned) &PMDIS3)*8) + 2;
[; ;pic18f27j13.h: 16662: extern volatile __bit CCP5OD @ (((unsigned) &ODCON1)*8) + 4;
[; ;pic18f27j13.h: 16664: extern volatile __bit CCP6 @ (((unsigned) &PORTB)*8) + 6;
[; ;pic18f27j13.h: 16666: extern volatile __bit CCP6IE @ (((unsigned) &PIE4)*8) + 3;
[; ;pic18f27j13.h: 16668: extern volatile __bit CCP6IF @ (((unsigned) &PIR4)*8) + 3;
[; ;pic18f27j13.h: 16670: extern volatile __bit CCP6IP @ (((unsigned) &IPR4)*8) + 3;
[; ;pic18f27j13.h: 16672: extern volatile __bit CCP6M0 @ (((unsigned) &CCP6CON)*8) + 0;
[; ;pic18f27j13.h: 16674: extern volatile __bit CCP6M1 @ (((unsigned) &CCP6CON)*8) + 1;
[; ;pic18f27j13.h: 16676: extern volatile __bit CCP6M2 @ (((unsigned) &CCP6CON)*8) + 2;
[; ;pic18f27j13.h: 16678: extern volatile __bit CCP6M3 @ (((unsigned) &CCP6CON)*8) + 3;
[; ;pic18f27j13.h: 16680: extern volatile __bit CCP6MD @ (((unsigned) &PMDIS3)*8) + 3;
[; ;pic18f27j13.h: 16682: extern volatile __bit CCP6OD @ (((unsigned) &ODCON1)*8) + 5;
[; ;pic18f27j13.h: 16684: extern volatile __bit CCP7 @ (((unsigned) &PORTB)*8) + 7;
[; ;pic18f27j13.h: 16686: extern volatile __bit CCP7IE @ (((unsigned) &PIE4)*8) + 4;
[; ;pic18f27j13.h: 16688: extern volatile __bit CCP7IF @ (((unsigned) &PIR4)*8) + 4;
[; ;pic18f27j13.h: 16690: extern volatile __bit CCP7IP @ (((unsigned) &IPR4)*8) + 4;
[; ;pic18f27j13.h: 16692: extern volatile __bit CCP7M0 @ (((unsigned) &CCP7CON)*8) + 0;
[; ;pic18f27j13.h: 16694: extern volatile __bit CCP7M1 @ (((unsigned) &CCP7CON)*8) + 1;
[; ;pic18f27j13.h: 16696: extern volatile __bit CCP7M2 @ (((unsigned) &CCP7CON)*8) + 2;
[; ;pic18f27j13.h: 16698: extern volatile __bit CCP7M3 @ (((unsigned) &CCP7CON)*8) + 3;
[; ;pic18f27j13.h: 16700: extern volatile __bit CCP7MD @ (((unsigned) &PMDIS3)*8) + 4;
[; ;pic18f27j13.h: 16702: extern volatile __bit CCP7OD @ (((unsigned) &ODCON1)*8) + 6;
[; ;pic18f27j13.h: 16704: extern volatile __bit CCP8 @ (((unsigned) &PORTC)*8) + 1;
[; ;pic18f27j13.h: 16706: extern volatile __bit CCP8IE @ (((unsigned) &PIE4)*8) + 5;
[; ;pic18f27j13.h: 16708: extern volatile __bit CCP8IF @ (((unsigned) &PIR4)*8) + 5;
[; ;pic18f27j13.h: 16710: extern volatile __bit CCP8IP @ (((unsigned) &IPR4)*8) + 5;
[; ;pic18f27j13.h: 16712: extern volatile __bit CCP8M0 @ (((unsigned) &CCP8CON)*8) + 0;
[; ;pic18f27j13.h: 16714: extern volatile __bit CCP8M1 @ (((unsigned) &CCP8CON)*8) + 1;
[; ;pic18f27j13.h: 16716: extern volatile __bit CCP8M2 @ (((unsigned) &CCP8CON)*8) + 2;
[; ;pic18f27j13.h: 16718: extern volatile __bit CCP8M3 @ (((unsigned) &CCP8CON)*8) + 3;
[; ;pic18f27j13.h: 16720: extern volatile __bit CCP8MD @ (((unsigned) &PMDIS3)*8) + 5;
[; ;pic18f27j13.h: 16722: extern volatile __bit CCP8OD @ (((unsigned) &ODCON1)*8) + 7;
[; ;pic18f27j13.h: 16724: extern volatile __bit CCP9 @ (((unsigned) &PORTC)*8) + 6;
[; ;pic18f27j13.h: 16726: extern volatile __bit CCP9IE @ (((unsigned) &PIE4)*8) + 6;
[; ;pic18f27j13.h: 16728: extern volatile __bit CCP9IF @ (((unsigned) &PIR4)*8) + 6;
[; ;pic18f27j13.h: 16730: extern volatile __bit CCP9IP @ (((unsigned) &IPR4)*8) + 6;
[; ;pic18f27j13.h: 16732: extern volatile __bit CCP9M0 @ (((unsigned) &CCP9CON)*8) + 0;
[; ;pic18f27j13.h: 16734: extern volatile __bit CCP9M1 @ (((unsigned) &CCP9CON)*8) + 1;
[; ;pic18f27j13.h: 16736: extern volatile __bit CCP9M2 @ (((unsigned) &CCP9CON)*8) + 2;
[; ;pic18f27j13.h: 16738: extern volatile __bit CCP9M3 @ (((unsigned) &CCP9CON)*8) + 3;
[; ;pic18f27j13.h: 16740: extern volatile __bit CCP9MD @ (((unsigned) &PMDIS3)*8) + 6;
[; ;pic18f27j13.h: 16742: extern volatile __bit CCP9OD @ (((unsigned) &ODCON2)*8) + 2;
[; ;pic18f27j13.h: 16744: extern volatile __bit CHIME @ (((unsigned) &ALRMCFG)*8) + 6;
[; ;pic18f27j13.h: 16746: extern volatile __bit CHS0 @ (((unsigned) &ADCON0)*8) + 2;
[; ;pic18f27j13.h: 16748: extern volatile __bit CHS1 @ (((unsigned) &ADCON0)*8) + 3;
[; ;pic18f27j13.h: 16750: extern volatile __bit CHS2 @ (((unsigned) &ADCON0)*8) + 4;
[; ;pic18f27j13.h: 16752: extern volatile __bit CHS3 @ (((unsigned) &ADCON0)*8) + 5;
[; ;pic18f27j13.h: 16754: extern volatile __bit CHSN3 @ (((unsigned) &ADCON1)*8) + 3;
[; ;pic18f27j13.h: 16756: extern volatile __bit CK1 @ (((unsigned) &PORTC)*8) + 6;
[; ;pic18f27j13.h: 16758: extern volatile __bit CKE1 @ (((unsigned) &SSP1STAT)*8) + 6;
[; ;pic18f27j13.h: 16760: extern volatile __bit CKE2 @ (((unsigned) &SSP2STAT)*8) + 6;
[; ;pic18f27j13.h: 16762: extern volatile __bit CKP1 @ (((unsigned) &SSP1CON1)*8) + 4;
[; ;pic18f27j13.h: 16764: extern volatile __bit CKP2 @ (((unsigned) &SSP2CON1)*8) + 4;
[; ;pic18f27j13.h: 16766: extern volatile __bit CKTXP @ (((unsigned) &BAUDCON1)*8) + 4;
[; ;pic18f27j13.h: 16768: extern volatile __bit CLKI @ (((unsigned) &PORTA)*8) + 7;
[; ;pic18f27j13.h: 16770: extern volatile __bit CLKO @ (((unsigned) &PORTA)*8) + 6;
[; ;pic18f27j13.h: 16772: extern volatile __bit CM @ (((unsigned) &RCON)*8) + 5;
[; ;pic18f27j13.h: 16774: extern volatile __bit CM1IE @ (((unsigned) &PIE2)*8) + 5;
[; ;pic18f27j13.h: 16776: extern volatile __bit CM1IF @ (((unsigned) &PIR2)*8) + 5;
[; ;pic18f27j13.h: 16778: extern volatile __bit CM1IP @ (((unsigned) &IPR2)*8) + 5;
[; ;pic18f27j13.h: 16780: extern volatile __bit CM2IE @ (((unsigned) &PIE2)*8) + 6;
[; ;pic18f27j13.h: 16782: extern volatile __bit CM2IF @ (((unsigned) &PIR2)*8) + 6;
[; ;pic18f27j13.h: 16784: extern volatile __bit CM2IP @ (((unsigned) &IPR2)*8) + 6;
[; ;pic18f27j13.h: 16786: extern volatile __bit CM3IE @ (((unsigned) &PIE5)*8) + 5;
[; ;pic18f27j13.h: 16788: extern volatile __bit CM3IF @ (((unsigned) &PIR5)*8) + 5;
[; ;pic18f27j13.h: 16790: extern volatile __bit CM3IP @ (((unsigned) &IPR5)*8) + 5;
[; ;pic18f27j13.h: 16792: extern volatile __bit CMIE @ (((unsigned) &PIE2)*8) + 6;
[; ;pic18f27j13.h: 16794: extern volatile __bit CMIF @ (((unsigned) &PIR2)*8) + 6;
[; ;pic18f27j13.h: 16796: extern volatile __bit CMIP @ (((unsigned) &IPR2)*8) + 6;
[; ;pic18f27j13.h: 16798: extern volatile __bit CMP1MD @ (((unsigned) &PMDIS2)*8) + 0;
[; ;pic18f27j13.h: 16800: extern volatile __bit CMP2MD @ (((unsigned) &PMDIS2)*8) + 1;
[; ;pic18f27j13.h: 16802: extern volatile __bit CMP3MD @ (((unsigned) &PMDIS2)*8) + 2;
[; ;pic18f27j13.h: 16804: extern volatile __bit CMPL02 @ (((unsigned) &PSTR2CON)*8) + 6;
[; ;pic18f27j13.h: 16806: extern volatile __bit CMPL03 @ (((unsigned) &PSTR3CON)*8) + 6;
[; ;pic18f27j13.h: 16808: extern volatile __bit CMPL12 @ (((unsigned) &PSTR2CON)*8) + 7;
[; ;pic18f27j13.h: 16810: extern volatile __bit CMPL13 @ (((unsigned) &PSTR3CON)*8) + 7;
[; ;pic18f27j13.h: 16812: extern volatile __bit COE1 @ (((unsigned) &CM1CON)*8) + 6;
[; ;pic18f27j13.h: 16814: extern volatile __bit COE2 @ (((unsigned) &CM2CON)*8) + 6;
[; ;pic18f27j13.h: 16816: extern volatile __bit COE3 @ (((unsigned) &CM3CON)*8) + 6;
[; ;pic18f27j13.h: 16818: extern volatile __bit CON1 @ (((unsigned) &CM1CON)*8) + 7;
[; ;pic18f27j13.h: 16820: extern volatile __bit CON2 @ (((unsigned) &CM2CON)*8) + 7;
[; ;pic18f27j13.h: 16822: extern volatile __bit CON3 @ (((unsigned) &CM3CON)*8) + 7;
[; ;pic18f27j13.h: 16824: extern volatile __bit COUT1 @ (((unsigned) &CMSTAT)*8) + 0;
[; ;pic18f27j13.h: 16826: extern volatile __bit COUT2 @ (((unsigned) &CMSTAT)*8) + 1;
[; ;pic18f27j13.h: 16828: extern volatile __bit COUT3 @ (((unsigned) &CMSTAT)*8) + 2;
[; ;pic18f27j13.h: 16830: extern volatile __bit CPOL1 @ (((unsigned) &CM1CON)*8) + 5;
[; ;pic18f27j13.h: 16832: extern volatile __bit CPOL2 @ (((unsigned) &CM2CON)*8) + 5;
[; ;pic18f27j13.h: 16834: extern volatile __bit CPOL3 @ (((unsigned) &CM3CON)*8) + 5;
[; ;pic18f27j13.h: 16836: extern volatile __bit CREF1 @ (((unsigned) &CM1CON)*8) + 2;
[; ;pic18f27j13.h: 16838: extern volatile __bit CREF2 @ (((unsigned) &CM2CON)*8) + 2;
[; ;pic18f27j13.h: 16840: extern volatile __bit CREF3 @ (((unsigned) &CM3CON)*8) + 2;
[; ;pic18f27j13.h: 16842: extern volatile __bit CREN1 @ (((unsigned) &RCSTA1)*8) + 4;
[; ;pic18f27j13.h: 16844: extern volatile __bit CREN2 @ (((unsigned) &RCSTA2)*8) + 4;
[; ;pic18f27j13.h: 16846: extern volatile __bit CSRC1 @ (((unsigned) &TXSTA1)*8) + 7;
[; ;pic18f27j13.h: 16848: extern volatile __bit CSRC2 @ (((unsigned) &TXSTA2)*8) + 7;
[; ;pic18f27j13.h: 16850: extern volatile __bit CTED1 @ (((unsigned) &PORTB)*8) + 2;
[; ;pic18f27j13.h: 16852: extern volatile __bit CTED2 @ (((unsigned) &PORTB)*8) + 3;
[; ;pic18f27j13.h: 16854: extern volatile __bit CTMUDS @ (((unsigned) &ODCON3)*8) + 7;
[; ;pic18f27j13.h: 16856: extern volatile __bit CTMUEN @ (((unsigned) &CTMUCONH)*8) + 7;
[; ;pic18f27j13.h: 16858: extern volatile __bit CTMUIE @ (((unsigned) &PIE3)*8) + 2;
[; ;pic18f27j13.h: 16860: extern volatile __bit CTMUIF @ (((unsigned) &PIR3)*8) + 2;
[; ;pic18f27j13.h: 16862: extern volatile __bit CTMUIP @ (((unsigned) &IPR3)*8) + 2;
[; ;pic18f27j13.h: 16864: extern volatile __bit CTMUMD @ (((unsigned) &PMDIS1)*8) + 6;
[; ;pic18f27j13.h: 16866: extern volatile __bit CTMUSIDL @ (((unsigned) &CTMUCONH)*8) + 5;
[; ;pic18f27j13.h: 16868: extern volatile __bit CTPLS @ (((unsigned) &PORTC)*8) + 2;
[; ;pic18f27j13.h: 16870: extern volatile __bit CTTRIG @ (((unsigned) &CTMUCONH)*8) + 0;
[; ;pic18f27j13.h: 16872: extern volatile __bit CVR0 @ (((unsigned) &CVRCON)*8) + 0;
[; ;pic18f27j13.h: 16874: extern volatile __bit CVR1 @ (((unsigned) &CVRCON)*8) + 1;
[; ;pic18f27j13.h: 16876: extern volatile __bit CVR2 @ (((unsigned) &CVRCON)*8) + 2;
[; ;pic18f27j13.h: 16878: extern volatile __bit CVR3 @ (((unsigned) &CVRCON)*8) + 3;
[; ;pic18f27j13.h: 16880: extern volatile __bit CVREF @ (((unsigned) &PORTA)*8) + 2;
[; ;pic18f27j13.h: 16882: extern volatile __bit CVREN @ (((unsigned) &CVRCON)*8) + 7;
[; ;pic18f27j13.h: 16884: extern volatile __bit CVROE @ (((unsigned) &CVRCON)*8) + 6;
[; ;pic18f27j13.h: 16886: extern volatile __bit CVROEN @ (((unsigned) &CVRCON)*8) + 6;
[; ;pic18f27j13.h: 16888: extern volatile __bit CVRR @ (((unsigned) &CVRCON)*8) + 5;
[; ;pic18f27j13.h: 16890: extern volatile __bit CVRSS @ (((unsigned) &CVRCON)*8) + 4;
[; ;pic18f27j13.h: 16892: extern volatile __bit DA @ (((unsigned) &SSP1STAT)*8) + 5;
[; ;pic18f27j13.h: 16894: extern volatile __bit DA1 @ (((unsigned) &SSP1STAT)*8) + 5;
[; ;pic18f27j13.h: 16896: extern volatile __bit DA2 @ (((unsigned) &SSP2STAT)*8) + 5;
[; ;pic18f27j13.h: 16898: extern volatile __bit DATA_ADDRESS @ (((unsigned) &SSP1STAT)*8) + 5;
[; ;pic18f27j13.h: 16900: extern volatile __bit DATA_ADDRESS2 @ (((unsigned) &SSP2STAT)*8) + 5;
[; ;pic18f27j13.h: 16902: extern volatile __bit DC @ (((unsigned) &STATUS)*8) + 1;
[; ;pic18f27j13.h: 16904: extern volatile __bit DC10B0 @ (((unsigned) &CCP10CON)*8) + 4;
[; ;pic18f27j13.h: 16906: extern volatile __bit DC10B1 @ (((unsigned) &CCP10CON)*8) + 5;
[; ;pic18f27j13.h: 16908: extern volatile __bit DC1B0 @ (((unsigned) &CCP1CON)*8) + 4;
[; ;pic18f27j13.h: 16910: extern volatile __bit DC1B1 @ (((unsigned) &CCP1CON)*8) + 5;
[; ;pic18f27j13.h: 16912: extern volatile __bit DC2B0 @ (((unsigned) &CCP2CON)*8) + 4;
[; ;pic18f27j13.h: 16914: extern volatile __bit DC2B1 @ (((unsigned) &CCP2CON)*8) + 5;
[; ;pic18f27j13.h: 16916: extern volatile __bit DC3B0 @ (((unsigned) &CCP3CON)*8) + 4;
[; ;pic18f27j13.h: 16918: extern volatile __bit DC3B1 @ (((unsigned) &CCP3CON)*8) + 5;
[; ;pic18f27j13.h: 16920: extern volatile __bit DC4B0 @ (((unsigned) &CCP4CON)*8) + 4;
[; ;pic18f27j13.h: 16922: extern volatile __bit DC4B1 @ (((unsigned) &CCP4CON)*8) + 5;
[; ;pic18f27j13.h: 16924: extern volatile __bit DC5B0 @ (((unsigned) &CCP5CON)*8) + 4;
[; ;pic18f27j13.h: 16926: extern volatile __bit DC5B1 @ (((unsigned) &CCP5CON)*8) + 5;
[; ;pic18f27j13.h: 16928: extern volatile __bit DC6B0 @ (((unsigned) &CCP6CON)*8) + 4;
[; ;pic18f27j13.h: 16930: extern volatile __bit DC6B1 @ (((unsigned) &CCP6CON)*8) + 5;
[; ;pic18f27j13.h: 16932: extern volatile __bit DC7B0 @ (((unsigned) &CCP7CON)*8) + 4;
[; ;pic18f27j13.h: 16934: extern volatile __bit DC7B1 @ (((unsigned) &CCP7CON)*8) + 5;
[; ;pic18f27j13.h: 16936: extern volatile __bit DC8B0 @ (((unsigned) &CCP8CON)*8) + 4;
[; ;pic18f27j13.h: 16938: extern volatile __bit DC8B1 @ (((unsigned) &CCP8CON)*8) + 5;
[; ;pic18f27j13.h: 16940: extern volatile __bit DC9B0 @ (((unsigned) &CCP9CON)*8) + 4;
[; ;pic18f27j13.h: 16942: extern volatile __bit DC9B1 @ (((unsigned) &CCP9CON)*8) + 5;
[; ;pic18f27j13.h: 16944: extern volatile __bit DLYCYC0 @ (((unsigned) &DMACON2)*8) + 4;
[; ;pic18f27j13.h: 16946: extern volatile __bit DLYCYC1 @ (((unsigned) &DMACON2)*8) + 5;
[; ;pic18f27j13.h: 16948: extern volatile __bit DLYCYC2 @ (((unsigned) &DMACON2)*8) + 6;
[; ;pic18f27j13.h: 16950: extern volatile __bit DLYCYC3 @ (((unsigned) &DMACON2)*8) + 7;
[; ;pic18f27j13.h: 16952: extern volatile __bit DLYINTEN @ (((unsigned) &DMACON1)*8) + 1;
[; ;pic18f27j13.h: 16954: extern volatile __bit DMAEN @ (((unsigned) &DMACON1)*8) + 0;
[; ;pic18f27j13.h: 16956: extern volatile __bit DONE @ (((unsigned) &ADCON0)*8) + 1;
[; ;pic18f27j13.h: 16958: extern volatile __bit DS @ (((unsigned) &WDTCON)*8) + 3;
[; ;pic18f27j13.h: 16960: extern volatile __bit DSBOR @ (((unsigned) &DSCONL)*8) + 1;
[; ;pic18f27j13.h: 16962: extern volatile __bit DSEN @ (((unsigned) &DSCONH)*8) + 7;
[; ;pic18f27j13.h: 16964: extern volatile __bit DSFLT @ (((unsigned) &DSWAKEL)*8) + 7;
[; ;pic18f27j13.h: 16966: extern volatile __bit DSINT0 @ (((unsigned) &DSWAKEH)*8) + 0;
[; ;pic18f27j13.h: 16968: extern volatile __bit DSMCLR @ (((unsigned) &DSWAKEL)*8) + 2;
[; ;pic18f27j13.h: 16970: extern volatile __bit DSPOR @ (((unsigned) &DSWAKEL)*8) + 0;
[; ;pic18f27j13.h: 16972: extern volatile __bit DSRTC @ (((unsigned) &DSWAKEL)*8) + 3;
[; ;pic18f27j13.h: 16974: extern volatile __bit DSULP @ (((unsigned) &DSWAKEL)*8) + 5;
[; ;pic18f27j13.h: 16976: extern volatile __bit DSULPEN @ (((unsigned) &DSCONH)*8) + 1;
[; ;pic18f27j13.h: 16978: extern volatile __bit DSWDT @ (((unsigned) &DSWAKEL)*8) + 4;
[; ;pic18f27j13.h: 16980: extern volatile __bit DT1 @ (((unsigned) &PORTC)*8) + 7;
[; ;pic18f27j13.h: 16982: extern volatile __bit DTRXP @ (((unsigned) &BAUDCON1)*8) + 5;
[; ;pic18f27j13.h: 16984: extern volatile __bit DTRXP1 @ (((unsigned) &BAUDCON1)*8) + 5;
[; ;pic18f27j13.h: 16986: extern volatile __bit DTRXP2 @ (((unsigned) &BAUDCON2)*8) + 5;
[; ;pic18f27j13.h: 16988: extern volatile __bit DUPLEX0 @ (((unsigned) &DMACON1)*8) + 2;
[; ;pic18f27j13.h: 16990: extern volatile __bit DUPLEX1 @ (((unsigned) &DMACON1)*8) + 3;
[; ;pic18f27j13.h: 16992: extern volatile __bit D_A @ (((unsigned) &SSP1STAT)*8) + 5;
[; ;pic18f27j13.h: 16994: extern volatile __bit D_A2 @ (((unsigned) &SSP2STAT)*8) + 5;
[; ;pic18f27j13.h: 16996: extern volatile __bit D_nA2 @ (((unsigned) &SSP2STAT)*8) + 5;
[; ;pic18f27j13.h: 16998: extern volatile __bit ECCP1AS0 @ (((unsigned) &ECCP1AS)*8) + 4;
[; ;pic18f27j13.h: 17000: extern volatile __bit ECCP1AS1 @ (((unsigned) &ECCP1AS)*8) + 5;
[; ;pic18f27j13.h: 17002: extern volatile __bit ECCP1AS2 @ (((unsigned) &ECCP1AS)*8) + 6;
[; ;pic18f27j13.h: 17004: extern volatile __bit ECCP1ASE @ (((unsigned) &ECCP1AS)*8) + 7;
[; ;pic18f27j13.h: 17006: extern volatile __bit ECCP1MD @ (((unsigned) &PMDIS0)*8) + 5;
[; ;pic18f27j13.h: 17008: extern volatile __bit ECCP1OD @ (((unsigned) &ODCON1)*8) + 0;
[; ;pic18f27j13.h: 17010: extern volatile __bit ECCP2AS0 @ (((unsigned) &ECCP2AS)*8) + 4;
[; ;pic18f27j13.h: 17012: extern volatile __bit ECCP2AS1 @ (((unsigned) &ECCP2AS)*8) + 5;
[; ;pic18f27j13.h: 17014: extern volatile __bit ECCP2AS2 @ (((unsigned) &ECCP2AS)*8) + 6;
[; ;pic18f27j13.h: 17016: extern volatile __bit ECCP2ASE @ (((unsigned) &ECCP2AS)*8) + 7;
[; ;pic18f27j13.h: 17018: extern volatile __bit ECCP2MD @ (((unsigned) &PMDIS0)*8) + 6;
[; ;pic18f27j13.h: 17020: extern volatile __bit ECCP2OD @ (((unsigned) &ODCON1)*8) + 1;
[; ;pic18f27j13.h: 17022: extern volatile __bit ECCP3AS0 @ (((unsigned) &ECCP3AS)*8) + 4;
[; ;pic18f27j13.h: 17024: extern volatile __bit ECCP3AS1 @ (((unsigned) &ECCP3AS)*8) + 5;
[; ;pic18f27j13.h: 17026: extern volatile __bit ECCP3AS2 @ (((unsigned) &ECCP3AS)*8) + 6;
[; ;pic18f27j13.h: 17028: extern volatile __bit ECCP3ASE @ (((unsigned) &ECCP3AS)*8) + 7;
[; ;pic18f27j13.h: 17030: extern volatile __bit ECCP3MD @ (((unsigned) &PMDIS0)*8) + 7;
[; ;pic18f27j13.h: 17032: extern volatile __bit ECCP3OD @ (((unsigned) &ODCON1)*8) + 2;
[; ;pic18f27j13.h: 17034: extern volatile __bit EDG1POL @ (((unsigned) &CTMUCONL)*8) + 4;
[; ;pic18f27j13.h: 17036: extern volatile __bit EDG1SEL0 @ (((unsigned) &CTMUCONL)*8) + 2;
[; ;pic18f27j13.h: 17038: extern volatile __bit EDG1SEL1 @ (((unsigned) &CTMUCONL)*8) + 3;
[; ;pic18f27j13.h: 17040: extern volatile __bit EDG1STAT @ (((unsigned) &CTMUCONL)*8) + 0;
[; ;pic18f27j13.h: 17042: extern volatile __bit EDG2POL @ (((unsigned) &CTMUCONL)*8) + 7;
[; ;pic18f27j13.h: 17044: extern volatile __bit EDG2SEL0 @ (((unsigned) &CTMUCONL)*8) + 5;
[; ;pic18f27j13.h: 17046: extern volatile __bit EDG2SEL1 @ (((unsigned) &CTMUCONL)*8) + 6;
[; ;pic18f27j13.h: 17048: extern volatile __bit EDG2STAT @ (((unsigned) &CTMUCONL)*8) + 1;
[; ;pic18f27j13.h: 17050: extern volatile __bit EDGEN @ (((unsigned) &CTMUCONH)*8) + 3;
[; ;pic18f27j13.h: 17052: extern volatile __bit EDGSEQEN @ (((unsigned) &CTMUCONH)*8) + 2;
[; ;pic18f27j13.h: 17054: extern volatile __bit EVPOL01 @ (((unsigned) &CM1CON)*8) + 3;
[; ;pic18f27j13.h: 17056: extern volatile __bit EVPOL02 @ (((unsigned) &CM2CON)*8) + 3;
[; ;pic18f27j13.h: 17058: extern volatile __bit EVPOL03 @ (((unsigned) &CM3CON)*8) + 3;
[; ;pic18f27j13.h: 17060: extern volatile __bit EVPOL05 @ (((unsigned) &IPR5)*8) + 3;
[; ;pic18f27j13.h: 17062: extern volatile __bit EVPOL11 @ (((unsigned) &CM1CON)*8) + 4;
[; ;pic18f27j13.h: 17064: extern volatile __bit EVPOL12 @ (((unsigned) &CM2CON)*8) + 4;
[; ;pic18f27j13.h: 17066: extern volatile __bit EVPOL13 @ (((unsigned) &CM3CON)*8) + 4;
[; ;pic18f27j13.h: 17068: extern volatile __bit EVPOL15 @ (((unsigned) &IPR5)*8) + 4;
[; ;pic18f27j13.h: 17070: extern volatile __bit FERR1 @ (((unsigned) &RCSTA1)*8) + 2;
[; ;pic18f27j13.h: 17072: extern volatile __bit FERR2 @ (((unsigned) &RCSTA2)*8) + 2;
[; ;pic18f27j13.h: 17074: extern volatile __bit FREE @ (((unsigned) &EECON1)*8) + 4;
[; ;pic18f27j13.h: 17076: extern volatile __bit GCEN1 @ (((unsigned) &SSP1CON2)*8) + 7;
[; ;pic18f27j13.h: 17078: extern volatile __bit GCEN2 @ (((unsigned) &SSP2CON2)*8) + 7;
[; ;pic18f27j13.h: 17080: extern volatile __bit GIE @ (((unsigned) &INTCON)*8) + 7;
[; ;pic18f27j13.h: 17082: extern volatile __bit GIEH @ (((unsigned) &INTCON)*8) + 7;
[; ;pic18f27j13.h: 17084: extern volatile __bit GIEL @ (((unsigned) &INTCON)*8) + 6;
[; ;pic18f27j13.h: 17086: extern volatile __bit GIE_GIEH @ (((unsigned) &INTCON)*8) + 7;
[; ;pic18f27j13.h: 17088: extern volatile __bit GO @ (((unsigned) &ADCON0)*8) + 1;
[; ;pic18f27j13.h: 17090: extern volatile __bit GODONE @ (((unsigned) &ADCON0)*8) + 1;
[; ;pic18f27j13.h: 17092: extern volatile __bit GO_DONE @ (((unsigned) &ADCON0)*8) + 1;
[; ;pic18f27j13.h: 17094: extern volatile __bit GO_NOT_DONE @ (((unsigned) &ADCON0)*8) + 1;
[; ;pic18f27j13.h: 17096: extern volatile __bit GO_nDONE @ (((unsigned) &ADCON0)*8) + 1;
[; ;pic18f27j13.h: 17098: extern volatile __bit HALFSEC @ (((unsigned) &RTCCFG)*8) + 3;
[; ;pic18f27j13.h: 17100: extern volatile __bit HLVDEN @ (((unsigned) &HLVDCON)*8) + 4;
[; ;pic18f27j13.h: 17102: extern volatile __bit HLVDIE @ (((unsigned) &PIE2)*8) + 2;
[; ;pic18f27j13.h: 17104: extern volatile __bit HLVDIF @ (((unsigned) &PIR2)*8) + 2;
[; ;pic18f27j13.h: 17106: extern volatile __bit HLVDIN @ (((unsigned) &PORTA)*8) + 5;
[; ;pic18f27j13.h: 17108: extern volatile __bit HLVDIP @ (((unsigned) &IPR2)*8) + 2;
[; ;pic18f27j13.h: 17110: extern volatile __bit HLVDL0 @ (((unsigned) &HLVDCON)*8) + 0;
[; ;pic18f27j13.h: 17112: extern volatile __bit HLVDL1 @ (((unsigned) &HLVDCON)*8) + 1;
[; ;pic18f27j13.h: 17114: extern volatile __bit HLVDL2 @ (((unsigned) &HLVDCON)*8) + 2;
[; ;pic18f27j13.h: 17116: extern volatile __bit HLVDL3 @ (((unsigned) &HLVDCON)*8) + 3;
[; ;pic18f27j13.h: 17118: extern volatile __bit I2C_DAT @ (((unsigned) &SSP1STAT)*8) + 5;
[; ;pic18f27j13.h: 17120: extern volatile __bit I2C_DAT2 @ (((unsigned) &SSP2STAT)*8) + 5;
[; ;pic18f27j13.h: 17122: extern volatile __bit I2C_READ @ (((unsigned) &SSP1STAT)*8) + 2;
[; ;pic18f27j13.h: 17124: extern volatile __bit I2C_READ2 @ (((unsigned) &SSP2STAT)*8) + 2;
[; ;pic18f27j13.h: 17126: extern volatile __bit I2C_START @ (((unsigned) &SSP1STAT)*8) + 3;
[; ;pic18f27j13.h: 17128: extern volatile __bit I2C_START2 @ (((unsigned) &SSP2STAT)*8) + 3;
[; ;pic18f27j13.h: 17130: extern volatile __bit I2C_STOP @ (((unsigned) &SSP1STAT)*8) + 4;
[; ;pic18f27j13.h: 17132: extern volatile __bit I2C_STOP2 @ (((unsigned) &SSP2STAT)*8) + 4;
[; ;pic18f27j13.h: 17134: extern volatile __bit IDISSEN @ (((unsigned) &CTMUCONH)*8) + 1;
[; ;pic18f27j13.h: 17136: extern volatile __bit IDLEN @ (((unsigned) &OSCCON)*8) + 7;
[; ;pic18f27j13.h: 17138: extern volatile __bit INT0 @ (((unsigned) &PORTB)*8) + 0;
[; ;pic18f27j13.h: 17140: extern volatile __bit INT0E @ (((unsigned) &INTCON)*8) + 4;
[; ;pic18f27j13.h: 17142: extern volatile __bit INT0F @ (((unsigned) &INTCON)*8) + 1;
[; ;pic18f27j13.h: 17144: extern volatile __bit INT0IE @ (((unsigned) &INTCON)*8) + 4;
[; ;pic18f27j13.h: 17146: extern volatile __bit INT0IF @ (((unsigned) &INTCON)*8) + 1;
[; ;pic18f27j13.h: 17148: extern volatile __bit INT1E @ (((unsigned) &INTCON3)*8) + 3;
[; ;pic18f27j13.h: 17150: extern volatile __bit INT1F @ (((unsigned) &INTCON3)*8) + 0;
[; ;pic18f27j13.h: 17152: extern volatile __bit INT1IE @ (((unsigned) &INTCON3)*8) + 3;
[; ;pic18f27j13.h: 17154: extern volatile __bit INT1IF @ (((unsigned) &INTCON3)*8) + 0;
[; ;pic18f27j13.h: 17156: extern volatile __bit INT1IP @ (((unsigned) &INTCON3)*8) + 6;
[; ;pic18f27j13.h: 17158: extern volatile __bit INT1P @ (((unsigned) &INTCON3)*8) + 6;
[; ;pic18f27j13.h: 17160: extern volatile __bit INT2E @ (((unsigned) &INTCON3)*8) + 4;
[; ;pic18f27j13.h: 17162: extern volatile __bit INT2F @ (((unsigned) &INTCON3)*8) + 1;
[; ;pic18f27j13.h: 17164: extern volatile __bit INT2IE @ (((unsigned) &INTCON3)*8) + 4;
[; ;pic18f27j13.h: 17166: extern volatile __bit INT2IF @ (((unsigned) &INTCON3)*8) + 1;
[; ;pic18f27j13.h: 17168: extern volatile __bit INT2IP @ (((unsigned) &INTCON3)*8) + 7;
[; ;pic18f27j13.h: 17170: extern volatile __bit INT2P @ (((unsigned) &INTCON3)*8) + 7;
[; ;pic18f27j13.h: 17172: extern volatile __bit INT3E @ (((unsigned) &INTCON3)*8) + 5;
[; ;pic18f27j13.h: 17174: extern volatile __bit INT3F @ (((unsigned) &INTCON3)*8) + 2;
[; ;pic18f27j13.h: 17176: extern volatile __bit INT3IE @ (((unsigned) &INTCON3)*8) + 5;
[; ;pic18f27j13.h: 17178: extern volatile __bit INT3IF @ (((unsigned) &INTCON3)*8) + 2;
[; ;pic18f27j13.h: 17180: extern volatile __bit INT3IP @ (((unsigned) &INTCON2)*8) + 1;
[; ;pic18f27j13.h: 17182: extern volatile __bit INT3P @ (((unsigned) &INTCON2)*8) + 1;
[; ;pic18f27j13.h: 17184: extern volatile __bit INTEDG0 @ (((unsigned) &INTCON2)*8) + 6;
[; ;pic18f27j13.h: 17186: extern volatile __bit INTEDG1 @ (((unsigned) &INTCON2)*8) + 5;
[; ;pic18f27j13.h: 17188: extern volatile __bit INTEDG2 @ (((unsigned) &INTCON2)*8) + 4;
[; ;pic18f27j13.h: 17190: extern volatile __bit INTEDG3 @ (((unsigned) &INTCON2)*8) + 3;
[; ;pic18f27j13.h: 17192: extern volatile __bit INTLVL0 @ (((unsigned) &DMACON2)*8) + 0;
[; ;pic18f27j13.h: 17194: extern volatile __bit INTLVL1 @ (((unsigned) &DMACON2)*8) + 1;
[; ;pic18f27j13.h: 17196: extern volatile __bit INTLVL2 @ (((unsigned) &DMACON2)*8) + 2;
[; ;pic18f27j13.h: 17198: extern volatile __bit INTLVL3 @ (((unsigned) &DMACON2)*8) + 3;
[; ;pic18f27j13.h: 17200: extern volatile __bit INTSRC @ (((unsigned) &OSCTUNE)*8) + 7;
[; ;pic18f27j13.h: 17202: extern volatile __bit IOLOCK @ (((unsigned) &PPSCON)*8) + 0;
[; ;pic18f27j13.h: 17204: extern volatile __bit IPEN @ (((unsigned) &RCON)*8) + 7;
[; ;pic18f27j13.h: 17206: extern volatile __bit IRCF0 @ (((unsigned) &OSCCON)*8) + 4;
[; ;pic18f27j13.h: 17208: extern volatile __bit IRCF1 @ (((unsigned) &OSCCON)*8) + 5;
[; ;pic18f27j13.h: 17210: extern volatile __bit IRCF2 @ (((unsigned) &OSCCON)*8) + 6;
[; ;pic18f27j13.h: 17212: extern volatile __bit IRNG0 @ (((unsigned) &CTMUICON)*8) + 0;
[; ;pic18f27j13.h: 17214: extern volatile __bit IRNG1 @ (((unsigned) &CTMUICON)*8) + 1;
[; ;pic18f27j13.h: 17216: extern volatile __bit IRVST @ (((unsigned) &HLVDCON)*8) + 5;
[; ;pic18f27j13.h: 17218: extern volatile __bit ITRIM0 @ (((unsigned) &CTMUICON)*8) + 2;
[; ;pic18f27j13.h: 17220: extern volatile __bit ITRIM1 @ (((unsigned) &CTMUICON)*8) + 3;
[; ;pic18f27j13.h: 17222: extern volatile __bit ITRIM2 @ (((unsigned) &CTMUICON)*8) + 4;
[; ;pic18f27j13.h: 17224: extern volatile __bit ITRIM3 @ (((unsigned) &CTMUICON)*8) + 5;
[; ;pic18f27j13.h: 17226: extern volatile __bit ITRIM4 @ (((unsigned) &CTMUICON)*8) + 6;
[; ;pic18f27j13.h: 17228: extern volatile __bit ITRIM5 @ (((unsigned) &CTMUICON)*8) + 7;
[; ;pic18f27j13.h: 17230: extern volatile __bit KBI0 @ (((unsigned) &PORTB)*8) + 4;
[; ;pic18f27j13.h: 17232: extern volatile __bit KBI1 @ (((unsigned) &PORTB)*8) + 5;
[; ;pic18f27j13.h: 17234: extern volatile __bit KBI2 @ (((unsigned) &PORTB)*8) + 6;
[; ;pic18f27j13.h: 17236: extern volatile __bit KBI3 @ (((unsigned) &PORTB)*8) + 7;
[; ;pic18f27j13.h: 17238: extern volatile __bit LA0 @ (((unsigned) &LATA)*8) + 0;
[; ;pic18f27j13.h: 17240: extern volatile __bit LA1 @ (((unsigned) &LATA)*8) + 1;
[; ;pic18f27j13.h: 17242: extern volatile __bit LA2 @ (((unsigned) &LATA)*8) + 2;
[; ;pic18f27j13.h: 17244: extern volatile __bit LA3 @ (((unsigned) &LATA)*8) + 3;
[; ;pic18f27j13.h: 17246: extern volatile __bit LA4 @ (((unsigned) &LATA)*8) + 4;
[; ;pic18f27j13.h: 17248: extern volatile __bit LA5 @ (((unsigned) &LATA)*8) + 5;
[; ;pic18f27j13.h: 17250: extern volatile __bit LA6 @ (((unsigned) &LATA)*8) + 6;
[; ;pic18f27j13.h: 17252: extern volatile __bit LA7 @ (((unsigned) &LATA)*8) + 7;
[; ;pic18f27j13.h: 17254: extern volatile __bit LATA0 @ (((unsigned) &LATA)*8) + 0;
[; ;pic18f27j13.h: 17256: extern volatile __bit LATA1 @ (((unsigned) &LATA)*8) + 1;
[; ;pic18f27j13.h: 17258: extern volatile __bit LATA2 @ (((unsigned) &LATA)*8) + 2;
[; ;pic18f27j13.h: 17260: extern volatile __bit LATA3 @ (((unsigned) &LATA)*8) + 3;
[; ;pic18f27j13.h: 17262: extern volatile __bit LATA5 @ (((unsigned) &LATA)*8) + 5;
[; ;pic18f27j13.h: 17264: extern volatile __bit LATA6 @ (((unsigned) &LATA)*8) + 6;
[; ;pic18f27j13.h: 17266: extern volatile __bit LATA7 @ (((unsigned) &LATA)*8) + 7;
[; ;pic18f27j13.h: 17268: extern volatile __bit LATB0 @ (((unsigned) &LATB)*8) + 0;
[; ;pic18f27j13.h: 17270: extern volatile __bit LATB1 @ (((unsigned) &LATB)*8) + 1;
[; ;pic18f27j13.h: 17272: extern volatile __bit LATB2 @ (((unsigned) &LATB)*8) + 2;
[; ;pic18f27j13.h: 17274: extern volatile __bit LATB3 @ (((unsigned) &LATB)*8) + 3;
[; ;pic18f27j13.h: 17276: extern volatile __bit LATB4 @ (((unsigned) &LATB)*8) + 4;
[; ;pic18f27j13.h: 17278: extern volatile __bit LATB5 @ (((unsigned) &LATB)*8) + 5;
[; ;pic18f27j13.h: 17280: extern volatile __bit LATB6 @ (((unsigned) &LATB)*8) + 6;
[; ;pic18f27j13.h: 17282: extern volatile __bit LATB7 @ (((unsigned) &LATB)*8) + 7;
[; ;pic18f27j13.h: 17284: extern volatile __bit LATC0 @ (((unsigned) &LATC)*8) + 0;
[; ;pic18f27j13.h: 17286: extern volatile __bit LATC1 @ (((unsigned) &LATC)*8) + 1;
[; ;pic18f27j13.h: 17288: extern volatile __bit LATC2 @ (((unsigned) &LATC)*8) + 2;
[; ;pic18f27j13.h: 17290: extern volatile __bit LATC3 @ (((unsigned) &LATC)*8) + 3;
[; ;pic18f27j13.h: 17292: extern volatile __bit LATC4 @ (((unsigned) &LATC)*8) + 4;
[; ;pic18f27j13.h: 17294: extern volatile __bit LATC5 @ (((unsigned) &LATC)*8) + 5;
[; ;pic18f27j13.h: 17296: extern volatile __bit LATC6 @ (((unsigned) &LATC)*8) + 6;
[; ;pic18f27j13.h: 17298: extern volatile __bit LATC7 @ (((unsigned) &LATC)*8) + 7;
[; ;pic18f27j13.h: 17300: extern volatile __bit LB0 @ (((unsigned) &LATB)*8) + 0;
[; ;pic18f27j13.h: 17302: extern volatile __bit LB1 @ (((unsigned) &LATB)*8) + 1;
[; ;pic18f27j13.h: 17304: extern volatile __bit LB2 @ (((unsigned) &LATB)*8) + 2;
[; ;pic18f27j13.h: 17306: extern volatile __bit LB3 @ (((unsigned) &LATB)*8) + 3;
[; ;pic18f27j13.h: 17308: extern volatile __bit LB4 @ (((unsigned) &LATB)*8) + 4;
[; ;pic18f27j13.h: 17310: extern volatile __bit LB5 @ (((unsigned) &LATB)*8) + 5;
[; ;pic18f27j13.h: 17312: extern volatile __bit LB6 @ (((unsigned) &LATB)*8) + 6;
[; ;pic18f27j13.h: 17314: extern volatile __bit LB7 @ (((unsigned) &LATB)*8) + 7;
[; ;pic18f27j13.h: 17316: extern volatile __bit LC0 @ (((unsigned) &LATC)*8) + 0;
[; ;pic18f27j13.h: 17318: extern volatile __bit LC1 @ (((unsigned) &LATC)*8) + 1;
[; ;pic18f27j13.h: 17320: extern volatile __bit LC2 @ (((unsigned) &LATC)*8) + 2;
[; ;pic18f27j13.h: 17322: extern volatile __bit LC3 @ (((unsigned) &LATC)*8) + 3;
[; ;pic18f27j13.h: 17324: extern volatile __bit LC4 @ (((unsigned) &LATC)*8) + 4;
[; ;pic18f27j13.h: 17326: extern volatile __bit LC5 @ (((unsigned) &LATC)*8) + 5;
[; ;pic18f27j13.h: 17328: extern volatile __bit LC6 @ (((unsigned) &LATC)*8) + 6;
[; ;pic18f27j13.h: 17330: extern volatile __bit LC7 @ (((unsigned) &LATC)*8) + 7;
[; ;pic18f27j13.h: 17332: extern volatile __bit LVDIE @ (((unsigned) &PIE2)*8) + 2;
[; ;pic18f27j13.h: 17334: extern volatile __bit LVDIF @ (((unsigned) &PIR2)*8) + 2;
[; ;pic18f27j13.h: 17336: extern volatile __bit LVDIN @ (((unsigned) &PORTA)*8) + 5;
[; ;pic18f27j13.h: 17338: extern volatile __bit LVDIP @ (((unsigned) &IPR2)*8) + 2;
[; ;pic18f27j13.h: 17340: extern volatile __bit LVDSTAT @ (((unsigned) &WDTCON)*8) + 6;
[; ;pic18f27j13.h: 17342: extern volatile __bit MSK01 @ (((unsigned) &SSP1ADD)*8) + 0;
[; ;pic18f27j13.h: 17344: extern volatile __bit MSK02 @ (((unsigned) &SSP2ADD)*8) + 0;
[; ;pic18f27j13.h: 17346: extern volatile __bit MSK11 @ (((unsigned) &SSP1ADD)*8) + 1;
[; ;pic18f27j13.h: 17348: extern volatile __bit MSK12 @ (((unsigned) &SSP2ADD)*8) + 1;
[; ;pic18f27j13.h: 17350: extern volatile __bit MSK21 @ (((unsigned) &SSP1ADD)*8) + 2;
[; ;pic18f27j13.h: 17352: extern volatile __bit MSK22 @ (((unsigned) &SSP2ADD)*8) + 2;
[; ;pic18f27j13.h: 17354: extern volatile __bit MSK31 @ (((unsigned) &SSP1ADD)*8) + 3;
[; ;pic18f27j13.h: 17356: extern volatile __bit MSK32 @ (((unsigned) &SSP2ADD)*8) + 3;
[; ;pic18f27j13.h: 17358: extern volatile __bit MSK41 @ (((unsigned) &SSP1ADD)*8) + 4;
[; ;pic18f27j13.h: 17360: extern volatile __bit MSK42 @ (((unsigned) &SSP2ADD)*8) + 4;
[; ;pic18f27j13.h: 17362: extern volatile __bit MSK51 @ (((unsigned) &SSP1ADD)*8) + 5;
[; ;pic18f27j13.h: 17364: extern volatile __bit MSK52 @ (((unsigned) &SSP2ADD)*8) + 5;
[; ;pic18f27j13.h: 17366: extern volatile __bit MSK61 @ (((unsigned) &SSP1ADD)*8) + 6;
[; ;pic18f27j13.h: 17368: extern volatile __bit MSK62 @ (((unsigned) &SSP2ADD)*8) + 6;
[; ;pic18f27j13.h: 17370: extern volatile __bit MSK71 @ (((unsigned) &SSP1ADD)*8) + 7;
[; ;pic18f27j13.h: 17372: extern volatile __bit MSK72 @ (((unsigned) &SSP2ADD)*8) + 7;
[; ;pic18f27j13.h: 17374: extern volatile __bit NEGATIVE @ (((unsigned) &STATUS)*8) + 4;
[; ;pic18f27j13.h: 17376: extern volatile __bit NOT_A @ (((unsigned) &SSP1STAT)*8) + 5;
[; ;pic18f27j13.h: 17378: extern volatile __bit NOT_ADDRESS @ (((unsigned) &SSP1STAT)*8) + 5;
[; ;pic18f27j13.h: 17380: extern volatile __bit NOT_BOR @ (((unsigned) &RCON)*8) + 0;
[; ;pic18f27j13.h: 17382: extern volatile __bit NOT_CM @ (((unsigned) &RCON)*8) + 5;
[; ;pic18f27j13.h: 17384: extern volatile __bit NOT_DONE @ (((unsigned) &ADCON0)*8) + 1;
[; ;pic18f27j13.h: 17386: extern volatile __bit NOT_PD @ (((unsigned) &RCON)*8) + 2;
[; ;pic18f27j13.h: 17388: extern volatile __bit NOT_POR @ (((unsigned) &RCON)*8) + 1;
[; ;pic18f27j13.h: 17390: extern volatile __bit NOT_RBPU @ (((unsigned) &INTCON2)*8) + 7;
[; ;pic18f27j13.h: 17392: extern volatile __bit NOT_RC8 @ (((unsigned) &RCSTA1)*8) + 6;
[; ;pic18f27j13.h: 17394: extern volatile __bit NOT_RI @ (((unsigned) &RCON)*8) + 4;
[; ;pic18f27j13.h: 17396: extern volatile __bit NOT_SS1 @ (((unsigned) &PORTA)*8) + 5;
[; ;pic18f27j13.h: 17398: extern volatile __bit NOT_T1DONE @ (((unsigned) &T1GCON)*8) + 3;
[; ;pic18f27j13.h: 17400: extern volatile __bit NOT_T1SYNC @ (((unsigned) &T1CON)*8) + 2;
[; ;pic18f27j13.h: 17402: extern volatile __bit NOT_T3SYNC @ (((unsigned) &T3CON)*8) + 2;
[; ;pic18f27j13.h: 17404: extern volatile __bit NOT_T5DONE @ (((unsigned) &T5GCON)*8) + 3;
[; ;pic18f27j13.h: 17406: extern volatile __bit NOT_T5SYNC @ (((unsigned) &T5CON)*8) + 2;
[; ;pic18f27j13.h: 17408: extern volatile __bit NOT_TO @ (((unsigned) &RCON)*8) + 3;
[; ;pic18f27j13.h: 17410: extern volatile __bit NOT_TX8 @ (((unsigned) &TXSTA1)*8) + 6;
[; ;pic18f27j13.h: 17412: extern volatile __bit NOT_W @ (((unsigned) &SSP1STAT)*8) + 2;
[; ;pic18f27j13.h: 17414: extern volatile __bit NOT_WRITE @ (((unsigned) &SSP1STAT)*8) + 2;
[; ;pic18f27j13.h: 17416: extern volatile __bit OERR1 @ (((unsigned) &RCSTA1)*8) + 1;
[; ;pic18f27j13.h: 17418: extern volatile __bit OERR2 @ (((unsigned) &RCSTA2)*8) + 1;
[; ;pic18f27j13.h: 17420: extern volatile __bit OSC1 @ (((unsigned) &PORTA)*8) + 7;
[; ;pic18f27j13.h: 17422: extern volatile __bit OSC2 @ (((unsigned) &PORTA)*8) + 6;
[; ;pic18f27j13.h: 17424: extern volatile __bit OSCFIE @ (((unsigned) &PIE2)*8) + 7;
[; ;pic18f27j13.h: 17426: extern volatile __bit OSCFIF @ (((unsigned) &PIR2)*8) + 7;
[; ;pic18f27j13.h: 17428: extern volatile __bit OSCFIP @ (((unsigned) &IPR2)*8) + 7;
[; ;pic18f27j13.h: 17430: extern volatile __bit OSTS @ (((unsigned) &OSCCON)*8) + 3;
[; ;pic18f27j13.h: 17432: extern volatile __bit OV @ (((unsigned) &STATUS)*8) + 3;
[; ;pic18f27j13.h: 17434: extern volatile __bit OVERFLOW @ (((unsigned) &STATUS)*8) + 3;
[; ;pic18f27j13.h: 17436: extern volatile __bit P1DC0 @ (((unsigned) &ECCP1DEL)*8) + 0;
[; ;pic18f27j13.h: 17438: extern volatile __bit P1DC1 @ (((unsigned) &ECCP1DEL)*8) + 1;
[; ;pic18f27j13.h: 17440: extern volatile __bit P1DC2 @ (((unsigned) &ECCP1DEL)*8) + 2;
[; ;pic18f27j13.h: 17442: extern volatile __bit P1DC3 @ (((unsigned) &ECCP1DEL)*8) + 3;
[; ;pic18f27j13.h: 17444: extern volatile __bit P1DC4 @ (((unsigned) &ECCP1DEL)*8) + 4;
[; ;pic18f27j13.h: 17446: extern volatile __bit P1DC5 @ (((unsigned) &ECCP1DEL)*8) + 5;
[; ;pic18f27j13.h: 17448: extern volatile __bit P1DC6 @ (((unsigned) &ECCP1DEL)*8) + 6;
[; ;pic18f27j13.h: 17450: extern volatile __bit P1M0 @ (((unsigned) &CCP1CON)*8) + 6;
[; ;pic18f27j13.h: 17452: extern volatile __bit P1M1 @ (((unsigned) &CCP1CON)*8) + 7;
[; ;pic18f27j13.h: 17454: extern volatile __bit P1RSEN @ (((unsigned) &ECCP1DEL)*8) + 7;
[; ;pic18f27j13.h: 17456: extern volatile __bit P2 @ (((unsigned) &SSP2STAT)*8) + 4;
[; ;pic18f27j13.h: 17458: extern volatile __bit P2DC02 @ (((unsigned) &PSTR2CON)*8) + 0;
[; ;pic18f27j13.h: 17460: extern volatile __bit P2DC0CON @ (((unsigned) &PSTR2CON)*8) + 0;
[; ;pic18f27j13.h: 17462: extern volatile __bit P2DC12 @ (((unsigned) &PSTR2CON)*8) + 1;
[; ;pic18f27j13.h: 17464: extern volatile __bit P2DC1CON @ (((unsigned) &PSTR2CON)*8) + 1;
[; ;pic18f27j13.h: 17466: extern volatile __bit P2DC22 @ (((unsigned) &PSTR2CON)*8) + 2;
[; ;pic18f27j13.h: 17468: extern volatile __bit P2DC2CON @ (((unsigned) &PSTR2CON)*8) + 2;
[; ;pic18f27j13.h: 17470: extern volatile __bit P2DC32 @ (((unsigned) &PSTR2CON)*8) + 3;
[; ;pic18f27j13.h: 17472: extern volatile __bit P2DC3CON @ (((unsigned) &PSTR2CON)*8) + 3;
[; ;pic18f27j13.h: 17474: extern volatile __bit P2DC42 @ (((unsigned) &PSTR2CON)*8) + 4;
[; ;pic18f27j13.h: 17476: extern volatile __bit P2DC4CON @ (((unsigned) &PSTR2CON)*8) + 4;
[; ;pic18f27j13.h: 17478: extern volatile __bit P2DC52 @ (((unsigned) &PSTR2CON)*8) + 5;
[; ;pic18f27j13.h: 17480: extern volatile __bit P2DC5CON @ (((unsigned) &PSTR2CON)*8) + 5;
[; ;pic18f27j13.h: 17482: extern volatile __bit P2DC62 @ (((unsigned) &PSTR2CON)*8) + 6;
[; ;pic18f27j13.h: 17484: extern volatile __bit P2DC6CON @ (((unsigned) &PSTR2CON)*8) + 6;
[; ;pic18f27j13.h: 17486: extern volatile __bit P2M0 @ (((unsigned) &CCP2CON)*8) + 6;
[; ;pic18f27j13.h: 17488: extern volatile __bit P2M1 @ (((unsigned) &CCP2CON)*8) + 7;
[; ;pic18f27j13.h: 17490: extern volatile __bit P2RSEN @ (((unsigned) &ECCP2DEL)*8) + 7;
[; ;pic18f27j13.h: 17492: extern volatile __bit P3DC0 @ (((unsigned) &ECCP3DEL)*8) + 0;
[; ;pic18f27j13.h: 17494: extern volatile __bit P3DC1 @ (((unsigned) &ECCP3DEL)*8) + 1;
[; ;pic18f27j13.h: 17496: extern volatile __bit P3DC2 @ (((unsigned) &ECCP3DEL)*8) + 2;
[; ;pic18f27j13.h: 17498: extern volatile __bit P3DC3 @ (((unsigned) &ECCP3DEL)*8) + 3;
[; ;pic18f27j13.h: 17500: extern volatile __bit P3DC4 @ (((unsigned) &ECCP3DEL)*8) + 4;
[; ;pic18f27j13.h: 17502: extern volatile __bit P3DC5 @ (((unsigned) &ECCP3DEL)*8) + 5;
[; ;pic18f27j13.h: 17504: extern volatile __bit P3DC6 @ (((unsigned) &ECCP3DEL)*8) + 6;
[; ;pic18f27j13.h: 17506: extern volatile __bit P3M0 @ (((unsigned) &CCP3CON)*8) + 6;
[; ;pic18f27j13.h: 17508: extern volatile __bit P3M1 @ (((unsigned) &CCP3CON)*8) + 7;
[; ;pic18f27j13.h: 17510: extern volatile __bit P3RSEN @ (((unsigned) &ECCP3DEL)*8) + 7;
[; ;pic18f27j13.h: 17512: extern volatile __bit PA1 @ (((unsigned) &PORTC)*8) + 2;
[; ;pic18f27j13.h: 17514: extern volatile __bit PA2 @ (((unsigned) &PORTC)*8) + 1;
[; ;pic18f27j13.h: 17516: extern volatile __bit PCFG0 @ (((unsigned) &ANCON0)*8) + 0;
[; ;pic18f27j13.h: 17518: extern volatile __bit PCFG1 @ (((unsigned) &ANCON0)*8) + 1;
[; ;pic18f27j13.h: 17520: extern volatile __bit PCFG10 @ (((unsigned) &ANCON1)*8) + 2;
[; ;pic18f27j13.h: 17522: extern volatile __bit PCFG11 @ (((unsigned) &ANCON1)*8) + 3;
[; ;pic18f27j13.h: 17524: extern volatile __bit PCFG12 @ (((unsigned) &ANCON1)*8) + 4;
[; ;pic18f27j13.h: 17526: extern volatile __bit PCFG15 @ (((unsigned) &ANCON1)*8) + 7;
[; ;pic18f27j13.h: 17528: extern volatile __bit PCFG2 @ (((unsigned) &ANCON0)*8) + 2;
[; ;pic18f27j13.h: 17530: extern volatile __bit PCFG3 @ (((unsigned) &ANCON0)*8) + 3;
[; ;pic18f27j13.h: 17532: extern volatile __bit PCFG4 @ (((unsigned) &ANCON0)*8) + 4;
[; ;pic18f27j13.h: 17534: extern volatile __bit PCFG8 @ (((unsigned) &ANCON1)*8) + 0;
[; ;pic18f27j13.h: 17536: extern volatile __bit PCFG9 @ (((unsigned) &ANCON1)*8) + 1;
[; ;pic18f27j13.h: 17538: extern volatile __bit PD @ (((unsigned) &RCON)*8) + 2;
[; ;pic18f27j13.h: 17540: extern volatile __bit PEIE @ (((unsigned) &INTCON)*8) + 6;
[; ;pic18f27j13.h: 17542: extern volatile __bit PEIE_GIEL @ (((unsigned) &INTCON)*8) + 6;
[; ;pic18f27j13.h: 17544: extern volatile __bit PEN1 @ (((unsigned) &SSP1CON2)*8) + 2;
[; ;pic18f27j13.h: 17546: extern volatile __bit PEN2 @ (((unsigned) &SSP2CON2)*8) + 2;
[; ;pic18f27j13.h: 17548: extern volatile __bit PGC @ (((unsigned) &PORTB)*8) + 6;
[; ;pic18f27j13.h: 17550: extern volatile __bit PGD @ (((unsigned) &PORTB)*8) + 7;
[; ;pic18f27j13.h: 17552: extern volatile __bit PLLEN @ (((unsigned) &OSCTUNE)*8) + 6;
[; ;pic18f27j13.h: 17554: extern volatile __bit PMDADC @ (((unsigned) &PMDIS0)*8) + 0;
[; ;pic18f27j13.h: 17556: extern volatile __bit PMDCCP10 @ (((unsigned) &PMDIS3)*8) + 7;
[; ;pic18f27j13.h: 17558: extern volatile __bit PMDCCP4 @ (((unsigned) &PMDIS3)*8) + 1;
[; ;pic18f27j13.h: 17560: extern volatile __bit PMDCCP5 @ (((unsigned) &PMDIS3)*8) + 2;
[; ;pic18f27j13.h: 17562: extern volatile __bit PMDCCP6 @ (((unsigned) &PMDIS3)*8) + 3;
[; ;pic18f27j13.h: 17564: extern volatile __bit PMDCCP7 @ (((unsigned) &PMDIS3)*8) + 4;
[; ;pic18f27j13.h: 17566: extern volatile __bit PMDCCP8 @ (((unsigned) &PMDIS3)*8) + 5;
[; ;pic18f27j13.h: 17568: extern volatile __bit PMDCCP9 @ (((unsigned) &PMDIS3)*8) + 6;
[; ;pic18f27j13.h: 17570: extern volatile __bit PMDCMP1 @ (((unsigned) &PMDIS2)*8) + 0;
[; ;pic18f27j13.h: 17572: extern volatile __bit PMDCMP2 @ (((unsigned) &PMDIS2)*8) + 1;
[; ;pic18f27j13.h: 17574: extern volatile __bit PMDCMP3 @ (((unsigned) &PMDIS2)*8) + 2;
[; ;pic18f27j13.h: 17576: extern volatile __bit PMDCTMU @ (((unsigned) &PMDIS1)*8) + 6;
[; ;pic18f27j13.h: 17578: extern volatile __bit PMDECCP1 @ (((unsigned) &PMDIS0)*8) + 5;
[; ;pic18f27j13.h: 17580: extern volatile __bit PMDECCP2 @ (((unsigned) &PMDIS0)*8) + 6;
[; ;pic18f27j13.h: 17582: extern volatile __bit PMDECCP3 @ (((unsigned) &PMDIS0)*8) + 7;
[; ;pic18f27j13.h: 17584: extern volatile __bit PMDMSSP1 @ (((unsigned) &PMDIS0)*8) + 1;
[; ;pic18f27j13.h: 17586: extern volatile __bit PMDMSSP2 @ (((unsigned) &PMDIS0)*8) + 2;
[; ;pic18f27j13.h: 17588: extern volatile __bit PMDRTCC @ (((unsigned) &PMDIS1)*8) + 5;
[; ;pic18f27j13.h: 17590: extern volatile __bit PMDTMR1 @ (((unsigned) &PMDIS1)*8) + 1;
[; ;pic18f27j13.h: 17592: extern volatile __bit PMDTMR2 @ (((unsigned) &PMDIS1)*8) + 2;
[; ;pic18f27j13.h: 17594: extern volatile __bit PMDTMR3 @ (((unsigned) &PMDIS1)*8) + 3;
[; ;pic18f27j13.h: 17596: extern volatile __bit PMDTMR4 @ (((unsigned) &PMDIS1)*8) + 4;
[; ;pic18f27j13.h: 17598: extern volatile __bit PMDTMR5 @ (((unsigned) &PMDIS2)*8) + 3;
[; ;pic18f27j13.h: 17600: extern volatile __bit PMDTMR6 @ (((unsigned) &PMDIS2)*8) + 4;
[; ;pic18f27j13.h: 17602: extern volatile __bit PMDTMR8 @ (((unsigned) &PMDIS2)*8) + 6;
[; ;pic18f27j13.h: 17604: extern volatile __bit PMDUART1 @ (((unsigned) &PMDIS0)*8) + 3;
[; ;pic18f27j13.h: 17606: extern volatile __bit PMDUART2 @ (((unsigned) &PMDIS0)*8) + 4;
[; ;pic18f27j13.h: 17608: extern volatile __bit POR @ (((unsigned) &RCON)*8) + 1;
[; ;pic18f27j13.h: 17610: extern volatile __bit PRISD @ (((unsigned) &OSCCON2)*8) + 2;
[; ;pic18f27j13.h: 17612: extern volatile __bit PSA @ (((unsigned) &T0CON)*8) + 3;
[; ;pic18f27j13.h: 17614: extern volatile __bit PSS1AC0 @ (((unsigned) &ECCP1AS)*8) + 2;
[; ;pic18f27j13.h: 17616: extern volatile __bit PSS1AC1 @ (((unsigned) &ECCP1AS)*8) + 3;
[; ;pic18f27j13.h: 17618: extern volatile __bit PSS1BD0 @ (((unsigned) &ECCP1AS)*8) + 0;
[; ;pic18f27j13.h: 17620: extern volatile __bit PSS1BD1 @ (((unsigned) &ECCP1AS)*8) + 1;
[; ;pic18f27j13.h: 17622: extern volatile __bit PSS2AC0 @ (((unsigned) &ECCP2AS)*8) + 2;
[; ;pic18f27j13.h: 17624: extern volatile __bit PSS2AC1 @ (((unsigned) &ECCP2AS)*8) + 3;
[; ;pic18f27j13.h: 17626: extern volatile __bit PSS2BD0 @ (((unsigned) &ECCP2AS)*8) + 0;
[; ;pic18f27j13.h: 17628: extern volatile __bit PSS2BD1 @ (((unsigned) &ECCP2AS)*8) + 1;
[; ;pic18f27j13.h: 17630: extern volatile __bit PSS3AC0 @ (((unsigned) &ECCP3AS)*8) + 2;
[; ;pic18f27j13.h: 17632: extern volatile __bit PSS3AC1 @ (((unsigned) &ECCP3AS)*8) + 3;
[; ;pic18f27j13.h: 17634: extern volatile __bit PSS3BD0 @ (((unsigned) &ECCP3AS)*8) + 0;
[; ;pic18f27j13.h: 17636: extern volatile __bit PSS3BD1 @ (((unsigned) &ECCP3AS)*8) + 1;
[; ;pic18f27j13.h: 17638: extern volatile __bit RA0 @ (((unsigned) &PORTA)*8) + 0;
[; ;pic18f27j13.h: 17640: extern volatile __bit RA1 @ (((unsigned) &PORTA)*8) + 1;
[; ;pic18f27j13.h: 17642: extern volatile __bit RA2 @ (((unsigned) &PORTA)*8) + 2;
[; ;pic18f27j13.h: 17644: extern volatile __bit RA3 @ (((unsigned) &PORTA)*8) + 3;
[; ;pic18f27j13.h: 17646: extern volatile __bit RA4 @ (((unsigned) &PORTA)*8) + 4;
[; ;pic18f27j13.h: 17648: extern volatile __bit RA5 @ (((unsigned) &PORTA)*8) + 5;
[; ;pic18f27j13.h: 17650: extern volatile __bit RA6 @ (((unsigned) &PORTA)*8) + 6;
[; ;pic18f27j13.h: 17652: extern volatile __bit RA7 @ (((unsigned) &PORTA)*8) + 7;
[; ;pic18f27j13.h: 17654: extern volatile __bit RB0 @ (((unsigned) &PORTB)*8) + 0;
[; ;pic18f27j13.h: 17656: extern volatile __bit RB1 @ (((unsigned) &PORTB)*8) + 1;
[; ;pic18f27j13.h: 17658: extern volatile __bit RB2 @ (((unsigned) &PORTB)*8) + 2;
[; ;pic18f27j13.h: 17660: extern volatile __bit RB3 @ (((unsigned) &PORTB)*8) + 3;
[; ;pic18f27j13.h: 17662: extern volatile __bit RB4 @ (((unsigned) &PORTB)*8) + 4;
[; ;pic18f27j13.h: 17664: extern volatile __bit RB5 @ (((unsigned) &PORTB)*8) + 5;
[; ;pic18f27j13.h: 17666: extern volatile __bit RB6 @ (((unsigned) &PORTB)*8) + 6;
[; ;pic18f27j13.h: 17668: extern volatile __bit RB7 @ (((unsigned) &PORTB)*8) + 7;
[; ;pic18f27j13.h: 17670: extern volatile __bit RBIE @ (((unsigned) &INTCON)*8) + 3;
[; ;pic18f27j13.h: 17672: extern volatile __bit RBIF @ (((unsigned) &INTCON)*8) + 0;
[; ;pic18f27j13.h: 17674: extern volatile __bit RBIP @ (((unsigned) &INTCON2)*8) + 0;
[; ;pic18f27j13.h: 17676: extern volatile __bit RBPU @ (((unsigned) &INTCON2)*8) + 7;
[; ;pic18f27j13.h: 17678: extern volatile __bit RC0 @ (((unsigned) &PORTC)*8) + 0;
[; ;pic18f27j13.h: 17680: extern volatile __bit RC1 @ (((unsigned) &PORTC)*8) + 1;
[; ;pic18f27j13.h: 17682: extern volatile __bit RC1IE @ (((unsigned) &PIE1)*8) + 5;
[; ;pic18f27j13.h: 17684: extern volatile __bit RC1IF @ (((unsigned) &PIR1)*8) + 5;
[; ;pic18f27j13.h: 17686: extern volatile __bit RC1IP @ (((unsigned) &IPR1)*8) + 5;
[; ;pic18f27j13.h: 17688: extern volatile __bit RC2 @ (((unsigned) &PORTC)*8) + 2;
[; ;pic18f27j13.h: 17690: extern volatile __bit RC2IE @ (((unsigned) &PIE3)*8) + 5;
[; ;pic18f27j13.h: 17692: extern volatile __bit RC2IF @ (((unsigned) &PIR3)*8) + 5;
[; ;pic18f27j13.h: 17694: extern volatile __bit RC2IP @ (((unsigned) &IPR3)*8) + 5;
[; ;pic18f27j13.h: 17696: extern volatile __bit RC3 @ (((unsigned) &PORTC)*8) + 3;
[; ;pic18f27j13.h: 17698: extern volatile __bit RC4 @ (((unsigned) &PORTC)*8) + 4;
[; ;pic18f27j13.h: 17700: extern volatile __bit RC5 @ (((unsigned) &PORTC)*8) + 5;
[; ;pic18f27j13.h: 17702: extern volatile __bit RC6 @ (((unsigned) &PORTC)*8) + 6;
[; ;pic18f27j13.h: 17704: extern volatile __bit RC7 @ (((unsigned) &PORTC)*8) + 7;
[; ;pic18f27j13.h: 17706: extern volatile __bit RC8_9 @ (((unsigned) &RCSTA1)*8) + 6;
[; ;pic18f27j13.h: 17708: extern volatile __bit RC8_92 @ (((unsigned) &RCSTA2)*8) + 6;
[; ;pic18f27j13.h: 17710: extern volatile __bit RC9 @ (((unsigned) &RCSTA1)*8) + 6;
[; ;pic18f27j13.h: 17712: extern volatile __bit RC92 @ (((unsigned) &RCSTA2)*8) + 6;
[; ;pic18f27j13.h: 17714: extern volatile __bit RCD8 @ (((unsigned) &RCSTA1)*8) + 0;
[; ;pic18f27j13.h: 17716: extern volatile __bit RCD82 @ (((unsigned) &RCSTA2)*8) + 0;
[; ;pic18f27j13.h: 17718: extern volatile __bit RCEN1 @ (((unsigned) &SSP1CON2)*8) + 3;
[; ;pic18f27j13.h: 17720: extern volatile __bit RCEN2 @ (((unsigned) &SSP2CON2)*8) + 3;
[; ;pic18f27j13.h: 17722: extern volatile __bit RCIDL1 @ (((unsigned) &BAUDCON1)*8) + 6;
[; ;pic18f27j13.h: 17724: extern volatile __bit RCIDL2 @ (((unsigned) &BAUDCON2)*8) + 6;
[; ;pic18f27j13.h: 17726: extern volatile __bit RCIE @ (((unsigned) &PIE1)*8) + 5;
[; ;pic18f27j13.h: 17728: extern volatile __bit RCIF @ (((unsigned) &PIR1)*8) + 5;
[; ;pic18f27j13.h: 17730: extern volatile __bit RCIP @ (((unsigned) &IPR1)*8) + 5;
[; ;pic18f27j13.h: 17732: extern volatile __bit RCMT @ (((unsigned) &BAUDCON1)*8) + 6;
[; ;pic18f27j13.h: 17734: extern volatile __bit RCMT1 @ (((unsigned) &BAUDCON1)*8) + 6;
[; ;pic18f27j13.h: 17736: extern volatile __bit RCMT2 @ (((unsigned) &BAUDCON2)*8) + 6;
[; ;pic18f27j13.h: 17738: extern volatile __bit RD163 @ (((unsigned) &T3CON)*8) + 7;
[; ;pic18f27j13.h: 17740: extern volatile __bit RD165 @ (((unsigned) &T5CON)*8) + 1;
[; ;pic18f27j13.h: 17742: extern volatile __bit READ_WRITE @ (((unsigned) &SSP1STAT)*8) + 2;
[; ;pic18f27j13.h: 17744: extern volatile __bit READ_WRITE2 @ (((unsigned) &SSP2STAT)*8) + 2;
[; ;pic18f27j13.h: 17746: extern volatile __bit REFO @ (((unsigned) &PORTB)*8) + 2;
[; ;pic18f27j13.h: 17748: extern volatile __bit REGSLP @ (((unsigned) &WDTCON)*8) + 7;
[; ;pic18f27j13.h: 17750: extern volatile __bit RELEASE @ (((unsigned) &DSCONL)*8) + 0;
[; ;pic18f27j13.h: 17752: extern volatile __bit RI @ (((unsigned) &RCON)*8) + 4;
[; ;pic18f27j13.h: 17754: extern volatile __bit RJPU @ (((unsigned) &PORTA)*8) + 7;
[; ;pic18f27j13.h: 17756: extern volatile __bit RODIV0 @ (((unsigned) &REFOCON)*8) + 0;
[; ;pic18f27j13.h: 17758: extern volatile __bit RODIV1 @ (((unsigned) &REFOCON)*8) + 1;
[; ;pic18f27j13.h: 17760: extern volatile __bit RODIV2 @ (((unsigned) &REFOCON)*8) + 2;
[; ;pic18f27j13.h: 17762: extern volatile __bit RODIV3 @ (((unsigned) &REFOCON)*8) + 3;
[; ;pic18f27j13.h: 17764: extern volatile __bit ROON @ (((unsigned) &REFOCON)*8) + 7;
[; ;pic18f27j13.h: 17766: extern volatile __bit ROSEL @ (((unsigned) &REFOCON)*8) + 4;
[; ;pic18f27j13.h: 17768: extern volatile __bit ROSSLP @ (((unsigned) &REFOCON)*8) + 5;
[; ;pic18f27j13.h: 17770: extern volatile __bit RP0 @ (((unsigned) &PORTA)*8) + 0;
[; ;pic18f27j13.h: 17772: extern volatile __bit RP1 @ (((unsigned) &PORTA)*8) + 1;
[; ;pic18f27j13.h: 17774: extern volatile __bit RP10 @ (((unsigned) &PORTB)*8) + 7;
[; ;pic18f27j13.h: 17776: extern volatile __bit RP11 @ (((unsigned) &PORTC)*8) + 0;
[; ;pic18f27j13.h: 17778: extern volatile __bit RP12 @ (((unsigned) &PORTC)*8) + 1;
[; ;pic18f27j13.h: 17780: extern volatile __bit RP13 @ (((unsigned) &PORTC)*8) + 2;
[; ;pic18f27j13.h: 17782: extern volatile __bit RP14 @ (((unsigned) &PORTC)*8) + 3;
[; ;pic18f27j13.h: 17784: extern volatile __bit RP15 @ (((unsigned) &PORTC)*8) + 4;
[; ;pic18f27j13.h: 17786: extern volatile __bit RP16 @ (((unsigned) &PORTC)*8) + 5;
[; ;pic18f27j13.h: 17788: extern volatile __bit RP17 @ (((unsigned) &PORTC)*8) + 6;
[; ;pic18f27j13.h: 17790: extern volatile __bit RP18 @ (((unsigned) &PORTC)*8) + 7;
[; ;pic18f27j13.h: 17792: extern volatile __bit RP2 @ (((unsigned) &PORTA)*8) + 5;
[; ;pic18f27j13.h: 17794: extern volatile __bit RP3 @ (((unsigned) &PORTB)*8) + 0;
[; ;pic18f27j13.h: 17796: extern volatile __bit RP4 @ (((unsigned) &PORTB)*8) + 1;
[; ;pic18f27j13.h: 17798: extern volatile __bit RP5 @ (((unsigned) &PORTB)*8) + 2;
[; ;pic18f27j13.h: 17800: extern volatile __bit RP6 @ (((unsigned) &PORTB)*8) + 3;
[; ;pic18f27j13.h: 17802: extern volatile __bit RP7 @ (((unsigned) &PORTB)*8) + 4;
[; ;pic18f27j13.h: 17804: extern volatile __bit RP8 @ (((unsigned) &PORTB)*8) + 5;
[; ;pic18f27j13.h: 17806: extern volatile __bit RP9 @ (((unsigned) &PORTB)*8) + 6;
[; ;pic18f27j13.h: 17808: extern volatile __bit RSEN1 @ (((unsigned) &SSP1CON2)*8) + 1;
[; ;pic18f27j13.h: 17810: extern volatile __bit RSEN2 @ (((unsigned) &SSP2CON2)*8) + 1;
[; ;pic18f27j13.h: 17812: extern volatile __bit RTCC @ (((unsigned) &PORTB)*8) + 1;
[; ;pic18f27j13.h: 17814: extern volatile __bit RTCCIE @ (((unsigned) &PIE3)*8) + 0;
[; ;pic18f27j13.h: 17816: extern volatile __bit RTCCIF @ (((unsigned) &PIR3)*8) + 0;
[; ;pic18f27j13.h: 17818: extern volatile __bit RTCCIP @ (((unsigned) &IPR3)*8) + 0;
[; ;pic18f27j13.h: 17820: extern volatile __bit RTCCMD @ (((unsigned) &PMDIS1)*8) + 5;
[; ;pic18f27j13.h: 17822: extern volatile __bit RTCEN @ (((unsigned) &RTCCFG)*8) + 7;
[; ;pic18f27j13.h: 17824: extern volatile __bit RTCOE @ (((unsigned) &RTCCFG)*8) + 2;
[; ;pic18f27j13.h: 17826: extern volatile __bit RTCPTR0 @ (((unsigned) &RTCCFG)*8) + 0;
[; ;pic18f27j13.h: 17828: extern volatile __bit RTCPTR1 @ (((unsigned) &RTCCFG)*8) + 1;
[; ;pic18f27j13.h: 17830: extern volatile __bit RTCSYNC @ (((unsigned) &RTCCFG)*8) + 4;
[; ;pic18f27j13.h: 17832: extern volatile __bit RTCWDIS @ (((unsigned) &DSCONH)*8) + 0;
[; ;pic18f27j13.h: 17834: extern volatile __bit RTCWREN @ (((unsigned) &RTCCFG)*8) + 5;
[; ;pic18f27j13.h: 17836: extern volatile __bit RTSECSEL0 @ (((unsigned) &PADCFG1)*8) + 1;
[; ;pic18f27j13.h: 17838: extern volatile __bit RTSECSEL1 @ (((unsigned) &PADCFG1)*8) + 2;
[; ;pic18f27j13.h: 17840: extern volatile __bit RW @ (((unsigned) &SSP1STAT)*8) + 2;
[; ;pic18f27j13.h: 17842: extern volatile __bit RW1 @ (((unsigned) &SSP1STAT)*8) + 2;
[; ;pic18f27j13.h: 17844: extern volatile __bit RW2 @ (((unsigned) &SSP2STAT)*8) + 2;
[; ;pic18f27j13.h: 17846: extern volatile __bit RX1 @ (((unsigned) &PORTC)*8) + 7;
[; ;pic18f27j13.h: 17848: extern volatile __bit RX91 @ (((unsigned) &RCSTA1)*8) + 6;
[; ;pic18f27j13.h: 17850: extern volatile __bit RX92 @ (((unsigned) &RCSTA2)*8) + 6;
[; ;pic18f27j13.h: 17852: extern volatile __bit RX9D1 @ (((unsigned) &RCSTA1)*8) + 0;
[; ;pic18f27j13.h: 17854: extern volatile __bit RX9D2 @ (((unsigned) &RCSTA2)*8) + 0;
[; ;pic18f27j13.h: 17856: extern volatile __bit RXB0IE @ (((unsigned) &PIE3)*8) + 0;
[; ;pic18f27j13.h: 17858: extern volatile __bit RXB1IE @ (((unsigned) &PIE3)*8) + 1;
[; ;pic18f27j13.h: 17860: extern volatile __bit RXBNIE @ (((unsigned) &PIE3)*8) + 1;
[; ;pic18f27j13.h: 17862: extern volatile __bit RXBNIF @ (((unsigned) &PIR3)*8) + 1;
[; ;pic18f27j13.h: 17864: extern volatile __bit RXBNIP @ (((unsigned) &IPR3)*8) + 1;
[; ;pic18f27j13.h: 17866: extern volatile __bit RXCKP @ (((unsigned) &BAUDCON1)*8) + 5;
[; ;pic18f27j13.h: 17868: extern volatile __bit RXDTP1 @ (((unsigned) &BAUDCON1)*8) + 5;
[; ;pic18f27j13.h: 17870: extern volatile __bit RXDTP2 @ (((unsigned) &BAUDCON2)*8) + 5;
[; ;pic18f27j13.h: 17872: extern volatile __bit RXINC @ (((unsigned) &DMACON1)*8) + 4;
[; ;pic18f27j13.h: 17874: extern volatile __bit R_W @ (((unsigned) &SSP1STAT)*8) + 2;
[; ;pic18f27j13.h: 17876: extern volatile __bit R_W2 @ (((unsigned) &SSP2STAT)*8) + 2;
[; ;pic18f27j13.h: 17878: extern volatile __bit R_nW2 @ (((unsigned) &SSP2STAT)*8) + 2;
[; ;pic18f27j13.h: 17880: extern volatile __bit S2 @ (((unsigned) &SSP2STAT)*8) + 3;
[; ;pic18f27j13.h: 17882: extern volatile __bit SCK1 @ (((unsigned) &PORTC)*8) + 3;
[; ;pic18f27j13.h: 17884: extern volatile __bit SCKP @ (((unsigned) &BAUDCON1)*8) + 4;
[; ;pic18f27j13.h: 17886: extern volatile __bit SCKP1 @ (((unsigned) &BAUDCON1)*8) + 4;
[; ;pic18f27j13.h: 17888: extern volatile __bit SCKP2 @ (((unsigned) &BAUDCON2)*8) + 4;
[; ;pic18f27j13.h: 17890: extern volatile __bit SCL1 @ (((unsigned) &PORTC)*8) + 3;
[; ;pic18f27j13.h: 17892: extern volatile __bit SCL2 @ (((unsigned) &PORTB)*8) + 4;
[; ;pic18f27j13.h: 17894: extern volatile __bit SCS0 @ (((unsigned) &OSCCON)*8) + 0;
[; ;pic18f27j13.h: 17896: extern volatile __bit SCS1 @ (((unsigned) &OSCCON)*8) + 1;
[; ;pic18f27j13.h: 17898: extern volatile __bit SDA1 @ (((unsigned) &PORTC)*8) + 4;
[; ;pic18f27j13.h: 17900: extern volatile __bit SDA2 @ (((unsigned) &PORTB)*8) + 5;
[; ;pic18f27j13.h: 17902: extern volatile __bit SDI1 @ (((unsigned) &PORTC)*8) + 4;
[; ;pic18f27j13.h: 17904: extern volatile __bit SDO1 @ (((unsigned) &PORTC)*8) + 5;
[; ;pic18f27j13.h: 17906: extern volatile __bit SEN1 @ (((unsigned) &SSP1CON2)*8) + 0;
[; ;pic18f27j13.h: 17908: extern volatile __bit SEN2 @ (((unsigned) &SSP2CON2)*8) + 0;
[; ;pic18f27j13.h: 17910: extern volatile __bit SENDB1 @ (((unsigned) &TXSTA1)*8) + 3;
[; ;pic18f27j13.h: 17912: extern volatile __bit SENDB2 @ (((unsigned) &TXSTA2)*8) + 3;
[; ;pic18f27j13.h: 17914: extern volatile __bit SMP1 @ (((unsigned) &SSP1STAT)*8) + 7;
[; ;pic18f27j13.h: 17916: extern volatile __bit SMP2 @ (((unsigned) &SSP2STAT)*8) + 7;
[; ;pic18f27j13.h: 17918: extern volatile __bit SOSCDRV @ (((unsigned) &OSCCON2)*8) + 4;
[; ;pic18f27j13.h: 17920: extern volatile __bit SOSCEN @ (((unsigned) &T1CON)*8) + 3;
[; ;pic18f27j13.h: 17922: extern volatile __bit SOSCEN3 @ (((unsigned) &T3CON)*8) + 3;
[; ;pic18f27j13.h: 17924: extern volatile __bit SOSCEN5 @ (((unsigned) &T5CON)*8) + 3;
[; ;pic18f27j13.h: 17926: extern volatile __bit SOSCGO @ (((unsigned) &OSCCON2)*8) + 3;
[; ;pic18f27j13.h: 17928: extern volatile __bit SOSCRUN @ (((unsigned) &OSCCON2)*8) + 6;
[; ;pic18f27j13.h: 17930: extern volatile __bit SP0 @ (((unsigned) &STKPTR)*8) + 0;
[; ;pic18f27j13.h: 17932: extern volatile __bit SP1 @ (((unsigned) &STKPTR)*8) + 1;
[; ;pic18f27j13.h: 17934: extern volatile __bit SP2 @ (((unsigned) &STKPTR)*8) + 2;
[; ;pic18f27j13.h: 17936: extern volatile __bit SP3 @ (((unsigned) &STKPTR)*8) + 3;
[; ;pic18f27j13.h: 17938: extern volatile __bit SP4 @ (((unsigned) &STKPTR)*8) + 4;
[; ;pic18f27j13.h: 17940: extern volatile __bit SPEN1 @ (((unsigned) &RCSTA1)*8) + 7;
[; ;pic18f27j13.h: 17942: extern volatile __bit SPEN2 @ (((unsigned) &RCSTA2)*8) + 7;
[; ;pic18f27j13.h: 17944: extern volatile __bit SPI1MD @ (((unsigned) &PMDIS0)*8) + 1;
[; ;pic18f27j13.h: 17946: extern volatile __bit SPI1OD @ (((unsigned) &ODCON3)*8) + 0;
[; ;pic18f27j13.h: 17948: extern volatile __bit SPI2MD @ (((unsigned) &PMDIS0)*8) + 2;
[; ;pic18f27j13.h: 17950: extern volatile __bit SPI2OD @ (((unsigned) &ODCON3)*8) + 1;
[; ;pic18f27j13.h: 17952: extern volatile __bit SRC0 @ (((unsigned) &ADCTRIG)*8) + 0;
[; ;pic18f27j13.h: 17954: extern volatile __bit SRC1 @ (((unsigned) &ADCTRIG)*8) + 1;
[; ;pic18f27j13.h: 17956: extern volatile __bit SREN1 @ (((unsigned) &RCSTA1)*8) + 5;
[; ;pic18f27j13.h: 17958: extern volatile __bit SREN2 @ (((unsigned) &RCSTA2)*8) + 5;
[; ;pic18f27j13.h: 17960: extern volatile __bit SRENA @ (((unsigned) &RCSTA1)*8) + 5;
[; ;pic18f27j13.h: 17962: extern volatile __bit SSCON0 @ (((unsigned) &DMACON1)*8) + 6;
[; ;pic18f27j13.h: 17964: extern volatile __bit SSCON1 @ (((unsigned) &DMACON1)*8) + 7;
[; ;pic18f27j13.h: 17966: extern volatile __bit SSP1IE @ (((unsigned) &PIE1)*8) + 3;
[; ;pic18f27j13.h: 17968: extern volatile __bit SSP1IF @ (((unsigned) &PIR1)*8) + 3;
[; ;pic18f27j13.h: 17970: extern volatile __bit SSP1IP @ (((unsigned) &IPR1)*8) + 3;
[; ;pic18f27j13.h: 17972: extern volatile __bit SSP2IE @ (((unsigned) &PIE3)*8) + 7;
[; ;pic18f27j13.h: 17974: extern volatile __bit SSP2IF @ (((unsigned) &PIR3)*8) + 7;
[; ;pic18f27j13.h: 17976: extern volatile __bit SSP2IP @ (((unsigned) &IPR3)*8) + 7;
[; ;pic18f27j13.h: 17978: extern volatile __bit SSPEN1 @ (((unsigned) &SSP1CON1)*8) + 5;
[; ;pic18f27j13.h: 17980: extern volatile __bit SSPEN2 @ (((unsigned) &SSP2CON1)*8) + 5;
[; ;pic18f27j13.h: 17982: extern volatile __bit SSPIE @ (((unsigned) &PIE1)*8) + 3;
[; ;pic18f27j13.h: 17984: extern volatile __bit SSPIF @ (((unsigned) &PIR1)*8) + 3;
[; ;pic18f27j13.h: 17986: extern volatile __bit SSPIP @ (((unsigned) &IPR1)*8) + 3;
[; ;pic18f27j13.h: 17988: extern volatile __bit SSPM01 @ (((unsigned) &SSP1CON1)*8) + 0;
[; ;pic18f27j13.h: 17990: extern volatile __bit SSPM02 @ (((unsigned) &SSP2CON1)*8) + 0;
[; ;pic18f27j13.h: 17992: extern volatile __bit SSPM11 @ (((unsigned) &SSP1CON1)*8) + 1;
[; ;pic18f27j13.h: 17994: extern volatile __bit SSPM12 @ (((unsigned) &SSP2CON1)*8) + 1;
[; ;pic18f27j13.h: 17996: extern volatile __bit SSPM21 @ (((unsigned) &SSP1CON1)*8) + 2;
[; ;pic18f27j13.h: 17998: extern volatile __bit SSPM22 @ (((unsigned) &SSP2CON1)*8) + 2;
[; ;pic18f27j13.h: 18000: extern volatile __bit SSPM31 @ (((unsigned) &SSP1CON1)*8) + 3;
[; ;pic18f27j13.h: 18002: extern volatile __bit SSPM32 @ (((unsigned) &SSP2CON1)*8) + 3;
[; ;pic18f27j13.h: 18004: extern volatile __bit SSPOV1 @ (((unsigned) &SSP1CON1)*8) + 6;
[; ;pic18f27j13.h: 18006: extern volatile __bit SSPOV2 @ (((unsigned) &SSP2CON1)*8) + 6;
[; ;pic18f27j13.h: 18008: extern volatile __bit START @ (((unsigned) &SSP1STAT)*8) + 3;
[; ;pic18f27j13.h: 18010: extern volatile __bit START1 @ (((unsigned) &SSP1STAT)*8) + 3;
[; ;pic18f27j13.h: 18012: extern volatile __bit START2 @ (((unsigned) &SSP2STAT)*8) + 3;
[; ;pic18f27j13.h: 18014: extern volatile __bit STKFUL @ (((unsigned) &STKPTR)*8) + 7;
[; ;pic18f27j13.h: 18016: extern volatile __bit STKOVF @ (((unsigned) &STKPTR)*8) + 7;
[; ;pic18f27j13.h: 18018: extern volatile __bit STKUNF @ (((unsigned) &STKPTR)*8) + 6;
[; ;pic18f27j13.h: 18020: extern volatile __bit STOP @ (((unsigned) &SSP1STAT)*8) + 4;
[; ;pic18f27j13.h: 18022: extern volatile __bit STOP1 @ (((unsigned) &SSP1STAT)*8) + 4;
[; ;pic18f27j13.h: 18024: extern volatile __bit STOP2 @ (((unsigned) &SSP2STAT)*8) + 4;
[; ;pic18f27j13.h: 18026: extern volatile __bit STRA2 @ (((unsigned) &PSTR2CON)*8) + 0;
[; ;pic18f27j13.h: 18028: extern volatile __bit STRA3 @ (((unsigned) &PSTR3CON)*8) + 0;
[; ;pic18f27j13.h: 18030: extern volatile __bit STRB2 @ (((unsigned) &PSTR2CON)*8) + 1;
[; ;pic18f27j13.h: 18032: extern volatile __bit STRB3 @ (((unsigned) &PSTR3CON)*8) + 1;
[; ;pic18f27j13.h: 18034: extern volatile __bit STRC2 @ (((unsigned) &PSTR2CON)*8) + 2;
[; ;pic18f27j13.h: 18036: extern volatile __bit STRC3 @ (((unsigned) &PSTR3CON)*8) + 2;
[; ;pic18f27j13.h: 18038: extern volatile __bit STRD2 @ (((unsigned) &PSTR2CON)*8) + 3;
[; ;pic18f27j13.h: 18040: extern volatile __bit STRD3 @ (((unsigned) &PSTR3CON)*8) + 3;
[; ;pic18f27j13.h: 18042: extern volatile __bit STRSYNC2 @ (((unsigned) &PSTR2CON)*8) + 4;
[; ;pic18f27j13.h: 18044: extern volatile __bit STRSYNC3 @ (((unsigned) &PSTR3CON)*8) + 4;
[; ;pic18f27j13.h: 18046: extern volatile __bit SWDTE @ (((unsigned) &WDTCON)*8) + 0;
[; ;pic18f27j13.h: 18048: extern volatile __bit SWDTEN @ (((unsigned) &WDTCON)*8) + 0;
[; ;pic18f27j13.h: 18050: extern volatile __bit SYNC1 @ (((unsigned) &TXSTA1)*8) + 4;
[; ;pic18f27j13.h: 18052: extern volatile __bit SYNC2 @ (((unsigned) &TXSTA2)*8) + 4;
[; ;pic18f27j13.h: 18054: extern volatile __bit T08BIT @ (((unsigned) &T0CON)*8) + 6;
[; ;pic18f27j13.h: 18056: extern volatile __bit T0CS @ (((unsigned) &T0CON)*8) + 5;
[; ;pic18f27j13.h: 18058: extern volatile __bit T0IE @ (((unsigned) &INTCON)*8) + 5;
[; ;pic18f27j13.h: 18060: extern volatile __bit T0IF @ (((unsigned) &INTCON)*8) + 2;
[; ;pic18f27j13.h: 18062: extern volatile __bit T0IP @ (((unsigned) &INTCON2)*8) + 2;
[; ;pic18f27j13.h: 18064: extern volatile __bit T0PS0 @ (((unsigned) &T0CON)*8) + 0;
[; ;pic18f27j13.h: 18066: extern volatile __bit T0PS1 @ (((unsigned) &T0CON)*8) + 1;
[; ;pic18f27j13.h: 18068: extern volatile __bit T0PS2 @ (((unsigned) &T0CON)*8) + 2;
[; ;pic18f27j13.h: 18070: extern volatile __bit T0SE @ (((unsigned) &T0CON)*8) + 4;
[; ;pic18f27j13.h: 18072: extern volatile __bit T1CKI @ (((unsigned) &PORTC)*8) + 0;
[; ;pic18f27j13.h: 18074: extern volatile __bit T1CKPS0 @ (((unsigned) &T1CON)*8) + 4;
[; ;pic18f27j13.h: 18076: extern volatile __bit T1CKPS1 @ (((unsigned) &T1CON)*8) + 5;
[; ;pic18f27j13.h: 18078: extern volatile __bit T1DONE @ (((unsigned) &T1GCON)*8) + 3;
[; ;pic18f27j13.h: 18080: extern volatile __bit T1GGO @ (((unsigned) &T1GCON)*8) + 3;
[; ;pic18f27j13.h: 18082: extern volatile __bit T1GGO_NOT_T1DONE @ (((unsigned) &T1GCON)*8) + 3;
[; ;pic18f27j13.h: 18084: extern volatile __bit T1GGO_nT1DONE @ (((unsigned) &T1GCON)*8) + 3;
[; ;pic18f27j13.h: 18086: extern volatile __bit T1GPOL @ (((unsigned) &T1GCON)*8) + 6;
[; ;pic18f27j13.h: 18088: extern volatile __bit T1GSPM @ (((unsigned) &T1GCON)*8) + 4;
[; ;pic18f27j13.h: 18090: extern volatile __bit T1GSS0 @ (((unsigned) &T1GCON)*8) + 0;
[; ;pic18f27j13.h: 18092: extern volatile __bit T1GSS1 @ (((unsigned) &T1GCON)*8) + 1;
[; ;pic18f27j13.h: 18094: extern volatile __bit T1GTM @ (((unsigned) &T1GCON)*8) + 5;
[; ;pic18f27j13.h: 18096: extern volatile __bit T1GVAL @ (((unsigned) &T1GCON)*8) + 2;
[; ;pic18f27j13.h: 18098: extern volatile __bit T1OSCEN @ (((unsigned) &T1CON)*8) + 3;
[; ;pic18f27j13.h: 18100: extern volatile __bit T1OSI @ (((unsigned) &PORTC)*8) + 1;
[; ;pic18f27j13.h: 18102: extern volatile __bit T1OSO @ (((unsigned) &PORTC)*8) + 0;
[; ;pic18f27j13.h: 18104: extern volatile __bit T1RD16 @ (((unsigned) &T1CON)*8) + 7;
[; ;pic18f27j13.h: 18106: extern volatile __bit T2CKPS0 @ (((unsigned) &T2CON)*8) + 0;
[; ;pic18f27j13.h: 18108: extern volatile __bit T2CKPS1 @ (((unsigned) &T2CON)*8) + 1;
[; ;pic18f27j13.h: 18110: extern volatile __bit T2OUTPS0 @ (((unsigned) &T2CON)*8) + 3;
[; ;pic18f27j13.h: 18112: extern volatile __bit T2OUTPS1 @ (((unsigned) &T2CON)*8) + 4;
[; ;pic18f27j13.h: 18114: extern volatile __bit T2OUTPS2 @ (((unsigned) &T2CON)*8) + 5;
[; ;pic18f27j13.h: 18116: extern volatile __bit T2OUTPS3 @ (((unsigned) &T2CON)*8) + 6;
[; ;pic18f27j13.h: 18118: extern volatile __bit T3CKPS0 @ (((unsigned) &T3CON)*8) + 4;
[; ;pic18f27j13.h: 18120: extern volatile __bit T3CKPS1 @ (((unsigned) &T3CON)*8) + 5;
[; ;pic18f27j13.h: 18122: extern volatile __bit T3DONE @ (((unsigned) &T3GCON)*8) + 3;
[; ;pic18f27j13.h: 18124: extern volatile __bit T3GGO @ (((unsigned) &T3GCON)*8) + 3;
[; ;pic18f27j13.h: 18126: extern volatile __bit T3GGO_T3DONE @ (((unsigned) &T3GCON)*8) + 3;
[; ;pic18f27j13.h: 18128: extern volatile __bit T3GPOL @ (((unsigned) &T3GCON)*8) + 6;
[; ;pic18f27j13.h: 18130: extern volatile __bit T3GSPM @ (((unsigned) &T3GCON)*8) + 4;
[; ;pic18f27j13.h: 18132: extern volatile __bit T3GSS0 @ (((unsigned) &T3GCON)*8) + 0;
[; ;pic18f27j13.h: 18134: extern volatile __bit T3GSS1 @ (((unsigned) &T3GCON)*8) + 1;
[; ;pic18f27j13.h: 18136: extern volatile __bit T3GTM @ (((unsigned) &T3GCON)*8) + 5;
[; ;pic18f27j13.h: 18138: extern volatile __bit T3GVAL @ (((unsigned) &T3GCON)*8) + 2;
[; ;pic18f27j13.h: 18140: extern volatile __bit T3OSCEN @ (((unsigned) &T3CON)*8) + 3;
[; ;pic18f27j13.h: 18142: extern volatile __bit T3RD16 @ (((unsigned) &T3CON)*8) + 7;
[; ;pic18f27j13.h: 18144: extern volatile __bit T4CKPS0 @ (((unsigned) &T4CON)*8) + 0;
[; ;pic18f27j13.h: 18146: extern volatile __bit T4CKPS1 @ (((unsigned) &T4CON)*8) + 1;
[; ;pic18f27j13.h: 18148: extern volatile __bit T4OUTPS0 @ (((unsigned) &T4CON)*8) + 3;
[; ;pic18f27j13.h: 18150: extern volatile __bit T4OUTPS1 @ (((unsigned) &T4CON)*8) + 4;
[; ;pic18f27j13.h: 18152: extern volatile __bit T4OUTPS2 @ (((unsigned) &T4CON)*8) + 5;
[; ;pic18f27j13.h: 18154: extern volatile __bit T4OUTPS3 @ (((unsigned) &T4CON)*8) + 6;
[; ;pic18f27j13.h: 18156: extern volatile __bit T5CKPS0 @ (((unsigned) &T5CON)*8) + 4;
[; ;pic18f27j13.h: 18158: extern volatile __bit T5CKPS1 @ (((unsigned) &T5CON)*8) + 5;
[; ;pic18f27j13.h: 18160: extern volatile __bit T5DONE @ (((unsigned) &T5GCON)*8) + 3;
[; ;pic18f27j13.h: 18162: extern volatile __bit T5GGO @ (((unsigned) &T5GCON)*8) + 3;
[; ;pic18f27j13.h: 18164: extern volatile __bit T5GGO_NOT_T5DONE @ (((unsigned) &T5GCON)*8) + 3;
[; ;pic18f27j13.h: 18166: extern volatile __bit T5GGO_nT5DONE @ (((unsigned) &T5GCON)*8) + 3;
[; ;pic18f27j13.h: 18168: extern volatile __bit T5GPOL @ (((unsigned) &T5GCON)*8) + 6;
[; ;pic18f27j13.h: 18170: extern volatile __bit T5GSPM @ (((unsigned) &T5GCON)*8) + 4;
[; ;pic18f27j13.h: 18172: extern volatile __bit T5GSS0 @ (((unsigned) &T5GCON)*8) + 0;
[; ;pic18f27j13.h: 18174: extern volatile __bit T5GSS1 @ (((unsigned) &T5GCON)*8) + 1;
[; ;pic18f27j13.h: 18176: extern volatile __bit T5GTM @ (((unsigned) &T5GCON)*8) + 5;
[; ;pic18f27j13.h: 18178: extern volatile __bit T5GVAL @ (((unsigned) &T5GCON)*8) + 2;
[; ;pic18f27j13.h: 18180: extern volatile __bit T5OSCEN @ (((unsigned) &T5CON)*8) + 3;
[; ;pic18f27j13.h: 18182: extern volatile __bit T6CKPS0 @ (((unsigned) &T6CON)*8) + 0;
[; ;pic18f27j13.h: 18184: extern volatile __bit T6CKPS1 @ (((unsigned) &T6CON)*8) + 1;
[; ;pic18f27j13.h: 18186: extern volatile __bit T6OUTPS0 @ (((unsigned) &T6CON)*8) + 3;
[; ;pic18f27j13.h: 18188: extern volatile __bit T6OUTPS1 @ (((unsigned) &T6CON)*8) + 4;
[; ;pic18f27j13.h: 18190: extern volatile __bit T6OUTPS2 @ (((unsigned) &T6CON)*8) + 5;
[; ;pic18f27j13.h: 18192: extern volatile __bit T6OUTPS3 @ (((unsigned) &T6CON)*8) + 6;
[; ;pic18f27j13.h: 18194: extern volatile __bit T8CKPS0 @ (((unsigned) &T8CON)*8) + 0;
[; ;pic18f27j13.h: 18196: extern volatile __bit T8CKPS1 @ (((unsigned) &T8CON)*8) + 1;
[; ;pic18f27j13.h: 18198: extern volatile __bit T8OUTPS0 @ (((unsigned) &T8CON)*8) + 3;
[; ;pic18f27j13.h: 18200: extern volatile __bit T8OUTPS1 @ (((unsigned) &T8CON)*8) + 4;
[; ;pic18f27j13.h: 18202: extern volatile __bit T8OUTPS2 @ (((unsigned) &T8CON)*8) + 5;
[; ;pic18f27j13.h: 18204: extern volatile __bit T8OUTPS3 @ (((unsigned) &T8CON)*8) + 6;
[; ;pic18f27j13.h: 18206: extern volatile __bit TGEN @ (((unsigned) &CTMUCONH)*8) + 4;
[; ;pic18f27j13.h: 18208: extern volatile __bit TMR0IE @ (((unsigned) &INTCON)*8) + 5;
[; ;pic18f27j13.h: 18210: extern volatile __bit TMR0IF @ (((unsigned) &INTCON)*8) + 2;
[; ;pic18f27j13.h: 18212: extern volatile __bit TMR0IP @ (((unsigned) &INTCON2)*8) + 2;
[; ;pic18f27j13.h: 18214: extern volatile __bit TMR0ON @ (((unsigned) &T0CON)*8) + 7;
[; ;pic18f27j13.h: 18216: extern volatile __bit TMR1CS0 @ (((unsigned) &T1CON)*8) + 6;
[; ;pic18f27j13.h: 18218: extern volatile __bit TMR1CS1 @ (((unsigned) &T1CON)*8) + 7;
[; ;pic18f27j13.h: 18220: extern volatile __bit TMR1GE @ (((unsigned) &T1GCON)*8) + 7;
[; ;pic18f27j13.h: 18222: extern volatile __bit TMR1GIE @ (((unsigned) &PIE5)*8) + 0;
[; ;pic18f27j13.h: 18224: extern volatile __bit TMR1GIF @ (((unsigned) &PIR5)*8) + 0;
[; ;pic18f27j13.h: 18226: extern volatile __bit TMR1GIP @ (((unsigned) &IPR5)*8) + 0;
[; ;pic18f27j13.h: 18228: extern volatile __bit TMR1IE @ (((unsigned) &PIE1)*8) + 0;
[; ;pic18f27j13.h: 18230: extern volatile __bit TMR1IF @ (((unsigned) &PIR1)*8) + 0;
[; ;pic18f27j13.h: 18232: extern volatile __bit TMR1IP @ (((unsigned) &IPR1)*8) + 0;
[; ;pic18f27j13.h: 18234: extern volatile __bit TMR1MD @ (((unsigned) &PMDIS1)*8) + 1;
[; ;pic18f27j13.h: 18236: extern volatile __bit TMR1ON @ (((unsigned) &T1CON)*8) + 0;
[; ;pic18f27j13.h: 18238: extern volatile __bit TMR2IE @ (((unsigned) &PIE1)*8) + 1;
[; ;pic18f27j13.h: 18240: extern volatile __bit TMR2IF @ (((unsigned) &PIR1)*8) + 1;
[; ;pic18f27j13.h: 18242: extern volatile __bit TMR2IP @ (((unsigned) &IPR1)*8) + 1;
[; ;pic18f27j13.h: 18244: extern volatile __bit TMR2MD @ (((unsigned) &PMDIS1)*8) + 2;
[; ;pic18f27j13.h: 18246: extern volatile __bit TMR2ON @ (((unsigned) &T2CON)*8) + 2;
[; ;pic18f27j13.h: 18248: extern volatile __bit TMR3CS0 @ (((unsigned) &T3CON)*8) + 6;
[; ;pic18f27j13.h: 18250: extern volatile __bit TMR3CS1 @ (((unsigned) &T3CON)*8) + 7;
[; ;pic18f27j13.h: 18252: extern volatile __bit TMR3GE @ (((unsigned) &T3GCON)*8) + 7;
[; ;pic18f27j13.h: 18254: extern volatile __bit TMR3GIE @ (((unsigned) &PIE3)*8) + 1;
[; ;pic18f27j13.h: 18256: extern volatile __bit TMR3GIF @ (((unsigned) &PIR3)*8) + 1;
[; ;pic18f27j13.h: 18258: extern volatile __bit TMR3GIP @ (((unsigned) &IPR3)*8) + 1;
[; ;pic18f27j13.h: 18260: extern volatile __bit TMR3IE @ (((unsigned) &PIE2)*8) + 1;
[; ;pic18f27j13.h: 18262: extern volatile __bit TMR3IF @ (((unsigned) &PIR2)*8) + 1;
[; ;pic18f27j13.h: 18264: extern volatile __bit TMR3IP @ (((unsigned) &IPR2)*8) + 1;
[; ;pic18f27j13.h: 18266: extern volatile __bit TMR3MD @ (((unsigned) &PMDIS1)*8) + 3;
[; ;pic18f27j13.h: 18268: extern volatile __bit TMR3ON @ (((unsigned) &T3CON)*8) + 0;
[; ;pic18f27j13.h: 18270: extern volatile __bit TMR4IE @ (((unsigned) &PIE3)*8) + 3;
[; ;pic18f27j13.h: 18272: extern volatile __bit TMR4IF @ (((unsigned) &PIR3)*8) + 3;
[; ;pic18f27j13.h: 18274: extern volatile __bit TMR4IP @ (((unsigned) &IPR3)*8) + 3;
[; ;pic18f27j13.h: 18276: extern volatile __bit TMR4MD @ (((unsigned) &PMDIS1)*8) + 4;
[; ;pic18f27j13.h: 18278: extern volatile __bit TMR4ON @ (((unsigned) &T4CON)*8) + 2;
[; ;pic18f27j13.h: 18280: extern volatile __bit TMR5CS0 @ (((unsigned) &T5CON)*8) + 6;
[; ;pic18f27j13.h: 18282: extern volatile __bit TMR5CS1 @ (((unsigned) &T5CON)*8) + 7;
[; ;pic18f27j13.h: 18284: extern volatile __bit TMR5GE @ (((unsigned) &T5GCON)*8) + 7;
[; ;pic18f27j13.h: 18286: extern volatile __bit TMR5GIE @ (((unsigned) &PIE5)*8) + 1;
[; ;pic18f27j13.h: 18288: extern volatile __bit TMR5GIF @ (((unsigned) &PIR5)*8) + 1;
[; ;pic18f27j13.h: 18290: extern volatile __bit TMR5GIP @ (((unsigned) &IPR5)*8) + 1;
[; ;pic18f27j13.h: 18292: extern volatile __bit TMR5IE @ (((unsigned) &PIE5)*8) + 2;
[; ;pic18f27j13.h: 18294: extern volatile __bit TMR5IF @ (((unsigned) &PIR5)*8) + 2;
[; ;pic18f27j13.h: 18296: extern volatile __bit TMR5IP @ (((unsigned) &IPR5)*8) + 2;
[; ;pic18f27j13.h: 18298: extern volatile __bit TMR5MD @ (((unsigned) &PMDIS2)*8) + 3;
[; ;pic18f27j13.h: 18300: extern volatile __bit TMR5ON @ (((unsigned) &T5CON)*8) + 0;
[; ;pic18f27j13.h: 18302: extern volatile __bit TMR6IE @ (((unsigned) &PIE5)*8) + 3;
[; ;pic18f27j13.h: 18304: extern volatile __bit TMR6IF @ (((unsigned) &PIR5)*8) + 3;
[; ;pic18f27j13.h: 18306: extern volatile __bit TMR6IP @ (((unsigned) &IPR5)*8) + 3;
[; ;pic18f27j13.h: 18308: extern volatile __bit TMR6MD @ (((unsigned) &PMDIS2)*8) + 4;
[; ;pic18f27j13.h: 18310: extern volatile __bit TMR6ON @ (((unsigned) &T6CON)*8) + 2;
[; ;pic18f27j13.h: 18312: extern volatile __bit TMR8IE @ (((unsigned) &PIE5)*8) + 4;
[; ;pic18f27j13.h: 18314: extern volatile __bit TMR8IF @ (((unsigned) &PIR5)*8) + 4;
[; ;pic18f27j13.h: 18316: extern volatile __bit TMR8IP @ (((unsigned) &IPR5)*8) + 4;
[; ;pic18f27j13.h: 18318: extern volatile __bit TMR8MD @ (((unsigned) &PMDIS2)*8) + 6;
[; ;pic18f27j13.h: 18320: extern volatile __bit TMR8ON @ (((unsigned) &T8CON)*8) + 2;
[; ;pic18f27j13.h: 18322: extern volatile __bit TO @ (((unsigned) &RCON)*8) + 3;
[; ;pic18f27j13.h: 18324: extern volatile __bit TRIGSEL0 @ (((unsigned) &ADCTRIG)*8) + 0;
[; ;pic18f27j13.h: 18326: extern volatile __bit TRIGSEL1 @ (((unsigned) &ADCTRIG)*8) + 1;
[; ;pic18f27j13.h: 18328: extern volatile __bit TRISA0 @ (((unsigned) &TRISA)*8) + 0;
[; ;pic18f27j13.h: 18330: extern volatile __bit TRISA1 @ (((unsigned) &TRISA)*8) + 1;
[; ;pic18f27j13.h: 18332: extern volatile __bit TRISA2 @ (((unsigned) &TRISA)*8) + 2;
[; ;pic18f27j13.h: 18334: extern volatile __bit TRISA3 @ (((unsigned) &TRISA)*8) + 3;
[; ;pic18f27j13.h: 18336: extern volatile __bit TRISA5 @ (((unsigned) &TRISA)*8) + 5;
[; ;pic18f27j13.h: 18338: extern volatile __bit TRISA6 @ (((unsigned) &TRISA)*8) + 6;
[; ;pic18f27j13.h: 18340: extern volatile __bit TRISA7 @ (((unsigned) &TRISA)*8) + 7;
[; ;pic18f27j13.h: 18342: extern volatile __bit TRISB0 @ (((unsigned) &TRISB)*8) + 0;
[; ;pic18f27j13.h: 18344: extern volatile __bit TRISB1 @ (((unsigned) &TRISB)*8) + 1;
[; ;pic18f27j13.h: 18346: extern volatile __bit TRISB2 @ (((unsigned) &TRISB)*8) + 2;
[; ;pic18f27j13.h: 18348: extern volatile __bit TRISB3 @ (((unsigned) &TRISB)*8) + 3;
[; ;pic18f27j13.h: 18350: extern volatile __bit TRISB4 @ (((unsigned) &TRISB)*8) + 4;
[; ;pic18f27j13.h: 18352: extern volatile __bit TRISB5 @ (((unsigned) &TRISB)*8) + 5;
[; ;pic18f27j13.h: 18354: extern volatile __bit TRISB6 @ (((unsigned) &TRISB)*8) + 6;
[; ;pic18f27j13.h: 18356: extern volatile __bit TRISB7 @ (((unsigned) &TRISB)*8) + 7;
[; ;pic18f27j13.h: 18358: extern volatile __bit TRISC0 @ (((unsigned) &TRISC)*8) + 0;
[; ;pic18f27j13.h: 18360: extern volatile __bit TRISC1 @ (((unsigned) &TRISC)*8) + 1;
[; ;pic18f27j13.h: 18362: extern volatile __bit TRISC2 @ (((unsigned) &TRISC)*8) + 2;
[; ;pic18f27j13.h: 18364: extern volatile __bit TRISC3 @ (((unsigned) &TRISC)*8) + 3;
[; ;pic18f27j13.h: 18366: extern volatile __bit TRISC4 @ (((unsigned) &TRISC)*8) + 4;
[; ;pic18f27j13.h: 18368: extern volatile __bit TRISC5 @ (((unsigned) &TRISC)*8) + 5;
[; ;pic18f27j13.h: 18370: extern volatile __bit TRISC6 @ (((unsigned) &TRISC)*8) + 6;
[; ;pic18f27j13.h: 18372: extern volatile __bit TRISC7 @ (((unsigned) &TRISC)*8) + 7;
[; ;pic18f27j13.h: 18374: extern volatile __bit TRMT1 @ (((unsigned) &TXSTA1)*8) + 1;
[; ;pic18f27j13.h: 18376: extern volatile __bit TRMT2 @ (((unsigned) &TXSTA2)*8) + 1;
[; ;pic18f27j13.h: 18378: extern volatile __bit TUN0 @ (((unsigned) &OSCTUNE)*8) + 0;
[; ;pic18f27j13.h: 18380: extern volatile __bit TUN1 @ (((unsigned) &OSCTUNE)*8) + 1;
[; ;pic18f27j13.h: 18382: extern volatile __bit TUN2 @ (((unsigned) &OSCTUNE)*8) + 2;
[; ;pic18f27j13.h: 18384: extern volatile __bit TUN3 @ (((unsigned) &OSCTUNE)*8) + 3;
[; ;pic18f27j13.h: 18386: extern volatile __bit TUN4 @ (((unsigned) &OSCTUNE)*8) + 4;
[; ;pic18f27j13.h: 18388: extern volatile __bit TUN5 @ (((unsigned) &OSCTUNE)*8) + 5;
[; ;pic18f27j13.h: 18390: extern volatile __bit TX1 @ (((unsigned) &PORTC)*8) + 6;
[; ;pic18f27j13.h: 18392: extern volatile __bit TX1IE @ (((unsigned) &PIE1)*8) + 4;
[; ;pic18f27j13.h: 18394: extern volatile __bit TX1IF @ (((unsigned) &PIR1)*8) + 4;
[; ;pic18f27j13.h: 18396: extern volatile __bit TX1IP @ (((unsigned) &IPR1)*8) + 4;
[; ;pic18f27j13.h: 18398: extern volatile __bit TX2IE @ (((unsigned) &PIE3)*8) + 4;
[; ;pic18f27j13.h: 18400: extern volatile __bit TX2IF @ (((unsigned) &PIR3)*8) + 4;
[; ;pic18f27j13.h: 18402: extern volatile __bit TX2IP @ (((unsigned) &IPR3)*8) + 4;
[; ;pic18f27j13.h: 18404: extern volatile __bit TX8_9 @ (((unsigned) &TXSTA1)*8) + 6;
[; ;pic18f27j13.h: 18406: extern volatile __bit TX8_92 @ (((unsigned) &TXSTA2)*8) + 6;
[; ;pic18f27j13.h: 18408: extern volatile __bit TX91 @ (((unsigned) &TXSTA1)*8) + 6;
[; ;pic18f27j13.h: 18410: extern volatile __bit TX92 @ (((unsigned) &TXSTA2)*8) + 6;
[; ;pic18f27j13.h: 18412: extern volatile __bit TX9D1 @ (((unsigned) &TXSTA1)*8) + 0;
[; ;pic18f27j13.h: 18414: extern volatile __bit TX9D2 @ (((unsigned) &TXSTA2)*8) + 0;
[; ;pic18f27j13.h: 18416: extern volatile __bit TXB0IE @ (((unsigned) &PIE3)*8) + 2;
[; ;pic18f27j13.h: 18418: extern volatile __bit TXB1IE @ (((unsigned) &PIE3)*8) + 3;
[; ;pic18f27j13.h: 18420: extern volatile __bit TXB2IE @ (((unsigned) &PIE3)*8) + 4;
[; ;pic18f27j13.h: 18422: extern volatile __bit TXBNIE @ (((unsigned) &PIE3)*8) + 4;
[; ;pic18f27j13.h: 18424: extern volatile __bit TXBNIF @ (((unsigned) &PIR3)*8) + 4;
[; ;pic18f27j13.h: 18426: extern volatile __bit TXBNIP @ (((unsigned) &IPR3)*8) + 4;
[; ;pic18f27j13.h: 18428: extern volatile __bit TXCKP1 @ (((unsigned) &BAUDCON1)*8) + 4;
[; ;pic18f27j13.h: 18430: extern volatile __bit TXCKP2 @ (((unsigned) &BAUDCON2)*8) + 4;
[; ;pic18f27j13.h: 18432: extern volatile __bit TXD8 @ (((unsigned) &TXSTA1)*8) + 0;
[; ;pic18f27j13.h: 18434: extern volatile __bit TXD82 @ (((unsigned) &TXSTA2)*8) + 0;
[; ;pic18f27j13.h: 18436: extern volatile __bit TXEN1 @ (((unsigned) &TXSTA1)*8) + 5;
[; ;pic18f27j13.h: 18438: extern volatile __bit TXEN2 @ (((unsigned) &TXSTA2)*8) + 5;
[; ;pic18f27j13.h: 18440: extern volatile __bit TXIE @ (((unsigned) &PIE1)*8) + 4;
[; ;pic18f27j13.h: 18442: extern volatile __bit TXIF @ (((unsigned) &PIR1)*8) + 4;
[; ;pic18f27j13.h: 18444: extern volatile __bit TXINC @ (((unsigned) &DMACON1)*8) + 5;
[; ;pic18f27j13.h: 18446: extern volatile __bit TXIP @ (((unsigned) &IPR1)*8) + 4;
[; ;pic18f27j13.h: 18448: extern volatile __bit U1OD @ (((unsigned) &ODCON2)*8) + 0;
[; ;pic18f27j13.h: 18450: extern volatile __bit U2OD @ (((unsigned) &ODCON2)*8) + 1;
[; ;pic18f27j13.h: 18452: extern volatile __bit UA1 @ (((unsigned) &SSP1STAT)*8) + 1;
[; ;pic18f27j13.h: 18454: extern volatile __bit UA2 @ (((unsigned) &SSP2STAT)*8) + 1;
[; ;pic18f27j13.h: 18456: extern volatile __bit UART1MD @ (((unsigned) &PMDIS0)*8) + 3;
[; ;pic18f27j13.h: 18458: extern volatile __bit UART2MD @ (((unsigned) &PMDIS0)*8) + 4;
[; ;pic18f27j13.h: 18460: extern volatile __bit ULPEN @ (((unsigned) &WDTCON)*8) + 2;
[; ;pic18f27j13.h: 18462: extern volatile __bit ULPLVL @ (((unsigned) &WDTCON)*8) + 5;
[; ;pic18f27j13.h: 18464: extern volatile __bit ULPSINK @ (((unsigned) &WDTCON)*8) + 1;
[; ;pic18f27j13.h: 18466: extern volatile __bit ULPWDIS @ (((unsigned) &DSCONL)*8) + 2;
[; ;pic18f27j13.h: 18468: extern volatile __bit ULPWU @ (((unsigned) &PORTA)*8) + 0;
[; ;pic18f27j13.h: 18470: extern volatile __bit ULPWUIN @ (((unsigned) &PORTA)*8) + 0;
[; ;pic18f27j13.h: 18472: extern volatile __bit VBG @ (((unsigned) &PORTA)*8) + 1;
[; ;pic18f27j13.h: 18474: extern volatile __bit VBGEN @ (((unsigned) &ANCON1)*8) + 7;
[; ;pic18f27j13.h: 18476: extern volatile __bit VBGOE @ (((unsigned) &WDTCON)*8) + 4;
[; ;pic18f27j13.h: 18478: extern volatile __bit VCFG0 @ (((unsigned) &ADCON0)*8) + 6;
[; ;pic18f27j13.h: 18480: extern volatile __bit VCFG01 @ (((unsigned) &ADCON1)*8) + 4;
[; ;pic18f27j13.h: 18482: extern volatile __bit VCFG1 @ (((unsigned) &ADCON0)*8) + 7;
[; ;pic18f27j13.h: 18484: extern volatile __bit VCFG11 @ (((unsigned) &ADCON1)*8) + 5;
[; ;pic18f27j13.h: 18486: extern volatile __bit VDIRMAG @ (((unsigned) &HLVDCON)*8) + 7;
[; ;pic18f27j13.h: 18488: extern volatile __bit VREF_MINUS @ (((unsigned) &PORTA)*8) + 2;
[; ;pic18f27j13.h: 18490: extern volatile __bit VREF_PLUS @ (((unsigned) &PORTA)*8) + 3;
[; ;pic18f27j13.h: 18492: extern volatile __bit W4E @ (((unsigned) &BAUDCON1)*8) + 1;
[; ;pic18f27j13.h: 18494: extern volatile __bit WAITB0 @ (((unsigned) &RTCVALH)*8) + 6;
[; ;pic18f27j13.h: 18496: extern volatile __bit WAITB1 @ (((unsigned) &RTCVALH)*8) + 7;
[; ;pic18f27j13.h: 18498: extern volatile __bit WAITE0 @ (((unsigned) &RTCVALH)*8) + 0;
[; ;pic18f27j13.h: 18500: extern volatile __bit WAITE1 @ (((unsigned) &RTCVALH)*8) + 1;
[; ;pic18f27j13.h: 18502: extern volatile __bit WAITM0 @ (((unsigned) &RTCVALH)*8) + 2;
[; ;pic18f27j13.h: 18504: extern volatile __bit WAITM1 @ (((unsigned) &RTCVALH)*8) + 3;
[; ;pic18f27j13.h: 18506: extern volatile __bit WAITM2 @ (((unsigned) &RTCVALH)*8) + 4;
[; ;pic18f27j13.h: 18508: extern volatile __bit WAITM3 @ (((unsigned) &RTCVALH)*8) + 5;
[; ;pic18f27j13.h: 18510: extern volatile __bit WCOL1 @ (((unsigned) &SSP1CON1)*8) + 7;
[; ;pic18f27j13.h: 18512: extern volatile __bit WCOL2 @ (((unsigned) &SSP2CON1)*8) + 7;
[; ;pic18f27j13.h: 18514: extern volatile __bit WPROG @ (((unsigned) &EECON1)*8) + 5;
[; ;pic18f27j13.h: 18516: extern volatile __bit WR @ (((unsigned) &EECON1)*8) + 1;
[; ;pic18f27j13.h: 18518: extern volatile __bit WREN @ (((unsigned) &EECON1)*8) + 2;
[; ;pic18f27j13.h: 18520: extern volatile __bit WRERR @ (((unsigned) &EECON1)*8) + 3;
[; ;pic18f27j13.h: 18522: extern volatile __bit WUE1 @ (((unsigned) &BAUDCON1)*8) + 1;
[; ;pic18f27j13.h: 18524: extern volatile __bit WUE2 @ (((unsigned) &BAUDCON2)*8) + 1;
[; ;pic18f27j13.h: 18526: extern volatile __bit ZERO @ (((unsigned) &STATUS)*8) + 2;
[; ;pic18f27j13.h: 18528: extern volatile __bit nA @ (((unsigned) &SSP1STAT)*8) + 5;
[; ;pic18f27j13.h: 18530: extern volatile __bit nA2 @ (((unsigned) &SSP2STAT)*8) + 5;
[; ;pic18f27j13.h: 18532: extern volatile __bit nADDRESS @ (((unsigned) &SSP1STAT)*8) + 5;
[; ;pic18f27j13.h: 18534: extern volatile __bit nADDRESS2 @ (((unsigned) &SSP2STAT)*8) + 5;
[; ;pic18f27j13.h: 18536: extern volatile __bit nBOR @ (((unsigned) &RCON)*8) + 0;
[; ;pic18f27j13.h: 18538: extern volatile __bit nCM @ (((unsigned) &RCON)*8) + 5;
[; ;pic18f27j13.h: 18540: extern volatile __bit nDONE @ (((unsigned) &ADCON0)*8) + 1;
[; ;pic18f27j13.h: 18542: extern volatile __bit nPD @ (((unsigned) &RCON)*8) + 2;
[; ;pic18f27j13.h: 18544: extern volatile __bit nPOR @ (((unsigned) &RCON)*8) + 1;
[; ;pic18f27j13.h: 18546: extern volatile __bit nRBPU @ (((unsigned) &INTCON2)*8) + 7;
[; ;pic18f27j13.h: 18548: extern volatile __bit nRC8 @ (((unsigned) &RCSTA1)*8) + 6;
[; ;pic18f27j13.h: 18550: extern volatile __bit nRI @ (((unsigned) &RCON)*8) + 4;
[; ;pic18f27j13.h: 18552: extern volatile __bit nSS1 @ (((unsigned) &PORTA)*8) + 5;
[; ;pic18f27j13.h: 18554: extern volatile __bit nT1DONE @ (((unsigned) &T1GCON)*8) + 3;
[; ;pic18f27j13.h: 18556: extern volatile __bit nT1SYNC @ (((unsigned) &T1CON)*8) + 2;
[; ;pic18f27j13.h: 18558: extern volatile __bit nT3SYNC @ (((unsigned) &T3CON)*8) + 2;
[; ;pic18f27j13.h: 18560: extern volatile __bit nT5DONE @ (((unsigned) &T5GCON)*8) + 3;
[; ;pic18f27j13.h: 18562: extern volatile __bit nT5SYNC @ (((unsigned) &T5CON)*8) + 2;
[; ;pic18f27j13.h: 18564: extern volatile __bit nTO @ (((unsigned) &RCON)*8) + 3;
[; ;pic18f27j13.h: 18566: extern volatile __bit nTX8 @ (((unsigned) &TXSTA1)*8) + 6;
[; ;pic18f27j13.h: 18568: extern volatile __bit nW @ (((unsigned) &SSP1STAT)*8) + 2;
[; ;pic18f27j13.h: 18570: extern volatile __bit nW2 @ (((unsigned) &SSP2STAT)*8) + 2;
[; ;pic18f27j13.h: 18572: extern volatile __bit nWRITE @ (((unsigned) &SSP1STAT)*8) + 2;
[; ;pic18f27j13.h: 18574: extern volatile __bit nWRITE2 @ (((unsigned) &SSP2STAT)*8) + 2;
[; ;adc.h: 2008: union ADCResult
[; ;adc.h: 2009: {
[; ;adc.h: 2010: int lr;
[; ;adc.h: 2011: char br[2];
[; ;adc.h: 2012: };
[; ;adc.h: 2014: char BusyADC (void);
[; ;adc.h: 2016: void ConvertADC (void);
[; ;adc.h: 2018: void CloseADC(void);
[; ;adc.h: 2026: int ReadADC(void);
[; ;adc.h: 2052: void OpenADC ( unsigned char ,
[; ;adc.h: 2053: unsigned char ,
[; ;adc.h: 2054: unsigned char ,
[; ;adc.h: 2055: unsigned int );
[; ;adc.h: 2084: void SetChanADC(unsigned char );
[; ;adc.h: 2100: void SelChanConvADC( unsigned char );
[; ;ancomp.h: 202: void Close_ancomp1( void );
[; ;ancomp.h: 203: void Open_ancomp1(unsigned char config);
[; ;ancomp.h: 204: void Close_ancomp2( void );
[; ;ancomp.h: 205: void Open_ancomp2(unsigned char config);
[; ;ancomp.h: 208: void Close_ancomp3( void );
[; ;ancomp.h: 209: void Open_ancomp3(unsigned char config);
[; ;spi.h: 236: void OpenSPI1( unsigned char sync_mode,
[; ;spi.h: 237: unsigned char bus_mode,
[; ;spi.h: 238: unsigned char smp_phase );
[; ;spi.h: 240: signed char WriteSPI1( unsigned char data_out );
[; ;spi.h: 242: void getsSPI1( unsigned char *rdptr, unsigned char length );
[; ;spi.h: 244: void putsSPI1( unsigned char *wrptr );
[; ;spi.h: 246: unsigned char ReadSPI1( void );
[; ;spi.h: 441: void OpenSPI2( unsigned char sync_mode,
[; ;spi.h: 442: unsigned char bus_mode,
[; ;spi.h: 443: unsigned char smp_phase );
[; ;spi.h: 445: signed char WriteSPI2( unsigned char data_out );
[; ;spi.h: 447: void getsSPI2( unsigned char *rdptr, unsigned char length );
[; ;spi.h: 449: void putsSPI2( unsigned char *wrptr );
[; ;spi.h: 451: unsigned char ReadSPI2( void );
[; ;can2510.h: 414: void CAN2510Initialize( unsigned int configuration,
[; ;can2510.h: 415: unsigned char brp,
[; ;can2510.h: 416: unsigned char interruptFlags,
[; ;can2510.h: 417: unsigned char SPI_syncMode,
[; ;can2510.h: 418: unsigned char SPI_busMode,
[; ;can2510.h: 419: unsigned char SPI_smpPhase );
[; ;can2510.h: 421: signed char CAN2510Init( unsigned long BufferConfig,
[; ;can2510.h: 422: unsigned long BitTimeConfig,
[; ;can2510.h: 423: unsigned char interruptEnables,
[; ;can2510.h: 424: unsigned char SPI_syncMode,
[; ;can2510.h: 425: unsigned char SPI_busMode,
[; ;can2510.h: 426: unsigned char SPI_smpPhase );
[; ;can2510.h: 428: void CAN2510Enable( void );
[; ;can2510.h: 430: void CAN2510Disable( void );
[; ;can2510.h: 432: void CAN2510Reset( void );
[; ;can2510.h: 434: void CAN2510SetMode( unsigned char mode );
[; ;can2510.h: 436: unsigned char CAN2510ReadMode( void );
[; ;can2510.h: 438: unsigned char CAN2510ReadStatus( void );
[; ;can2510.h: 440: unsigned char CAN2510ErrorState( void );
[; ;can2510.h: 442: unsigned char CAN2510InterruptStatus( void );
[; ;can2510.h: 444: void CAN2510InterruptEnable( unsigned char interruptFlags );
[; ;can2510.h: 446: unsigned char CAN2510ByteRead( unsigned char addr );
[; ;can2510.h: 448: void CAN2510ByteWrite( unsigned char addr, unsigned char value );
[; ;can2510.h: 450: void CAN2510SequentialRead( unsigned char *DataArray,
[; ;can2510.h: 451: unsigned char CAN2510addr,
[; ;can2510.h: 452: unsigned char numbytes );
[; ;can2510.h: 454: void CAN2510SequentialWrite( unsigned char *DataArray,
[; ;can2510.h: 455: unsigned char CAN2510addr,
[; ;can2510.h: 456: unsigned char numbytes );
[; ;can2510.h: 458: void CAN2510BitModify( unsigned char address,
[; ;can2510.h: 459: unsigned char mask,
[; ;can2510.h: 460: unsigned char data );
[; ;can2510.h: 462: void CAN2510SetSingleMaskStd( unsigned char maskNum, unsigned int mask );
[; ;can2510.h: 464: void CAN2510SetSingleMaskXtd( unsigned char maskNum, unsigned long mask );
[; ;can2510.h: 466: void CAN2510SetSingleFilterStd( unsigned char filterNum, unsigned int filter );
[; ;can2510.h: 468: void CAN2510SetSingleFilterXtd( unsigned char filterNum, unsigned long filter );
[; ;can2510.h: 470: signed char CAN2510SetMsgFilterStd( unsigned char bufferNum,
[; ;can2510.h: 471: unsigned int mask,
[; ;can2510.h: 472: unsigned int *filters );
[; ;can2510.h: 474: signed char CAN2510SetMsgFilterXtd( unsigned char bufferNum,
[; ;can2510.h: 475: unsigned long mask,
[; ;can2510.h: 476: unsigned long *filters );
[; ;can2510.h: 478: signed char CAN2510WriteStd( unsigned int msgId,
[; ;can2510.h: 479: unsigned char msgPriority,
[; ;can2510.h: 480: unsigned char numBytes,
[; ;can2510.h: 481: unsigned char *data );
[; ;can2510.h: 483: signed char CAN2510WriteXtd( unsigned long msgId,
[; ;can2510.h: 484: unsigned char msgPriority,
[; ;can2510.h: 485: unsigned char numBytes,
[; ;can2510.h: 486: unsigned char *data );
[; ;can2510.h: 488: void CAN2510LoadBufferStd( unsigned char bufferNum,
[; ;can2510.h: 489: unsigned int msgId,
[; ;can2510.h: 490: unsigned char numBytes,
[; ;can2510.h: 491: unsigned char *data );
[; ;can2510.h: 493: void CAN2510LoadBufferXtd( unsigned char bufferNum,
[; ;can2510.h: 494: unsigned long msgId,
[; ;can2510.h: 495: unsigned char numBytes,
[; ;can2510.h: 496: unsigned char *data );
[; ;can2510.h: 498: void CAN2510LoadRTRStd( unsigned char bufferNum,
[; ;can2510.h: 499: unsigned int msgId,
[; ;can2510.h: 500: unsigned char numBytes );
[; ;can2510.h: 502: void CAN2510LoadRTRXtd( unsigned char bufferNum,
[; ;can2510.h: 503: unsigned long msgId,
[; ;can2510.h: 504: unsigned char numBytes );
[; ;can2510.h: 506: void CAN2510SetBufferPriority( unsigned char bufferNum,
[; ;can2510.h: 507: unsigned char bufferPriority );
[; ;can2510.h: 509: void CAN2510SendBuffer( unsigned char bufferNumber );
[; ;can2510.h: 511: signed char CAN2510WriteBuffer( unsigned char bufferNum );
[; ;can2510.h: 513: unsigned char CAN2510DataReady( unsigned char bufferNum );
[; ;can2510.h: 515: unsigned char CAN2510DataRead( unsigned char bufferNum,
[; ;can2510.h: 516: unsigned long *msgId,
[; ;can2510.h: 517: unsigned char *numBytes,
[; ;can2510.h: 518: unsigned char *data );
[; ;capture.h: 64: union capstatus
[; ;capture.h: 65: {
[; ;capture.h: 73: struct
[; ;capture.h: 74: {
[; ;capture.h: 91: unsigned Cap4OVF:1;
[; ;capture.h: 92: unsigned Cap5OVF:1;
[; ;capture.h: 96: unsigned Cap6OVF:1;
[; ;capture.h: 97: unsigned Cap7OVF:1;
[; ;capture.h: 98: unsigned Cap8OVF:1;
[; ;capture.h: 107: unsigned ECap1OVF:1;
[; ;capture.h: 111: unsigned ECap2OVF:1;
[; ;capture.h: 112: unsigned ECap3OVF:1;
[; ;capture.h: 115: };
[; ;capture.h: 117: unsigned :8;
[; ;capture.h: 119: };
[; ;capture.h: 121: extern union capstatus CapStatus;
[; ;capture.h: 123: union CapResult
[; ;capture.h: 124: {
[; ;capture.h: 125: unsigned int lc;
[; ;capture.h: 126: char bc[2];
[; ;capture.h: 127: };
[; ;capture.h: 507: void OpenCapture4 ( unsigned char config);
[; ;capture.h: 508: unsigned int ReadCapture4 (void);
[; ;capture.h: 509: void CloseCapture4 (void);
[; ;capture.h: 511: void OpenCapture5 ( unsigned char config);
[; ;capture.h: 512: unsigned int ReadCapture5 (void);
[; ;capture.h: 513: void CloseCapture5 (void);
[; ;capture.h: 520: void OpenCapture6 ( unsigned char config);
[; ;capture.h: 521: unsigned int ReadCapture6 (void);
[; ;capture.h: 522: void CloseCapture6 (void);
[; ;capture.h: 524: void OpenCapture7 ( unsigned char config);
[; ;capture.h: 525: unsigned int ReadCapture7 (void);
[; ;capture.h: 526: void CloseCapture7 (void);
[; ;capture.h: 528: void OpenCapture8 ( unsigned char config);
[; ;capture.h: 529: unsigned int ReadCapture8 (void);
[; ;capture.h: 530: void CloseCapture8 (void);
[; ;capture.h: 568: void OpenECapture1 ( unsigned char config);
[; ;capture.h: 569: unsigned int ReadECapture1 (void);
[; ;capture.h: 570: void CloseECapture1 (void);
[; ;capture.h: 573: void OpenECapture2 ( unsigned char config);
[; ;capture.h: 574: unsigned int ReadECapture2 (void);
[; ;capture.h: 575: void CloseECapture2 (void);
[; ;capture.h: 577: void OpenECapture3 ( unsigned char config);
[; ;capture.h: 578: unsigned int ReadECapture3 (void);
[; ;capture.h: 579: void CloseECapture3 (void);
[; ;compare.h: 403: void OpenCompare4(unsigned char config,unsigned int period);
[; ;compare.h: 404: void CloseCompare4(void);
[; ;compare.h: 406: void OpenCompare5(unsigned char config,unsigned int period);
[; ;compare.h: 407: void CloseCompare5(void);
[; ;compare.h: 411: void OpenCompare6(unsigned char config,unsigned int period);
[; ;compare.h: 412: void CloseCompare6(void);
[; ;compare.h: 414: void OpenCompare7(unsigned char config,unsigned int period);
[; ;compare.h: 415: void CloseCompare7(void);
[; ;compare.h: 417: void OpenCompare8(unsigned char config,unsigned int period);
[; ;compare.h: 418: void CloseCompare8(void);
[; ;compare.h: 433: void OpenECompare1(unsigned char config,unsigned int period);
[; ;compare.h: 434: void CloseECompare1(void);
[; ;compare.h: 439: void OpenECompare2(unsigned char config,unsigned int period);
[; ;compare.h: 440: void CloseECompare2(void);
[; ;compare.h: 442: void OpenECompare3(unsigned char config,unsigned int period);
[; ;compare.h: 443: void CloseECompare3(void);
[; ;ctmu.h: 374: void OpenCTMU(unsigned char config1,unsigned char config2,unsigned char config3);
[; ;ctmu.h: 379: void CurrentControlCTMU(unsigned char config);
[; ;ctmu.h: 380: void CloseCTMU(void);
[; ;dpslp.h: 49: typedef union
[; ;dpslp.h: 50: {
[; ;dpslp.h: 51: struct
[; ;dpslp.h: 52: {
[; ;dpslp.h: 53: unsigned char DS_POR:1;
[; ;dpslp.h: 54: unsigned char DS_MCLR:1;
[; ;dpslp.h: 55: unsigned char DS_RTC:1;
[; ;dpslp.h: 56: unsigned char DS_WDT:1;
[; ;dpslp.h: 57: unsigned char DS_FLT:1;
[; ;dpslp.h: 58: unsigned char DS_INT0:1;
[; ;dpslp.h: 59: unsigned char DS_BOR:1;
[; ;dpslp.h: 60: unsigned char DS_ULP:1;
[; ;dpslp.h: 61: }WK_SRC;
[; ;dpslp.h: 63: unsigned char WKSRC;
[; ;dpslp.h: 65: }SRC;
[; ;dpslp.h: 68: typedef struct
[; ;dpslp.h: 69: {
[; ;dpslp.h: 70: unsigned char Reg0;
[; ;dpslp.h: 71: unsigned char Reg1;
[; ;dpslp.h: 72: }CONTEXT;
[; ;dpslp.h: 164: extern void DeepSleepWakeUpSource(SRC* ptr);
[; ;dpslp.h: 165: extern void GotoDeepSleep( unsigned int config);
[; ;dpslp.h: 166: extern signed char IsResetFromDeepSleep( void );
[; ;dpslp.h: 167: extern void ReadDSGPR( CONTEXT* ptr );
[; ;dpslp.h: 171: extern void ULPWakeUpEnable( void );
[; ;stddef.h: 2: typedef int ptrdiff_t;
[; ;stddef.h: 3: typedef unsigned size_t;
[; ;stddef.h: 4: typedef unsigned short wchar_t;
[; ;stddef.h: 13: extern int errno;
[; ;GenericTypeDefs.h: 65: typedef enum _BOOL { FALSE = 0, TRUE } BOOL;
[; ;GenericTypeDefs.h: 68: typedef enum _BIT { CLEAR = 0, SET } BIT;
[; ;GenericTypeDefs.h: 75: typedef signed int INT;
[; ;GenericTypeDefs.h: 76: typedef signed char INT8;
[; ;GenericTypeDefs.h: 77: typedef signed short int INT16;
[; ;GenericTypeDefs.h: 78: typedef signed long int INT32;
[; ;GenericTypeDefs.h: 82: typedef signed long long INT64;
[; ;GenericTypeDefs.h: 86: typedef unsigned int UINT;
[; ;GenericTypeDefs.h: 87: typedef unsigned char UINT8;
[; ;GenericTypeDefs.h: 88: typedef unsigned short int UINT16;
[; ;GenericTypeDefs.h: 93: typedef unsigned long int UINT32;
[; ;GenericTypeDefs.h: 96: typedef unsigned long long UINT64;
[; ;GenericTypeDefs.h: 99: typedef union
[; ;GenericTypeDefs.h: 100: {
[; ;GenericTypeDefs.h: 101: UINT8 Val;
[; ;GenericTypeDefs.h: 102: struct
[; ;GenericTypeDefs.h: 103: {
[; ;GenericTypeDefs.h: 104: UINT8 b0:1;
[; ;GenericTypeDefs.h: 105: UINT8 b1:1;
[; ;GenericTypeDefs.h: 106: UINT8 b2:1;
[; ;GenericTypeDefs.h: 107: UINT8 b3:1;
[; ;GenericTypeDefs.h: 108: UINT8 b4:1;
[; ;GenericTypeDefs.h: 109: UINT8 b5:1;
[; ;GenericTypeDefs.h: 110: UINT8 b6:1;
[; ;GenericTypeDefs.h: 111: UINT8 b7:1;
[; ;GenericTypeDefs.h: 112: } bits;
[; ;GenericTypeDefs.h: 113: } UINT8_VAL, UINT8_BITS;
[; ;GenericTypeDefs.h: 115: typedef union
[; ;GenericTypeDefs.h: 116: {
[; ;GenericTypeDefs.h: 117: UINT16 Val;
[; ;GenericTypeDefs.h: 118: UINT8 v[2] ;
[; ;GenericTypeDefs.h: 119: struct
[; ;GenericTypeDefs.h: 120: {
[; ;GenericTypeDefs.h: 121: UINT8 LB;
[; ;GenericTypeDefs.h: 122: UINT8 HB;
[; ;GenericTypeDefs.h: 123: } byte;
[; ;GenericTypeDefs.h: 124: struct
[; ;GenericTypeDefs.h: 125: {
[; ;GenericTypeDefs.h: 126: UINT8 b0:1;
[; ;GenericTypeDefs.h: 127: UINT8 b1:1;
[; ;GenericTypeDefs.h: 128: UINT8 b2:1;
[; ;GenericTypeDefs.h: 129: UINT8 b3:1;
[; ;GenericTypeDefs.h: 130: UINT8 b4:1;
[; ;GenericTypeDefs.h: 131: UINT8 b5:1;
[; ;GenericTypeDefs.h: 132: UINT8 b6:1;
[; ;GenericTypeDefs.h: 133: UINT8 b7:1;
[; ;GenericTypeDefs.h: 134: UINT8 b8:1;
[; ;GenericTypeDefs.h: 135: UINT8 b9:1;
[; ;GenericTypeDefs.h: 136: UINT8 b10:1;
[; ;GenericTypeDefs.h: 137: UINT8 b11:1;
[; ;GenericTypeDefs.h: 138: UINT8 b12:1;
[; ;GenericTypeDefs.h: 139: UINT8 b13:1;
[; ;GenericTypeDefs.h: 140: UINT8 b14:1;
[; ;GenericTypeDefs.h: 141: UINT8 b15:1;
[; ;GenericTypeDefs.h: 142: } bits;
[; ;GenericTypeDefs.h: 143: } UINT16_VAL, UINT16_BITS;
[; ;GenericTypeDefs.h: 187: typedef union
[; ;GenericTypeDefs.h: 188: {
[; ;GenericTypeDefs.h: 189: UINT32 Val;
[; ;GenericTypeDefs.h: 190: UINT16 w[2] ;
[; ;GenericTypeDefs.h: 191: UINT8 v[4] ;
[; ;GenericTypeDefs.h: 192: struct
[; ;GenericTypeDefs.h: 193: {
[; ;GenericTypeDefs.h: 194: UINT16 LW;
[; ;GenericTypeDefs.h: 195: UINT16 HW;
[; ;GenericTypeDefs.h: 196: } word;
[; ;GenericTypeDefs.h: 197: struct
[; ;GenericTypeDefs.h: 198: {
[; ;GenericTypeDefs.h: 199: UINT8 LB;
[; ;GenericTypeDefs.h: 200: UINT8 HB;
[; ;GenericTypeDefs.h: 201: UINT8 UB;
[; ;GenericTypeDefs.h: 202: UINT8 MB;
[; ;GenericTypeDefs.h: 203: } byte;
[; ;GenericTypeDefs.h: 204: struct
[; ;GenericTypeDefs.h: 205: {
[; ;GenericTypeDefs.h: 206: UINT16_VAL low;
[; ;GenericTypeDefs.h: 207: UINT16_VAL high;
[; ;GenericTypeDefs.h: 208: }wordUnion;
[; ;GenericTypeDefs.h: 209: struct
[; ;GenericTypeDefs.h: 210: {
[; ;GenericTypeDefs.h: 211: UINT8 b0:1;
[; ;GenericTypeDefs.h: 212: UINT8 b1:1;
[; ;GenericTypeDefs.h: 213: UINT8 b2:1;
[; ;GenericTypeDefs.h: 214: UINT8 b3:1;
[; ;GenericTypeDefs.h: 215: UINT8 b4:1;
[; ;GenericTypeDefs.h: 216: UINT8 b5:1;
[; ;GenericTypeDefs.h: 217: UINT8 b6:1;
[; ;GenericTypeDefs.h: 218: UINT8 b7:1;
[; ;GenericTypeDefs.h: 219: UINT8 b8:1;
[; ;GenericTypeDefs.h: 220: UINT8 b9:1;
[; ;GenericTypeDefs.h: 221: UINT8 b10:1;
[; ;GenericTypeDefs.h: 222: UINT8 b11:1;
[; ;GenericTypeDefs.h: 223: UINT8 b12:1;
[; ;GenericTypeDefs.h: 224: UINT8 b13:1;
[; ;GenericTypeDefs.h: 225: UINT8 b14:1;
[; ;GenericTypeDefs.h: 226: UINT8 b15:1;
[; ;GenericTypeDefs.h: 227: UINT8 b16:1;
[; ;GenericTypeDefs.h: 228: UINT8 b17:1;
[; ;GenericTypeDefs.h: 229: UINT8 b18:1;
[; ;GenericTypeDefs.h: 230: UINT8 b19:1;
[; ;GenericTypeDefs.h: 231: UINT8 b20:1;
[; ;GenericTypeDefs.h: 232: UINT8 b21:1;
[; ;GenericTypeDefs.h: 233: UINT8 b22:1;
[; ;GenericTypeDefs.h: 234: UINT8 b23:1;
[; ;GenericTypeDefs.h: 235: UINT8 b24:1;
[; ;GenericTypeDefs.h: 236: UINT8 b25:1;
[; ;GenericTypeDefs.h: 237: UINT8 b26:1;
[; ;GenericTypeDefs.h: 238: UINT8 b27:1;
[; ;GenericTypeDefs.h: 239: UINT8 b28:1;
[; ;GenericTypeDefs.h: 240: UINT8 b29:1;
[; ;GenericTypeDefs.h: 241: UINT8 b30:1;
[; ;GenericTypeDefs.h: 242: UINT8 b31:1;
[; ;GenericTypeDefs.h: 243: } bits;
[; ;GenericTypeDefs.h: 244: } UINT32_VAL;
[; ;GenericTypeDefs.h: 248: typedef union
[; ;GenericTypeDefs.h: 249: {
[; ;GenericTypeDefs.h: 250: UINT64 Val;
[; ;GenericTypeDefs.h: 251: UINT32 d[2] ;
[; ;GenericTypeDefs.h: 252: UINT16 w[4] ;
[; ;GenericTypeDefs.h: 253: UINT8 v[8] ;
[; ;GenericTypeDefs.h: 254: struct
[; ;GenericTypeDefs.h: 255: {
[; ;GenericTypeDefs.h: 256: UINT32 LD;
[; ;GenericTypeDefs.h: 257: UINT32 HD;
[; ;GenericTypeDefs.h: 258: } dword;
[; ;GenericTypeDefs.h: 259: struct
[; ;GenericTypeDefs.h: 260: {
[; ;GenericTypeDefs.h: 261: UINT16 LW;
[; ;GenericTypeDefs.h: 262: UINT16 HW;
[; ;GenericTypeDefs.h: 263: UINT16 UW;
[; ;GenericTypeDefs.h: 264: UINT16 MW;
[; ;GenericTypeDefs.h: 265: } word;
[; ;GenericTypeDefs.h: 266: struct
[; ;GenericTypeDefs.h: 267: {
[; ;GenericTypeDefs.h: 268: UINT8 b0:1;
[; ;GenericTypeDefs.h: 269: UINT8 b1:1;
[; ;GenericTypeDefs.h: 270: UINT8 b2:1;
[; ;GenericTypeDefs.h: 271: UINT8 b3:1;
[; ;GenericTypeDefs.h: 272: UINT8 b4:1;
[; ;GenericTypeDefs.h: 273: UINT8 b5:1;
[; ;GenericTypeDefs.h: 274: UINT8 b6:1;
[; ;GenericTypeDefs.h: 275: UINT8 b7:1;
[; ;GenericTypeDefs.h: 276: UINT8 b8:1;
[; ;GenericTypeDefs.h: 277: UINT8 b9:1;
[; ;GenericTypeDefs.h: 278: UINT8 b10:1;
[; ;GenericTypeDefs.h: 279: UINT8 b11:1;
[; ;GenericTypeDefs.h: 280: UINT8 b12:1;
[; ;GenericTypeDefs.h: 281: UINT8 b13:1;
[; ;GenericTypeDefs.h: 282: UINT8 b14:1;
[; ;GenericTypeDefs.h: 283: UINT8 b15:1;
[; ;GenericTypeDefs.h: 284: UINT8 b16:1;
[; ;GenericTypeDefs.h: 285: UINT8 b17:1;
[; ;GenericTypeDefs.h: 286: UINT8 b18:1;
[; ;GenericTypeDefs.h: 287: UINT8 b19:1;
[; ;GenericTypeDefs.h: 288: UINT8 b20:1;
[; ;GenericTypeDefs.h: 289: UINT8 b21:1;
[; ;GenericTypeDefs.h: 290: UINT8 b22:1;
[; ;GenericTypeDefs.h: 291: UINT8 b23:1;
[; ;GenericTypeDefs.h: 292: UINT8 b24:1;
[; ;GenericTypeDefs.h: 293: UINT8 b25:1;
[; ;GenericTypeDefs.h: 294: UINT8 b26:1;
[; ;GenericTypeDefs.h: 295: UINT8 b27:1;
[; ;GenericTypeDefs.h: 296: UINT8 b28:1;
[; ;GenericTypeDefs.h: 297: UINT8 b29:1;
[; ;GenericTypeDefs.h: 298: UINT8 b30:1;
[; ;GenericTypeDefs.h: 299: UINT8 b31:1;
[; ;GenericTypeDefs.h: 300: UINT8 b32:1;
[; ;GenericTypeDefs.h: 301: UINT8 b33:1;
[; ;GenericTypeDefs.h: 302: UINT8 b34:1;
[; ;GenericTypeDefs.h: 303: UINT8 b35:1;
[; ;GenericTypeDefs.h: 304: UINT8 b36:1;
[; ;GenericTypeDefs.h: 305: UINT8 b37:1;
[; ;GenericTypeDefs.h: 306: UINT8 b38:1;
[; ;GenericTypeDefs.h: 307: UINT8 b39:1;
[; ;GenericTypeDefs.h: 308: UINT8 b40:1;
[; ;GenericTypeDefs.h: 309: UINT8 b41:1;
[; ;GenericTypeDefs.h: 310: UINT8 b42:1;
[; ;GenericTypeDefs.h: 311: UINT8 b43:1;
[; ;GenericTypeDefs.h: 312: UINT8 b44:1;
[; ;GenericTypeDefs.h: 313: UINT8 b45:1;
[; ;GenericTypeDefs.h: 314: UINT8 b46:1;
[; ;GenericTypeDefs.h: 315: UINT8 b47:1;
[; ;GenericTypeDefs.h: 316: UINT8 b48:1;
[; ;GenericTypeDefs.h: 317: UINT8 b49:1;
[; ;GenericTypeDefs.h: 318: UINT8 b50:1;
[; ;GenericTypeDefs.h: 319: UINT8 b51:1;
[; ;GenericTypeDefs.h: 320: UINT8 b52:1;
[; ;GenericTypeDefs.h: 321: UINT8 b53:1;
[; ;GenericTypeDefs.h: 322: UINT8 b54:1;
[; ;GenericTypeDefs.h: 323: UINT8 b55:1;
[; ;GenericTypeDefs.h: 324: UINT8 b56:1;
[; ;GenericTypeDefs.h: 325: UINT8 b57:1;
[; ;GenericTypeDefs.h: 326: UINT8 b58:1;
[; ;GenericTypeDefs.h: 327: UINT8 b59:1;
[; ;GenericTypeDefs.h: 328: UINT8 b60:1;
[; ;GenericTypeDefs.h: 329: UINT8 b61:1;
[; ;GenericTypeDefs.h: 330: UINT8 b62:1;
[; ;GenericTypeDefs.h: 331: UINT8 b63:1;
[; ;GenericTypeDefs.h: 332: } bits;
[; ;GenericTypeDefs.h: 333: } UINT64_VAL;
[; ;GenericTypeDefs.h: 339: typedef void VOID;
[; ;GenericTypeDefs.h: 341: typedef char CHAR8;
[; ;GenericTypeDefs.h: 342: typedef unsigned char UCHAR8;
[; ;GenericTypeDefs.h: 344: typedef unsigned char BYTE;
[; ;GenericTypeDefs.h: 345: typedef unsigned short int WORD;
[; ;GenericTypeDefs.h: 346: typedef unsigned long DWORD;
[; ;GenericTypeDefs.h: 349: typedef unsigned long long QWORD;
[; ;GenericTypeDefs.h: 350: typedef signed char CHAR;
[; ;GenericTypeDefs.h: 351: typedef signed short int SHORT;
[; ;GenericTypeDefs.h: 352: typedef signed long LONG;
[; ;GenericTypeDefs.h: 355: typedef signed long long LONGLONG;
[; ;GenericTypeDefs.h: 356: typedef union
[; ;GenericTypeDefs.h: 357: {
[; ;GenericTypeDefs.h: 358: BYTE Val;
[; ;GenericTypeDefs.h: 359: struct
[; ;GenericTypeDefs.h: 360: {
[; ;GenericTypeDefs.h: 361: BYTE b0:1;
[; ;GenericTypeDefs.h: 362: BYTE b1:1;
[; ;GenericTypeDefs.h: 363: BYTE b2:1;
[; ;GenericTypeDefs.h: 364: BYTE b3:1;
[; ;GenericTypeDefs.h: 365: BYTE b4:1;
[; ;GenericTypeDefs.h: 366: BYTE b5:1;
[; ;GenericTypeDefs.h: 367: BYTE b6:1;
[; ;GenericTypeDefs.h: 368: BYTE b7:1;
[; ;GenericTypeDefs.h: 369: } bits;
[; ;GenericTypeDefs.h: 370: } BYTE_VAL, BYTE_BITS;
[; ;GenericTypeDefs.h: 372: typedef union
[; ;GenericTypeDefs.h: 373: {
[; ;GenericTypeDefs.h: 374: WORD Val;
[; ;GenericTypeDefs.h: 375: BYTE v[2] ;
[; ;GenericTypeDefs.h: 376: struct
[; ;GenericTypeDefs.h: 377: {
[; ;GenericTypeDefs.h: 378: BYTE LB;
[; ;GenericTypeDefs.h: 379: BYTE HB;
[; ;GenericTypeDefs.h: 380: } byte;
[; ;GenericTypeDefs.h: 381: struct
[; ;GenericTypeDefs.h: 382: {
[; ;GenericTypeDefs.h: 383: BYTE b0:1;
[; ;GenericTypeDefs.h: 384: BYTE b1:1;
[; ;GenericTypeDefs.h: 385: BYTE b2:1;
[; ;GenericTypeDefs.h: 386: BYTE b3:1;
[; ;GenericTypeDefs.h: 387: BYTE b4:1;
[; ;GenericTypeDefs.h: 388: BYTE b5:1;
[; ;GenericTypeDefs.h: 389: BYTE b6:1;
[; ;GenericTypeDefs.h: 390: BYTE b7:1;
[; ;GenericTypeDefs.h: 391: BYTE b8:1;
[; ;GenericTypeDefs.h: 392: BYTE b9:1;
[; ;GenericTypeDefs.h: 393: BYTE b10:1;
[; ;GenericTypeDefs.h: 394: BYTE b11:1;
[; ;GenericTypeDefs.h: 395: BYTE b12:1;
[; ;GenericTypeDefs.h: 396: BYTE b13:1;
[; ;GenericTypeDefs.h: 397: BYTE b14:1;
[; ;GenericTypeDefs.h: 398: BYTE b15:1;
[; ;GenericTypeDefs.h: 399: } bits;
[; ;GenericTypeDefs.h: 400: } WORD_VAL, WORD_BITS;
[; ;GenericTypeDefs.h: 402: typedef union
[; ;GenericTypeDefs.h: 403: {
[; ;GenericTypeDefs.h: 404: DWORD Val;
[; ;GenericTypeDefs.h: 405: WORD w[2] ;
[; ;GenericTypeDefs.h: 406: BYTE v[4] ;
[; ;GenericTypeDefs.h: 407: struct
[; ;GenericTypeDefs.h: 408: {
[; ;GenericTypeDefs.h: 409: WORD LW;
[; ;GenericTypeDefs.h: 410: WORD HW;
[; ;GenericTypeDefs.h: 411: } word;
[; ;GenericTypeDefs.h: 412: struct
[; ;GenericTypeDefs.h: 413: {
[; ;GenericTypeDefs.h: 414: BYTE LB;
[; ;GenericTypeDefs.h: 415: BYTE HB;
[; ;GenericTypeDefs.h: 416: BYTE UB;
[; ;GenericTypeDefs.h: 417: BYTE MB;
[; ;GenericTypeDefs.h: 418: } byte;
[; ;GenericTypeDefs.h: 419: struct
[; ;GenericTypeDefs.h: 420: {
[; ;GenericTypeDefs.h: 421: WORD_VAL low;
[; ;GenericTypeDefs.h: 422: WORD_VAL high;
[; ;GenericTypeDefs.h: 423: }wordUnion;
[; ;GenericTypeDefs.h: 424: struct
[; ;GenericTypeDefs.h: 425: {
[; ;GenericTypeDefs.h: 426: BYTE b0:1;
[; ;GenericTypeDefs.h: 427: BYTE b1:1;
[; ;GenericTypeDefs.h: 428: BYTE b2:1;
[; ;GenericTypeDefs.h: 429: BYTE b3:1;
[; ;GenericTypeDefs.h: 430: BYTE b4:1;
[; ;GenericTypeDefs.h: 431: BYTE b5:1;
[; ;GenericTypeDefs.h: 432: BYTE b6:1;
[; ;GenericTypeDefs.h: 433: BYTE b7:1;
[; ;GenericTypeDefs.h: 434: BYTE b8:1;
[; ;GenericTypeDefs.h: 435: BYTE b9:1;
[; ;GenericTypeDefs.h: 436: BYTE b10:1;
[; ;GenericTypeDefs.h: 437: BYTE b11:1;
[; ;GenericTypeDefs.h: 438: BYTE b12:1;
[; ;GenericTypeDefs.h: 439: BYTE b13:1;
[; ;GenericTypeDefs.h: 440: BYTE b14:1;
[; ;GenericTypeDefs.h: 441: BYTE b15:1;
[; ;GenericTypeDefs.h: 442: BYTE b16:1;
[; ;GenericTypeDefs.h: 443: BYTE b17:1;
[; ;GenericTypeDefs.h: 444: BYTE b18:1;
[; ;GenericTypeDefs.h: 445: BYTE b19:1;
[; ;GenericTypeDefs.h: 446: BYTE b20:1;
[; ;GenericTypeDefs.h: 447: BYTE b21:1;
[; ;GenericTypeDefs.h: 448: BYTE b22:1;
[; ;GenericTypeDefs.h: 449: BYTE b23:1;
[; ;GenericTypeDefs.h: 450: BYTE b24:1;
[; ;GenericTypeDefs.h: 451: BYTE b25:1;
[; ;GenericTypeDefs.h: 452: BYTE b26:1;
[; ;GenericTypeDefs.h: 453: BYTE b27:1;
[; ;GenericTypeDefs.h: 454: BYTE b28:1;
[; ;GenericTypeDefs.h: 455: BYTE b29:1;
[; ;GenericTypeDefs.h: 456: BYTE b30:1;
[; ;GenericTypeDefs.h: 457: BYTE b31:1;
[; ;GenericTypeDefs.h: 458: } bits;
[; ;GenericTypeDefs.h: 459: } DWORD_VAL;
[; ;GenericTypeDefs.h: 462: typedef union
[; ;GenericTypeDefs.h: 463: {
[; ;GenericTypeDefs.h: 464: QWORD Val;
[; ;GenericTypeDefs.h: 465: DWORD d[2] ;
[; ;GenericTypeDefs.h: 466: WORD w[4] ;
[; ;GenericTypeDefs.h: 467: BYTE v[8] ;
[; ;GenericTypeDefs.h: 468: struct
[; ;GenericTypeDefs.h: 469: {
[; ;GenericTypeDefs.h: 470: DWORD LD;
[; ;GenericTypeDefs.h: 471: DWORD HD;
[; ;GenericTypeDefs.h: 472: } dword;
[; ;GenericTypeDefs.h: 473: struct
[; ;GenericTypeDefs.h: 474: {
[; ;GenericTypeDefs.h: 475: WORD LW;
[; ;GenericTypeDefs.h: 476: WORD HW;
[; ;GenericTypeDefs.h: 477: WORD UW;
[; ;GenericTypeDefs.h: 478: WORD MW;
[; ;GenericTypeDefs.h: 479: } word;
[; ;GenericTypeDefs.h: 480: struct
[; ;GenericTypeDefs.h: 481: {
[; ;GenericTypeDefs.h: 482: BYTE b0:1;
[; ;GenericTypeDefs.h: 483: BYTE b1:1;
[; ;GenericTypeDefs.h: 484: BYTE b2:1;
[; ;GenericTypeDefs.h: 485: BYTE b3:1;
[; ;GenericTypeDefs.h: 486: BYTE b4:1;
[; ;GenericTypeDefs.h: 487: BYTE b5:1;
[; ;GenericTypeDefs.h: 488: BYTE b6:1;
[; ;GenericTypeDefs.h: 489: BYTE b7:1;
[; ;GenericTypeDefs.h: 490: BYTE b8:1;
[; ;GenericTypeDefs.h: 491: BYTE b9:1;
[; ;GenericTypeDefs.h: 492: BYTE b10:1;
[; ;GenericTypeDefs.h: 493: BYTE b11:1;
[; ;GenericTypeDefs.h: 494: BYTE b12:1;
[; ;GenericTypeDefs.h: 495: BYTE b13:1;
[; ;GenericTypeDefs.h: 496: BYTE b14:1;
[; ;GenericTypeDefs.h: 497: BYTE b15:1;
[; ;GenericTypeDefs.h: 498: BYTE b16:1;
[; ;GenericTypeDefs.h: 499: BYTE b17:1;
[; ;GenericTypeDefs.h: 500: BYTE b18:1;
[; ;GenericTypeDefs.h: 501: BYTE b19:1;
[; ;GenericTypeDefs.h: 502: BYTE b20:1;
[; ;GenericTypeDefs.h: 503: BYTE b21:1;
[; ;GenericTypeDefs.h: 504: BYTE b22:1;
[; ;GenericTypeDefs.h: 505: BYTE b23:1;
[; ;GenericTypeDefs.h: 506: BYTE b24:1;
[; ;GenericTypeDefs.h: 507: BYTE b25:1;
[; ;GenericTypeDefs.h: 508: BYTE b26:1;
[; ;GenericTypeDefs.h: 509: BYTE b27:1;
[; ;GenericTypeDefs.h: 510: BYTE b28:1;
[; ;GenericTypeDefs.h: 511: BYTE b29:1;
[; ;GenericTypeDefs.h: 512: BYTE b30:1;
[; ;GenericTypeDefs.h: 513: BYTE b31:1;
[; ;GenericTypeDefs.h: 514: BYTE b32:1;
[; ;GenericTypeDefs.h: 515: BYTE b33:1;
[; ;GenericTypeDefs.h: 516: BYTE b34:1;
[; ;GenericTypeDefs.h: 517: BYTE b35:1;
[; ;GenericTypeDefs.h: 518: BYTE b36:1;
[; ;GenericTypeDefs.h: 519: BYTE b37:1;
[; ;GenericTypeDefs.h: 520: BYTE b38:1;
[; ;GenericTypeDefs.h: 521: BYTE b39:1;
[; ;GenericTypeDefs.h: 522: BYTE b40:1;
[; ;GenericTypeDefs.h: 523: BYTE b41:1;
[; ;GenericTypeDefs.h: 524: BYTE b42:1;
[; ;GenericTypeDefs.h: 525: BYTE b43:1;
[; ;GenericTypeDefs.h: 526: BYTE b44:1;
[; ;GenericTypeDefs.h: 527: BYTE b45:1;
[; ;GenericTypeDefs.h: 528: BYTE b46:1;
[; ;GenericTypeDefs.h: 529: BYTE b47:1;
[; ;GenericTypeDefs.h: 530: BYTE b48:1;
[; ;GenericTypeDefs.h: 531: BYTE b49:1;
[; ;GenericTypeDefs.h: 532: BYTE b50:1;
[; ;GenericTypeDefs.h: 533: BYTE b51:1;
[; ;GenericTypeDefs.h: 534: BYTE b52:1;
[; ;GenericTypeDefs.h: 535: BYTE b53:1;
[; ;GenericTypeDefs.h: 536: BYTE b54:1;
[; ;GenericTypeDefs.h: 537: BYTE b55:1;
[; ;GenericTypeDefs.h: 538: BYTE b56:1;
[; ;GenericTypeDefs.h: 539: BYTE b57:1;
[; ;GenericTypeDefs.h: 540: BYTE b58:1;
[; ;GenericTypeDefs.h: 541: BYTE b59:1;
[; ;GenericTypeDefs.h: 542: BYTE b60:1;
[; ;GenericTypeDefs.h: 543: BYTE b61:1;
[; ;GenericTypeDefs.h: 544: BYTE b62:1;
[; ;GenericTypeDefs.h: 545: BYTE b63:1;
[; ;GenericTypeDefs.h: 546: } bits;
[; ;GenericTypeDefs.h: 547: } QWORD_VAL;
[; ;flash.h: 113: extern void ReadFlash(unsigned long startaddr, unsigned int num_bytes, unsigned char *flash_array);
[; ;flash.h: 120: extern void EraseFlash(unsigned long startaddr, unsigned long endaddr);
[; ;flash.h: 122: extern void WriteBlockFlash(unsigned long startaddr, unsigned char num_blocks, unsigned char *flash_array);
[; ;flash.h: 124: extern void WriteBytesFlash(unsigned long startaddr, unsigned int num_bytes, unsigned char *flash_array);
[; ;flash.h: 127: extern void WriteWordFlash(unsigned long startaddr, unsigned int data);
[; ;i2c.h: 244: void OpenI2C1( unsigned char sync_mode, unsigned char slew );
[; ;i2c.h: 264: unsigned char ReadI2C1( void );
[; ;i2c.h: 279: signed char WriteI2C1( unsigned char data_out );
[; ;i2c.h: 294: signed char getsI2C1( unsigned char *rdptr, unsigned char length );
[; ;i2c.h: 297: signed char putsI2C1( unsigned char *wrptr );
[; ;i2c.h: 305: signed char EEAckPolling1( unsigned char control );
[; ;i2c.h: 308: signed char EEByteWrite1( unsigned char control,
[; ;i2c.h: 309: unsigned char address,
[; ;i2c.h: 310: unsigned char data );
[; ;i2c.h: 313: signed int EECurrentAddRead1( unsigned char control );
[; ;i2c.h: 316: signed char EEPageWrite1( unsigned char control,
[; ;i2c.h: 317: unsigned char address,
[; ;i2c.h: 318: unsigned char *wrptr );
[; ;i2c.h: 321: signed int EERandomRead1( unsigned char control, unsigned char address );
[; ;i2c.h: 324: signed char EESequentialRead1( unsigned char control,
[; ;i2c.h: 325: unsigned char address,
[; ;i2c.h: 326: unsigned char *rdptr,
[; ;i2c.h: 327: unsigned char length );
[; ;mwire.h: 200: void OpenMwire1( unsigned char sync_mode );
[; ;mwire.h: 203: unsigned char ReadMwire1( unsigned char high_byte,
[; ;mwire.h: 204: unsigned char low_byte );
[; ;mwire.h: 219: signed char WriteMwire1( unsigned char data_out );
[; ;mwire.h: 234: void getsMwire1( unsigned char *rdptr, unsigned char length );
[; ;portb.h: 126: void OpenPORTB( unsigned char config);
[; ;portb.h: 176: void OpenRB0INT( unsigned char config);
[; ;portb.h: 194: void OpenRB1INT( unsigned char config);
[; ;portb.h: 211: void OpenRB2INT( unsigned char config);
[; ;portb.h: 230: void OpenRB3INT( unsigned char config);
[; ;pwm.h: 85: union PWMDC
[; ;pwm.h: 86: {
[; ;pwm.h: 87: unsigned int lpwm;
[; ;pwm.h: 88: char bpwm[2];
[; ;pwm.h: 89: };
[; ;pwm.h: 467: void OpenPWM1 ( char period);
[; ;pwm.h: 468: void SetDCPWM1 ( unsigned int duty_cycle);
[; ;pwm.h: 477: void ClosePWM1 (void);
[; ;pwm.h: 538: void OpenPWM4 ( unsigned char period, unsigned char timer_source );
[; ;pwm.h: 539: void SetDCPWM4 ( unsigned int duty_cycle);
[; ;pwm.h: 540: void ClosePWM4 (void);
[; ;pwm.h: 542: void OpenPWM5 ( unsigned char period, unsigned char timer_source );
[; ;pwm.h: 543: void SetDCPWM5 ( unsigned int duty_cycle);
[; ;pwm.h: 544: void ClosePWM5 (void);
[; ;pwm.h: 547: void OpenPWM6 ( unsigned char period, unsigned char timer_source );
[; ;pwm.h: 548: void SetDCPWM6 ( unsigned int duty_cycle);
[; ;pwm.h: 549: void ClosePWM6 (void);
[; ;pwm.h: 551: void OpenPWM7 ( unsigned char period, unsigned char timer_source );
[; ;pwm.h: 552: void SetDCPWM7 ( unsigned int duty_cycle);
[; ;pwm.h: 553: void ClosePWM7 (void);
[; ;pwm.h: 555: void OpenPWM8 ( unsigned char period, unsigned char timer_source );
[; ;pwm.h: 556: void SetDCPWM8 ( unsigned int duty_cycle);
[; ;pwm.h: 557: void ClosePWM8 (void);
[; ;pwm.h: 586: void OpenEPWM1( unsigned char period, unsigned char timer_source );
[; ;pwm.h: 587: void SetDCEPWM1 ( unsigned int duty_cycle);
[; ;pwm.h: 588: void SetOutputEPWM1 ( unsigned char output_config,
[; ;pwm.h: 589: unsigned char pwm_mode);
[; ;pwm.h: 590: void CloseEPWM1 (void);
[; ;pwm.h: 594: void OpenEPWM2( unsigned char period, unsigned char timer_source );
[; ;pwm.h: 595: void SetDCEPWM2 ( unsigned int duty_cycle);
[; ;pwm.h: 596: void SetOutputEPWM2 ( unsigned char output_config,
[; ;pwm.h: 597: unsigned char pwm_mode);
[; ;pwm.h: 598: void CloseEPWM2 (void);
[; ;pwm.h: 601: void OpenEPWM3( unsigned char period, unsigned char timer_source );
[; ;pwm.h: 602: void SetDCEPWM3 ( unsigned int duty_cycle);
[; ;pwm.h: 603: void SetOutputEPWM3 ( unsigned char output_config,
[; ;pwm.h: 604: unsigned char pwm_mode);
[; ;pwm.h: 605: void CloseEPWM3 (void);
[; ;reset.h: 16: char isMCLR(void);
[; ;reset.h: 17: void StatusReset(void);
[; ;reset.h: 18: char isPOR(void);
[; ;reset.h: 19: char isWU(void);
[; ;reset.h: 22: char isBOR(void);
[; ;reset.h: 26: char isWDTTO(void);
[; ;reset.h: 27: char isWDTWU(void);
[; ;reset.h: 31: char isLVD(void);
[; ;rtcc.h: 43: typedef union _WORD_VAL
[; ;rtcc.h: 44: {
[; ;rtcc.h: 45: unsigned int Val;
[; ;rtcc.h: 46: unsigned char v[2];
[; ;rtcc.h: 47: struct
[; ;rtcc.h: 48: {
[; ;rtcc.h: 49: unsigned char LB;
[; ;rtcc.h: 50: unsigned char HB;
[; ;rtcc.h: 51: } byte;
[; ;rtcc.h: 52: struct
[; ;rtcc.h: 53: {
[; ;rtcc.h: 54: unsigned char b0:1;
[; ;rtcc.h: 55: unsigned char b1:1;
[; ;rtcc.h: 56: unsigned char b2:1;
[; ;rtcc.h: 57: unsigned char b3:1;
[; ;rtcc.h: 58: unsigned char b4:1;
[; ;rtcc.h: 59: unsigned char b5:1;
[; ;rtcc.h: 60: unsigned char b6:1;
[; ;rtcc.h: 61: unsigned char b7:1;
[; ;rtcc.h: 62: unsigned char b8:1;
[; ;rtcc.h: 63: unsigned char b9:1;
[; ;rtcc.h: 64: unsigned char b10:1;
[; ;rtcc.h: 65: unsigned char b11:1;
[; ;rtcc.h: 66: unsigned char b12:1;
[; ;rtcc.h: 67: unsigned char b13:1;
[; ;rtcc.h: 68: unsigned char b14:1;
[; ;rtcc.h: 69: unsigned char b15:1;
[; ;rtcc.h: 70: } bits;
[; ;rtcc.h: 71: } WORD_VAL, WORD_BITS;
[; ;rtcc.h: 75: typedef enum
[; ;rtcc.h: 76: {
[; ;rtcc.h: 77: RTCCFG_MASK_RTCEN = 0x80,
[; ;rtcc.h: 78: RTCCFG_MASK_FRZ = 0x40,
[; ;rtcc.h: 79: RTCCFG_MASK_RTCWREN = 0x20,
[; ;rtcc.h: 80: RTCCFG_MASK_RTCSYNC = 0x10,
[; ;rtcc.h: 81: RTCCFG_MASK_HALFSEC = 0x08,
[; ;rtcc.h: 82: RTCCFG_MASK_RTCOE = 0x04,
[; ;rtcc.h: 83: RTCCFG_MASK_RTCPTR = 0x03
[; ;rtcc.h: 84: }RTCCFG_MASK;
[; ;rtcc.h: 89: typedef enum
[; ;rtcc.h: 90: {
[; ;rtcc.h: 91: ALRMCFG_MASK_ALRMEN = 0x80,
[; ;rtcc.h: 92: ALRMCFG_MASK_CHIME = 0x40,
[; ;rtcc.h: 93: ALRMCFG_MASK_AMASK = 0x3c,
[; ;rtcc.h: 94: ALRMCFG_MASK_ALRMPTR = 0x03
[; ;rtcc.h: 95: }ALRMCFG_MASK;
[; ;rtcc.h: 100: typedef enum
[; ;rtcc.h: 101: {
[; ;rtcc.h: 102: RTCCPTR_MASK_SECMIN = 0x00,
[; ;rtcc.h: 103: RTCCPTR_MASK_HRSWEEK = 0x01,
[; ;rtcc.h: 104: RTCCPTR_MASK_DAYMON = 0x02,
[; ;rtcc.h: 105: RTCCPTR_MASK_YEAR = 0x03
[; ;rtcc.h: 106: }RTCCPTR_MASK;
[; ;rtcc.h: 110: typedef union
[; ;rtcc.h: 111: {
[; ;rtcc.h: 112: struct
[; ;rtcc.h: 113: {
[; ;rtcc.h: 114: unsigned char rsvd;
[; ;rtcc.h: 115: unsigned char sec;
[; ;rtcc.h: 116: unsigned char min;
[; ;rtcc.h: 117: unsigned char hour;
[; ;rtcc.h: 118: }f;
[; ;rtcc.h: 119: unsigned char b[4];
[; ;rtcc.h: 120: unsigned int w[2];
[; ;rtcc.h: 121: unsigned long l;
[; ;rtcc.h: 122: }rtccTime;
[; ;rtcc.h: 125: typedef union
[; ;rtcc.h: 126: {
[; ;rtcc.h: 127: struct
[; ;rtcc.h: 128: {
[; ;rtcc.h: 129: unsigned char wday;
[; ;rtcc.h: 130: unsigned char mday;
[; ;rtcc.h: 131: unsigned char mon;
[; ;rtcc.h: 132: unsigned char year;
[; ;rtcc.h: 133: }f;
[; ;rtcc.h: 134: unsigned char b[4];
[; ;rtcc.h: 135: unsigned int w[2];
[; ;rtcc.h: 136: unsigned long l;
[; ;rtcc.h: 137: }rtccDate;
[; ;rtcc.h: 141: typedef union
[; ;rtcc.h: 142: {
[; ;rtcc.h: 143: struct
[; ;rtcc.h: 144: {
[; ;rtcc.h: 145: unsigned char year;
[; ;rtcc.h: 146: unsigned char rsvd;
[; ;rtcc.h: 147: unsigned char mday;
[; ;rtcc.h: 148: unsigned char mon;
[; ;rtcc.h: 149: unsigned char hour;
[; ;rtcc.h: 150: unsigned char wday;
[; ;rtcc.h: 151: unsigned char sec;
[; ;rtcc.h: 152: unsigned char min;
[; ;rtcc.h: 153: }f;
[; ;rtcc.h: 154: unsigned char b[8];
[; ;rtcc.h: 155: unsigned int w[4];
[; ;rtcc.h: 156: unsigned long l[2];
[; ;rtcc.h: 157: }rtccTimeDate;
[; ;rtcc.h: 162: typedef enum
[; ;rtcc.h: 163: {
[; ;rtcc.h: 164: RTCC_RPT_HALF_SEC,
[; ;rtcc.h: 165: RTCC_RPT_SEC,
[; ;rtcc.h: 166: RTCC_RPT_TEN_SEC,
[; ;rtcc.h: 167: RTCC_RPT_MIN,
[; ;rtcc.h: 168: RTCC_RPT_TEN_MIN,
[; ;rtcc.h: 169: RTCC_RPT_HOUR,
[; ;rtcc.h: 170: RTCC_RPT_DAY,
[; ;rtcc.h: 171: RTCC_RPT_WEEK,
[; ;rtcc.h: 172: RTCC_RPT_MON,
[; ;rtcc.h: 173: RTCC_RPT_YEAR
[; ;rtcc.h: 174: }rtccRepeat;
[; ;rtcc.h: 646: extern void RtccInitClock(void) ;
[; ;rtcc.h: 648: extern void RtccReadAlrmDate(rtccDate* pDt) ;
[; ;rtcc.h: 650: extern void RtccReadAlrmTime(rtccTime* pTm);
[; ;rtcc.h: 652: extern void RtccReadAlrmTimeDate(rtccTimeDate* pTD) ;
[; ;rtcc.h: 654: extern void RtccReadDate(rtccDate* pDt) ;
[; ;rtcc.h: 656: extern void RtccReadTime(rtccTime* pTm) ;
[; ;rtcc.h: 658: extern void RtccReadTimeDate(rtccTimeDate* pTD) ;
[; ;rtcc.h: 660: extern void RtccSetAlarmRpt(rtccRepeat rpt, BOOL dsblAlrm) ;
[; ;rtcc.h: 662: extern void RtccSetAlarmRptCount(unsigned char rptCnt, BOOL dsblAlrm) ;
[; ;rtcc.h: 664: extern void RtccSetCalibration(int drift) ;
[; ;rtcc.h: 666: extern void RtccSetChimeEnable(BOOL enable, BOOL dsblAlrm) ;
[; ;rtcc.h: 668: extern BOOL RtccWriteAlrmDate(const rtccDate* pDt) ;
[; ;rtcc.h: 670: extern BOOL RtccWriteAlrmTime(const rtccTime* pTm) ;
[; ;rtcc.h: 672: extern BOOL RtccWriteAlrmTimeDate(const rtccTimeDate* pTD) ;
[; ;rtcc.h: 674: extern BOOL RtccWriteDate(const rtccDate* pDt , BOOL di);
[; ;rtcc.h: 676: extern BOOL RtccWriteTime(const rtccTime* pTm , BOOL di) ;
[; ;rtcc.h: 678: extern BOOL RtccWriteTimeDate(const rtccTimeDate* pTD , BOOL di) ;
[; ;rtcc.h: 680: extern void RtccWrOn(void);
[; ;rtcc.h: 687: void Open_RTCC(void);
[; ;rtcc.h: 688: void Close_RTCC(void);
[; ;rtcc.h: 689: unsigned char update_RTCC(void);
[; ;sw_i2c.h: 97: void SWStopI2C ( void );
[; ;sw_i2c.h: 98: void SWStartI2C ( void );
[; ;sw_i2c.h: 99: void SWRestartI2C ( void );
[; ;sw_i2c.h: 100: void SWStopI2C ( void );
[; ;sw_i2c.h: 102: signed char SWAckI2C( void );
[; ;sw_i2c.h: 103: signed char Clock_test( void );
[; ;sw_i2c.h: 104: signed int SWReadI2C( void );
[; ;sw_i2c.h: 105: signed char SWWriteI2C( unsigned char data_out );
[; ;sw_i2c.h: 106: signed char SWGetsI2C( unsigned char *rdptr, unsigned char length );
[; ;sw_i2c.h: 107: signed char SWPutsI2C( unsigned char *wrptr );
[; ;sw_spi.h: 84: void OpenSWSPI(void);
[; ;sw_spi.h: 87: char WriteSWSPI( char output);
[; ;sw_spi.h: 90: void SetCSSWSPI(void);
[; ;sw_spi.h: 93: void ClearCSSWSPI(void);
[; ;sw_uart.h: 47: void OpenUART(void);
[; ;sw_uart.h: 49: unsigned char ReadUART(void);
[; ;sw_uart.h: 51: void WriteUART( unsigned char);
[; ;sw_uart.h: 53: void getsUART( char *, unsigned char);
[; ;sw_uart.h: 55: void putsUART( char *);
[; ;sw_uart.h: 79: extern void DelayRXBitUART (void);
[; ;sw_uart.h: 80: extern void DelayRXHalfBitUART(void);
[; ;sw_uart.h: 81: extern void DelayTXBitUART (void);
[; ;timers.h: 36: union Timers
[; ;timers.h: 37: {
[; ;timers.h: 38: unsigned int lt;
[; ;timers.h: 39: char bt[2];
[; ;timers.h: 40: };
[; ;timers.h: 118: void OpenTimer0 ( unsigned char config);
[; ;timers.h: 119: void CloseTimer0 (void);
[; ;timers.h: 120: unsigned int ReadTimer0 (void);
[; ;timers.h: 121: void WriteTimer0 ( unsigned int timer0);
[; ;timers.h: 185: void OpenTimer1 ( unsigned char config, unsigned char config1);
[; ;timers.h: 186: void CloseTimer1 (void);
[; ;timers.h: 187: unsigned int ReadTimer1 (void);
[; ;timers.h: 188: void WriteTimer1 ( unsigned int timer1);
[; ;timers.h: 325: void OpenTimer2 ( unsigned char config);
[; ;timers.h: 326: void CloseTimer2 (void);
[; ;timers.h: 452: void OpenTimer3 ( unsigned char config, unsigned char config1);
[; ;timers.h: 453: void CloseTimer3 (void);
[; ;timers.h: 454: unsigned int ReadTimer3 (void);
[; ;timers.h: 455: void WriteTimer3 ( unsigned int timer3);
[; ;timers.h: 541: void OpenTimer4 ( unsigned char config);
[; ;timers.h: 542: void CloseTimer4 (void);
[; ;timers.h: 657: void OpenTimer5 ( unsigned char config, unsigned char config1);
[; ;timers.h: 658: void CloseTimer5 (void);
[; ;timers.h: 659: unsigned int ReadTimer5 (void);
[; ;timers.h: 660: void WriteTimer5 ( unsigned int Timer5);
[; ;timers.h: 746: void OpenTimer6 ( unsigned char config);
[; ;timers.h: 747: void CloseTimer6 (void);
[; ;timers.h: 892: void OpenTimer8 ( unsigned char config);
[; ;timers.h: 893: void CloseTimer8 (void);
[; ;usart.h: 200: union USART1
[; ;usart.h: 201: {
[; ;usart.h: 202: unsigned char val;
[; ;usart.h: 203: struct
[; ;usart.h: 204: {
[; ;usart.h: 205: unsigned RX_NINE:1;
[; ;usart.h: 206: unsigned TX_NINE:1;
[; ;usart.h: 207: unsigned FRAME_ERROR:1;
[; ;usart.h: 208: unsigned OVERRUN_ERROR:1;
[; ;usart.h: 209: unsigned fill:4;
[; ;usart.h: 210: };
[; ;usart.h: 211: };
[; ;usart.h: 212: extern union USART1 USART1_Status;
[; ;usart.h: 214: void Open1USART ( unsigned char config, unsigned int spbrg);
[; ;usart.h: 244: char Read1USART (void);
[; ;usart.h: 245: void Write1USART ( char data);
[; ;usart.h: 246: void gets1USART ( char *buffer, unsigned char len);
[; ;usart.h: 247: void puts1USART ( char *data);
[; ;usart.h: 248: void putrs1USART ( const char *data);
[; ;usart.h: 305: union USART2
[; ;usart.h: 306: {
[; ;usart.h: 307: unsigned char val;
[; ;usart.h: 308: struct
[; ;usart.h: 309: {
[; ;usart.h: 310: unsigned RX_NINE:1;
[; ;usart.h: 311: unsigned TX_NINE:1;
[; ;usart.h: 312: unsigned FRAME_ERROR:1;
[; ;usart.h: 313: unsigned OVERRUN_ERROR:1;
[; ;usart.h: 314: unsigned fill:4;
[; ;usart.h: 315: };
[; ;usart.h: 316: };
[; ;usart.h: 317: extern union USART2 USART2_Status;
[; ;usart.h: 318: void Open2USART ( unsigned char config, unsigned int spbrg);
[; ;usart.h: 333: char Read2USART (void);
[; ;usart.h: 334: void Write2USART ( char data);
[; ;usart.h: 335: void gets2USART ( char *buffer, unsigned char len);
[; ;usart.h: 336: void puts2USART ( char *data);
[; ;usart.h: 337: void putrs2USART ( const char *data);
[; ;usart.h: 660: void baud1USART ( unsigned char baudconfig);
[; ;usart.h: 665: void baud2USART ( unsigned char baudconfig);
[; ;xlcd.h: 87: void OpenXLCD( unsigned char);
[; ;xlcd.h: 92: void SetCGRamAddr( unsigned char);
[; ;xlcd.h: 97: void SetDDRamAddr( unsigned char);
[; ;xlcd.h: 102: unsigned char BusyXLCD(void);
[; ;xlcd.h: 107: unsigned char ReadAddrXLCD(void);
[; ;xlcd.h: 112: char ReadDataXLCD(void);
[; ;xlcd.h: 117: void WriteCmdXLCD( unsigned char);
[; ;xlcd.h: 122: void WriteDataXLCD( char);
[; ;xlcd.h: 132: void putsXLCD( char *);
[; ;xlcd.h: 137: void putrsXLCD(const char *);
[; ;xlcd.h: 140: extern void DelayFor18TCY(void);
[; ;xlcd.h: 141: extern void DelayPORXLCD(void);
[; ;xlcd.h: 142: extern void DelayXLCD(void);
[; ;pic18.h: 18: __attribute__((__unsupported__("The flash_write routine is no longer supported. Please use the peripheral library functions: WriteBytesFlash, WriteBlockFlash or WriteWordFlash"))) void flash_write(const unsigned char *, unsigned int, __far unsigned c
[; ;pic18.h: 144: extern void _delay(unsigned long);
[; ;pic18.h: 146: extern void _delaywdt(unsigned long);
[; ;pic18.h: 148: extern void _delay3(unsigned char);
[; ;string.h: 22: extern void * memcpy(void *, const void *, size_t);
[; ;string.h: 23: extern void * memmove(void *, const void *, size_t);
[; ;string.h: 24: extern void * memset(void *, int, size_t);
[; ;string.h: 35: extern char * strcat(char *, const char *);
[; ;string.h: 36: extern char * strcpy(char *, const char *);
[; ;string.h: 37: extern char * strncat(char *, const char *, size_t);
[; ;string.h: 38: extern char * strncpy(char *, const char *, size_t);
[; ;string.h: 39: extern char * strdup(const char *);
[; ;string.h: 40: extern char * strtok(char *, const char *);
[; ;string.h: 43: extern int memcmp(const void *, const void *, size_t);
[; ;string.h: 44: extern int strcmp(const char *, const char *);
[; ;string.h: 45: extern int stricmp(const char *, const char *);
[; ;string.h: 46: extern int strncmp(const char *, const char *, size_t);
[; ;string.h: 47: extern int strnicmp(const char *, const char *, size_t);
[; ;string.h: 48: extern void * memchr(const void *, int, size_t);
[; ;string.h: 49: extern size_t strcspn(const char *, const char *);
[; ;string.h: 50: extern char * strpbrk(const char *, const char *);
[; ;string.h: 51: extern size_t strspn(const char *, const char *);
[; ;string.h: 52: extern char * strstr(const char *, const char *);
[; ;string.h: 53: extern char * stristr(const char *, const char *);
[; ;string.h: 54: extern char * strerror(int);
[; ;string.h: 55: extern size_t strlen(const char *);
[; ;string.h: 56: extern char * strchr(const char *, int);
[; ;string.h: 57: extern char * strichr(const char *, int);
[; ;string.h: 58: extern char * strrchr(const char *, int);
[; ;string.h: 59: extern char * strrichr(const char *, int);
[; ;stdarg.h: 7: typedef void * va_list[1];
[; ;stdarg.h: 10: extern void * __va_start(void);
[; ;stdarg.h: 13: extern void * __va_arg(void *, ...);
[; ;stdio.h: 23: extern int errno;
[; ;stdio.h: 54: struct __prbuf
[; ;stdio.h: 55: {
[; ;stdio.h: 56: char * ptr;
[; ;stdio.h: 57: void (* func)(char);
[; ;stdio.h: 58: };
[; ;conio.h: 17: extern int errno;
[; ;conio.h: 20: extern void init_uart(void);
[; ;conio.h: 22: extern char getch(void);
[; ;conio.h: 23: extern char getche(void);
[; ;conio.h: 24: extern void putch(char);
[; ;conio.h: 25: extern void ungetch(char);
[; ;conio.h: 27: extern __bit kbhit(void);
[; ;conio.h: 31: extern char * cgets(char *);
[; ;conio.h: 32: extern void cputs(const char *);
[; ;stdio.h: 99: extern int cprintf(char *, ...);
[; ;stdio.h: 104: extern int _doprnt(struct __prbuf *, const register char *, register va_list);
[; ;stdio.h: 194: extern char * gets(char *);
[; ;stdio.h: 195: extern int puts(const char *);
[; ;stdio.h: 196: extern int scanf(const char *, ...);
[; ;stdio.h: 197: extern int sscanf(const char *, const char *, ...);
[; ;stdio.h: 198: extern int vprintf(const char *, va_list);
[; ;stdio.h: 199: extern int vsprintf(char *, const char *, va_list) __attribute__((unsupported("vsprintf() is not supported by this compiler")));
[; ;stdio.h: 200: extern int vscanf(const char *, va_list ap);
[; ;stdio.h: 201: extern int vsscanf(const char *, const char *, va_list);
[; ;stdio.h: 205: extern int sprintf(char *, const char *, ...);
[; ;stdio.h: 206: extern int printf(const char *, ...);
[; ;uart.h: 11: typedef struct __UART_DATA {
[; ;uart.h: 12: unsigned char buffer_in[125];
[; ;uart.h: 13: unsigned char buffer_in_read_ind;
[; ;uart.h: 14: unsigned char buffer_in_write_ind;
[; ;uart.h: 15: unsigned char buffer_in_len;
[; ;uart.h: 16: unsigned char buffer_in_len_tmp;
[; ;uart.h: 18: unsigned char buffer_out[125];
[; ;uart.h: 19: unsigned char buffer_out_ind;
[; ;uart.h: 20: unsigned char buffer_out_len;
[; ;uart.h: 21: } UART_DATA;
[; ;uart.h: 23: void UART1_Init(void);
[; ;uart.h: 24: void UART1_Recv_Interrupt_Handler(void);
[; ;uart.h: 25: void UART1_Send_Interrupt_Handler(void);
[; ;uart.h: 26: void UART1_WriteS(const char *fmt, ...);
[; ;uart.h: 27: void UART1_WriteB(const char *msg, unsigned char length);
[; ;uart.h: 28: void UART1_WriteC(const unsigned char c);
[; ;uart.h: 29: unsigned char UART1_Buffer_Len(void);
[; ;uart.h: 30: unsigned char UART1_Read_Buffer(unsigned char *buffer);
"7 uart.c
[v _uart_1_data `S1074 ~T0 @X0 1 s ]
[; ;uart.c: 7: static UART_DATA uart_1_data;
"8
[v _uart_1_data_p `*S1074 ~T0 @X0 1 s ]
[i _uart_1_data_p
&U _uart_1_data
]
[; ;uart.c: 8: static UART_DATA *uart_1_data_p = &uart_1_data;
"10
[v _UART1_Init `(v ~T0 @X0 1 ef ]
{
[; ;uart.c: 10: void UART1_Init() {
[e :U _UART1_Init ]
[f ]
[; ;uart.c: 15: TRISCbits.TRISC6 = 0;
"15
[e = . . _TRISCbits 0 6 -> -> 0 `i `uc ]
[; ;uart.c: 16: TRISCbits.TRISC7 = 1;
"16
[e = . . _TRISCbits 0 7 -> -> 1 `i `uc ]
[; ;uart.c: 18: BAUDCON1bits.BRG16 = 0;
"18
[e = . . _BAUDCON1bits 0 3 -> -> 0 `i `uc ]
[; ;uart.c: 19: SPBRG1 = 25;
"19
[e = _SPBRG1 -> -> 25 `i `uc ]
[; ;uart.c: 20: TXSTA1bits.BRGH = 1;
"20
[e = . . _TXSTA1bits 0 2 -> -> 1 `i `uc ]
[; ;uart.c: 21: TXSTA1bits.SYNC = 0;
"21
[e = . . _TXSTA1bits 0 4 -> -> 0 `i `uc ]
[; ;uart.c: 22: RCSTA1bits.SPEN = 1;
"22
[e = . . _RCSTA1bits 0 7 -> -> 1 `i `uc ]
[; ;uart.c: 23: TXSTA1bits.TX9 = 0;
"23
[e = . . _TXSTA1bits 0 6 -> -> 0 `i `uc ]
[; ;uart.c: 24: RCSTA1bits.RX9 = 0;
"24
[e = . . _RCSTA1bits 0 6 -> -> 0 `i `uc ]
[; ;uart.c: 25: RCSTA1bits.CREN = 1;
"25
[e = . . _RCSTA1bits 0 4 -> -> 1 `i `uc ]
[; ;uart.c: 28: TXSTA1bits.TXEN = 1;
"28
[e = . . _TXSTA1bits 0 5 -> -> 1 `i `uc ]
[; ;uart.c: 29: PIE1bits.TX1IE = 0;
"29
[e = . . _PIE1bits 0 4 -> -> 0 `i `uc ]
[; ;uart.c: 35: PIE1bits.RC1IE = 1;
"35
[e = . . _PIE1bits 0 5 -> -> 1 `i `uc ]
[; ;uart.c: 38: uart_1_data_p->buffer_in_read_ind = 0;
"38
[e = . *U _uart_1_data_p 1 -> -> 0 `i `uc ]
[; ;uart.c: 39: uart_1_data_p->buffer_in_write_ind = 0;
"39
[e = . *U _uart_1_data_p 2 -> -> 0 `i `uc ]
[; ;uart.c: 40: uart_1_data_p->buffer_in_len = 0;
"40
[e = . *U _uart_1_data_p 3 -> -> 0 `i `uc ]
[; ;uart.c: 41: uart_1_data_p->buffer_in_len_tmp = 0;
"41
[e = . *U _uart_1_data_p 4 -> -> 0 `i `uc ]
[; ;uart.c: 42: }
"42
[e :UE 1075 ]
}
"44
[v _UART1_Recv_Interrupt_Handler `(v ~T0 @X0 1 ef ]
{
[; ;uart.c: 44: void UART1_Recv_Interrupt_Handler() {
[e :U _UART1_Recv_Interrupt_Handler ]
[f ]
"45
[v _c `uc ~T0 @X0 1 a ]
[; ;uart.c: 45: unsigned char c;
[; ;uart.c: 46: if (PIR1bits.RC1IF) {
"46
[e $ ! != -> . . _PIR1bits 0 5 `i -> -> -> 0 `i `Vuc `i 1077 ]
{
[; ;uart.c: 47: c = RCREG1;
"47
[e = _c _RCREG1 ]
[; ;uart.c: 50: uart_1_data_p->buffer_in[uart_1_data_p->buffer_in_write_ind] = c;
"50
[e = *U + &U . *U _uart_1_data_p 0 * -> . *U _uart_1_data_p 2 `ux -> -> # *U &U . *U _uart_1_data_p 0 `ui `ux _c ]
[; ;uart.c: 51: if (uart_1_data_p->buffer_in_write_ind == 125 - 1) {
"51
[e $ ! == -> . *U _uart_1_data_p 2 `i - -> 125 `i -> 1 `i 1078 ]
{
[; ;uart.c: 52: uart_1_data_p->buffer_in_write_ind = 0;
"52
[e = . *U _uart_1_data_p 2 -> -> 0 `i `uc ]
"53
}
[; ;uart.c: 53: } else {
[e $U 1079 ]
[e :U 1078 ]
{
[; ;uart.c: 54: uart_1_data_p->buffer_in_write_ind++;
"54
[e ++ . *U _uart_1_data_p 2 -> -> 1 `i `uc ]
"55
}
[e :U 1079 ]
[; ;uart.c: 55: }
[; ;uart.c: 58: if (uart_1_data_p->buffer_in_len_tmp < 125) {
"58
[e $ ! < -> . *U _uart_1_data_p 4 `i -> 125 `i 1080 ]
{
[; ;uart.c: 59: uart_1_data_p->buffer_in_len_tmp++;
"59
[e ++ . *U _uart_1_data_p 4 -> -> 1 `i `uc ]
"60
}
[; ;uart.c: 60: } else {
[e $U 1081 ]
[e :U 1080 ]
{
[; ;uart.c: 61: if (uart_1_data_p->buffer_in_read_ind == 125 - 1) {
"61
[e $ ! == -> . *U _uart_1_data_p 1 `i - -> 125 `i -> 1 `i 1082 ]
{
[; ;uart.c: 62: uart_1_data_p->buffer_in_read_ind = 0;
"62
[e = . *U _uart_1_data_p 1 -> -> 0 `i `uc ]
"63
}
[; ;uart.c: 63: } else {
[e $U 1083 ]
[e :U 1082 ]
{
[; ;uart.c: 64: uart_1_data_p->buffer_in_read_ind++;
"64
[e ++ . *U _uart_1_data_p 1 -> -> 1 `i `uc ]
"65
}
[e :U 1083 ]
"66
}
[e :U 1081 ]
[; ;uart.c: 65: }
[; ;uart.c: 66: }
[; ;uart.c: 69: if (c == 0x0D) {
"69
[e $ ! == -> _c `i -> 13 `i 1084 ]
{
[; ;uart.c: 70: uart_1_data_p->buffer_in_len = uart_1_data_p->buffer_in_len_tmp;
"70
[e = . *U _uart_1_data_p 3 . *U _uart_1_data_p 4 ]
[; ;uart.c: 71: uart_1_data_p->buffer_in_len_tmp = 0;
"71
[e = . *U _uart_1_data_p 4 -> -> 0 `i `uc ]
"72
}
[e :U 1084 ]
"77
}
[e :U 1077 ]
[; ;uart.c: 72: }
[; ;uart.c: 77: }
[; ;uart.c: 79: if (RCSTA1bits.OERR == 1) {
"79
[e $ ! == -> . . _RCSTA1bits 0 1 `i -> 1 `i 1085 ]
{
[; ;uart.c: 81: RCSTA1bits.CREN = 0;
"81
[e = . . _RCSTA1bits 0 4 -> -> 0 `i `uc ]
[; ;uart.c: 82: RCSTA1bits.CREN = 1;
"82
[e = . . _RCSTA1bits 0 4 -> -> 1 `i `uc ]
[; ;uart.c: 83: UART1_WriteS("UART1: (ERROR) overrun\r\n");
"83
[e ( _UART1_WriteS :s 1C ]
[; ;uart.c: 84: TXSTA1bits.TXEN = 0;
"84
[e = . . _TXSTA1bits 0 5 -> -> 0 `i `uc ]
"85
}
[e :U 1085 ]
[; ;uart.c: 85: }
[; ;uart.c: 86: }
"86
[e :UE 1076 ]
}
"88
[v _UART1_Send_Interrupt_Handler `(v ~T0 @X0 1 ef ]
{
[; ;uart.c: 88: void UART1_Send_Interrupt_Handler() {
[e :U _UART1_Send_Interrupt_Handler ]
[f ]
[; ;uart.c: 90: if (uart_1_data_p->buffer_out_ind != uart_1_data_p->buffer_out_len) {
"90
[e $ ! != -> . *U _uart_1_data_p 6 `i -> . *U _uart_1_data_p 7 `i 1087 ]
{
[; ;uart.c: 91: TXREG1 = uart_1_data_p->buffer_out[uart_1_data_p->buffer_out_ind];
"91
[e = _TXREG1 *U + &U . *U _uart_1_data_p 5 * -> . *U _uart_1_data_p 6 `ux -> -> # *U &U . *U _uart_1_data_p 5 `ui `ux ]
[; ;uart.c: 92: uart_1_data_p->buffer_out_ind++;
"92
[e ++ . *U _uart_1_data_p 6 -> -> 1 `i `uc ]
"93
}
[; ;uart.c: 93: } else {
[e $U 1088 ]
[e :U 1087 ]
{
[; ;uart.c: 94: while (!TXSTA1bits.TRMT);
"94
[e $U 1089 ]
[e :U 1090 ]
[e :U 1089 ]
[e $ ! != -> . . _TXSTA1bits 0 1 `i -> -> -> 0 `i `Vuc `i 1090 ]
[e :U 1091 ]
[; ;uart.c: 95: TXSTA1bits.TXEN = 0;
"95
[e = . . _TXSTA1bits 0 5 -> -> 0 `i `uc ]
[; ;uart.c: 96: uart_1_data_p->buffer_out_ind = 0;
"96
[e = . *U _uart_1_data_p 6 -> -> 0 `i `uc ]
[; ;uart.c: 97: uart_1_data_p->buffer_out_len = 0;
"97
[e = . *U _uart_1_data_p 7 -> -> 0 `i `uc ]
"98
}
[e :U 1088 ]
[; ;uart.c: 98: }
[; ;uart.c: 99: }
"99
[e :UE 1086 ]
}
"101
[v _UART1_WriteS `(v ~T0 @X0 1 ev`*Cuc ]
{
[; ;uart.c: 101: void UART1_WriteS(const char *fmt, ...) {
[e :U _UART1_WriteS ]
[v _fmt `*Cuc ~T0 @X0 1 r0 ]
[f ]
"103
[v _i `uc ~T0 @X0 1 a ]
"104
[v _args `*v ~T0 @X0 -> -> 1 `i `ux a ]
[; ;uart.c: 103: unsigned char i;
[; ;uart.c: 104: va_list args;
[; ;uart.c: 105: *args = __va_start();
"105
[e = *U &U _args ( ___va_start .. ]
[; ;uart.c: 107: vprintf(fmt, args);
"107
[e ( _vprintf (2 , _fmt &U _args ]
[; ;uart.c: 108: ;
[; ;uart.c: 109: uart_1_data_p->buffer_out_len = strlen((char *) uart_1_data_p->buffer_out);
"109
[e = . *U _uart_1_data_p 7 -> ( _strlen (1 -> &U . *U _uart_1_data_p 5 `*Cuc `uc ]
[; ;uart.c: 110: uart_1_data_p->buffer_out_ind = 1;
"110
[e = . *U _uart_1_data_p 6 -> -> 1 `i `uc ]
[; ;uart.c: 111: for (i = 0; i < uart_1_data_p->buffer_out_len; i++) {
"111
{
[e = _i -> -> 0 `i `uc ]
[e $U 1096 ]
[e :U 1093 ]
{
[; ;uart.c: 112: TXREG1 = uart_1_data_p->buffer_out[i];
"112
[e = _TXREG1 *U + &U . *U _uart_1_data_p 5 * -> _i `ux -> -> # *U &U . *U _uart_1_data_p 5 `ui `ux ]
[; ;uart.c: 113: asm(" nop");
"113
[; <" nop ;# ">
[; ;uart.c: 114: while (!PIR1bits.TX1IF);
"114
[e $U 1097 ]
[e :U 1098 ]
[e :U 1097 ]
[e $ ! != -> . . _PIR1bits 0 4 `i -> -> -> 0 `i `Vuc `i 1098 ]
[e :U 1099 ]
"115
}
"111
[e ++ _i -> -> 1 `i `uc ]
[e :U 1096 ]
[e $ < -> _i `i -> . *U _uart_1_data_p 7 `i 1093 ]
[e :U 1094 ]
"115
}
[; ;uart.c: 115: }
[; ;uart.c: 127: }
"127
[e :UE 1092 ]
}
"129
[v _UART1_WriteB `(v ~T0 @X0 1 ef2`*Cuc`uc ]
{
[; ;uart.c: 129: void UART1_WriteB(const char *msg, unsigned char length) {
[e :U _UART1_WriteB ]
[v _msg `*Cuc ~T0 @X0 1 r1 ]
[v _length `uc ~T0 @X0 1 r2 ]
[f ]
"130
[v _i `uc ~T0 @X0 1 a ]
[; ;uart.c: 130: unsigned char i;
[; ;uart.c: 132: for (i = 0; i < length; i++) {
"132
{
[e = _i -> -> 0 `i `uc ]
[e $U 1104 ]
[e :U 1101 ]
{
[; ;uart.c: 133: TXREG1 = msg[i];
"133
[e = _TXREG1 *U + _msg * -> _i `ux -> -> # *U _msg `ui `ux ]
[; ;uart.c: 134: asm(" nop");
"134
[; <" nop ;# ">
[; ;uart.c: 135: while (!PIR1bits.TX1IF);
"135
[e $U 1105 ]
[e :U 1106 ]
[e :U 1105 ]
[e $ ! != -> . . _PIR1bits 0 4 `i -> -> -> 0 `i `Vuc `i 1106 ]
[e :U 1107 ]
"136
}
"132
[e ++ _i -> -> 1 `i `uc ]
[e :U 1104 ]
[e $ < -> _i `i -> _length `i 1101 ]
[e :U 1102 ]
"136
}
[; ;uart.c: 136: }
[; ;uart.c: 147: }
"147
[e :UE 1100 ]
}
"149
[v _UART1_WriteC `(v ~T0 @X0 1 ef1`Cuc ]
{
[; ;uart.c: 149: void UART1_WriteC(const unsigned char c) {
[e :U _UART1_WriteC ]
[v _c `Cuc ~T0 @X0 1 r1 ]
[f ]
[; ;uart.c: 151: TXREG1 = c;
"151
[e = _TXREG1 _c ]
[; ;uart.c: 152: asm(" nop");
"152
[; <" nop ;# ">
[; ;uart.c: 153: while (!PIR1bits.TX1IF);
"153
[e $U 1109 ]
[e :U 1110 ]
[e :U 1109 ]
[e $ ! != -> . . _PIR1bits 0 4 `i -> -> -> 0 `i `Vuc `i 1110 ]
[e :U 1111 ]
[; ;uart.c: 162: }
"162
[e :UE 1108 ]
}
"164
[v _UART1_Buffer_Len `(uc ~T0 @X0 1 ef ]
{
[; ;uart.c: 164: unsigned char UART1_Buffer_Len() {
[e :U _UART1_Buffer_Len ]
[f ]
[; ;uart.c: 165: return uart_1_data_p->buffer_in_len;
"165
[e ) . *U _uart_1_data_p 3 ]
[e $UE 1112 ]
[; ;uart.c: 166: }
"166
[e :UE 1112 ]
}
"169
[v _UART1_Read_Buffer `(uc ~T0 @X0 1 ef1`*uc ]
{
[; ;uart.c: 169: unsigned char UART1_Read_Buffer(unsigned char *buffer) {
[e :U _UART1_Read_Buffer ]
[v _buffer `*uc ~T0 @X0 1 r1 ]
[f ]
"170
[v _i `uc ~T0 @X0 1 a ]
[; ;uart.c: 170: unsigned char i = 0;
[e = _i -> -> 0 `i `uc ]
[; ;uart.c: 171: while (uart_1_data_p->buffer_in_len != 0) {
"171
[e $U 1114 ]
[e :U 1115 ]
{
[; ;uart.c: 172: buffer[i] = uart_1_data_p->buffer_in[uart_1_data_p->buffer_in_read_ind];
"172
[e = *U + _buffer * -> _i `ux -> -> # *U _buffer `ui `ux *U + &U . *U _uart_1_data_p 0 * -> . *U _uart_1_data_p 1 `ux -> -> # *U &U . *U _uart_1_data_p 0 `ui `ux ]
[; ;uart.c: 173: i++;
"173
[e ++ _i -> -> 1 `i `uc ]
[; ;uart.c: 174: if (uart_1_data_p->buffer_in_read_ind == 125 - 1) {
"174
[e $ ! == -> . *U _uart_1_data_p 1 `i - -> 125 `i -> 1 `i 1117 ]
{
[; ;uart.c: 175: uart_1_data_p->buffer_in_read_ind = 0;
"175
[e = . *U _uart_1_data_p 1 -> -> 0 `i `uc ]
"176
}
[; ;uart.c: 176: } else {
[e $U 1118 ]
[e :U 1117 ]
{
[; ;uart.c: 177: uart_1_data_p->buffer_in_read_ind++;
"177
[e ++ . *U _uart_1_data_p 1 -> -> 1 `i `uc ]
"178
}
[e :U 1118 ]
[; ;uart.c: 178: }
[; ;uart.c: 179: uart_1_data_p->buffer_in_len--;
"179
[e -- . *U _uart_1_data_p 3 -> -> 1 `i `uc ]
"180
}
[e :U 1114 ]
"171
[e $ != -> . *U _uart_1_data_p 3 `i -> 0 `i 1115 ]
[e :U 1116 ]
[; ;uart.c: 180: }
[; ;uart.c: 181: return i;
"181
[e ) _i ]
[e $UE 1113 ]
[; ;uart.c: 182: }
"182
[e :UE 1113 ]
}
[p f _vprintf 8388608 ]
[a 1C 85 65 82 84 49 58 32 40 69 82 82 79 82 41 32 111 118 101 114 114 117 110 13 10 0 ]

/PIC Stuff/PICX_27J13/build/default/production/uart.p1.d
0,0 → 1,5
build/default/production/uart.d \
build/default/production/uart.p1: \
uart.c \
uart.h \
defines.h

/PIC Stuff/PICX_27J13/build/default/production/uart.pre
0,0 → 1,10485
# 1 "uart.c"
# 44 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
extern volatile unsigned char ADCTRIG @ 0xEB8;
asm("ADCTRIG equ 0EB8h");
typedef union {
struct {
unsigned TRIGSEL :2;
};
struct {
unsigned SRC0 :1;
unsigned SRC1 :1;
};
struct {
unsigned TRIGSEL0 :1;
unsigned TRIGSEL1 :1;
};
struct {
unsigned SRC :2;
};
} ADCTRIGbits_t;
extern volatile ADCTRIGbits_t ADCTRIGbits @ 0xEB8;
# 99
extern volatile unsigned char PMDIS0 @ 0xEB9;
asm("PMDIS0 equ 0EB9h");
extern volatile unsigned char PD0 @ 0xEB9;
asm("PD0 equ 0EB9h");
typedef union {
struct {
unsigned ADCMD :1;
unsigned SPI1MD :1;
unsigned SPI2MD :1;
unsigned UART1MD :1;
unsigned UART2MD :1;
unsigned ECCP1MD :1;
unsigned ECCP2MD :1;
unsigned ECCP3MD :1;
};
struct {
unsigned :1;
unsigned PMDMSSP1 :1;
unsigned PMDMSSP2 :1;
unsigned PMDUART1 :1;
unsigned PMDUART2 :1;
unsigned PMDECCP1 :1;
unsigned PMDECCP2 :1;
unsigned PMDECCP3 :1;
};
struct {
unsigned PMDADC :1;
unsigned PMDMSSP :2;
unsigned PMDUART :2;
unsigned PMDECCP :3;
};
struct {
unsigned :1;
unsigned SPIMD :2;
unsigned UARTMD :2;
unsigned ECCPMD :3;
};
} PMDIS0bits_t;
extern volatile PMDIS0bits_t PMDIS0bits @ 0xEB9;
# 256
typedef union {
struct {
unsigned ADCMD :1;
unsigned SPI1MD :1;
unsigned SPI2MD :1;
unsigned UART1MD :1;
unsigned UART2MD :1;
unsigned ECCP1MD :1;
unsigned ECCP2MD :1;
unsigned ECCP3MD :1;
};
struct {
unsigned :1;
unsigned PMDMSSP1 :1;
unsigned PMDMSSP2 :1;
unsigned PMDUART1 :1;
unsigned PMDUART2 :1;
unsigned PMDECCP1 :1;
unsigned PMDECCP2 :1;
unsigned PMDECCP3 :1;
};
struct {
unsigned PMDADC :1;
unsigned PMDMSSP :2;
unsigned PMDUART :2;
unsigned PMDECCP :3;
};
struct {
unsigned :1;
unsigned SPIMD :2;
unsigned UARTMD :2;
unsigned ECCPMD :3;
};
} PD0bits_t;
extern volatile PD0bits_t PD0bits @ 0xEB9;
# 404
extern volatile unsigned char PMDIS1 @ 0xEBA;
asm("PMDIS1 equ 0EBAh");
extern volatile unsigned char PD1 @ 0xEBA;
asm("PD1 equ 0EBAh");
typedef union {
struct {
unsigned :1;
unsigned TMR1MD :1;
unsigned TMR2MD :1;
unsigned TMR3MD :1;
unsigned TMR4MD :1;
unsigned RTCCMD :1;
unsigned CTMUMD :1;
};
struct {
unsigned :1;
unsigned PMDTMR1 :1;
unsigned PMDTMR2 :1;
unsigned PMDTMR3 :1;
unsigned PMDTMR4 :1;
};
struct {
unsigned :1;
unsigned PMDTMR :4;
unsigned PMDRTCC :1;
unsigned PMDCTMU :1;
};
struct {
unsigned :1;
unsigned TMRMD :4;
};
} PMDIS1bits_t;
extern volatile PMDIS1bits_t PMDIS1bits @ 0xEBA;
# 515
typedef union {
struct {
unsigned :1;
unsigned TMR1MD :1;
unsigned TMR2MD :1;
unsigned TMR3MD :1;
unsigned TMR4MD :1;
unsigned RTCCMD :1;
unsigned CTMUMD :1;
};
struct {
unsigned :1;
unsigned PMDTMR1 :1;
unsigned PMDTMR2 :1;
unsigned PMDTMR3 :1;
unsigned PMDTMR4 :1;
};
struct {
unsigned :1;
unsigned PMDTMR :4;
unsigned PMDRTCC :1;
unsigned PMDCTMU :1;
};
struct {
unsigned :1;
unsigned TMRMD :4;
};
} PD1bits_t;
extern volatile PD1bits_t PD1bits @ 0xEBA;
# 617
extern volatile unsigned char PMDIS2 @ 0xEBB;
asm("PMDIS2 equ 0EBBh");
extern volatile unsigned char PD2 @ 0xEBB;
asm("PD2 equ 0EBBh");
typedef union {
struct {
unsigned CMP1MD :1;
unsigned CMP2MD :1;
unsigned CMP3MD :1;
unsigned TMR5MD :1;
unsigned TMR6MD :1;
unsigned :1;
unsigned TMR8MD :1;
};
struct {
unsigned PMDCMP1 :1;
unsigned PMDCMP2 :1;
unsigned PMDCMP3 :1;
};
struct {
unsigned PMDCMP :3;
unsigned PMDTMR5 :1;
unsigned PMDTMR6 :1;
unsigned :1;
unsigned PMDTMR8 :1;
};
struct {
unsigned CMPMD :3;
};
} PMDIS2bits_t;
extern volatile PMDIS2bits_t PMDIS2bits @ 0xEBB;
# 726
typedef union {
struct {
unsigned CMP1MD :1;
unsigned CMP2MD :1;
unsigned CMP3MD :1;
unsigned TMR5MD :1;
unsigned TMR6MD :1;
unsigned :1;
unsigned TMR8MD :1;
};
struct {
unsigned PMDCMP1 :1;
unsigned PMDCMP2 :1;
unsigned PMDCMP3 :1;
};
struct {
unsigned PMDCMP :3;
unsigned PMDTMR5 :1;
unsigned PMDTMR6 :1;
unsigned :1;
unsigned PMDTMR8 :1;
};
struct {
unsigned CMPMD :3;
};
} PD2bits_t;
extern volatile PD2bits_t PD2bits @ 0xEBB;
# 826
extern volatile unsigned char PMDIS3 @ 0xEBC;
asm("PMDIS3 equ 0EBCh");
extern volatile unsigned char PD3 @ 0xEBC;
asm("PD3 equ 0EBCh");
typedef union {
struct {
unsigned :1;
unsigned CCP4MD :1;
unsigned CCP5MD :1;
unsigned CCP6MD :1;
unsigned CCP7MD :1;
unsigned CCP8MD :1;
unsigned CCP9MD :1;
unsigned CCP10MD :1;
};
struct {
unsigned :1;
unsigned PMDCCP4 :1;
unsigned PMDCCP5 :1;
unsigned PMDCCP6 :1;
unsigned PMDCCP7 :1;
unsigned PMDCCP8 :1;
unsigned PMDCCP9 :1;
unsigned PMDCCP10 :1;
};
struct {
unsigned :1;
unsigned PMDCCP :7;
};
struct {
unsigned :1;
unsigned CCPMD :7;
};
} PMDIS3bits_t;
extern volatile PMDIS3bits_t PMDIS3bits @ 0xEBC;
# 949
typedef union {
struct {
unsigned :1;
unsigned CCP4MD :1;
unsigned CCP5MD :1;
unsigned CCP6MD :1;
unsigned CCP7MD :1;
unsigned CCP8MD :1;
unsigned CCP9MD :1;
unsigned CCP10MD :1;
};
struct {
unsigned :1;
unsigned PMDCCP4 :1;
unsigned PMDCCP5 :1;
unsigned PMDCCP6 :1;
unsigned PMDCCP7 :1;
unsigned PMDCCP8 :1;
unsigned PMDCCP9 :1;
unsigned PMDCCP10 :1;
};
struct {
unsigned :1;
unsigned PMDCCP :7;
};
struct {
unsigned :1;
unsigned CCPMD :7;
};
} PD3bits_t;
extern volatile PD3bits_t PD3bits @ 0xEBC;
# 1063
extern volatile unsigned char PPSCON @ 0xEBF;
asm("PPSCON equ 0EBFh");
typedef union {
struct {
unsigned IOLOCK :1;
};
} PPSCONbits_t;
extern volatile PPSCONbits_t PPSCONbits @ 0xEBF;
# 1082
extern volatile unsigned char RPOR0 @ 0xEC0;
asm("RPOR0 equ 0EC0h");
extern volatile unsigned char RPOR1 @ 0xEC1;
asm("RPOR1 equ 0EC1h");
extern volatile unsigned char RPOR2 @ 0xEC2;
asm("RPOR2 equ 0EC2h");
extern volatile unsigned char RPOR3 @ 0xEC3;
asm("RPOR3 equ 0EC3h");
extern volatile unsigned char RPOR4 @ 0xEC4;
asm("RPOR4 equ 0EC4h");
extern volatile unsigned char RPOR5 @ 0xEC5;
asm("RPOR5 equ 0EC5h");
extern volatile unsigned char RPOR6 @ 0xEC6;
asm("RPOR6 equ 0EC6h");
extern volatile unsigned char RPOR7 @ 0xEC7;
asm("RPOR7 equ 0EC7h");
extern volatile unsigned char RPOR8 @ 0xEC8;
asm("RPOR8 equ 0EC8h");
extern volatile unsigned char RPOR9 @ 0xEC9;
asm("RPOR9 equ 0EC9h");
extern volatile unsigned char RPOR10 @ 0xECA;
asm("RPOR10 equ 0ECAh");
extern volatile unsigned char RPOR11 @ 0xECB;
asm("RPOR11 equ 0ECBh");
extern volatile unsigned char RPOR12 @ 0xECC;
asm("RPOR12 equ 0ECCh");
extern volatile unsigned char RPOR13 @ 0xECD;
asm("RPOR13 equ 0ECDh");
extern volatile unsigned char RPOR14 @ 0xECE;
asm("RPOR14 equ 0ECEh");
extern volatile unsigned char RPOR15 @ 0xECF;
asm("RPOR15 equ 0ECFh");
extern volatile unsigned char RPOR16 @ 0xED0;
asm("RPOR16 equ 0ED0h");
extern volatile unsigned char RPOR17 @ 0xED1;
asm("RPOR17 equ 0ED1h");
extern volatile unsigned char RPOR18 @ 0xED2;
asm("RPOR18 equ 0ED2h");
extern volatile unsigned char RPINR1 @ 0xEE1;
asm("RPINR1 equ 0EE1h");
extern volatile unsigned char RPINR2 @ 0xEE2;
asm("RPINR2 equ 0EE2h");
extern volatile unsigned char RPINR3 @ 0xEE3;
asm("RPINR3 equ 0EE3h");
extern volatile unsigned char RPINR4 @ 0xEE4;
asm("RPINR4 equ 0EE4h");
extern volatile unsigned char RPINR6 @ 0xEE6;
asm("RPINR6 equ 0EE6h");
extern volatile unsigned char RPINR15 @ 0xEE7;
asm("RPINR15 equ 0EE7h");
extern volatile unsigned char RPINR7 @ 0xEE8;
asm("RPINR7 equ 0EE8h");
extern volatile unsigned char RPINR8 @ 0xEE9;
asm("RPINR8 equ 0EE9h");
extern volatile unsigned char RPINR9 @ 0xEEA;
asm("RPINR9 equ 0EEAh");
extern volatile unsigned char RPINR12 @ 0xEF2;
asm("RPINR12 equ 0EF2h");
extern volatile unsigned char RPINR13 @ 0xEF3;
asm("RPINR13 equ 0EF3h");
extern volatile unsigned char RPINR14 @ 0xEF4;
asm("RPINR14 equ 0EF4h");
extern volatile unsigned char RPINR16 @ 0xEF7;
asm("RPINR16 equ 0EF7h");
extern volatile unsigned char RPINR17 @ 0xEF8;
asm("RPINR17 equ 0EF8h");
extern volatile unsigned char RPINR21 @ 0xEFC;
asm("RPINR21 equ 0EFCh");
extern volatile unsigned char RPINR22 @ 0xEFD;
asm("RPINR22 equ 0EFDh");
extern volatile unsigned char RPINR23 @ 0xEFE;
asm("RPINR23 equ 0EFEh");
extern volatile unsigned char RPINR24 @ 0xEFF;
asm("RPINR24 equ 0EFFh");
extern volatile unsigned char CCP10CON @ 0xF00;
asm("CCP10CON equ 0F00h");
typedef union {
struct {
unsigned CCP10M :4;
unsigned DC10B :2;
};
struct {
unsigned CCP10M0 :1;
unsigned CCP10M1 :1;
unsigned CCP10M2 :1;
unsigned CCP10M3 :1;
unsigned DC10B0 :1;
unsigned DC10B1 :1;
};
} CCP10CONbits_t;
extern volatile CCP10CONbits_t CCP10CONbits @ 0xF00;
# 1367
extern volatile unsigned char CCPR10L @ 0xF01;
asm("CCPR10L equ 0F01h");
typedef union {
struct {
unsigned CCPR10L :8;
};
} CCPR10Lbits_t;
extern volatile CCPR10Lbits_t CCPR10Lbits @ 0xF01;
# 1386
extern volatile unsigned char CCPR10H @ 0xF02;
asm("CCPR10H equ 0F02h");
typedef union {
struct {
unsigned CCPR10H :8;
};
} CCPR10Hbits_t;
extern volatile CCPR10Hbits_t CCPR10Hbits @ 0xF02;
# 1405
extern volatile unsigned char CCP9CON @ 0xF03;
asm("CCP9CON equ 0F03h");
typedef union {
struct {
unsigned CCP9M :4;
unsigned DC9B :2;
};
struct {
unsigned CCP9M0 :1;
unsigned CCP9M1 :1;
unsigned CCP9M2 :1;
unsigned CCP9M3 :1;
unsigned DC9B0 :1;
unsigned DC9B1 :1;
};
} CCP9CONbits_t;
extern volatile CCP9CONbits_t CCP9CONbits @ 0xF03;
# 1468
extern volatile unsigned char CCPR9L @ 0xF04;
asm("CCPR9L equ 0F04h");
typedef union {
struct {
unsigned CCPR9L :8;
};
} CCPR9Lbits_t;
extern volatile CCPR9Lbits_t CCPR9Lbits @ 0xF04;
# 1487
extern volatile unsigned char CCPR9H @ 0xF05;
asm("CCPR9H equ 0F05h");
typedef union {
struct {
unsigned CCPR9H :8;
};
} CCPR9Hbits_t;
extern volatile CCPR9Hbits_t CCPR9Hbits @ 0xF05;
# 1506
extern volatile unsigned char CCP8CON @ 0xF06;
asm("CCP8CON equ 0F06h");
typedef union {
struct {
unsigned CCP8M :4;
unsigned DC8B :2;
};
struct {
unsigned CCP8M0 :1;
unsigned CCP8M1 :1;
unsigned CCP8M2 :1;
unsigned CCP8M3 :1;
unsigned DC8B0 :1;
unsigned DC8B1 :1;
};
} CCP8CONbits_t;
extern volatile CCP8CONbits_t CCP8CONbits @ 0xF06;
# 1569
extern volatile unsigned char CCPR8L @ 0xF07;
asm("CCPR8L equ 0F07h");
typedef union {
struct {
unsigned CCPR8L :8;
};
} CCPR8Lbits_t;
extern volatile CCPR8Lbits_t CCPR8Lbits @ 0xF07;
# 1588
extern volatile unsigned char CCPR8H @ 0xF08;
asm("CCPR8H equ 0F08h");
typedef union {
struct {
unsigned CCPR8H :8;
};
} CCPR8Hbits_t;
extern volatile CCPR8Hbits_t CCPR8Hbits @ 0xF08;
# 1607
extern volatile unsigned char CCP7CON @ 0xF09;
asm("CCP7CON equ 0F09h");
typedef union {
struct {
unsigned CCP7M :4;
unsigned DC7B :2;
};
struct {
unsigned CCP7M0 :1;
unsigned CCP7M1 :1;
unsigned CCP7M2 :1;
unsigned CCP7M3 :1;
unsigned DC7B0 :1;
unsigned DC7B1 :1;
};
} CCP7CONbits_t;
extern volatile CCP7CONbits_t CCP7CONbits @ 0xF09;
# 1670
extern volatile unsigned char CCPR7L @ 0xF0A;
asm("CCPR7L equ 0F0Ah");
typedef union {
struct {
unsigned CCPR7L :8;
};
} CCPR7Lbits_t;
extern volatile CCPR7Lbits_t CCPR7Lbits @ 0xF0A;
# 1689
extern volatile unsigned char CCPR7H @ 0xF0B;
asm("CCPR7H equ 0F0Bh");
typedef union {
struct {
unsigned CCPR7H :8;
};
} CCPR7Hbits_t;
extern volatile CCPR7Hbits_t CCPR7Hbits @ 0xF0B;
# 1708
extern volatile unsigned char CCP6CON @ 0xF0C;
asm("CCP6CON equ 0F0Ch");
typedef union {
struct {
unsigned CCP6M :4;
unsigned DC6B :2;
};
struct {
unsigned CCP6M0 :1;
unsigned CCP6M1 :1;
unsigned CCP6M2 :1;
unsigned CCP6M3 :1;
unsigned DC6B0 :1;
unsigned DC6B1 :1;
};
} CCP6CONbits_t;
extern volatile CCP6CONbits_t CCP6CONbits @ 0xF0C;
# 1771
extern volatile unsigned char CCPR6L @ 0xF0D;
asm("CCPR6L equ 0F0Dh");
typedef union {
struct {
unsigned CCPR6L :8;
};
} CCPR6Lbits_t;
extern volatile CCPR6Lbits_t CCPR6Lbits @ 0xF0D;
# 1790
extern volatile unsigned char CCPR6H @ 0xF0E;
asm("CCPR6H equ 0F0Eh");
typedef union {
struct {
unsigned CCPR6H :8;
};
} CCPR6Hbits_t;
extern volatile CCPR6Hbits_t CCPR6Hbits @ 0xF0E;
# 1809
extern volatile unsigned char CCP5CON @ 0xF0F;
asm("CCP5CON equ 0F0Fh");
typedef union {
struct {
unsigned CCP5M :4;
unsigned DC5B :2;
};
struct {
unsigned CCP5M0 :1;
unsigned CCP5M1 :1;
unsigned CCP5M2 :1;
unsigned CCP5M3 :1;
unsigned DC5B0 :1;
unsigned DC5B1 :1;
};
} CCP5CONbits_t;
extern volatile CCP5CONbits_t CCP5CONbits @ 0xF0F;
# 1872
extern volatile unsigned char CCPR5L @ 0xF10;
asm("CCPR5L equ 0F10h");
typedef union {
struct {
unsigned CCPR5L :8;
};
} CCPR5Lbits_t;
extern volatile CCPR5Lbits_t CCPR5Lbits @ 0xF10;
# 1891
extern volatile unsigned char CCPR5H @ 0xF11;
asm("CCPR5H equ 0F11h");
typedef union {
struct {
unsigned CCPR5H :8;
};
} CCPR5Hbits_t;
extern volatile CCPR5Hbits_t CCPR5Hbits @ 0xF11;
# 1910
extern volatile unsigned char CCP4CON @ 0xF12;
asm("CCP4CON equ 0F12h");
typedef union {
struct {
unsigned CCP4M :4;
unsigned DC4B :2;
};
struct {
unsigned CCP4M0 :1;
unsigned CCP4M1 :1;
unsigned CCP4M2 :1;
unsigned CCP4M3 :1;
unsigned DC4B0 :1;
unsigned DC4B1 :1;
};
} CCP4CONbits_t;
extern volatile CCP4CONbits_t CCP4CONbits @ 0xF12;
# 1973
extern volatile unsigned char CCPR4L @ 0xF13;
asm("CCPR4L equ 0F13h");
typedef union {
struct {
unsigned CCPR4L :8;
};
} CCPR4Lbits_t;
extern volatile CCPR4Lbits_t CCPR4Lbits @ 0xF13;
# 1992
extern volatile unsigned char CCPR4H @ 0xF14;
asm("CCPR4H equ 0F14h");
typedef union {
struct {
unsigned CCPR4H :8;
};
} CCPR4Hbits_t;
extern volatile CCPR4Hbits_t CCPR4Hbits @ 0xF14;
# 2011
extern volatile unsigned char CCP3CON @ 0xF15;
asm("CCP3CON equ 0F15h");
typedef union {
struct {
unsigned CCP3M :4;
unsigned DC3B :2;
unsigned P3M :2;
};
struct {
unsigned CCP3M0 :1;
unsigned CCP3M1 :1;
unsigned CCP3M2 :1;
unsigned CCP3M3 :1;
unsigned DC3B0 :1;
unsigned DC3B1 :1;
unsigned P3M0 :1;
unsigned P3M1 :1;
};
} CCP3CONbits_t;
extern volatile CCP3CONbits_t CCP3CONbits @ 0xF15;
# 2092
extern volatile unsigned char CCPR3L @ 0xF16;
asm("CCPR3L equ 0F16h");
typedef union {
struct {
unsigned CCPR3L :8;
};
} CCPR3Lbits_t;
extern volatile CCPR3Lbits_t CCPR3Lbits @ 0xF16;
# 2111
extern volatile unsigned char CCPR3H @ 0xF17;
asm("CCPR3H equ 0F17h");
typedef union {
struct {
unsigned CCPR3H :8;
};
} CCPR3Hbits_t;
extern volatile CCPR3Hbits_t CCPR3Hbits @ 0xF17;
# 2130
extern volatile unsigned char ECCP3DEL @ 0xF18;
asm("ECCP3DEL equ 0F18h");
typedef union {
struct {
unsigned P3DC :7;
unsigned P3RSEN :1;
};
struct {
unsigned P3DC0 :1;
unsigned P3DC1 :1;
unsigned P3DC2 :1;
unsigned P3DC3 :1;
unsigned P3DC4 :1;
unsigned P3DC5 :1;
unsigned P3DC6 :1;
};
} ECCP3DELbits_t;
extern volatile ECCP3DELbits_t ECCP3DELbits @ 0xF18;
# 2199
extern volatile unsigned char ECCP3AS @ 0xF19;
asm("ECCP3AS equ 0F19h");
typedef union {
struct {
unsigned PSS3BD :2;
unsigned PSS3AC :2;
unsigned ECCP3AS :3;
unsigned ECCP3ASE :1;
};
struct {
unsigned PSS3BD0 :1;
unsigned PSS3BD1 :1;
unsigned PSS3AC0 :1;
unsigned PSS3AC1 :1;
unsigned ECCP3AS0 :1;
unsigned ECCP3AS1 :1;
unsigned ECCP3AS2 :1;
};
} ECCP3ASbits_t;
extern volatile ECCP3ASbits_t ECCP3ASbits @ 0xF19;
# 2280
extern volatile unsigned char PSTR3CON @ 0xF1A;
asm("PSTR3CON equ 0F1Ah");
typedef union {
struct {
unsigned STRA :1;
unsigned STRB :1;
unsigned STRC :1;
unsigned STRD :1;
unsigned STRSYNC :1;
unsigned :1;
unsigned CMPL :2;
};
struct {
unsigned :6;
unsigned CMPL0 :1;
unsigned CMPL1 :1;
};
struct {
unsigned :6;
unsigned CMPL03 :1;
};
struct {
unsigned :7;
unsigned CMPL13 :1;
};
struct {
unsigned STRA3 :1;
};
struct {
unsigned :1;
unsigned STRB3 :1;
};
struct {
unsigned :2;
unsigned STRC3 :1;
};
struct {
unsigned :3;
unsigned STRD3 :1;
};
struct {
unsigned :4;
unsigned STRSYNC3 :1;
};
} PSTR3CONbits_t;
extern volatile PSTR3CONbits_t PSTR3CONbits @ 0xF1A;
# 2407
extern volatile unsigned char T8CON @ 0xF1B;
asm("T8CON equ 0F1Bh");
typedef union {
struct {
unsigned T8CKPS :2;
unsigned TMR8ON :1;
unsigned T8OUTPS :4;
};
struct {
unsigned T8CKPS0 :1;
unsigned T8CKPS1 :1;
unsigned :1;
unsigned T8OUTPS0 :1;
unsigned T8OUTPS1 :1;
unsigned T8OUTPS2 :1;
unsigned T8OUTPS3 :1;
};
} T8CONbits_t;
extern volatile T8CONbits_t T8CONbits @ 0xF1B;
# 2477
extern volatile unsigned char PR8 @ 0xF1C;
asm("PR8 equ 0F1Ch");
typedef union {
struct {
unsigned PR8 :8;
};
} PR8bits_t;
extern volatile PR8bits_t PR8bits @ 0xF1C;
# 2496
extern volatile unsigned char TMR8 @ 0xF1D;
asm("TMR8 equ 0F1Dh");
typedef union {
struct {
unsigned TMR8 :8;
};
} TMR8bits_t;
extern volatile TMR8bits_t TMR8bits @ 0xF1D;
# 2515
extern volatile unsigned char T6CON @ 0xF1E;
asm("T6CON equ 0F1Eh");
typedef union {
struct {
unsigned T6CKPS :2;
unsigned TMR6ON :1;
unsigned T6OUTPS :4;
};
struct {
unsigned T6CKPS0 :1;
unsigned T6CKPS1 :1;
unsigned :1;
unsigned T6OUTPS0 :1;
unsigned T6OUTPS1 :1;
unsigned T6OUTPS2 :1;
unsigned T6OUTPS3 :1;
};
} T6CONbits_t;
extern volatile T6CONbits_t T6CONbits @ 0xF1E;
# 2585
extern volatile unsigned char PR6 @ 0xF1F;
asm("PR6 equ 0F1Fh");
typedef union {
struct {
unsigned PR6 :8;
};
} PR6bits_t;
extern volatile PR6bits_t PR6bits @ 0xF1F;
# 2604
extern volatile unsigned char TMR6 @ 0xF20;
asm("TMR6 equ 0F20h");
typedef union {
struct {
unsigned TMR6 :8;
};
} TMR6bits_t;
extern volatile TMR6bits_t TMR6bits @ 0xF20;
# 2623
extern volatile unsigned char T5GCON @ 0xF21;
asm("T5GCON equ 0F21h");
typedef union {
struct {
unsigned :3;
unsigned T5GGO_NOT_T5DONE :1;
};
struct {
unsigned T5GSS :2;
unsigned T5GVAL :1;
unsigned T5GGO_nT5DONE :1;
unsigned T5GSPM :1;
unsigned T5GTM :1;
unsigned T5GPOL :1;
unsigned TMR5GE :1;
};
struct {
unsigned T5GSS0 :1;
unsigned T5GSS1 :1;
unsigned :1;
unsigned T5GGO :1;
};
struct {
unsigned :3;
unsigned NOT_T5DONE :1;
};
struct {
unsigned :3;
unsigned nT5DONE :1;
};
struct {
unsigned :3;
unsigned T5DONE :1;
};
} T5GCONbits_t;
extern volatile T5GCONbits_t T5GCONbits @ 0xF21;
# 2735
extern volatile unsigned char T5CON @ 0xF22;
asm("T5CON equ 0F22h");
typedef union {
struct {
unsigned :2;
unsigned NOT_T5SYNC :1;
};
struct {
unsigned TMR5ON :1;
unsigned RD16 :1;
unsigned nT5SYNC :1;
unsigned T5OSCEN :1;
unsigned T5CKPS :2;
unsigned TMR5CS :2;
};
struct {
unsigned :4;
unsigned T5CKPS0 :1;
unsigned T5CKPS1 :1;
unsigned TMR5CS0 :1;
unsigned TMR5CS1 :1;
};
struct {
unsigned :1;
unsigned RD165 :1;
};
struct {
unsigned :3;
unsigned SOSCEN5 :1;
};
} T5CONbits_t;
extern volatile T5CONbits_t T5CONbits @ 0xF22;
# 2838
extern volatile unsigned char TMR5L @ 0xF23;
asm("TMR5L equ 0F23h");
typedef union {
struct {
unsigned TMR5L :8;
};
} TMR5Lbits_t;
extern volatile TMR5Lbits_t TMR5Lbits @ 0xF23;
# 2857
extern volatile unsigned char TMR5H @ 0xF24;
asm("TMR5H equ 0F24h");
typedef union {
struct {
unsigned TMR5H :8;
};
} TMR5Hbits_t;
extern volatile TMR5Hbits_t TMR5Hbits @ 0xF24;
# 2876
extern volatile unsigned char CM3CON @ 0xF25;
asm("CM3CON equ 0F25h");
typedef union {
struct {
unsigned CCH :2;
unsigned CREF :1;
unsigned EVPOL :2;
unsigned CPOL :1;
unsigned COE :1;
unsigned CON :1;
};
struct {
unsigned CCH0 :1;
unsigned CCH1 :1;
unsigned :1;
unsigned EVPOL0 :1;
unsigned EVPOL1 :1;
};
struct {
unsigned CCH03 :1;
};
struct {
unsigned :1;
unsigned CCH13 :1;
};
struct {
unsigned :6;
unsigned COE3 :1;
};
struct {
unsigned :7;
unsigned CON3 :1;
};
struct {
unsigned :5;
unsigned CPOL3 :1;
};
struct {
unsigned :2;
unsigned CREF3 :1;
};
struct {
unsigned :3;
unsigned EVPOL03 :1;
};
struct {
unsigned :4;
unsigned EVPOL13 :1;
};
} CM3CONbits_t;
extern volatile CM3CONbits_t CM3CONbits @ 0xF25;
# 3023
extern volatile unsigned char RTCVALL @ 0xF3A;
asm("RTCVALL equ 0F3Ah");
typedef union {
struct {
unsigned RTCVALL :8;
};
} RTCVALLbits_t;
extern volatile RTCVALLbits_t RTCVALLbits @ 0xF3A;
# 3042
extern volatile unsigned char RTCVALH @ 0xF3B;
asm("RTCVALH equ 0F3Bh");
typedef union {
struct {
unsigned RTCVALH :8;
};
struct {
unsigned :6;
unsigned WAITB0 :1;
};
struct {
unsigned :7;
unsigned WAITB1 :1;
};
struct {
unsigned WAITE0 :1;
};
struct {
unsigned :1;
unsigned WAITE1 :1;
};
struct {
unsigned :2;
unsigned WAITM0 :1;
};
struct {
unsigned :3;
unsigned WAITM1 :1;
};
struct {
unsigned :4;
unsigned WAITM2 :1;
};
struct {
unsigned :5;
unsigned WAITM3 :1;
};
} RTCVALHbits_t;
extern volatile RTCVALHbits_t RTCVALHbits @ 0xF3B;
# 3132
extern volatile unsigned char PADCFG1 @ 0xF3C;
asm("PADCFG1 equ 0F3Ch");
typedef union {
struct {
unsigned :1;
unsigned RTSECSEL0 :1;
unsigned RTSECSEL1 :1;
};
} PADCFG1bits_t;
extern volatile PADCFG1bits_t PADCFG1bits @ 0xF3C;
# 3158
extern volatile unsigned char REFOCON @ 0xF3D;
asm("REFOCON equ 0F3Dh");
typedef union {
struct {
unsigned RODIV :4;
unsigned ROSEL :1;
unsigned ROSSLP :1;
unsigned :1;
unsigned ROON :1;
};
struct {
unsigned RODIV0 :1;
unsigned RODIV1 :1;
unsigned RODIV2 :1;
unsigned RODIV3 :1;
};
} REFOCONbits_t;
extern volatile REFOCONbits_t REFOCONbits @ 0xF3D;
# 3222
extern volatile unsigned char RTCCAL @ 0xF3E;
asm("RTCCAL equ 0F3Eh");
typedef union {
struct {
unsigned CAL :8;
};
struct {
unsigned CAL0 :1;
unsigned CAL1 :1;
unsigned CAL2 :1;
unsigned CAL3 :1;
unsigned CAL4 :1;
unsigned CAL5 :1;
unsigned CAL6 :1;
unsigned CAL7 :1;
};
} RTCCALbits_t;
extern volatile RTCCALbits_t RTCCALbits @ 0xF3E;
# 3291
extern volatile unsigned char RTCCFG @ 0xF3F;
asm("RTCCFG equ 0F3Fh");
typedef union {
struct {
unsigned RTCPTR0 :1;
unsigned RTCPTR1 :1;
unsigned RTCOE :1;
unsigned HALFSEC :1;
unsigned RTCSYNC :1;
unsigned RTCWREN :1;
unsigned :1;
unsigned RTCEN :1;
};
} RTCCFGbits_t;
extern volatile RTCCFGbits_t RTCCFGbits @ 0xF3F;
# 3347
extern volatile unsigned char ODCON3 @ 0xF40;
asm("ODCON3 equ 0F40h");
typedef union {
struct {
unsigned SPI1OD :1;
unsigned SPI2OD :1;
unsigned :5;
unsigned CTMUDS :1;
};
} ODCON3bits_t;
extern volatile ODCON3bits_t ODCON3bits @ 0xF40;
# 3379
extern volatile unsigned char ODCON2 @ 0xF41;
asm("ODCON2 equ 0F41h");
typedef union {
struct {
unsigned U1OD :1;
unsigned U2OD :1;
unsigned CCP9OD :1;
unsigned CCP10OD :1;
};
} ODCON2bits_t;
extern volatile ODCON2bits_t ODCON2bits @ 0xF41;
# 3416
extern volatile unsigned char ODCON1 @ 0xF42;
asm("ODCON1 equ 0F42h");
typedef union {
struct {
unsigned ECCP1OD :1;
unsigned ECCP2OD :1;
unsigned ECCP3OD :1;
unsigned CCP4OD :1;
unsigned CCP5OD :1;
unsigned CCP6OD :1;
unsigned CCP7OD :1;
unsigned CCP8OD :1;
};
} ODCON1bits_t;
extern volatile ODCON1bits_t ODCON1bits @ 0xF42;
# 3477
extern volatile unsigned char ALRMVALL @ 0xF44;
asm("ALRMVALL equ 0F44h");
typedef union {
struct {
unsigned ALRMVALL :8;
};
} ALRMVALLbits_t;
extern volatile ALRMVALLbits_t ALRMVALLbits @ 0xF44;
# 3496
extern volatile unsigned char ALRMVALH @ 0xF45;
asm("ALRMVALH equ 0F45h");
typedef union {
struct {
unsigned ALRMVALH :8;
};
} ALRMVALHbits_t;
extern volatile ALRMVALHbits_t ALRMVALHbits @ 0xF45;
# 3515
extern volatile unsigned char ALRMRPT @ 0xF46;
asm("ALRMRPT equ 0F46h");
typedef union {
struct {
unsigned ARPT :8;
};
struct {
unsigned ARPT0 :1;
unsigned ARPT1 :1;
unsigned ARPT2 :1;
unsigned ARPT3 :1;
unsigned ARPT4 :1;
unsigned ARPT5 :1;
unsigned ARPT6 :1;
unsigned ARPT7 :1;
};
} ALRMRPTbits_t;
extern volatile ALRMRPTbits_t ALRMRPTbits @ 0xF46;
# 3584
extern volatile unsigned char ALRMCFG @ 0xF47;
asm("ALRMCFG equ 0F47h");
typedef union {
struct {
unsigned ALRMPTR :2;
unsigned AMASK :4;
unsigned CHIME :1;
unsigned ALRMEN :1;
};
struct {
unsigned ALRMPTR0 :1;
unsigned ALRMPTR1 :1;
unsigned AMASK0 :1;
unsigned AMASK1 :1;
unsigned AMASK2 :1;
unsigned AMASK3 :1;
};
} ALRMCFGbits_t;
extern volatile ALRMCFGbits_t ALRMCFGbits @ 0xF47;
# 3659
extern volatile unsigned char ANCON0 @ 0xF48;
asm("ANCON0 equ 0F48h");
typedef union {
struct {
unsigned PCFG0 :1;
unsigned PCFG1 :1;
unsigned PCFG2 :1;
unsigned PCFG3 :1;
unsigned PCFG4 :1;
};
} ANCON0bits_t;
extern volatile ANCON0bits_t ANCON0bits @ 0xF48;
# 3702
extern volatile unsigned char ANCON1 @ 0xF49;
asm("ANCON1 equ 0F49h");
typedef union {
struct {
unsigned PCFG8 :1;
unsigned PCFG9 :1;
unsigned PCFG10 :1;
unsigned PCFG11 :1;
unsigned PCFG12 :1;
unsigned :2;
unsigned VBGEN :1;
};
struct {
unsigned :7;
unsigned PCFG15 :1;
};
} ANCON1bits_t;
extern volatile ANCON1bits_t ANCON1bits @ 0xF49;
# 3761
extern volatile unsigned char DSWAKEL @ 0xF4A;
asm("DSWAKEL equ 0F4Ah");
typedef union {
struct {
unsigned DSPOR :1;
unsigned :1;
unsigned DSMCLR :1;
unsigned DSRTC :1;
unsigned DSWDT :1;
unsigned DSULP :1;
unsigned :1;
unsigned DSFLT :1;
};
} DSWAKELbits_t;
extern volatile DSWAKELbits_t DSWAKELbits @ 0xF4A;
# 3812
extern volatile unsigned char DSWAKEH @ 0xF4B;
asm("DSWAKEH equ 0F4Bh");
typedef union {
struct {
unsigned DSINT0 :1;
};
} DSWAKEHbits_t;
extern volatile DSWAKEHbits_t DSWAKEHbits @ 0xF4B;
# 3831
extern volatile unsigned char DSCONL @ 0xF4C;
asm("DSCONL equ 0F4Ch");
typedef union {
struct {
unsigned RELEASE :1;
unsigned DSBOR :1;
unsigned ULPWDIS :1;
};
} DSCONLbits_t;
extern volatile DSCONLbits_t DSCONLbits @ 0xF4C;
# 3862
extern volatile unsigned char DSCONH @ 0xF4D;
asm("DSCONH equ 0F4Dh");
typedef union {
struct {
unsigned RTCWDIS :1;
unsigned DSULPEN :1;
unsigned :5;
unsigned DSEN :1;
};
} DSCONHbits_t;
extern volatile DSCONHbits_t DSCONHbits @ 0xF4D;
# 3894
extern volatile unsigned char DSGPR0 @ 0xF4E;
asm("DSGPR0 equ 0F4Eh");
typedef union {
struct {
unsigned DSGPR0 :8;
};
} DSGPR0bits_t;
extern volatile DSGPR0bits_t DSGPR0bits @ 0xF4E;
# 3913
extern volatile unsigned char DSGPR1 @ 0xF4F;
asm("DSGPR1 equ 0F4Fh");
typedef union {
struct {
unsigned DSGPR1 :8;
};
} DSGPR1bits_t;
extern volatile DSGPR1bits_t DSGPR1bits @ 0xF4F;
# 3932
extern volatile unsigned char CCPTMRS2 @ 0xF50;
asm("CCPTMRS2 equ 0F50h");
typedef union {
struct {
unsigned C8TSEL :2;
unsigned C9TSEL0 :1;
unsigned :1;
unsigned C10TSEL0 :1;
};
struct {
unsigned C8TSEL0 :1;
unsigned C8TSEL1 :1;
};
} CCPTMRS2bits_t;
extern volatile CCPTMRS2bits_t CCPTMRS2bits @ 0xF50;
# 3978
extern volatile unsigned char CCPTMRS1 @ 0xF51;
asm("CCPTMRS1 equ 0F51h");
typedef union {
struct {
unsigned C4TSEL :2;
unsigned C5TSEL0 :1;
unsigned :1;
unsigned C6TSEL0 :1;
unsigned :1;
unsigned C7TSEL :2;
};
struct {
unsigned C4TSEL0 :1;
unsigned C4TSEL1 :1;
unsigned :4;
unsigned C7TSEL0 :1;
unsigned C7TSEL1 :1;
};
} CCPTMRS1bits_t;
extern volatile CCPTMRS1bits_t CCPTMRS1bits @ 0xF51;
# 4044
extern volatile unsigned char CCPTMRS0 @ 0xF52;
asm("CCPTMRS0 equ 0F52h");
typedef union {
struct {
unsigned C1TSEL :3;
unsigned C2TSEL :3;
unsigned C3TSEL :2;
};
struct {
unsigned C1TSEL0 :1;
unsigned C1TSEL1 :1;
unsigned C1TSEL2 :1;
unsigned C2TSEL0 :1;
unsigned C2TSEL1 :1;
unsigned C2TSEL2 :1;
unsigned C3TSEL0 :1;
unsigned C3TSEL1 :1;
};
} CCPTMRS0bits_t;
extern volatile CCPTMRS0bits_t CCPTMRS0bits @ 0xF52;
# 4125
extern volatile unsigned char CVRCON @ 0xF53;
asm("CVRCON equ 0F53h");
typedef union {
struct {
unsigned CVR :4;
unsigned CVRSS :1;
unsigned CVRR :1;
unsigned CVROE :1;
unsigned CVREN :1;
};
struct {
unsigned CVR0 :1;
unsigned CVR1 :1;
unsigned CVR2 :1;
unsigned CVR3 :1;
};
struct {
unsigned :6;
unsigned CVROEN :1;
};
} CVRCONbits_t;
extern volatile CVRCONbits_t CVRCONbits @ 0xF53;
# 4203
extern volatile unsigned char DMABCH @ 0xF66;
asm("DMABCH equ 0F66h");
typedef union {
struct {
unsigned DMACNTHB :2;
};
} DMABCHbits_t;
extern volatile DMABCHbits_t DMABCHbits @ 0xF66;
# 4222
extern volatile unsigned char DMABCL @ 0xF67;
asm("DMABCL equ 0F67h");
typedef union {
struct {
unsigned DMACNTLB :8;
};
} DMABCLbits_t;
extern volatile DMABCLbits_t DMABCLbits @ 0xF67;
# 4241
extern volatile unsigned char RXADDRH @ 0xF68;
asm("RXADDRH equ 0F68h");
typedef union {
struct {
unsigned DMARCVPTRHB :4;
};
} RXADDRHbits_t;
extern volatile RXADDRHbits_t RXADDRHbits @ 0xF68;
# 4260
extern volatile unsigned char RXADDRL @ 0xF69;
asm("RXADDRL equ 0F69h");
typedef union {
struct {
unsigned DMARCVPTRLB :8;
};
} RXADDRLbits_t;
extern volatile RXADDRLbits_t RXADDRLbits @ 0xF69;
# 4279
extern volatile unsigned char TXADDRH @ 0xF6A;
asm("TXADDRH equ 0F6Ah");
typedef union {
struct {
unsigned DMATXPTRHB :4;
};
} TXADDRHbits_t;
extern volatile TXADDRHbits_t TXADDRHbits @ 0xF6A;
# 4298
extern volatile unsigned char TXADDRL @ 0xF6B;
asm("TXADDRL equ 0F6Bh");
typedef union {
struct {
unsigned DMATXPTRLB :8;
};
} TXADDRLbits_t;
extern volatile TXADDRLbits_t TXADDRLbits @ 0xF6B;
# 4317
extern volatile unsigned char CMSTAT @ 0xF70;
asm("CMSTAT equ 0F70h");
extern volatile unsigned char CMSTATUS @ 0xF70;
asm("CMSTATUS equ 0F70h");
typedef union {
struct {
unsigned COUT1 :1;
unsigned COUT2 :1;
unsigned COUT3 :1;
};
} CMSTATbits_t;
extern volatile CMSTATbits_t CMSTATbits @ 0xF70;
# 4352
typedef union {
struct {
unsigned COUT1 :1;
unsigned COUT2 :1;
unsigned COUT3 :1;
};
} CMSTATUSbits_t;
extern volatile CMSTATUSbits_t CMSTATUSbits @ 0xF70;
# 4378
extern volatile unsigned char SSP2CON2 @ 0xF71;
asm("SSP2CON2 equ 0F71h");
typedef union {
struct {
unsigned SEN :1;
unsigned RSEN :1;
unsigned PEN :1;
unsigned RCEN :1;
unsigned ACKEN :1;
unsigned ACKDT :1;
unsigned ACKSTAT :1;
unsigned GCEN :1;
};
struct {
unsigned :1;
unsigned ADMSK1 :1;
unsigned ADMSK2 :1;
unsigned ADMSK3 :1;
unsigned ADMSK4 :1;
unsigned ADMSK5 :1;
};
struct {
unsigned :5;
unsigned ACKDT2 :1;
};
struct {
unsigned :4;
unsigned ACKEN2 :1;
};
struct {
unsigned :6;
unsigned ACKSTAT2 :1;
};
struct {
unsigned :1;
unsigned ADMSK12 :1;
};
struct {
unsigned :2;
unsigned ADMSK22 :1;
};
struct {
unsigned :3;
unsigned ADMSK32 :1;
};
struct {
unsigned :4;
unsigned ADMSK42 :1;
};
struct {
unsigned :5;
unsigned ADMSK52 :1;
};
struct {
unsigned :7;
unsigned GCEN2 :1;
};
struct {
unsigned :2;
unsigned PEN2 :1;
};
struct {
unsigned :3;
unsigned RCEN2 :1;
};
struct {
unsigned :1;
unsigned RSEN2 :1;
};
struct {
unsigned SEN2 :1;
};
} SSP2CON2bits_t;
extern volatile SSP2CON2bits_t SSP2CON2bits @ 0xF71;
# 4588
extern volatile unsigned char SSP2CON1 @ 0xF72;
asm("SSP2CON1 equ 0F72h");
typedef union {
struct {
unsigned SSPM :4;
unsigned CKP :1;
unsigned SSPEN :1;
unsigned SSPOV :1;
unsigned WCOL :1;
};
struct {
unsigned SSPM0 :1;
unsigned SSPM1 :1;
unsigned SSPM2 :1;
unsigned SSPM3 :1;
};
struct {
unsigned :4;
unsigned CKP2 :1;
};
struct {
unsigned :5;
unsigned SSPEN2 :1;
};
struct {
unsigned SSPM02 :1;
};
struct {
unsigned :1;
unsigned SSPM12 :1;
};
struct {
unsigned :2;
unsigned SSPM22 :1;
};
struct {
unsigned :3;
unsigned SSPM32 :1;
};
struct {
unsigned :6;
unsigned SSPOV2 :1;
};
struct {
unsigned :7;
unsigned WCOL2 :1;
};
} SSP2CON1bits_t;
extern volatile SSP2CON1bits_t SSP2CON1bits @ 0xF72;
# 4728
extern volatile unsigned char SSP2STAT @ 0xF73;
asm("SSP2STAT equ 0F73h");
typedef union {
struct {
unsigned :2;
unsigned R_NOT_W :1;
};
struct {
unsigned :5;
unsigned D_NOT_A :1;
};
struct {
unsigned BF :1;
unsigned UA :1;
unsigned R_nW :1;
unsigned S :1;
unsigned P :1;
unsigned D_nA :1;
unsigned CKE :1;
unsigned SMP :1;
};
struct {
unsigned BF2 :1;
};
struct {
unsigned :6;
unsigned CKE2 :1;
};
struct {
unsigned :5;
unsigned DA2 :1;
};
struct {
unsigned :5;
unsigned DATA_ADDRESS2 :1;
};
struct {
unsigned :5;
unsigned D_A2 :1;
};
struct {
unsigned :5;
unsigned D_nA2 :1;
};
struct {
unsigned :5;
unsigned I2C_DAT2 :1;
};
struct {
unsigned :2;
unsigned I2C_READ2 :1;
};
struct {
unsigned :3;
unsigned I2C_START2 :1;
};
struct {
unsigned :4;
unsigned I2C_STOP2 :1;
};
struct {
unsigned :4;
unsigned P2 :1;
};
struct {
unsigned :2;
unsigned READ_WRITE2 :1;
};
struct {
unsigned :2;
unsigned RW2 :1;
};
struct {
unsigned :2;
unsigned R_W2 :1;
};
struct {
unsigned :2;
unsigned R_nW2 :1;
};
struct {
unsigned :3;
unsigned S2 :1;
};
struct {
unsigned :7;
unsigned SMP2 :1;
};
struct {
unsigned :3;
unsigned START2 :1;
};
struct {
unsigned :4;
unsigned STOP2 :1;
};
struct {
unsigned :1;
unsigned UA2 :1;
};
struct {
unsigned :5;
unsigned nA2 :1;
};
struct {
unsigned :5;
unsigned nADDRESS2 :1;
};
struct {
unsigned :2;
unsigned nW2 :1;
};
struct {
unsigned :2;
unsigned nWRITE2 :1;
};
} SSP2STATbits_t;
extern volatile SSP2STATbits_t SSP2STATbits @ 0xF73;
# 5022
extern volatile unsigned char SSP2ADD @ 0xF74;
asm("SSP2ADD equ 0F74h");
typedef union {
struct {
unsigned SSPADD :8;
};
struct {
unsigned MSK02 :1;
};
struct {
unsigned :1;
unsigned MSK12 :1;
};
struct {
unsigned :2;
unsigned MSK22 :1;
};
struct {
unsigned :3;
unsigned MSK32 :1;
};
struct {
unsigned :4;
unsigned MSK42 :1;
};
struct {
unsigned :5;
unsigned MSK52 :1;
};
struct {
unsigned :6;
unsigned MSK62 :1;
};
struct {
unsigned :7;
unsigned MSK72 :1;
};
} SSP2ADDbits_t;
extern volatile SSP2ADDbits_t SSP2ADDbits @ 0xF74;
# 5112
extern volatile unsigned char SSP2MSK @ 0xF74;
asm("SSP2MSK equ 0F74h");
typedef union {
struct {
unsigned MSK0 :1;
unsigned MSK1 :1;
unsigned MSK2 :1;
unsigned MSK3 :1;
unsigned MSK4 :1;
unsigned MSK5 :1;
unsigned MSK6 :1;
unsigned MSK7 :1;
};
} SSP2MSKbits_t;
extern volatile SSP2MSKbits_t SSP2MSKbits @ 0xF74;
# 5173
extern volatile unsigned char SSP2BUF @ 0xF75;
asm("SSP2BUF equ 0F75h");
typedef union {
struct {
unsigned SSPBUF :8;
};
} SSP2BUFbits_t;
extern volatile SSP2BUFbits_t SSP2BUFbits @ 0xF75;
# 5192
extern volatile unsigned char T4CON @ 0xF76;
asm("T4CON equ 0F76h");
typedef union {
struct {
unsigned T4CKPS :2;
unsigned TMR4ON :1;
unsigned T4OUTPS :4;
};
struct {
unsigned T4CKPS0 :1;
unsigned T4CKPS1 :1;
unsigned :1;
unsigned T4OUTPS0 :1;
unsigned T4OUTPS1 :1;
unsigned T4OUTPS2 :1;
unsigned T4OUTPS3 :1;
};
} T4CONbits_t;
extern volatile T4CONbits_t T4CONbits @ 0xF76;
# 5262
extern volatile unsigned char PR4 @ 0xF77;
asm("PR4 equ 0F77h");
typedef union {
struct {
unsigned PR4 :8;
};
} PR4bits_t;
extern volatile PR4bits_t PR4bits @ 0xF77;
# 5281
extern volatile unsigned char TMR4 @ 0xF78;
asm("TMR4 equ 0F78h");
typedef union {
struct {
unsigned TMR4 :8;
};
} TMR4bits_t;
extern volatile TMR4bits_t TMR4bits @ 0xF78;
# 5300
extern volatile unsigned char T3CON @ 0xF79;
asm("T3CON equ 0F79h");
typedef union {
struct {
unsigned :2;
unsigned NOT_T3SYNC :1;
};
struct {
unsigned TMR3ON :1;
unsigned RD16 :1;
unsigned nT3SYNC :1;
unsigned T3OSCEN :1;
unsigned T3CKPS :2;
unsigned TMR3CS :2;
};
struct {
unsigned :4;
unsigned T3CKPS0 :1;
unsigned T3CKPS1 :1;
unsigned TMR3CS0 :1;
unsigned TMR3CS1 :1;
};
struct {
unsigned :7;
unsigned RD163 :1;
};
struct {
unsigned :3;
unsigned SOSCEN3 :1;
};
struct {
unsigned :7;
unsigned T3RD16 :1;
};
} T3CONbits_t;
extern volatile T3CONbits_t T3CONbits @ 0xF79;
# 5412
extern volatile unsigned short TMR3 @ 0xF7A;
asm("TMR3 equ 0F7Ah");
extern volatile unsigned char TMR3L @ 0xF7A;
asm("TMR3L equ 0F7Ah");
typedef union {
struct {
unsigned TMR3L :8;
};
} TMR3Lbits_t;
extern volatile TMR3Lbits_t TMR3Lbits @ 0xF7A;
# 5437
extern volatile unsigned char TMR3H @ 0xF7B;
asm("TMR3H equ 0F7Bh");
typedef union {
struct {
unsigned TMR3H :8;
};
} TMR3Hbits_t;
extern volatile TMR3Hbits_t TMR3Hbits @ 0xF7B;
# 5456
extern volatile unsigned char BAUDCON2 @ 0xF7C;
asm("BAUDCON2 equ 0F7Ch");
typedef union {
struct {
unsigned ABDEN :1;
unsigned WUE :1;
unsigned :1;
unsigned BRG16 :1;
unsigned TXCKP :1;
unsigned RXDTP :1;
unsigned RCIDL :1;
unsigned ABDOVF :1;
};
struct {
unsigned ABDEN2 :1;
};
struct {
unsigned :7;
unsigned ABDOVF2 :1;
};
struct {
unsigned :3;
unsigned BRG162 :1;
};
struct {
unsigned :5;
unsigned DTRXP2 :1;
};
struct {
unsigned :6;
unsigned RCIDL2 :1;
};
struct {
unsigned :6;
unsigned RCMT2 :1;
};
struct {
unsigned :5;
unsigned RXDTP2 :1;
};
struct {
unsigned :4;
unsigned SCKP2 :1;
};
struct {
unsigned :4;
unsigned TXCKP2 :1;
};
struct {
unsigned :1;
unsigned WUE2 :1;
};
} BAUDCON2bits_t;
extern volatile BAUDCON2bits_t BAUDCON2bits @ 0xF7C;
# 5601
extern volatile unsigned char SPBRGH2 @ 0xF7D;
asm("SPBRGH2 equ 0F7Dh");
typedef union {
struct {
unsigned SPBRGH2 :8;
};
} SPBRGH2bits_t;
extern volatile SPBRGH2bits_t SPBRGH2bits @ 0xF7D;
# 5620
extern volatile unsigned char BAUDCON1 @ 0xF7E;
asm("BAUDCON1 equ 0F7Eh");
extern volatile unsigned char BAUDCON @ 0xF7E;
asm("BAUDCON equ 0F7Eh");
extern volatile unsigned char BAUDCTL @ 0xF7E;
asm("BAUDCTL equ 0F7Eh");
typedef union {
struct {
unsigned ABDEN :1;
unsigned WUE :1;
unsigned :1;
unsigned BRG16 :1;
unsigned TXCKP :1;
unsigned RXDTP :1;
unsigned RCIDL :1;
unsigned ABDOVF :1;
};
struct {
unsigned ABDEN1 :1;
};
struct {
unsigned :7;
unsigned ABDOVF1 :1;
};
struct {
unsigned :3;
unsigned BRG161 :1;
};
struct {
unsigned :4;
unsigned CKTXP :1;
};
struct {
unsigned :5;
unsigned DTRXP :1;
};
struct {
unsigned :5;
unsigned DTRXP1 :1;
};
struct {
unsigned :6;
unsigned RCIDL1 :1;
};
struct {
unsigned :6;
unsigned RCMT :1;
};
struct {
unsigned :6;
unsigned RCMT1 :1;
};
struct {
unsigned :5;
unsigned RXDTP1 :1;
};
struct {
unsigned :4;
unsigned SCKP :1;
};
struct {
unsigned :4;
unsigned SCKP1 :1;
};
struct {
unsigned :4;
unsigned TXCKP1 :1;
};
struct {
unsigned :1;
unsigned WUE1 :1;
};
struct {
unsigned :5;
unsigned RXCKP :1;
};
struct {
unsigned :1;
unsigned W4E :1;
};
} BAUDCON1bits_t;
extern volatile BAUDCON1bits_t BAUDCON1bits @ 0xF7E;
# 5827
typedef union {
struct {
unsigned ABDEN :1;
unsigned WUE :1;
unsigned :1;
unsigned BRG16 :1;
unsigned TXCKP :1;
unsigned RXDTP :1;
unsigned RCIDL :1;
unsigned ABDOVF :1;
};
struct {
unsigned ABDEN1 :1;
};
struct {
unsigned :7;
unsigned ABDOVF1 :1;
};
struct {
unsigned :3;
unsigned BRG161 :1;
};
struct {
unsigned :4;
unsigned CKTXP :1;
};
struct {
unsigned :5;
unsigned DTRXP :1;
};
struct {
unsigned :5;
unsigned DTRXP1 :1;
};
struct {
unsigned :6;
unsigned RCIDL1 :1;
};
struct {
unsigned :6;
unsigned RCMT :1;
};
struct {
unsigned :6;
unsigned RCMT1 :1;
};
struct {
unsigned :5;
unsigned RXDTP1 :1;
};
struct {
unsigned :4;
unsigned SCKP :1;
};
struct {
unsigned :4;
unsigned SCKP1 :1;
};
struct {
unsigned :4;
unsigned TXCKP1 :1;
};
struct {
unsigned :1;
unsigned WUE1 :1;
};
struct {
unsigned :5;
unsigned RXCKP :1;
};
struct {
unsigned :1;
unsigned W4E :1;
};
} BAUDCONbits_t;
extern volatile BAUDCONbits_t BAUDCONbits @ 0xF7E;
# 6019
typedef union {
struct {
unsigned ABDEN :1;
unsigned WUE :1;
unsigned :1;
unsigned BRG16 :1;
unsigned TXCKP :1;
unsigned RXDTP :1;
unsigned RCIDL :1;
unsigned ABDOVF :1;
};
struct {
unsigned ABDEN1 :1;
};
struct {
unsigned :7;
unsigned ABDOVF1 :1;
};
struct {
unsigned :3;
unsigned BRG161 :1;
};
struct {
unsigned :4;
unsigned CKTXP :1;
};
struct {
unsigned :5;
unsigned DTRXP :1;
};
struct {
unsigned :5;
unsigned DTRXP1 :1;
};
struct {
unsigned :6;
unsigned RCIDL1 :1;
};
struct {
unsigned :6;
unsigned RCMT :1;
};
struct {
unsigned :6;
unsigned RCMT1 :1;
};
struct {
unsigned :5;
unsigned RXDTP1 :1;
};
struct {
unsigned :4;
unsigned SCKP :1;
};
struct {
unsigned :4;
unsigned SCKP1 :1;
};
struct {
unsigned :4;
unsigned TXCKP1 :1;
};
struct {
unsigned :1;
unsigned WUE1 :1;
};
struct {
unsigned :5;
unsigned RXCKP :1;
};
struct {
unsigned :1;
unsigned W4E :1;
};
} BAUDCTLbits_t;
extern volatile BAUDCTLbits_t BAUDCTLbits @ 0xF7E;
# 6213
extern volatile unsigned char SPBRGH1 @ 0xF7F;
asm("SPBRGH1 equ 0F7Fh");
extern volatile unsigned char SPBRGH @ 0xF7F;
asm("SPBRGH equ 0F7Fh");
typedef union {
struct {
unsigned SPBRGH1 :8;
};
} SPBRGH1bits_t;
extern volatile SPBRGH1bits_t SPBRGH1bits @ 0xF7F;
# 6236
typedef union {
struct {
unsigned SPBRGH1 :8;
};
} SPBRGHbits_t;
extern volatile SPBRGHbits_t SPBRGHbits @ 0xF7F;
# 6250
extern volatile unsigned char PORTA @ 0xF80;
asm("PORTA equ 0F80h");
typedef union {
struct {
unsigned RA0 :1;
unsigned RA1 :1;
unsigned RA2 :1;
unsigned RA3 :1;
unsigned :1;
unsigned RA5 :1;
unsigned RA6 :1;
unsigned RA7 :1;
};
struct {
unsigned AN0 :1;
unsigned AN1 :1;
unsigned AN2 :1;
unsigned AN3 :1;
unsigned :1;
unsigned AN4 :1;
unsigned OSC2 :1;
unsigned OSC1 :1;
};
struct {
unsigned :5;
unsigned NOT_SS1 :1;
};
struct {
unsigned C1INA :1;
unsigned C2INA :1;
unsigned VREF_MINUS :1;
unsigned VREF_PLUS :1;
unsigned :1;
unsigned nSS1 :1;
unsigned CLKO :1;
unsigned CLKI :1;
};
struct {
unsigned :2;
unsigned CVREF :1;
unsigned C1INB :1;
unsigned :1;
unsigned HLVDIN :1;
};
struct {
unsigned RP0 :1;
unsigned RP1 :1;
unsigned C2INB :1;
};
struct {
unsigned ULPWU :1;
unsigned VBG :1;
unsigned C3INB :1;
unsigned :2;
unsigned RP2 :1;
};
struct {
unsigned :2;
unsigned C1IND :1;
unsigned :2;
unsigned C1INC :1;
};
struct {
unsigned :5;
unsigned LVDIN :1;
};
struct {
unsigned :4;
unsigned RA4 :1;
};
struct {
unsigned :7;
unsigned RJPU :1;
};
struct {
unsigned ULPWUIN :1;
};
} PORTAbits_t;
extern volatile PORTAbits_t PORTAbits @ 0xF80;
# 6525
extern volatile unsigned char PORTB @ 0xF81;
asm("PORTB equ 0F81h");
typedef union {
struct {
unsigned RB0 :1;
unsigned RB1 :1;
unsigned RB2 :1;
unsigned RB3 :1;
unsigned RB4 :1;
unsigned RB5 :1;
unsigned RB6 :1;
unsigned RB7 :1;
};
struct {
unsigned AN12 :1;
unsigned AN10 :1;
unsigned AN8 :1;
unsigned AN9 :1;
unsigned :2;
unsigned KBI2 :1;
unsigned KBI3 :1;
};
struct {
unsigned INT0 :1;
unsigned :1;
unsigned CTED1 :1;
unsigned CTED2 :1;
unsigned KBI0 :1;
unsigned KBI1 :1;
unsigned PGC :1;
unsigned PGD :1;
};
struct {
unsigned RP3 :1;
unsigned RTCC :1;
unsigned :4;
unsigned RP9 :1;
unsigned RP10 :1;
};
struct {
unsigned C3IND :1;
unsigned C3INC :1;
unsigned C2INC :1;
unsigned :1;
unsigned SCL2 :1;
unsigned SDA2 :1;
};
struct {
unsigned :1;
unsigned RP4 :1;
unsigned REFO :1;
unsigned RP6 :1;
unsigned RP7 :1;
unsigned RP8 :1;
};
struct {
unsigned :2;
unsigned RP5 :1;
unsigned C3INA :1;
unsigned CCP4 :1;
unsigned CCP5 :1;
unsigned CCP6 :1;
unsigned CCP7 :1;
};
struct {
unsigned :3;
unsigned CCP2_PA2 :1;
};
} PORTBbits_t;
extern volatile PORTBbits_t PORTBbits @ 0xF81;
# 6811
extern volatile unsigned char PORTC @ 0xF82;
asm("PORTC equ 0F82h");
typedef union {
struct {
unsigned RC0 :1;
unsigned RC1 :1;
unsigned RC2 :1;
unsigned RC3 :1;
unsigned RC4 :1;
unsigned RC5 :1;
unsigned RC6 :1;
unsigned RC7 :1;
};
struct {
unsigned T1OSO :1;
unsigned T1OSI :1;
unsigned AN11 :1;
unsigned SCL1 :1;
unsigned SDA1 :1;
};
struct {
unsigned T1CKI :1;
unsigned :1;
unsigned CTPLS :1;
unsigned :3;
unsigned TX1 :1;
unsigned RX1 :1;
};
struct {
unsigned RP11 :1;
unsigned RP12 :1;
unsigned RP13 :1;
unsigned RP14 :1;
unsigned RP15 :1;
unsigned RP16 :1;
unsigned CK1 :1;
unsigned DT1 :1;
};
struct {
unsigned :1;
unsigned CCP8 :1;
unsigned C2IND :1;
unsigned SCK1 :1;
unsigned SDI1 :1;
unsigned SDO1 :1;
unsigned CCP9 :1;
unsigned CCP10 :1;
};
struct {
unsigned :6;
unsigned RP17 :1;
unsigned RP18 :1;
};
struct {
unsigned :1;
unsigned CCP2 :1;
};
struct {
unsigned :2;
unsigned PA1 :1;
};
struct {
unsigned :1;
unsigned PA2 :1;
};
} PORTCbits_t;
extern volatile PORTCbits_t PORTCbits @ 0xF82;
# 7069
extern volatile unsigned char HLVDCON @ 0xF85;
asm("HLVDCON equ 0F85h");
typedef union {
struct {
unsigned HLVDL :4;
unsigned HLVDEN :1;
unsigned IRVST :1;
unsigned BGVST :1;
unsigned VDIRMAG :1;
};
struct {
unsigned HLVDL0 :1;
unsigned HLVDL1 :1;
unsigned HLVDL2 :1;
unsigned HLVDL3 :1;
};
} HLVDCONbits_t;
extern volatile HLVDCONbits_t HLVDCONbits @ 0xF85;
# 7138
extern volatile unsigned char DMACON2 @ 0xF86;
asm("DMACON2 equ 0F86h");
typedef union {
struct {
unsigned INTLVL :4;
unsigned DLYCYC :4;
};
struct {
unsigned INTLVL0 :1;
unsigned INTLVL1 :1;
unsigned INTLVL2 :1;
unsigned INTLVL3 :1;
unsigned DLYCYC0 :1;
unsigned DLYCYC1 :1;
unsigned DLYCYC2 :1;
unsigned DLYCYC3 :1;
};
} DMACON2bits_t;
extern volatile DMACON2bits_t DMACON2bits @ 0xF86;
# 7213
extern volatile unsigned char OSCCON2 @ 0xF87;
asm("OSCCON2 equ 0F87h");
typedef union {
struct {
unsigned :2;
unsigned PRISD :1;
unsigned SOSCGO :1;
unsigned SOSCDRV :1;
unsigned :1;
unsigned SOSCRUN :1;
};
} OSCCON2bits_t;
extern volatile OSCCON2bits_t OSCCON2bits @ 0xF87;
# 7252
extern volatile unsigned char DMACON1 @ 0xF88;
asm("DMACON1 equ 0F88h");
typedef union {
struct {
unsigned DMAEN :1;
unsigned DLYINTEN :1;
unsigned DUPLEX0 :1;
unsigned DUPLEX1 :1;
unsigned RXINC :1;
unsigned TXINC :1;
unsigned SSCON0 :1;
unsigned SSCON1 :1;
};
} DMACON1bits_t;
extern volatile DMACON1bits_t DMACON1bits @ 0xF88;
# 7313
extern volatile unsigned char LATA @ 0xF89;
asm("LATA equ 0F89h");
typedef union {
struct {
unsigned LATA0 :1;
unsigned LATA1 :1;
unsigned LATA2 :1;
unsigned LATA3 :1;
unsigned :1;
unsigned LATA5 :1;
unsigned LATA6 :1;
unsigned LATA7 :1;
};
struct {
unsigned LA0 :1;
};
struct {
unsigned :1;
unsigned LA1 :1;
};
struct {
unsigned :2;
unsigned LA2 :1;
};
struct {
unsigned :3;
unsigned LA3 :1;
};
struct {
unsigned :4;
unsigned LA4 :1;
};
struct {
unsigned :5;
unsigned LA5 :1;
};
struct {
unsigned :6;
unsigned LA6 :1;
};
struct {
unsigned :7;
unsigned LA7 :1;
};
} LATAbits_t;
extern volatile LATAbits_t LATAbits @ 0xF89;
# 7440
extern volatile unsigned char LATB @ 0xF8A;
asm("LATB equ 0F8Ah");
typedef union {
struct {
unsigned LATB0 :1;
unsigned LATB1 :1;
unsigned LATB2 :1;
unsigned LATB3 :1;
unsigned LATB4 :1;
unsigned LATB5 :1;
unsigned LATB6 :1;
unsigned LATB7 :1;
};
struct {
unsigned LB0 :1;
};
struct {
unsigned :1;
unsigned LB1 :1;
};
struct {
unsigned :2;
unsigned LB2 :1;
};
struct {
unsigned :3;
unsigned LB3 :1;
};
struct {
unsigned :4;
unsigned LB4 :1;
};
struct {
unsigned :5;
unsigned LB5 :1;
};
struct {
unsigned :6;
unsigned LB6 :1;
};
struct {
unsigned :7;
unsigned LB7 :1;
};
} LATBbits_t;
extern volatile LATBbits_t LATBbits @ 0xF8A;
# 7572
extern volatile unsigned char LATC @ 0xF8B;
asm("LATC equ 0F8Bh");
typedef union {
struct {
unsigned LATC0 :1;
unsigned LATC1 :1;
unsigned LATC2 :1;
unsigned LATC3 :1;
unsigned LATC4 :1;
unsigned LATC5 :1;
unsigned LATC6 :1;
unsigned LATC7 :1;
};
struct {
unsigned LC0 :1;
};
struct {
unsigned :1;
unsigned LC1 :1;
};
struct {
unsigned :2;
unsigned LC2 :1;
};
struct {
unsigned :3;
unsigned LC3 :1;
};
struct {
unsigned :4;
unsigned LC4 :1;
};
struct {
unsigned :5;
unsigned LC5 :1;
};
struct {
unsigned :6;
unsigned LC6 :1;
};
struct {
unsigned :7;
unsigned LC7 :1;
};
} LATCbits_t;
extern volatile LATCbits_t LATCbits @ 0xF8B;
# 7704
extern volatile unsigned char PIE4 @ 0xF8E;
asm("PIE4 equ 0F8Eh");
typedef union {
struct {
unsigned CCP3IE :1;
unsigned CCP4IE :1;
unsigned CCP5IE :1;
unsigned CCP6IE :1;
unsigned CCP7IE :1;
unsigned CCP8IE :1;
unsigned CCP9IE :1;
unsigned CCP10IE :1;
};
} PIE4bits_t;
extern volatile PIE4bits_t PIE4bits @ 0xF8E;
# 7765
extern volatile unsigned char PIR4 @ 0xF8F;
asm("PIR4 equ 0F8Fh");
typedef union {
struct {
unsigned CCP3IF :1;
unsigned CCP4IF :1;
unsigned CCP5IF :1;
unsigned CCP6IF :1;
unsigned CCP7IF :1;
unsigned CCP8IF :1;
unsigned CCP9IF :1;
unsigned CCP10IF :1;
};
} PIR4bits_t;
extern volatile PIR4bits_t PIR4bits @ 0xF8F;
# 7826
extern volatile unsigned char IPR4 @ 0xF90;
asm("IPR4 equ 0F90h");
typedef union {
struct {
unsigned CCP3IP :1;
unsigned CCP4IP :1;
unsigned CCP5IP :1;
unsigned CCP6IP :1;
unsigned CCP7IP :1;
unsigned CCP8IP :1;
unsigned CCP9IP :1;
unsigned CCP10IP :1;
};
struct {
unsigned CCIP3IP :1;
};
} IPR4bits_t;
extern volatile IPR4bits_t IPR4bits @ 0xF90;
# 7895
extern volatile unsigned char PIE5 @ 0xF91;
asm("PIE5 equ 0F91h");
typedef union {
struct {
unsigned TMR1GIE :1;
unsigned TMR5GIE :1;
unsigned TMR5IE :1;
unsigned TMR6IE :1;
unsigned TMR8IE :1;
unsigned CM3IE :1;
};
} PIE5bits_t;
extern volatile PIE5bits_t PIE5bits @ 0xF91;
# 7944
extern volatile unsigned char TRISA @ 0xF92;
asm("TRISA equ 0F92h");
typedef union {
struct {
unsigned TRISA0 :1;
unsigned TRISA1 :1;
unsigned TRISA2 :1;
unsigned TRISA3 :1;
unsigned :1;
unsigned TRISA5 :1;
unsigned TRISA6 :1;
unsigned TRISA7 :1;
};
} TRISAbits_t;
extern volatile TRISAbits_t TRISAbits @ 0xF92;
# 8000
extern volatile unsigned char TRISB @ 0xF93;
asm("TRISB equ 0F93h");
typedef union {
struct {
unsigned TRISB0 :1;
unsigned TRISB1 :1;
unsigned TRISB2 :1;
unsigned TRISB3 :1;
unsigned TRISB4 :1;
unsigned TRISB5 :1;
unsigned TRISB6 :1;
unsigned TRISB7 :1;
};
} TRISBbits_t;
extern volatile TRISBbits_t TRISBbits @ 0xF93;
# 8061
extern volatile unsigned char TRISC @ 0xF94;
asm("TRISC equ 0F94h");
typedef union {
struct {
unsigned TRISC0 :1;
unsigned TRISC1 :1;
unsigned TRISC2 :1;
unsigned TRISC3 :1;
unsigned TRISC4 :1;
unsigned TRISC5 :1;
unsigned TRISC6 :1;
unsigned TRISC7 :1;
};
} TRISCbits_t;
extern volatile TRISCbits_t TRISCbits @ 0xF94;
# 8122
extern volatile unsigned char T3GCON @ 0xF97;
asm("T3GCON equ 0F97h");
typedef union {
struct {
unsigned T3GSS0 :1;
unsigned T3GSS1 :1;
unsigned T3GVAL :1;
unsigned T3GGO_T3DONE :1;
unsigned T3GSPM :1;
unsigned T3GTM :1;
unsigned T3GPOL :1;
unsigned TMR3GE :1;
};
struct {
unsigned :3;
unsigned T3GGO :1;
};
struct {
unsigned :3;
unsigned T3DONE :1;
};
} T3GCONbits_t;
extern volatile T3GCONbits_t T3GCONbits @ 0xF97;
# 8201
extern volatile unsigned char PIR5 @ 0xF98;
asm("PIR5 equ 0F98h");
typedef union {
struct {
unsigned TMR1GIF :1;
unsigned TMR5GIF :1;
unsigned TMR5IF :1;
unsigned TMR6IF :1;
unsigned TMR8IF :1;
unsigned CM3IF :1;
};
} PIR5bits_t;
extern volatile PIR5bits_t PIR5bits @ 0xF98;
# 8250
extern volatile unsigned char IPR5 @ 0xF99;
asm("IPR5 equ 0F99h");
typedef union {
struct {
unsigned TMR1GIP :1;
unsigned TMR5GIP :1;
unsigned TMR5IP :1;
unsigned TMR6IP :1;
unsigned TMR8IP :1;
unsigned CM3IP :1;
};
struct {
unsigned CCH05 :1;
};
struct {
unsigned :1;
unsigned CCH15 :1;
};
struct {
unsigned :3;
unsigned EVPOL05 :1;
};
struct {
unsigned :4;
unsigned EVPOL15 :1;
};
} IPR5bits_t;
extern volatile IPR5bits_t IPR5bits @ 0xF99;
# 8334
extern volatile unsigned char T1GCON @ 0xF9A;
asm("T1GCON equ 0F9Ah");
typedef union {
struct {
unsigned :3;
unsigned T1GGO_NOT_T1DONE :1;
};
struct {
unsigned T1GSS0 :1;
unsigned T1GSS1 :1;
unsigned T1GVAL :1;
unsigned T1GGO_nT1DONE :1;
unsigned T1GSPM :1;
unsigned T1GTM :1;
unsigned T1GPOL :1;
unsigned TMR1GE :1;
};
struct {
unsigned :3;
unsigned T1GGO :1;
};
struct {
unsigned :3;
unsigned NOT_T1DONE :1;
};
struct {
unsigned :3;
unsigned nT1DONE :1;
};
struct {
unsigned :3;
unsigned T1DONE :1;
};
} T1GCONbits_t;
extern volatile T1GCONbits_t T1GCONbits @ 0xF9A;
# 8440
extern volatile unsigned char OSCTUNE @ 0xF9B;
asm("OSCTUNE equ 0F9Bh");
typedef union {
struct {
unsigned TUN :6;
unsigned PLLEN :1;
unsigned INTSRC :1;
};
struct {
unsigned TUN0 :1;
unsigned TUN1 :1;
unsigned TUN2 :1;
unsigned TUN3 :1;
unsigned TUN4 :1;
unsigned TUN5 :1;
};
} OSCTUNEbits_t;
extern volatile OSCTUNEbits_t OSCTUNEbits @ 0xF9B;
# 8509
extern volatile unsigned char RCSTA2 @ 0xF9C;
asm("RCSTA2 equ 0F9Ch");
typedef union {
struct {
unsigned RX9D :1;
unsigned OERR :1;
unsigned FERR :1;
unsigned ADDEN :1;
unsigned CREN :1;
unsigned SREN :1;
unsigned RX9 :1;
unsigned SPEN :1;
};
struct {
unsigned RX9D2 :1;
unsigned OERR2 :1;
unsigned FERR2 :1;
unsigned ADDEN2 :1;
unsigned CREN2 :1;
unsigned SREN2 :1;
unsigned RX92 :1;
unsigned SPEN2 :1;
};
struct {
unsigned :6;
unsigned RC8_92 :1;
};
struct {
unsigned :6;
unsigned RC92 :1;
};
struct {
unsigned RCD82 :1;
};
} RCSTA2bits_t;
extern volatile RCSTA2bits_t RCSTA2bits @ 0xF9C;
# 8646
extern volatile unsigned char PIE1 @ 0xF9D;
asm("PIE1 equ 0F9Dh");
typedef union {
struct {
unsigned TMR1IE :1;
unsigned TMR2IE :1;
unsigned CCP1IE :1;
unsigned SSP1IE :1;
unsigned TX1IE :1;
unsigned RC1IE :1;
unsigned ADIE :1;
};
struct {
unsigned :3;
unsigned SSPIE :1;
unsigned TXIE :1;
unsigned RCIE :1;
};
} PIE1bits_t;
extern volatile PIE1bits_t PIE1bits @ 0xF9D;
# 8722
extern volatile unsigned char PIR1 @ 0xF9E;
asm("PIR1 equ 0F9Eh");
typedef union {
struct {
unsigned TMR1IF :1;
unsigned TMR2IF :1;
unsigned CCP1IF :1;
unsigned SSP1IF :1;
unsigned TX1IF :1;
unsigned RC1IF :1;
unsigned ADIF :1;
};
struct {
unsigned :3;
unsigned SSPIF :1;
unsigned TXIF :1;
unsigned RCIF :1;
};
} PIR1bits_t;
extern volatile PIR1bits_t PIR1bits @ 0xF9E;
# 8798
extern volatile unsigned char IPR1 @ 0xF9F;
asm("IPR1 equ 0F9Fh");
typedef union {
struct {
unsigned TMR1IP :1;
unsigned TMR2IP :1;
unsigned CCP1IP :1;
unsigned SSP1IP :1;
unsigned TX1IP :1;
unsigned RC1IP :1;
unsigned ADIP :1;
};
struct {
unsigned :3;
unsigned SSPIP :1;
unsigned TXIP :1;
unsigned RCIP :1;
};
} IPR1bits_t;
extern volatile IPR1bits_t IPR1bits @ 0xF9F;
# 8874
extern volatile unsigned char PIE2 @ 0xFA0;
asm("PIE2 equ 0FA0h");
typedef union {
struct {
unsigned CCP2IE :1;
unsigned TMR3IE :1;
unsigned LVDIE :1;
unsigned BCL1IE :1;
unsigned :1;
unsigned CM1IE :1;
unsigned CM2IE :1;
unsigned OSCFIE :1;
};
struct {
unsigned :2;
unsigned HLVDIE :1;
unsigned BCLIE :1;
};
struct {
unsigned :6;
unsigned CMIE :1;
};
} PIE2bits_t;
extern volatile PIE2bits_t PIE2bits @ 0xFA0;
# 8954
extern volatile unsigned char PIR2 @ 0xFA1;
asm("PIR2 equ 0FA1h");
typedef union {
struct {
unsigned CCP2IF :1;
unsigned TMR3IF :1;
unsigned LVDIF :1;
unsigned BCL1IF :1;
unsigned :1;
unsigned CM1IF :1;
unsigned CM2IF :1;
unsigned OSCFIF :1;
};
struct {
unsigned :2;
unsigned HLVDIF :1;
unsigned BCLIF :1;
};
struct {
unsigned :6;
unsigned CMIF :1;
};
} PIR2bits_t;
extern volatile PIR2bits_t PIR2bits @ 0xFA1;
# 9034
extern volatile unsigned char IPR2 @ 0xFA2;
asm("IPR2 equ 0FA2h");
typedef union {
struct {
unsigned CCP2IP :1;
unsigned TMR3IP :1;
unsigned LVDIP :1;
unsigned BCL1IP :1;
unsigned :1;
unsigned CM1IP :1;
unsigned CM2IP :1;
unsigned OSCFIP :1;
};
struct {
unsigned :2;
unsigned HLVDIP :1;
unsigned BCLIP :1;
};
struct {
unsigned :6;
unsigned CMIP :1;
};
} IPR2bits_t;
extern volatile IPR2bits_t IPR2bits @ 0xFA2;
# 9114
extern volatile unsigned char PIE3 @ 0xFA3;
asm("PIE3 equ 0FA3h");
typedef union {
struct {
unsigned RTCCIE :1;
unsigned TMR3GIE :1;
unsigned CTMUIE :1;
unsigned TMR4IE :1;
unsigned TX2IE :1;
unsigned RC2IE :1;
unsigned BCL2IE :1;
unsigned SSP2IE :1;
};
struct {
unsigned RXB0IE :1;
};
struct {
unsigned :1;
unsigned RXB1IE :1;
};
struct {
unsigned :1;
unsigned RXBNIE :1;
};
struct {
unsigned :2;
unsigned TXB0IE :1;
};
struct {
unsigned :3;
unsigned TXB1IE :1;
};
struct {
unsigned :4;
unsigned TXB2IE :1;
};
struct {
unsigned :4;
unsigned TXBNIE :1;
};
} PIE3bits_t;
extern volatile PIE3bits_t PIE3bits @ 0xFA3;
# 9237
extern volatile unsigned char PIR3 @ 0xFA4;
asm("PIR3 equ 0FA4h");
typedef union {
struct {
unsigned RTCCIF :1;
unsigned TMR3GIF :1;
unsigned CTMUIF :1;
unsigned TMR4IF :1;
unsigned TX2IF :1;
unsigned RC2IF :1;
unsigned BCL2IF :1;
unsigned SSP2IF :1;
};
struct {
unsigned :1;
unsigned RXBNIF :1;
};
struct {
unsigned :4;
unsigned TXBNIF :1;
};
} PIR3bits_t;
extern volatile PIR3bits_t PIR3bits @ 0xFA4;
# 9316
extern volatile unsigned char IPR3 @ 0xFA5;
asm("IPR3 equ 0FA5h");
typedef union {
struct {
unsigned RTCCIP :1;
unsigned TMR3GIP :1;
unsigned CTMUIP :1;
unsigned TMR4IP :1;
unsigned TX2IP :1;
unsigned RC2IP :1;
unsigned BCL2IP :1;
unsigned SSP2IP :1;
};
struct {
unsigned :1;
unsigned RXBNIP :1;
};
struct {
unsigned :4;
unsigned TXBNIP :1;
};
} IPR3bits_t;
extern volatile IPR3bits_t IPR3bits @ 0xFA5;
# 9395
extern volatile unsigned char EECON1 @ 0xFA6;
asm("EECON1 equ 0FA6h");
typedef union {
struct {
unsigned :1;
unsigned WR :1;
unsigned WREN :1;
unsigned WRERR :1;
unsigned FREE :1;
unsigned WPROG :1;
};
} EECON1bits_t;
extern volatile EECON1bits_t EECON1bits @ 0xFA6;
# 9439
extern volatile unsigned char EECON2 @ 0xFA7;
asm("EECON2 equ 0FA7h");
typedef union {
struct {
unsigned EECON2 :8;
};
} EECON2bits_t;
extern volatile EECON2bits_t EECON2bits @ 0xFA7;
# 9458
extern volatile unsigned char TXSTA2 @ 0xFA8;
asm("TXSTA2 equ 0FA8h");
typedef union {
struct {
unsigned TX9D :1;
unsigned TRMT :1;
unsigned BRGH :1;
unsigned SENDB :1;
unsigned SYNC :1;
unsigned TXEN :1;
unsigned TX9 :1;
unsigned CSRC :1;
};
struct {
unsigned TX9D2 :1;
unsigned TRMT2 :1;
unsigned BRGH2 :1;
unsigned SENDB2 :1;
unsigned SYNC2 :1;
unsigned TXEN2 :1;
unsigned TX92 :1;
unsigned CSRC2 :1;
};
struct {
unsigned :6;
unsigned TX8_92 :1;
};
struct {
unsigned TXD82 :1;
};
} TXSTA2bits_t;
extern volatile TXSTA2bits_t TXSTA2bits @ 0xFA8;
# 9586
extern volatile unsigned char TXREG2 @ 0xFA9;
asm("TXREG2 equ 0FA9h");
typedef union {
struct {
unsigned TXREG2 :8;
};
} TXREG2bits_t;
extern volatile TXREG2bits_t TXREG2bits @ 0xFA9;
# 9605
extern volatile unsigned char RCREG2 @ 0xFAA;
asm("RCREG2 equ 0FAAh");
typedef union {
struct {
unsigned RCREG2 :8;
};
} RCREG2bits_t;
extern volatile RCREG2bits_t RCREG2bits @ 0xFAA;
# 9624
extern volatile unsigned char SPBRG2 @ 0xFAB;
asm("SPBRG2 equ 0FABh");
typedef union {
struct {
unsigned SPBRG2 :8;
};
} SPBRG2bits_t;
extern volatile SPBRG2bits_t SPBRG2bits @ 0xFAB;
# 9643
extern volatile unsigned char RCSTA1 @ 0xFAC;
asm("RCSTA1 equ 0FACh");
extern volatile unsigned char RCSTA @ 0xFAC;
asm("RCSTA equ 0FACh");
typedef union {
struct {
unsigned RX9D :1;
unsigned OERR :1;
unsigned FERR :1;
unsigned ADDEN :1;
unsigned CREN :1;
unsigned SREN :1;
unsigned RX9 :1;
unsigned SPEN :1;
};
struct {
unsigned RCD8 :1;
unsigned :2;
unsigned ADEN :1;
unsigned :2;
unsigned RC9 :1;
};
struct {
unsigned :6;
unsigned NOT_RC8 :1;
};
struct {
unsigned :6;
unsigned nRC8 :1;
};
struct {
unsigned :6;
unsigned RC8_9 :1;
};
struct {
unsigned RX9D1 :1;
unsigned OERR1 :1;
unsigned FERR1 :1;
unsigned ADDEN1 :1;
unsigned CREN1 :1;
unsigned SREN1 :1;
unsigned RX91 :1;
unsigned SPEN1 :1;
};
struct {
unsigned :5;
unsigned SRENA :1;
};
} RCSTA1bits_t;
extern volatile RCSTA1bits_t RCSTA1bits @ 0xFAC;
# 9816
typedef union {
struct {
unsigned RX9D :1;
unsigned OERR :1;
unsigned FERR :1;
unsigned ADDEN :1;
unsigned CREN :1;
unsigned SREN :1;
unsigned RX9 :1;
unsigned SPEN :1;
};
struct {
unsigned RCD8 :1;
unsigned :2;
unsigned ADEN :1;
unsigned :2;
unsigned RC9 :1;
};
struct {
unsigned :6;
unsigned NOT_RC8 :1;
};
struct {
unsigned :6;
unsigned nRC8 :1;
};
struct {
unsigned :6;
unsigned RC8_9 :1;
};
struct {
unsigned RX9D1 :1;
unsigned OERR1 :1;
unsigned FERR1 :1;
unsigned ADDEN1 :1;
unsigned CREN1 :1;
unsigned SREN1 :1;
unsigned RX91 :1;
unsigned SPEN1 :1;
};
struct {
unsigned :5;
unsigned SRENA :1;
};
} RCSTAbits_t;
extern volatile RCSTAbits_t RCSTAbits @ 0xFAC;
# 9980
extern volatile unsigned char TXSTA1 @ 0xFAD;
asm("TXSTA1 equ 0FADh");
extern volatile unsigned char TXSTA @ 0xFAD;
asm("TXSTA equ 0FADh");
typedef union {
struct {
unsigned TX9D :1;
unsigned TRMT :1;
unsigned BRGH :1;
unsigned SENDB :1;
unsigned SYNC :1;
unsigned TXEN :1;
unsigned TX9 :1;
unsigned CSRC :1;
};
struct {
unsigned TXD8 :1;
unsigned :5;
unsigned TX8_9 :1;
};
struct {
unsigned :6;
unsigned NOT_TX8 :1;
};
struct {
unsigned :6;
unsigned nTX8 :1;
};
struct {
unsigned TX9D1 :1;
unsigned TRMT1 :1;
unsigned BRGH1 :1;
unsigned SENDB1 :1;
unsigned SYNC1 :1;
unsigned TXEN1 :1;
unsigned TX91 :1;
unsigned CSRC1 :1;
};
} TXSTA1bits_t;
extern volatile TXSTA1bits_t TXSTA1bits @ 0xFAD;
# 10128
typedef union {
struct {
unsigned TX9D :1;
unsigned TRMT :1;
unsigned BRGH :1;
unsigned SENDB :1;
unsigned SYNC :1;
unsigned TXEN :1;
unsigned TX9 :1;
unsigned CSRC :1;
};
struct {
unsigned TXD8 :1;
unsigned :5;
unsigned TX8_9 :1;
};
struct {
unsigned :6;
unsigned NOT_TX8 :1;
};
struct {
unsigned :6;
unsigned nTX8 :1;
};
struct {
unsigned TX9D1 :1;
unsigned TRMT1 :1;
unsigned BRGH1 :1;
unsigned SENDB1 :1;
unsigned SYNC1 :1;
unsigned TXEN1 :1;
unsigned TX91 :1;
unsigned CSRC1 :1;
};
} TXSTAbits_t;
extern volatile TXSTAbits_t TXSTAbits @ 0xFAD;
# 10267
extern volatile unsigned char TXREG1 @ 0xFAE;
asm("TXREG1 equ 0FAEh");
extern volatile unsigned char TXREG @ 0xFAE;
asm("TXREG equ 0FAEh");
typedef union {
struct {
unsigned TXREG1 :8;
};
} TXREG1bits_t;
extern volatile TXREG1bits_t TXREG1bits @ 0xFAE;
# 10290
typedef union {
struct {
unsigned TXREG1 :8;
};
} TXREGbits_t;
extern volatile TXREGbits_t TXREGbits @ 0xFAE;
# 10304
extern volatile unsigned char RCREG1 @ 0xFAF;
asm("RCREG1 equ 0FAFh");
extern volatile unsigned char RCREG @ 0xFAF;
asm("RCREG equ 0FAFh");
typedef union {
struct {
unsigned RCREG1 :8;
};
} RCREG1bits_t;
extern volatile RCREG1bits_t RCREG1bits @ 0xFAF;
# 10327
typedef union {
struct {
unsigned RCREG1 :8;
};
} RCREGbits_t;
extern volatile RCREGbits_t RCREGbits @ 0xFAF;
# 10341
extern volatile unsigned char SPBRG1 @ 0xFB0;
asm("SPBRG1 equ 0FB0h");
extern volatile unsigned char SPBRG @ 0xFB0;
asm("SPBRG equ 0FB0h");
typedef union {
struct {
unsigned SPBRG1 :8;
};
} SPBRG1bits_t;
extern volatile SPBRG1bits_t SPBRG1bits @ 0xFB0;
# 10364
typedef union {
struct {
unsigned SPBRG1 :8;
};
} SPBRGbits_t;
extern volatile SPBRGbits_t SPBRGbits @ 0xFB0;
# 10378
extern volatile unsigned char CTMUICON @ 0xFB1;
asm("CTMUICON equ 0FB1h");
typedef union {
struct {
unsigned IRNG :2;
unsigned ITRIM :6;
};
struct {
unsigned IRNG0 :1;
unsigned IRNG1 :1;
unsigned ITRIM0 :1;
unsigned ITRIM1 :1;
unsigned ITRIM2 :1;
unsigned ITRIM3 :1;
unsigned ITRIM4 :1;
unsigned ITRIM5 :1;
};
} CTMUICONbits_t;
extern volatile CTMUICONbits_t CTMUICONbits @ 0xFB1;
# 10453
extern volatile unsigned char CTMUCONL @ 0xFB2;
asm("CTMUCONL equ 0FB2h");
typedef union {
struct {
unsigned EDG1STAT :1;
unsigned EDG2STAT :1;
unsigned EDG1SEL0 :1;
unsigned EDG1SEL1 :1;
unsigned EDG1POL :1;
unsigned EDG2SEL0 :1;
unsigned EDG2SEL1 :1;
unsigned EDG2POL :1;
};
} CTMUCONLbits_t;
extern volatile CTMUCONLbits_t CTMUCONLbits @ 0xFB2;
# 10514
extern volatile unsigned char CTMUCONH @ 0xFB3;
asm("CTMUCONH equ 0FB3h");
typedef union {
struct {
unsigned CTTRIG :1;
unsigned IDISSEN :1;
unsigned EDGSEQEN :1;
unsigned EDGEN :1;
unsigned TGEN :1;
unsigned CTMUSIDL :1;
unsigned :1;
unsigned CTMUEN :1;
};
} CTMUCONHbits_t;
extern volatile CTMUCONHbits_t CTMUCONHbits @ 0xFB3;
# 10570
extern volatile unsigned char CCP2CON @ 0xFB4;
asm("CCP2CON equ 0FB4h");
extern volatile unsigned char ECCP2CON @ 0xFB4;
asm("ECCP2CON equ 0FB4h");
typedef union {
struct {
unsigned CCP2M :4;
unsigned DC2B :2;
unsigned P2M :2;
};
struct {
unsigned CCP2M0 :1;
unsigned CCP2M1 :1;
unsigned CCP2M2 :1;
unsigned CCP2M3 :1;
unsigned DC2B0 :1;
unsigned DC2B1 :1;
unsigned P2M0 :1;
unsigned P2M1 :1;
};
struct {
unsigned :4;
unsigned CCP2Y :1;
unsigned CCP2X :1;
};
} CCP2CONbits_t;
extern volatile CCP2CONbits_t CCP2CONbits @ 0xFB4;
# 10670
typedef union {
struct {
unsigned CCP2M :4;
unsigned DC2B :2;
unsigned P2M :2;
};
struct {
unsigned CCP2M0 :1;
unsigned CCP2M1 :1;
unsigned CCP2M2 :1;
unsigned CCP2M3 :1;
unsigned DC2B0 :1;
unsigned DC2B1 :1;
unsigned P2M0 :1;
unsigned P2M1 :1;
};
struct {
unsigned :4;
unsigned CCP2Y :1;
unsigned CCP2X :1;
};
} ECCP2CONbits_t;
extern volatile ECCP2CONbits_t ECCP2CONbits @ 0xFB4;
# 10761
extern volatile unsigned short CCPR2 @ 0xFB5;
asm("CCPR2 equ 0FB5h");
extern volatile unsigned char CCPR2L @ 0xFB5;
asm("CCPR2L equ 0FB5h");
typedef union {
struct {
unsigned CCPR2L :8;
};
} CCPR2Lbits_t;
extern volatile CCPR2Lbits_t CCPR2Lbits @ 0xFB5;
# 10786
extern volatile unsigned char CCPR2H @ 0xFB6;
asm("CCPR2H equ 0FB6h");
typedef union {
struct {
unsigned CCPR2H :8;
};
} CCPR2Hbits_t;
extern volatile CCPR2Hbits_t CCPR2Hbits @ 0xFB6;
# 10805
extern volatile unsigned char ECCP2DEL @ 0xFB7;
asm("ECCP2DEL equ 0FB7h");
extern volatile unsigned char PWM2CON @ 0xFB7;
asm("PWM2CON equ 0FB7h");
typedef union {
struct {
unsigned P2DC :7;
unsigned P2RSEN :1;
};
struct {
unsigned P2DC0 :1;
unsigned P2DC1 :1;
unsigned P2DC2 :1;
unsigned P2DC3 :1;
unsigned P2DC4 :1;
unsigned P2DC5 :1;
unsigned P2DC6 :1;
};
} ECCP2DELbits_t;
extern volatile ECCP2DELbits_t ECCP2DELbits @ 0xFB7;
# 10878
typedef union {
struct {
unsigned P2DC :7;
unsigned P2RSEN :1;
};
struct {
unsigned P2DC0 :1;
unsigned P2DC1 :1;
unsigned P2DC2 :1;
unsigned P2DC3 :1;
unsigned P2DC4 :1;
unsigned P2DC5 :1;
unsigned P2DC6 :1;
};
} PWM2CONbits_t;
extern volatile PWM2CONbits_t PWM2CONbits @ 0xFB7;
# 10942
extern volatile unsigned char ECCP2AS @ 0xFB8;
asm("ECCP2AS equ 0FB8h");
typedef union {
struct {
unsigned PSS2BD :2;
unsigned PSS2AC :2;
unsigned ECCP2AS :3;
unsigned ECCP2ASE :1;
};
struct {
unsigned PSS2BD0 :1;
unsigned PSS2BD1 :1;
unsigned PSS2AC0 :1;
unsigned PSS2AC1 :1;
unsigned ECCP2AS0 :1;
unsigned ECCP2AS1 :1;
unsigned ECCP2AS2 :1;
};
} ECCP2ASbits_t;
extern volatile ECCP2ASbits_t ECCP2ASbits @ 0xFB8;
# 11023
extern volatile unsigned char PSTR2CON @ 0xFB9;
asm("PSTR2CON equ 0FB9h");
typedef union {
struct {
unsigned STRA :1;
unsigned STRB :1;
unsigned STRC :1;
unsigned STRD :1;
unsigned STRSYNC :1;
unsigned :1;
unsigned CMPL0 :1;
unsigned CMPL1 :1;
};
struct {
unsigned P2DC0 :1;
unsigned P2DC1 :1;
unsigned P2DC2 :1;
unsigned P2DC3 :1;
unsigned P2DC4 :1;
unsigned P2DC5 :1;
unsigned P2DC6 :1;
};
struct {
unsigned :6;
unsigned CMPL02 :1;
};
struct {
unsigned :7;
unsigned CMPL12 :1;
};
struct {
unsigned P2DC02 :1;
};
struct {
unsigned P2DC0CON :1;
};
struct {
unsigned :1;
unsigned P2DC12 :1;
};
struct {
unsigned :1;
unsigned P2DC1CON :1;
};
struct {
unsigned :2;
unsigned P2DC22 :1;
};
struct {
unsigned :2;
unsigned P2DC2CON :1;
};
struct {
unsigned :3;
unsigned P2DC32 :1;
};
struct {
unsigned :3;
unsigned P2DC3CON :1;
};
struct {
unsigned :4;
unsigned P2DC42 :1;
};
struct {
unsigned :4;
unsigned P2DC4CON :1;
};
struct {
unsigned :5;
unsigned P2DC52 :1;
};
struct {
unsigned :5;
unsigned P2DC5CON :1;
};
struct {
unsigned :6;
unsigned P2DC62 :1;
};
struct {
unsigned :6;
unsigned P2DC6CON :1;
};
struct {
unsigned STRA2 :1;
};
struct {
unsigned :1;
unsigned STRB2 :1;
};
struct {
unsigned :2;
unsigned STRC2 :1;
};
struct {
unsigned :3;
unsigned STRD2 :1;
};
struct {
unsigned :4;
unsigned STRSYNC2 :1;
};
} PSTR2CONbits_t;
extern volatile PSTR2CONbits_t PSTR2CONbits @ 0xFB9;
# 11309
extern volatile unsigned char CCP1CON @ 0xFBA;
asm("CCP1CON equ 0FBAh");
extern volatile unsigned char ECCP1CON @ 0xFBA;
asm("ECCP1CON equ 0FBAh");
typedef union {
struct {
unsigned CCP1M :4;
unsigned DC1B :2;
unsigned P1M :2;
};
struct {
unsigned CCP1M0 :1;
unsigned CCP1M1 :1;
unsigned CCP1M2 :1;
unsigned CCP1M3 :1;
unsigned DC1B0 :1;
unsigned DC1B1 :1;
unsigned P1M0 :1;
unsigned P1M1 :1;
};
struct {
unsigned :4;
unsigned CCP1Y :1;
unsigned CCP1X :1;
};
} CCP1CONbits_t;
extern volatile CCP1CONbits_t CCP1CONbits @ 0xFBA;
# 11409
typedef union {
struct {
unsigned CCP1M :4;
unsigned DC1B :2;
unsigned P1M :2;
};
struct {
unsigned CCP1M0 :1;
unsigned CCP1M1 :1;
unsigned CCP1M2 :1;
unsigned CCP1M3 :1;
unsigned DC1B0 :1;
unsigned DC1B1 :1;
unsigned P1M0 :1;
unsigned P1M1 :1;
};
struct {
unsigned :4;
unsigned CCP1Y :1;
unsigned CCP1X :1;
};
} ECCP1CONbits_t;
extern volatile ECCP1CONbits_t ECCP1CONbits @ 0xFBA;
# 11500
extern volatile unsigned short CCPR1 @ 0xFBB;
asm("CCPR1 equ 0FBBh");
extern volatile unsigned char CCPR1L @ 0xFBB;
asm("CCPR1L equ 0FBBh");
typedef union {
struct {
unsigned CCPR1L :8;
};
} CCPR1Lbits_t;
extern volatile CCPR1Lbits_t CCPR1Lbits @ 0xFBB;
# 11525
extern volatile unsigned char CCPR1H @ 0xFBC;
asm("CCPR1H equ 0FBCh");
typedef union {
struct {
unsigned CCPR1H :8;
};
} CCPR1Hbits_t;
extern volatile CCPR1Hbits_t CCPR1Hbits @ 0xFBC;
# 11544
extern volatile unsigned char ECCP1DEL @ 0xFBD;
asm("ECCP1DEL equ 0FBDh");
extern volatile unsigned char PWM1CON @ 0xFBD;
asm("PWM1CON equ 0FBDh");
typedef union {
struct {
unsigned P1DC :7;
unsigned P1RSEN :1;
};
struct {
unsigned P1DC0 :1;
unsigned P1DC1 :1;
unsigned P1DC2 :1;
unsigned P1DC3 :1;
unsigned P1DC4 :1;
unsigned P1DC5 :1;
unsigned P1DC6 :1;
};
} ECCP1DELbits_t;
extern volatile ECCP1DELbits_t ECCP1DELbits @ 0xFBD;
# 11617
typedef union {
struct {
unsigned P1DC :7;
unsigned P1RSEN :1;
};
struct {
unsigned P1DC0 :1;
unsigned P1DC1 :1;
unsigned P1DC2 :1;
unsigned P1DC3 :1;
unsigned P1DC4 :1;
unsigned P1DC5 :1;
unsigned P1DC6 :1;
};
} PWM1CONbits_t;
extern volatile PWM1CONbits_t PWM1CONbits @ 0xFBD;
# 11681
extern volatile unsigned char ECCP1AS @ 0xFBE;
asm("ECCP1AS equ 0FBEh");
typedef union {
struct {
unsigned PSS1BD :2;
unsigned PSS1AC :2;
unsigned ECCP1AS :3;
unsigned ECCP1ASE :1;
};
struct {
unsigned PSS1BD0 :1;
unsigned PSS1BD1 :1;
unsigned PSS1AC0 :1;
unsigned PSS1AC1 :1;
unsigned ECCP1AS0 :1;
unsigned ECCP1AS1 :1;
unsigned ECCP1AS2 :1;
};
} ECCP1ASbits_t;
extern volatile ECCP1ASbits_t ECCP1ASbits @ 0xFBE;
# 11762
extern volatile unsigned char PSTR1CON @ 0xFBF;
asm("PSTR1CON equ 0FBFh");
typedef union {
struct {
unsigned STRA :1;
unsigned STRB :1;
unsigned STRC :1;
unsigned STRD :1;
unsigned STRSYNC :1;
unsigned :1;
unsigned CMPL0 :1;
unsigned CMPL1 :1;
};
} PSTR1CONbits_t;
extern volatile PSTR1CONbits_t PSTR1CONbits @ 0xFBF;
# 11818
extern volatile unsigned char WDTCON @ 0xFC0;
asm("WDTCON equ 0FC0h");
typedef union {
struct {
unsigned SWDTEN :1;
unsigned ULPSINK :1;
unsigned ULPEN :1;
unsigned DS :1;
unsigned VBGOE :1;
unsigned ULPLVL :1;
unsigned LVDSTAT :1;
unsigned REGSLP :1;
};
struct {
unsigned SWDTE :1;
};
} WDTCONbits_t;
extern volatile WDTCONbits_t WDTCONbits @ 0xFC0;
# 11887
extern volatile unsigned char ADCON1 @ 0xFC1;
asm("ADCON1 equ 0FC1h");
typedef union {
struct {
unsigned ADCS :3;
unsigned ACQT :3;
unsigned ADCAL :1;
unsigned ADFM :1;
};
struct {
unsigned ADCS0 :1;
unsigned ADCS1 :1;
unsigned ADCS2 :1;
unsigned ACQT0 :1;
unsigned ACQT1 :1;
unsigned ACQT2 :1;
};
struct {
unsigned :3;
unsigned CHSN3 :1;
};
struct {
unsigned :4;
unsigned VCFG01 :1;
};
struct {
unsigned :5;
unsigned VCFG11 :1;
};
} ADCON1bits_t;
extern volatile ADCON1bits_t ADCON1bits @ 0xFC1;
# 11989
extern volatile unsigned char ADCON0 @ 0xFC2;
asm("ADCON0 equ 0FC2h");
typedef union {
struct {
unsigned :1;
unsigned GO_NOT_DONE :1;
};
struct {
unsigned ADON :1;
unsigned GO_nDONE :1;
unsigned CHS :4;
unsigned VCFG :2;
};
struct {
unsigned :1;
unsigned GO_DONE :1;
unsigned CHS0 :1;
unsigned CHS1 :1;
unsigned CHS2 :1;
unsigned CHS3 :1;
unsigned VCFG0 :1;
unsigned VCFG1 :1;
};
struct {
unsigned :1;
unsigned DONE :1;
};
struct {
unsigned :1;
unsigned GO :1;
};
struct {
unsigned :1;
unsigned NOT_DONE :1;
};
struct {
unsigned :1;
unsigned nDONE :1;
};
struct {
unsigned :7;
unsigned ADCAL :1;
};
struct {
unsigned :1;
unsigned GODONE :1;
};
} ADCON0bits_t;
extern volatile ADCON0bits_t ADCON0bits @ 0xFC2;
# 12134
extern volatile unsigned short ADRES @ 0xFC3;
asm("ADRES equ 0FC3h");
extern volatile unsigned char ADRESL @ 0xFC3;
asm("ADRESL equ 0FC3h");
typedef union {
struct {
unsigned ADRESL :8;
};
} ADRESLbits_t;
extern volatile ADRESLbits_t ADRESLbits @ 0xFC3;
# 12159
extern volatile unsigned char ADRESH @ 0xFC4;
asm("ADRESH equ 0FC4h");
typedef union {
struct {
unsigned ADRESH :8;
};
} ADRESHbits_t;
extern volatile ADRESHbits_t ADRESHbits @ 0xFC4;
# 12178
extern volatile unsigned char SSP1CON2 @ 0xFC5;
asm("SSP1CON2 equ 0FC5h");
extern volatile unsigned char SSPCON2 @ 0xFC5;
asm("SSPCON2 equ 0FC5h");
typedef union {
struct {
unsigned SEN :1;
unsigned RSEN :1;
unsigned PEN :1;
unsigned RCEN :1;
unsigned ACKEN :1;
unsigned ACKDT :1;
unsigned ACKSTAT :1;
unsigned GCEN :1;
};
struct {
unsigned :1;
unsigned ADMSK1 :1;
unsigned ADMSK2 :1;
unsigned ADMSK3 :1;
unsigned ADMSK4 :1;
unsigned ADMSK5 :1;
};
struct {
unsigned :5;
unsigned ACKDT1 :1;
};
struct {
unsigned :4;
unsigned ACKEN1 :1;
};
struct {
unsigned :6;
unsigned ACKSTAT1 :1;
};
struct {
unsigned :1;
unsigned ADMSK11 :1;
};
struct {
unsigned :2;
unsigned ADMSK21 :1;
};
struct {
unsigned :3;
unsigned ADMSK31 :1;
};
struct {
unsigned :4;
unsigned ADMSK41 :1;
};
struct {
unsigned :5;
unsigned ADMSK51 :1;
};
struct {
unsigned :7;
unsigned GCEN1 :1;
};
struct {
unsigned :2;
unsigned PEN1 :1;
};
struct {
unsigned :3;
unsigned RCEN1 :1;
};
struct {
unsigned :1;
unsigned RSEN1 :1;
};
struct {
unsigned SEN1 :1;
};
} SSP1CON2bits_t;
extern volatile SSP1CON2bits_t SSP1CON2bits @ 0xFC5;
# 12392
typedef union {
struct {
unsigned SEN :1;
unsigned RSEN :1;
unsigned PEN :1;
unsigned RCEN :1;
unsigned ACKEN :1;
unsigned ACKDT :1;
unsigned ACKSTAT :1;
unsigned GCEN :1;
};
struct {
unsigned :1;
unsigned ADMSK1 :1;
unsigned ADMSK2 :1;
unsigned ADMSK3 :1;
unsigned ADMSK4 :1;
unsigned ADMSK5 :1;
};
struct {
unsigned :5;
unsigned ACKDT1 :1;
};
struct {
unsigned :4;
unsigned ACKEN1 :1;
};
struct {
unsigned :6;
unsigned ACKSTAT1 :1;
};
struct {
unsigned :1;
unsigned ADMSK11 :1;
};
struct {
unsigned :2;
unsigned ADMSK21 :1;
};
struct {
unsigned :3;
unsigned ADMSK31 :1;
};
struct {
unsigned :4;
unsigned ADMSK41 :1;
};
struct {
unsigned :5;
unsigned ADMSK51 :1;
};
struct {
unsigned :7;
unsigned GCEN1 :1;
};
struct {
unsigned :2;
unsigned PEN1 :1;
};
struct {
unsigned :3;
unsigned RCEN1 :1;
};
struct {
unsigned :1;
unsigned RSEN1 :1;
};
struct {
unsigned SEN1 :1;
};
} SSPCON2bits_t;
extern volatile SSPCON2bits_t SSPCON2bits @ 0xFC5;
# 12597
extern volatile unsigned char SSP1CON1 @ 0xFC6;
asm("SSP1CON1 equ 0FC6h");
extern volatile unsigned char SSPCON1 @ 0xFC6;
asm("SSPCON1 equ 0FC6h");
typedef union {
struct {
unsigned SSPM :4;
unsigned CKP :1;
unsigned SSPEN :1;
unsigned SSPOV :1;
unsigned WCOL :1;
};
struct {
unsigned SSPM0 :1;
unsigned SSPM1 :1;
unsigned SSPM2 :1;
unsigned SSPM3 :1;
};
struct {
unsigned :4;
unsigned CKP1 :1;
};
struct {
unsigned :5;
unsigned SSPEN1 :1;
};
struct {
unsigned SSPM01 :1;
};
struct {
unsigned :1;
unsigned SSPM11 :1;
};
struct {
unsigned :2;
unsigned SSPM21 :1;
};
struct {
unsigned :3;
unsigned SSPM31 :1;
};
struct {
unsigned :6;
unsigned SSPOV1 :1;
};
struct {
unsigned :7;
unsigned WCOL1 :1;
};
} SSP1CON1bits_t;
extern volatile SSP1CON1bits_t SSP1CON1bits @ 0xFC6;
# 12741
typedef union {
struct {
unsigned SSPM :4;
unsigned CKP :1;
unsigned SSPEN :1;
unsigned SSPOV :1;
unsigned WCOL :1;
};
struct {
unsigned SSPM0 :1;
unsigned SSPM1 :1;
unsigned SSPM2 :1;
unsigned SSPM3 :1;
};
struct {
unsigned :4;
unsigned CKP1 :1;
};
struct {
unsigned :5;
unsigned SSPEN1 :1;
};
struct {
unsigned SSPM01 :1;
};
struct {
unsigned :1;
unsigned SSPM11 :1;
};
struct {
unsigned :2;
unsigned SSPM21 :1;
};
struct {
unsigned :3;
unsigned SSPM31 :1;
};
struct {
unsigned :6;
unsigned SSPOV1 :1;
};
struct {
unsigned :7;
unsigned WCOL1 :1;
};
} SSPCON1bits_t;
extern volatile SSPCON1bits_t SSPCON1bits @ 0xFC6;
# 12876
extern volatile unsigned char SSP1STAT @ 0xFC7;
asm("SSP1STAT equ 0FC7h");
extern volatile unsigned char SSPSTAT @ 0xFC7;
asm("SSPSTAT equ 0FC7h");
typedef union {
struct {
unsigned :2;
unsigned R_NOT_W :1;
};
struct {
unsigned :5;
unsigned D_NOT_A :1;
};
struct {
unsigned BF :1;
unsigned UA :1;
unsigned R_nW :1;
unsigned S :1;
unsigned P :1;
unsigned D_nA :1;
unsigned CKE :1;
unsigned SMP :1;
};
struct {
unsigned :2;
unsigned R :1;
unsigned :2;
unsigned D :1;
};
struct {
unsigned :2;
unsigned R_W :1;
unsigned :2;
unsigned D_A :1;
};
struct {
unsigned :2;
unsigned nW :1;
unsigned :2;
unsigned nA :1;
};
struct {
unsigned :2;
unsigned NOT_WRITE :1;
};
struct {
unsigned :5;
unsigned NOT_ADDRESS :1;
};
struct {
unsigned :2;
unsigned nWRITE :1;
unsigned :2;
unsigned nADDRESS :1;
};
struct {
unsigned :2;
unsigned READ_WRITE :1;
unsigned :2;
unsigned DATA_ADDRESS :1;
};
struct {
unsigned :2;
unsigned I2C_READ :1;
unsigned I2C_START :1;
unsigned I2C_STOP :1;
unsigned I2C_DAT :1;
};
struct {
unsigned BF1 :1;
};
struct {
unsigned :6;
unsigned CKE1 :1;
};
struct {
unsigned :5;
unsigned DA :1;
};
struct {
unsigned :5;
unsigned DA1 :1;
};
struct {
unsigned :2;
unsigned RW :1;
};
struct {
unsigned :2;
unsigned RW1 :1;
};
struct {
unsigned :7;
unsigned SMP1 :1;
};
struct {
unsigned :3;
unsigned START :1;
};
struct {
unsigned :3;
unsigned START1 :1;
};
struct {
unsigned :4;
unsigned STOP :1;
};
struct {
unsigned :4;
unsigned STOP1 :1;
};
struct {
unsigned :1;
unsigned UA1 :1;
};
struct {
unsigned :2;
unsigned NOT_W :1;
};
struct {
unsigned :5;
unsigned NOT_A :1;
};
} SSP1STATbits_t;
extern volatile SSP1STATbits_t SSP1STATbits @ 0xFC7;
# 13209
typedef union {
struct {
unsigned :2;
unsigned R_NOT_W :1;
};
struct {
unsigned :5;
unsigned D_NOT_A :1;
};
struct {
unsigned BF :1;
unsigned UA :1;
unsigned R_nW :1;
unsigned S :1;
unsigned P :1;
unsigned D_nA :1;
unsigned CKE :1;
unsigned SMP :1;
};
struct {
unsigned :2;
unsigned R :1;
unsigned :2;
unsigned D :1;
};
struct {
unsigned :2;
unsigned R_W :1;
unsigned :2;
unsigned D_A :1;
};
struct {
unsigned :2;
unsigned nW :1;
unsigned :2;
unsigned nA :1;
};
struct {
unsigned :2;
unsigned NOT_WRITE :1;
};
struct {
unsigned :5;
unsigned NOT_ADDRESS :1;
};
struct {
unsigned :2;
unsigned nWRITE :1;
unsigned :2;
unsigned nADDRESS :1;
};
struct {
unsigned :2;
unsigned READ_WRITE :1;
unsigned :2;
unsigned DATA_ADDRESS :1;
};
struct {
unsigned :2;
unsigned I2C_READ :1;
unsigned I2C_START :1;
unsigned I2C_STOP :1;
unsigned I2C_DAT :1;
};
struct {
unsigned BF1 :1;
};
struct {
unsigned :6;
unsigned CKE1 :1;
};
struct {
unsigned :5;
unsigned DA :1;
};
struct {
unsigned :5;
unsigned DA1 :1;
};
struct {
unsigned :2;
unsigned RW :1;
};
struct {
unsigned :2;
unsigned RW1 :1;
};
struct {
unsigned :7;
unsigned SMP1 :1;
};
struct {
unsigned :3;
unsigned START :1;
};
struct {
unsigned :3;
unsigned START1 :1;
};
struct {
unsigned :4;
unsigned STOP :1;
};
struct {
unsigned :4;
unsigned STOP1 :1;
};
struct {
unsigned :1;
unsigned UA1 :1;
};
struct {
unsigned :2;
unsigned NOT_W :1;
};
struct {
unsigned :5;
unsigned NOT_A :1;
};
} SSPSTATbits_t;
extern volatile SSPSTATbits_t SSPSTATbits @ 0xFC7;
# 13533
extern volatile unsigned char SSP1ADD @ 0xFC8;
asm("SSP1ADD equ 0FC8h");
extern volatile unsigned char SSPADD @ 0xFC8;
asm("SSPADD equ 0FC8h");
typedef union {
struct {
unsigned SSPADD :8;
};
struct {
unsigned MSK0 :1;
};
struct {
unsigned MSK01 :1;
};
struct {
unsigned :1;
unsigned MSK1 :1;
};
struct {
unsigned :1;
unsigned MSK11 :1;
};
struct {
unsigned :2;
unsigned MSK2 :1;
};
struct {
unsigned :2;
unsigned MSK21 :1;
};
struct {
unsigned :3;
unsigned MSK3 :1;
};
struct {
unsigned :3;
unsigned MSK31 :1;
};
struct {
unsigned :4;
unsigned MSK4 :1;
};
struct {
unsigned :4;
unsigned MSK41 :1;
};
struct {
unsigned :5;
unsigned MSK5 :1;
};
struct {
unsigned :5;
unsigned MSK51 :1;
};
struct {
unsigned :6;
unsigned MSK6 :1;
};
struct {
unsigned :6;
unsigned MSK61 :1;
};
struct {
unsigned :7;
unsigned MSK7 :1;
};
struct {
unsigned :7;
unsigned MSK71 :1;
};
} SSP1ADDbits_t;
extern volatile SSP1ADDbits_t SSP1ADDbits @ 0xFC8;
# 13698
typedef union {
struct {
unsigned SSPADD :8;
};
struct {
unsigned MSK0 :1;
};
struct {
unsigned MSK01 :1;
};
struct {
unsigned :1;
unsigned MSK1 :1;
};
struct {
unsigned :1;
unsigned MSK11 :1;
};
struct {
unsigned :2;
unsigned MSK2 :1;
};
struct {
unsigned :2;
unsigned MSK21 :1;
};
struct {
unsigned :3;
unsigned MSK3 :1;
};
struct {
unsigned :3;
unsigned MSK31 :1;
};
struct {
unsigned :4;
unsigned MSK4 :1;
};
struct {
unsigned :4;
unsigned MSK41 :1;
};
struct {
unsigned :5;
unsigned MSK5 :1;
};
struct {
unsigned :5;
unsigned MSK51 :1;
};
struct {
unsigned :6;
unsigned MSK6 :1;
};
struct {
unsigned :6;
unsigned MSK61 :1;
};
struct {
unsigned :7;
unsigned MSK7 :1;
};
struct {
unsigned :7;
unsigned MSK71 :1;
};
} SSPADDbits_t;
extern volatile SSPADDbits_t SSPADDbits @ 0xFC8;
# 13854
extern volatile unsigned char SSP1MSK @ 0xFC8;
asm("SSP1MSK equ 0FC8h");
typedef union {
struct {
unsigned MSK0 :1;
unsigned MSK1 :1;
unsigned MSK2 :1;
unsigned MSK3 :1;
unsigned MSK4 :1;
unsigned MSK5 :1;
unsigned MSK6 :1;
unsigned MSK7 :1;
};
} SSP1MSKbits_t;
extern volatile SSP1MSKbits_t SSP1MSKbits @ 0xFC8;
# 13915
extern volatile unsigned char SSP1BUF @ 0xFC9;
asm("SSP1BUF equ 0FC9h");
extern volatile unsigned char SSPBUF @ 0xFC9;
asm("SSPBUF equ 0FC9h");
typedef union {
struct {
unsigned SSPBUF :8;
};
} SSP1BUFbits_t;
extern volatile SSP1BUFbits_t SSP1BUFbits @ 0xFC9;
# 13938
typedef union {
struct {
unsigned SSPBUF :8;
};
} SSPBUFbits_t;
extern volatile SSPBUFbits_t SSPBUFbits @ 0xFC9;
# 13952
extern volatile unsigned char T2CON @ 0xFCA;
asm("T2CON equ 0FCAh");
typedef union {
struct {
unsigned T2CKPS :2;
unsigned TMR2ON :1;
unsigned T2OUTPS :4;
};
struct {
unsigned T2CKPS0 :1;
unsigned T2CKPS1 :1;
unsigned :1;
unsigned T2OUTPS0 :1;
unsigned T2OUTPS1 :1;
unsigned T2OUTPS2 :1;
unsigned T2OUTPS3 :1;
};
} T2CONbits_t;
extern volatile T2CONbits_t T2CONbits @ 0xFCA;
# 14022
extern volatile unsigned char PR2 @ 0xFCB;
asm("PR2 equ 0FCBh");
extern volatile unsigned char MEMCON @ 0xFCB;
asm("MEMCON equ 0FCBh");
typedef union {
struct {
unsigned PR2 :8;
};
} PR2bits_t;
extern volatile PR2bits_t PR2bits @ 0xFCB;
# 14045
typedef union {
struct {
unsigned PR2 :8;
};
} MEMCONbits_t;
extern volatile MEMCONbits_t MEMCONbits @ 0xFCB;
# 14059
extern volatile unsigned char TMR2 @ 0xFCC;
asm("TMR2 equ 0FCCh");
typedef union {
struct {
unsigned TMR2 :8;
};
} TMR2bits_t;
extern volatile TMR2bits_t TMR2bits @ 0xFCC;
# 14078
extern volatile unsigned char T1CON @ 0xFCD;
asm("T1CON equ 0FCDh");
typedef union {
struct {
unsigned :2;
unsigned NOT_T1SYNC :1;
};
struct {
unsigned TMR1ON :1;
unsigned RD16 :1;
unsigned nT1SYNC :1;
unsigned T1OSCEN :1;
unsigned T1CKPS :2;
unsigned TMR1CS :2;
};
struct {
unsigned :4;
unsigned T1CKPS0 :1;
unsigned T1CKPS1 :1;
unsigned TMR1CS0 :1;
unsigned TMR1CS1 :1;
};
struct {
unsigned :3;
unsigned SOSCEN :1;
};
struct {
unsigned :7;
unsigned T1RD16 :1;
};
} T1CONbits_t;
extern volatile T1CONbits_t T1CONbits @ 0xFCD;
# 14181
extern volatile unsigned short TMR1 @ 0xFCE;
asm("TMR1 equ 0FCEh");
extern volatile unsigned char TMR1L @ 0xFCE;
asm("TMR1L equ 0FCEh");
typedef union {
struct {
unsigned TMR1L :8;
};
} TMR1Lbits_t;
extern volatile TMR1Lbits_t TMR1Lbits @ 0xFCE;
# 14206
extern volatile unsigned char TMR1H @ 0xFCF;
asm("TMR1H equ 0FCFh");
typedef union {
struct {
unsigned TMR1H :8;
};
} TMR1Hbits_t;
extern volatile TMR1Hbits_t TMR1Hbits @ 0xFCF;
# 14225
extern volatile unsigned char RCON @ 0xFD0;
asm("RCON equ 0FD0h");
typedef union {
struct {
unsigned NOT_BOR :1;
};
struct {
unsigned :1;
unsigned NOT_POR :1;
};
struct {
unsigned :2;
unsigned NOT_PD :1;
};
struct {
unsigned :3;
unsigned NOT_TO :1;
};
struct {
unsigned :4;
unsigned NOT_RI :1;
};
struct {
unsigned :5;
unsigned NOT_CM :1;
};
struct {
unsigned nBOR :1;
unsigned nPOR :1;
unsigned nPD :1;
unsigned nTO :1;
unsigned nRI :1;
unsigned nCM :1;
unsigned :1;
unsigned IPEN :1;
};
struct {
unsigned BOR :1;
unsigned POR :1;
unsigned PD :1;
unsigned TO :1;
unsigned RI :1;
unsigned CM :1;
};
} RCONbits_t;
extern volatile RCONbits_t RCONbits @ 0xFD0;
# 14372
extern volatile unsigned char CM2CON @ 0xFD1;
asm("CM2CON equ 0FD1h");
extern volatile unsigned char CM2CON1 @ 0xFD1;
asm("CM2CON1 equ 0FD1h");
typedef union {
struct {
unsigned CCH :2;
unsigned CREF :1;
unsigned EVPOL :2;
unsigned CPOL :1;
unsigned COE :1;
unsigned CON :1;
};
struct {
unsigned CCH0 :1;
unsigned CCH1 :1;
unsigned :1;
unsigned EVPOL0 :1;
unsigned EVPOL1 :1;
};
struct {
unsigned CCH02 :1;
};
struct {
unsigned :1;
unsigned CCH12 :1;
};
struct {
unsigned :6;
unsigned COE2 :1;
};
struct {
unsigned :7;
unsigned CON2 :1;
};
struct {
unsigned :5;
unsigned CPOL2 :1;
};
struct {
unsigned :2;
unsigned CREF2 :1;
};
struct {
unsigned :3;
unsigned EVPOL02 :1;
};
struct {
unsigned :4;
unsigned EVPOL12 :1;
};
} CM2CONbits_t;
extern volatile CM2CONbits_t CM2CONbits @ 0xFD1;
# 14523
typedef union {
struct {
unsigned CCH :2;
unsigned CREF :1;
unsigned EVPOL :2;
unsigned CPOL :1;
unsigned COE :1;
unsigned CON :1;
};
struct {
unsigned CCH0 :1;
unsigned CCH1 :1;
unsigned :1;
unsigned EVPOL0 :1;
unsigned EVPOL1 :1;
};
struct {
unsigned CCH02 :1;
};
struct {
unsigned :1;
unsigned CCH12 :1;
};
struct {
unsigned :6;
unsigned COE2 :1;
};
struct {
unsigned :7;
unsigned CON2 :1;
};
struct {
unsigned :5;
unsigned CPOL2 :1;
};
struct {
unsigned :2;
unsigned CREF2 :1;
};
struct {
unsigned :3;
unsigned EVPOL02 :1;
};
struct {
unsigned :4;
unsigned EVPOL12 :1;
};
} CM2CON1bits_t;
extern volatile CM2CON1bits_t CM2CON1bits @ 0xFD1;
# 14665
extern volatile unsigned char CM1CON @ 0xFD2;
asm("CM1CON equ 0FD2h");
extern volatile unsigned char CM1CON1 @ 0xFD2;
asm("CM1CON1 equ 0FD2h");
typedef union {
struct {
unsigned CCH :2;
unsigned CREF :1;
unsigned EVPOL :2;
unsigned CPOL :1;
unsigned COE :1;
unsigned CON :1;
};
struct {
unsigned CCH0 :1;
unsigned CCH1 :1;
unsigned :1;
unsigned EVPOL0 :1;
unsigned EVPOL1 :1;
};
struct {
unsigned C1CH0 :1;
};
struct {
unsigned :1;
unsigned C1CH1 :1;
};
struct {
unsigned CCH01 :1;
};
struct {
unsigned :1;
unsigned CCH11 :1;
};
struct {
unsigned :6;
unsigned COE1 :1;
};
struct {
unsigned :7;
unsigned CON1 :1;
};
struct {
unsigned :5;
unsigned CPOL1 :1;
};
struct {
unsigned :2;
unsigned CREF1 :1;
};
struct {
unsigned :3;
unsigned EVPOL01 :1;
};
struct {
unsigned :4;
unsigned EVPOL11 :1;
};
} CM1CONbits_t;
extern volatile CM1CONbits_t CM1CONbits @ 0xFD2;
# 14833
typedef union {
struct {
unsigned CCH :2;
unsigned CREF :1;
unsigned EVPOL :2;
unsigned CPOL :1;
unsigned COE :1;
unsigned CON :1;
};
struct {
unsigned CCH0 :1;
unsigned CCH1 :1;
unsigned :1;
unsigned EVPOL0 :1;
unsigned EVPOL1 :1;
};
struct {
unsigned C1CH0 :1;
};
struct {
unsigned :1;
unsigned C1CH1 :1;
};
struct {
unsigned CCH01 :1;
};
struct {
unsigned :1;
unsigned CCH11 :1;
};
struct {
unsigned :6;
unsigned COE1 :1;
};
struct {
unsigned :7;
unsigned CON1 :1;
};
struct {
unsigned :5;
unsigned CPOL1 :1;
};
struct {
unsigned :2;
unsigned CREF1 :1;
};
struct {
unsigned :3;
unsigned EVPOL01 :1;
};
struct {
unsigned :4;
unsigned EVPOL11 :1;
};
} CM1CON1bits_t;
extern volatile CM1CON1bits_t CM1CON1bits @ 0xFD2;
# 14992
extern volatile unsigned char OSCCON @ 0xFD3;
asm("OSCCON equ 0FD3h");
typedef union {
struct {
unsigned SCS :2;
unsigned :1;
unsigned OSTS :1;
unsigned IRCF :3;
unsigned IDLEN :1;
};
struct {
unsigned SCS0 :1;
unsigned SCS1 :1;
unsigned :2;
unsigned IRCF0 :1;
unsigned IRCF1 :1;
unsigned IRCF2 :1;
};
} OSCCONbits_t;
extern volatile OSCCONbits_t OSCCONbits @ 0xFD3;
# 15063
extern volatile unsigned char T0CON @ 0xFD5;
asm("T0CON equ 0FD5h");
typedef union {
struct {
unsigned T0PS :3;
unsigned PSA :1;
unsigned T0SE :1;
unsigned T0CS :1;
unsigned T08BIT :1;
unsigned TMR0ON :1;
};
struct {
unsigned T0PS0 :1;
unsigned T0PS1 :1;
unsigned T0PS2 :1;
};
} T0CONbits_t;
extern volatile T0CONbits_t T0CONbits @ 0xFD5;
# 15132
extern volatile unsigned short TMR0 @ 0xFD6;
asm("TMR0 equ 0FD6h");
extern volatile unsigned char TMR0L @ 0xFD6;
asm("TMR0L equ 0FD6h");
typedef union {
struct {
unsigned TMR0L :8;
};
} TMR0Lbits_t;
extern volatile TMR0Lbits_t TMR0Lbits @ 0xFD6;
# 15157
extern volatile unsigned char TMR0H @ 0xFD7;
asm("TMR0H equ 0FD7h");
typedef union {
struct {
unsigned TMR0H :8;
};
} TMR0Hbits_t;
extern volatile TMR0Hbits_t TMR0Hbits @ 0xFD7;
# 15176
extern volatile unsigned char STATUS @ 0xFD8;
asm("STATUS equ 0FD8h");
typedef union {
struct {
unsigned C :1;
unsigned DC :1;
unsigned Z :1;
unsigned OV :1;
unsigned N :1;
};
struct {
unsigned CARRY :1;
};
struct {
unsigned :4;
unsigned NEGATIVE :1;
};
struct {
unsigned :3;
unsigned OVERFLOW :1;
};
struct {
unsigned :2;
unsigned ZERO :1;
};
} STATUSbits_t;
extern volatile STATUSbits_t STATUSbits @ 0xFD8;
# 15254
extern volatile unsigned short FSR2 @ 0xFD9;
asm("FSR2 equ 0FD9h");
extern volatile unsigned char FSR2L @ 0xFD9;
asm("FSR2L equ 0FD9h");
typedef union {
struct {
unsigned FSR2L :8;
};
} FSR2Lbits_t;
extern volatile FSR2Lbits_t FSR2Lbits @ 0xFD9;
# 15279
extern volatile unsigned char FSR2H @ 0xFDA;
asm("FSR2H equ 0FDAh");
extern volatile unsigned char PLUSW2 @ 0xFDB;
asm("PLUSW2 equ 0FDBh");
typedef union {
struct {
unsigned PLUSW2 :8;
};
} PLUSW2bits_t;
extern volatile PLUSW2bits_t PLUSW2bits @ 0xFDB;
# 15304
extern volatile unsigned char PREINC2 @ 0xFDC;
asm("PREINC2 equ 0FDCh");
typedef union {
struct {
unsigned PREINC2 :8;
};
} PREINC2bits_t;
extern volatile PREINC2bits_t PREINC2bits @ 0xFDC;
# 15323
extern volatile unsigned char POSTDEC2 @ 0xFDD;
asm("POSTDEC2 equ 0FDDh");
typedef union {
struct {
unsigned POSTDEC2 :8;
};
} POSTDEC2bits_t;
extern volatile POSTDEC2bits_t POSTDEC2bits @ 0xFDD;
# 15342
extern volatile unsigned char POSTINC2 @ 0xFDE;
asm("POSTINC2 equ 0FDEh");
typedef union {
struct {
unsigned POSTINC2 :8;
};
} POSTINC2bits_t;
extern volatile POSTINC2bits_t POSTINC2bits @ 0xFDE;
# 15361
extern volatile unsigned char INDF2 @ 0xFDF;
asm("INDF2 equ 0FDFh");
typedef union {
struct {
unsigned INDF2 :8;
};
} INDF2bits_t;
extern volatile INDF2bits_t INDF2bits @ 0xFDF;
# 15380
extern volatile unsigned char BSR @ 0xFE0;
asm("BSR equ 0FE0h");
extern volatile unsigned short FSR1 @ 0xFE1;
asm("FSR1 equ 0FE1h");
extern volatile unsigned char FSR1L @ 0xFE1;
asm("FSR1L equ 0FE1h");
typedef union {
struct {
unsigned FSR1L :8;
};
} FSR1Lbits_t;
extern volatile FSR1Lbits_t FSR1Lbits @ 0xFE1;
# 15411
extern volatile unsigned char FSR1H @ 0xFE2;
asm("FSR1H equ 0FE2h");
extern volatile unsigned char PLUSW1 @ 0xFE3;
asm("PLUSW1 equ 0FE3h");
typedef union {
struct {
unsigned PLUSW1 :8;
};
} PLUSW1bits_t;
extern volatile PLUSW1bits_t PLUSW1bits @ 0xFE3;
# 15436
extern volatile unsigned char PREINC1 @ 0xFE4;
asm("PREINC1 equ 0FE4h");
typedef union {
struct {
unsigned PREINC1 :8;
};
} PREINC1bits_t;
extern volatile PREINC1bits_t PREINC1bits @ 0xFE4;
# 15455
extern volatile unsigned char POSTDEC1 @ 0xFE5;
asm("POSTDEC1 equ 0FE5h");
typedef union {
struct {
unsigned POSTDEC1 :8;
};
} POSTDEC1bits_t;
extern volatile POSTDEC1bits_t POSTDEC1bits @ 0xFE5;
# 15474
extern volatile unsigned char POSTINC1 @ 0xFE6;
asm("POSTINC1 equ 0FE6h");
typedef union {
struct {
unsigned POSTINC1 :8;
};
} POSTINC1bits_t;
extern volatile POSTINC1bits_t POSTINC1bits @ 0xFE6;
# 15493
extern volatile unsigned char INDF1 @ 0xFE7;
asm("INDF1 equ 0FE7h");
typedef union {
struct {
unsigned INDF1 :8;
};
} INDF1bits_t;
extern volatile INDF1bits_t INDF1bits @ 0xFE7;
# 15512
extern volatile unsigned char WREG @ 0xFE8;
asm("WREG equ 0FE8h");
typedef union {
struct {
unsigned WREG :8;
};
} WREGbits_t;
extern volatile WREGbits_t WREGbits @ 0xFE8;
# 15531
extern volatile unsigned short FSR0 @ 0xFE9;
asm("FSR0 equ 0FE9h");
extern volatile unsigned char FSR0L @ 0xFE9;
asm("FSR0L equ 0FE9h");
typedef union {
struct {
unsigned FSR0L :8;
};
} FSR0Lbits_t;
extern volatile FSR0Lbits_t FSR0Lbits @ 0xFE9;
# 15556
extern volatile unsigned char FSR0H @ 0xFEA;
asm("FSR0H equ 0FEAh");
extern volatile unsigned char PLUSW0 @ 0xFEB;
asm("PLUSW0 equ 0FEBh");
typedef union {
struct {
unsigned PLUSW0 :8;
};
} PLUSW0bits_t;
extern volatile PLUSW0bits_t PLUSW0bits @ 0xFEB;
# 15581
extern volatile unsigned char PREINC0 @ 0xFEC;
asm("PREINC0 equ 0FECh");
typedef union {
struct {
unsigned PREINC0 :8;
};
} PREINC0bits_t;
extern volatile PREINC0bits_t PREINC0bits @ 0xFEC;
# 15600
extern volatile unsigned char POSTDEC0 @ 0xFED;
asm("POSTDEC0 equ 0FEDh");
typedef union {
struct {
unsigned POSTDEC0 :8;
};
} POSTDEC0bits_t;
extern volatile POSTDEC0bits_t POSTDEC0bits @ 0xFED;
# 15619
extern volatile unsigned char POSTINC0 @ 0xFEE;
asm("POSTINC0 equ 0FEEh");
typedef union {
struct {
unsigned POSTINC0 :8;
};
} POSTINC0bits_t;
extern volatile POSTINC0bits_t POSTINC0bits @ 0xFEE;
# 15638
extern volatile unsigned char INDF0 @ 0xFEF;
asm("INDF0 equ 0FEFh");
typedef union {
struct {
unsigned INDF0 :8;
};
} INDF0bits_t;
extern volatile INDF0bits_t INDF0bits @ 0xFEF;
# 15657
extern volatile unsigned char INTCON3 @ 0xFF0;
asm("INTCON3 equ 0FF0h");
typedef union {
struct {
unsigned INT1IF :1;
unsigned INT2IF :1;
unsigned INT3IF :1;
unsigned INT1IE :1;
unsigned INT2IE :1;
unsigned INT3IE :1;
unsigned INT1IP :1;
unsigned INT2IP :1;
};
struct {
unsigned INT1F :1;
unsigned INT2F :1;
unsigned INT3F :1;
unsigned INT1E :1;
unsigned INT2E :1;
unsigned INT3E :1;
unsigned INT1P :1;
unsigned INT2P :1;
};
} INTCON3bits_t;
extern volatile INTCON3bits_t INTCON3bits @ 0xFF0;
# 15768
extern volatile unsigned char INTCON2 @ 0xFF1;
asm("INTCON2 equ 0FF1h");
typedef union {
struct {
unsigned :7;
unsigned NOT_RBPU :1;
};
struct {
unsigned RBIP :1;
unsigned INT3IP :1;
unsigned TMR0IP :1;
unsigned INTEDG3 :1;
unsigned INTEDG2 :1;
unsigned INTEDG1 :1;
unsigned INTEDG0 :1;
unsigned nRBPU :1;
};
struct {
unsigned :1;
unsigned INT3P :1;
unsigned T0IP :1;
unsigned :4;
unsigned RBPU :1;
};
} INTCON2bits_t;
extern volatile INTCON2bits_t INTCON2bits @ 0xFF1;
# 15860
extern volatile unsigned char INTCON @ 0xFF2;
asm("INTCON equ 0FF2h");
typedef union {
struct {
unsigned RBIF :1;
unsigned INT0IF :1;
unsigned TMR0IF :1;
unsigned RBIE :1;
unsigned INT0IE :1;
unsigned TMR0IE :1;
unsigned PEIE_GIEL :1;
unsigned GIE_GIEH :1;
};
struct {
unsigned :1;
unsigned INT0F :1;
unsigned T0IF :1;
unsigned :1;
unsigned INT0E :1;
unsigned T0IE :1;
unsigned PEIE :1;
unsigned GIE :1;
};
struct {
unsigned :6;
unsigned GIEL :1;
unsigned GIEH :1;
};
struct {
unsigned :1;
unsigned INT0F :1;
unsigned T0IF :1;
unsigned :1;
unsigned INT0E :1;
unsigned T0IE :1;
unsigned PEIE :1;
unsigned GIE :1;
};
struct {
unsigned :6;
unsigned GIEL :1;
unsigned GIEH :1;
};
} INTCONbits_t;
extern volatile INTCONbits_t INTCONbits @ 0xFF2;
# 15991
extern volatile unsigned short PROD @ 0xFF3;
asm("PROD equ 0FF3h");
extern volatile unsigned char PRODL @ 0xFF3;
asm("PRODL equ 0FF3h");
typedef union {
struct {
unsigned PRODL :8;
};
} PRODLbits_t;
extern volatile PRODLbits_t PRODLbits @ 0xFF3;
# 16016
extern volatile unsigned char PRODH @ 0xFF4;
asm("PRODH equ 0FF4h");
typedef union {
struct {
unsigned PRODH :8;
};
} PRODHbits_t;
extern volatile PRODHbits_t PRODHbits @ 0xFF4;
# 16035
extern volatile unsigned char TABLAT @ 0xFF5;
asm("TABLAT equ 0FF5h");
typedef union {
struct {
unsigned TABLAT :8;
};
} TABLATbits_t;
extern volatile TABLATbits_t TABLATbits @ 0xFF5;
# 16055
extern volatile unsigned short long TBLPTR @ 0xFF6;
asm("TBLPTR equ 0FF6h");
extern volatile unsigned char TBLPTRL @ 0xFF6;
asm("TBLPTRL equ 0FF6h");
typedef union {
struct {
unsigned TBLPTRL :8;
};
} TBLPTRLbits_t;
extern volatile TBLPTRLbits_t TBLPTRLbits @ 0xFF6;
# 16081
extern volatile unsigned char TBLPTRH @ 0xFF7;
asm("TBLPTRH equ 0FF7h");
typedef union {
struct {
unsigned TBLPTRH :8;
};
} TBLPTRHbits_t;
extern volatile TBLPTRHbits_t TBLPTRHbits @ 0xFF7;
# 16100
extern volatile unsigned char TBLPTRU @ 0xFF8;
asm("TBLPTRU equ 0FF8h");
extern volatile unsigned short long PCLAT @ 0xFF9;
asm("PCLAT equ 0FF9h");
extern volatile unsigned short long PC @ 0xFF9;
asm("PC equ 0FF9h");
extern volatile unsigned char PCL @ 0xFF9;
asm("PCL equ 0FF9h");
typedef union {
struct {
unsigned PCL :8;
};
} PCLbits_t;
extern volatile PCLbits_t PCLbits @ 0xFF9;
# 16140
extern volatile unsigned char PCLATH @ 0xFFA;
asm("PCLATH equ 0FFAh");
typedef union {
struct {
unsigned PCH :8;
};
} PCLATHbits_t;
extern volatile PCLATHbits_t PCLATHbits @ 0xFFA;
# 16159
extern volatile unsigned char PCLATU @ 0xFFB;
asm("PCLATU equ 0FFBh");
extern volatile unsigned char STKPTR @ 0xFFC;
asm("STKPTR equ 0FFCh");
typedef union {
struct {
unsigned STKPTR :5;
unsigned :1;
unsigned STKUNF :1;
unsigned STKFUL :1;
};
struct {
unsigned SP0 :1;
unsigned SP1 :1;
unsigned SP2 :1;
unsigned SP3 :1;
unsigned SP4 :1;
unsigned :2;
unsigned STKOVF :1;
};
} STKPTRbits_t;
extern volatile STKPTRbits_t STKPTRbits @ 0xFFC;
# 16237
extern volatile unsigned short long TOS @ 0xFFD;
asm("TOS equ 0FFDh");
extern volatile unsigned char TOSL @ 0xFFD;
asm("TOSL equ 0FFDh");
typedef union {
struct {
unsigned TOSL :8;
};
} TOSLbits_t;
extern volatile TOSLbits_t TOSLbits @ 0xFFD;
# 16263
extern volatile unsigned char TOSH @ 0xFFE;
asm("TOSH equ 0FFEh");
typedef union {
struct {
unsigned TOSH :8;
};
} TOSHbits_t;
extern volatile TOSHbits_t TOSHbits @ 0xFFE;
# 16282
extern volatile unsigned char TOSU @ 0xFFF;
asm("TOSU equ 0FFFh");
# 16294
extern volatile __bit ABDEN1 @ (((unsigned) &BAUDCON1)*8) + 0;
extern volatile __bit ABDEN2 @ (((unsigned) &BAUDCON2)*8) + 0;
extern volatile __bit ABDOVF1 @ (((unsigned) &BAUDCON1)*8) + 7;
extern volatile __bit ABDOVF2 @ (((unsigned) &BAUDCON2)*8) + 7;
extern volatile __bit ACKDT1 @ (((unsigned) &SSP1CON2)*8) + 5;
extern volatile __bit ACKDT2 @ (((unsigned) &SSP2CON2)*8) + 5;
extern volatile __bit ACKEN1 @ (((unsigned) &SSP1CON2)*8) + 4;
extern volatile __bit ACKEN2 @ (((unsigned) &SSP2CON2)*8) + 4;
extern volatile __bit ACKSTAT1 @ (((unsigned) &SSP1CON2)*8) + 6;
extern volatile __bit ACKSTAT2 @ (((unsigned) &SSP2CON2)*8) + 6;
extern volatile __bit ACQT0 @ (((unsigned) &ADCON1)*8) + 3;
extern volatile __bit ACQT1 @ (((unsigned) &ADCON1)*8) + 4;
extern volatile __bit ACQT2 @ (((unsigned) &ADCON1)*8) + 5;
extern volatile __bit __attribute__((__deprecated__)) ADCAL @ (((unsigned) &ADCON1)*8) + 6;
extern volatile __bit ADCMD @ (((unsigned) &PMDIS0)*8) + 0;
extern volatile __bit ADCS0 @ (((unsigned) &ADCON1)*8) + 0;
extern volatile __bit ADCS1 @ (((unsigned) &ADCON1)*8) + 1;
extern volatile __bit ADCS2 @ (((unsigned) &ADCON1)*8) + 2;
extern volatile __bit ADDEN1 @ (((unsigned) &RCSTA1)*8) + 3;
extern volatile __bit ADDEN2 @ (((unsigned) &RCSTA2)*8) + 3;
extern volatile __bit ADEN @ (((unsigned) &RCSTA1)*8) + 3;
extern volatile __bit ADFM @ (((unsigned) &ADCON1)*8) + 7;
extern volatile __bit ADIE @ (((unsigned) &PIE1)*8) + 6;
extern volatile __bit ADIF @ (((unsigned) &PIR1)*8) + 6;
extern volatile __bit ADIP @ (((unsigned) &IPR1)*8) + 6;
extern volatile __bit ADMSK11 @ (((unsigned) &SSP1CON2)*8) + 1;
extern volatile __bit ADMSK12 @ (((unsigned) &SSP2CON2)*8) + 1;
extern volatile __bit ADMSK21 @ (((unsigned) &SSP1CON2)*8) + 2;
extern volatile __bit ADMSK22 @ (((unsigned) &SSP2CON2)*8) + 2;
extern volatile __bit ADMSK31 @ (((unsigned) &SSP1CON2)*8) + 3;
extern volatile __bit ADMSK32 @ (((unsigned) &SSP2CON2)*8) + 3;
extern volatile __bit ADMSK41 @ (((unsigned) &SSP1CON2)*8) + 4;
extern volatile __bit ADMSK42 @ (((unsigned) &SSP2CON2)*8) + 4;
extern volatile __bit ADMSK51 @ (((unsigned) &SSP1CON2)*8) + 5;
extern volatile __bit ADMSK52 @ (((unsigned) &SSP2CON2)*8) + 5;
extern volatile __bit ADON @ (((unsigned) &ADCON0)*8) + 0;
extern volatile __bit ALRMEN @ (((unsigned) &ALRMCFG)*8) + 7;
extern volatile __bit ALRMPTR0 @ (((unsigned) &ALRMCFG)*8) + 0;
extern volatile __bit ALRMPTR1 @ (((unsigned) &ALRMCFG)*8) + 1;
extern volatile __bit AMASK0 @ (((unsigned) &ALRMCFG)*8) + 2;
extern volatile __bit AMASK1 @ (((unsigned) &ALRMCFG)*8) + 3;
extern volatile __bit AMASK2 @ (((unsigned) &ALRMCFG)*8) + 4;
extern volatile __bit AMASK3 @ (((unsigned) &ALRMCFG)*8) + 5;
extern volatile __bit AN0 @ (((unsigned) &PORTA)*8) + 0;
extern volatile __bit AN1 @ (((unsigned) &PORTA)*8) + 1;
extern volatile __bit AN10 @ (((unsigned) &PORTB)*8) + 1;
extern volatile __bit AN11 @ (((unsigned) &PORTC)*8) + 2;
extern volatile __bit AN12 @ (((unsigned) &PORTB)*8) + 0;
extern volatile __bit AN2 @ (((unsigned) &PORTA)*8) + 2;
extern volatile __bit AN3 @ (((unsigned) &PORTA)*8) + 3;
extern volatile __bit AN4 @ (((unsigned) &PORTA)*8) + 5;
extern volatile __bit AN8 @ (((unsigned) &PORTB)*8) + 2;
extern volatile __bit AN9 @ (((unsigned) &PORTB)*8) + 3;
extern volatile __bit ARPT0 @ (((unsigned) &ALRMRPT)*8) + 0;
extern volatile __bit ARPT1 @ (((unsigned) &ALRMRPT)*8) + 1;
extern volatile __bit ARPT2 @ (((unsigned) &ALRMRPT)*8) + 2;
extern volatile __bit ARPT3 @ (((unsigned) &ALRMRPT)*8) + 3;
extern volatile __bit ARPT4 @ (((unsigned) &ALRMRPT)*8) + 4;
extern volatile __bit ARPT5 @ (((unsigned) &ALRMRPT)*8) + 5;
extern volatile __bit ARPT6 @ (((unsigned) &ALRMRPT)*8) + 6;
extern volatile __bit ARPT7 @ (((unsigned) &ALRMRPT)*8) + 7;
extern volatile __bit BCL1IE @ (((unsigned) &PIE2)*8) + 3;
extern volatile __bit BCL1IF @ (((unsigned) &PIR2)*8) + 3;
extern volatile __bit BCL1IP @ (((unsigned) &IPR2)*8) + 3;
extern volatile __bit BCL2IE @ (((unsigned) &PIE3)*8) + 6;
extern volatile __bit BCL2IF @ (((unsigned) &PIR3)*8) + 6;
extern volatile __bit BCL2IP @ (((unsigned) &IPR3)*8) + 6;
extern volatile __bit BCLIE @ (((unsigned) &PIE2)*8) + 3;
extern volatile __bit BCLIF @ (((unsigned) &PIR2)*8) + 3;
extern volatile __bit BCLIP @ (((unsigned) &IPR2)*8) + 3;
extern volatile __bit BF1 @ (((unsigned) &SSP1STAT)*8) + 0;
extern volatile __bit BF2 @ (((unsigned) &SSP2STAT)*8) + 0;
extern volatile __bit BGVST @ (((unsigned) &HLVDCON)*8) + 6;
extern volatile __bit BOR @ (((unsigned) &RCON)*8) + 0;
extern volatile __bit BRG161 @ (((unsigned) &BAUDCON1)*8) + 3;
extern volatile __bit BRG162 @ (((unsigned) &BAUDCON2)*8) + 3;
extern volatile __bit BRGH1 @ (((unsigned) &TXSTA1)*8) + 2;
extern volatile __bit BRGH2 @ (((unsigned) &TXSTA2)*8) + 2;
extern volatile __bit C10TSEL0 @ (((unsigned) &CCPTMRS2)*8) + 4;
extern volatile __bit C1CH0 @ (((unsigned) &CM1CON)*8) + 0;
extern volatile __bit C1CH1 @ (((unsigned) &CM1CON)*8) + 1;
extern volatile __bit C1INA @ (((unsigned) &PORTA)*8) + 0;
extern volatile __bit C1INB @ (((unsigned) &PORTA)*8) + 3;
extern volatile __bit C1INC @ (((unsigned) &PORTA)*8) + 5;
extern volatile __bit C1IND @ (((unsigned) &PORTA)*8) + 2;
extern volatile __bit C1TSEL0 @ (((unsigned) &CCPTMRS0)*8) + 0;
extern volatile __bit C1TSEL1 @ (((unsigned) &CCPTMRS0)*8) + 1;
extern volatile __bit C1TSEL2 @ (((unsigned) &CCPTMRS0)*8) + 2;
extern volatile __bit C2INA @ (((unsigned) &PORTA)*8) + 1;
extern volatile __bit C2INB @ (((unsigned) &PORTA)*8) + 2;
extern volatile __bit C2INC @ (((unsigned) &PORTB)*8) + 2;
extern volatile __bit C2IND @ (((unsigned) &PORTC)*8) + 2;
extern volatile __bit C2TSEL0 @ (((unsigned) &CCPTMRS0)*8) + 3;
extern volatile __bit C2TSEL1 @ (((unsigned) &CCPTMRS0)*8) + 4;
extern volatile __bit C2TSEL2 @ (((unsigned) &CCPTMRS0)*8) + 5;
extern volatile __bit C3INA @ (((unsigned) &PORTB)*8) + 3;
extern volatile __bit C3INB @ (((unsigned) &PORTA)*8) + 2;
extern volatile __bit C3INC @ (((unsigned) &PORTB)*8) + 1;
extern volatile __bit C3IND @ (((unsigned) &PORTB)*8) + 0;
extern volatile __bit C3TSEL0 @ (((unsigned) &CCPTMRS0)*8) + 6;
extern volatile __bit C3TSEL1 @ (((unsigned) &CCPTMRS0)*8) + 7;
extern volatile __bit C4TSEL0 @ (((unsigned) &CCPTMRS1)*8) + 0;
extern volatile __bit C4TSEL1 @ (((unsigned) &CCPTMRS1)*8) + 1;
extern volatile __bit C5TSEL0 @ (((unsigned) &CCPTMRS1)*8) + 2;
extern volatile __bit C6TSEL0 @ (((unsigned) &CCPTMRS1)*8) + 4;
extern volatile __bit C7TSEL0 @ (((unsigned) &CCPTMRS1)*8) + 6;
extern volatile __bit C7TSEL1 @ (((unsigned) &CCPTMRS1)*8) + 7;
extern volatile __bit C8TSEL0 @ (((unsigned) &CCPTMRS2)*8) + 0;
extern volatile __bit C8TSEL1 @ (((unsigned) &CCPTMRS2)*8) + 1;
extern volatile __bit C9TSEL0 @ (((unsigned) &CCPTMRS2)*8) + 2;
extern volatile __bit CAL0 @ (((unsigned) &RTCCAL)*8) + 0;
extern volatile __bit CAL1 @ (((unsigned) &RTCCAL)*8) + 1;
extern volatile __bit CAL2 @ (((unsigned) &RTCCAL)*8) + 2;
extern volatile __bit CAL3 @ (((unsigned) &RTCCAL)*8) + 3;
extern volatile __bit CAL4 @ (((unsigned) &RTCCAL)*8) + 4;
extern volatile __bit CAL5 @ (((unsigned) &RTCCAL)*8) + 5;
extern volatile __bit CAL6 @ (((unsigned) &RTCCAL)*8) + 6;
extern volatile __bit CAL7 @ (((unsigned) &RTCCAL)*8) + 7;
extern volatile __bit CARRY @ (((unsigned) &STATUS)*8) + 0;
extern volatile __bit CCH01 @ (((unsigned) &CM1CON)*8) + 0;
extern volatile __bit CCH02 @ (((unsigned) &CM2CON)*8) + 0;
extern volatile __bit CCH03 @ (((unsigned) &CM3CON)*8) + 0;
extern volatile __bit CCH05 @ (((unsigned) &IPR5)*8) + 0;
extern volatile __bit CCH11 @ (((unsigned) &CM1CON)*8) + 1;
extern volatile __bit CCH12 @ (((unsigned) &CM2CON)*8) + 1;
extern volatile __bit CCH13 @ (((unsigned) &CM3CON)*8) + 1;
extern volatile __bit CCH15 @ (((unsigned) &IPR5)*8) + 1;
extern volatile __bit CCIP3IP @ (((unsigned) &IPR4)*8) + 0;
extern volatile __bit CCP10 @ (((unsigned) &PORTC)*8) + 7;
extern volatile __bit CCP10IE @ (((unsigned) &PIE4)*8) + 7;
extern volatile __bit CCP10IF @ (((unsigned) &PIR4)*8) + 7;
extern volatile __bit CCP10IP @ (((unsigned) &IPR4)*8) + 7;
extern volatile __bit CCP10M0 @ (((unsigned) &CCP10CON)*8) + 0;
extern volatile __bit CCP10M1 @ (((unsigned) &CCP10CON)*8) + 1;
extern volatile __bit CCP10M2 @ (((unsigned) &CCP10CON)*8) + 2;
extern volatile __bit CCP10M3 @ (((unsigned) &CCP10CON)*8) + 3;
extern volatile __bit CCP10MD @ (((unsigned) &PMDIS3)*8) + 7;
extern volatile __bit CCP10OD @ (((unsigned) &ODCON2)*8) + 3;
extern volatile __bit CCP1IE @ (((unsigned) &PIE1)*8) + 2;
extern volatile __bit CCP1IF @ (((unsigned) &PIR1)*8) + 2;
extern volatile __bit CCP1IP @ (((unsigned) &IPR1)*8) + 2;
extern volatile __bit CCP1M0 @ (((unsigned) &CCP1CON)*8) + 0;
extern volatile __bit CCP1M1 @ (((unsigned) &CCP1CON)*8) + 1;
extern volatile __bit CCP1M2 @ (((unsigned) &CCP1CON)*8) + 2;
extern volatile __bit CCP1M3 @ (((unsigned) &CCP1CON)*8) + 3;
extern volatile __bit CCP1X @ (((unsigned) &CCP1CON)*8) + 5;
extern volatile __bit CCP1Y @ (((unsigned) &CCP1CON)*8) + 4;
extern volatile __bit CCP2 @ (((unsigned) &PORTC)*8) + 1;
extern volatile __bit CCP2IE @ (((unsigned) &PIE2)*8) + 0;
extern volatile __bit CCP2IF @ (((unsigned) &PIR2)*8) + 0;
extern volatile __bit CCP2IP @ (((unsigned) &IPR2)*8) + 0;
extern volatile __bit CCP2M0 @ (((unsigned) &CCP2CON)*8) + 0;
extern volatile __bit CCP2M1 @ (((unsigned) &CCP2CON)*8) + 1;
extern volatile __bit CCP2M2 @ (((unsigned) &CCP2CON)*8) + 2;
extern volatile __bit CCP2M3 @ (((unsigned) &CCP2CON)*8) + 3;
extern volatile __bit CCP2X @ (((unsigned) &CCP2CON)*8) + 5;
extern volatile __bit CCP2Y @ (((unsigned) &CCP2CON)*8) + 4;
extern volatile __bit CCP2_PA2 @ (((unsigned) &PORTB)*8) + 3;
extern volatile __bit CCP3IE @ (((unsigned) &PIE4)*8) + 0;
extern volatile __bit CCP3IF @ (((unsigned) &PIR4)*8) + 0;
extern volatile __bit CCP3IP @ (((unsigned) &IPR4)*8) + 0;
extern volatile __bit CCP3M0 @ (((unsigned) &CCP3CON)*8) + 0;
extern volatile __bit CCP3M1 @ (((unsigned) &CCP3CON)*8) + 1;
extern volatile __bit CCP3M2 @ (((unsigned) &CCP3CON)*8) + 2;
extern volatile __bit CCP3M3 @ (((unsigned) &CCP3CON)*8) + 3;
extern volatile __bit CCP4 @ (((unsigned) &PORTB)*8) + 4;
extern volatile __bit CCP4IE @ (((unsigned) &PIE4)*8) + 1;
extern volatile __bit CCP4IF @ (((unsigned) &PIR4)*8) + 1;
extern volatile __bit CCP4IP @ (((unsigned) &IPR4)*8) + 1;
extern volatile __bit CCP4M0 @ (((unsigned) &CCP4CON)*8) + 0;
extern volatile __bit CCP4M1 @ (((unsigned) &CCP4CON)*8) + 1;
extern volatile __bit CCP4M2 @ (((unsigned) &CCP4CON)*8) + 2;
extern volatile __bit CCP4M3 @ (((unsigned) &CCP4CON)*8) + 3;
extern volatile __bit CCP4MD @ (((unsigned) &PMDIS3)*8) + 1;
extern volatile __bit CCP4OD @ (((unsigned) &ODCON1)*8) + 3;
extern volatile __bit CCP5 @ (((unsigned) &PORTB)*8) + 5;
extern volatile __bit CCP5IE @ (((unsigned) &PIE4)*8) + 2;
extern volatile __bit CCP5IF @ (((unsigned) &PIR4)*8) + 2;
extern volatile __bit CCP5IP @ (((unsigned) &IPR4)*8) + 2;
extern volatile __bit CCP5M0 @ (((unsigned) &CCP5CON)*8) + 0;
extern volatile __bit CCP5M1 @ (((unsigned) &CCP5CON)*8) + 1;
extern volatile __bit CCP5M2 @ (((unsigned) &CCP5CON)*8) + 2;
extern volatile __bit CCP5M3 @ (((unsigned) &CCP5CON)*8) + 3;
extern volatile __bit CCP5MD @ (((unsigned) &PMDIS3)*8) + 2;
extern volatile __bit CCP5OD @ (((unsigned) &ODCON1)*8) + 4;
extern volatile __bit CCP6 @ (((unsigned) &PORTB)*8) + 6;
extern volatile __bit CCP6IE @ (((unsigned) &PIE4)*8) + 3;
extern volatile __bit CCP6IF @ (((unsigned) &PIR4)*8) + 3;
extern volatile __bit CCP6IP @ (((unsigned) &IPR4)*8) + 3;
extern volatile __bit CCP6M0 @ (((unsigned) &CCP6CON)*8) + 0;
extern volatile __bit CCP6M1 @ (((unsigned) &CCP6CON)*8) + 1;
extern volatile __bit CCP6M2 @ (((unsigned) &CCP6CON)*8) + 2;
extern volatile __bit CCP6M3 @ (((unsigned) &CCP6CON)*8) + 3;
extern volatile __bit CCP6MD @ (((unsigned) &PMDIS3)*8) + 3;
extern volatile __bit CCP6OD @ (((unsigned) &ODCON1)*8) + 5;
extern volatile __bit CCP7 @ (((unsigned) &PORTB)*8) + 7;
extern volatile __bit CCP7IE @ (((unsigned) &PIE4)*8) + 4;
extern volatile __bit CCP7IF @ (((unsigned) &PIR4)*8) + 4;
extern volatile __bit CCP7IP @ (((unsigned) &IPR4)*8) + 4;
extern volatile __bit CCP7M0 @ (((unsigned) &CCP7CON)*8) + 0;
extern volatile __bit CCP7M1 @ (((unsigned) &CCP7CON)*8) + 1;
extern volatile __bit CCP7M2 @ (((unsigned) &CCP7CON)*8) + 2;
extern volatile __bit CCP7M3 @ (((unsigned) &CCP7CON)*8) + 3;
extern volatile __bit CCP7MD @ (((unsigned) &PMDIS3)*8) + 4;
extern volatile __bit CCP7OD @ (((unsigned) &ODCON1)*8) + 6;
extern volatile __bit CCP8 @ (((unsigned) &PORTC)*8) + 1;
extern volatile __bit CCP8IE @ (((unsigned) &PIE4)*8) + 5;
extern volatile __bit CCP8IF @ (((unsigned) &PIR4)*8) + 5;
extern volatile __bit CCP8IP @ (((unsigned) &IPR4)*8) + 5;
extern volatile __bit CCP8M0 @ (((unsigned) &CCP8CON)*8) + 0;
extern volatile __bit CCP8M1 @ (((unsigned) &CCP8CON)*8) + 1;
extern volatile __bit CCP8M2 @ (((unsigned) &CCP8CON)*8) + 2;
extern volatile __bit CCP8M3 @ (((unsigned) &CCP8CON)*8) + 3;
extern volatile __bit CCP8MD @ (((unsigned) &PMDIS3)*8) + 5;
extern volatile __bit CCP8OD @ (((unsigned) &ODCON1)*8) + 7;
extern volatile __bit CCP9 @ (((unsigned) &PORTC)*8) + 6;
extern volatile __bit CCP9IE @ (((unsigned) &PIE4)*8) + 6;
extern volatile __bit CCP9IF @ (((unsigned) &PIR4)*8) + 6;
extern volatile __bit CCP9IP @ (((unsigned) &IPR4)*8) + 6;
extern volatile __bit CCP9M0 @ (((unsigned) &CCP9CON)*8) + 0;
extern volatile __bit CCP9M1 @ (((unsigned) &CCP9CON)*8) + 1;
extern volatile __bit CCP9M2 @ (((unsigned) &CCP9CON)*8) + 2;
extern volatile __bit CCP9M3 @ (((unsigned) &CCP9CON)*8) + 3;
extern volatile __bit CCP9MD @ (((unsigned) &PMDIS3)*8) + 6;
extern volatile __bit CCP9OD @ (((unsigned) &ODCON2)*8) + 2;
extern volatile __bit CHIME @ (((unsigned) &ALRMCFG)*8) + 6;
extern volatile __bit CHS0 @ (((unsigned) &ADCON0)*8) + 2;
extern volatile __bit CHS1 @ (((unsigned) &ADCON0)*8) + 3;
extern volatile __bit CHS2 @ (((unsigned) &ADCON0)*8) + 4;
extern volatile __bit CHS3 @ (((unsigned) &ADCON0)*8) + 5;
extern volatile __bit CHSN3 @ (((unsigned) &ADCON1)*8) + 3;
extern volatile __bit CK1 @ (((unsigned) &PORTC)*8) + 6;
extern volatile __bit CKE1 @ (((unsigned) &SSP1STAT)*8) + 6;
extern volatile __bit CKE2 @ (((unsigned) &SSP2STAT)*8) + 6;
extern volatile __bit CKP1 @ (((unsigned) &SSP1CON1)*8) + 4;
extern volatile __bit CKP2 @ (((unsigned) &SSP2CON1)*8) + 4;
extern volatile __bit CKTXP @ (((unsigned) &BAUDCON1)*8) + 4;
extern volatile __bit CLKI @ (((unsigned) &PORTA)*8) + 7;
extern volatile __bit CLKO @ (((unsigned) &PORTA)*8) + 6;
extern volatile __bit CM @ (((unsigned) &RCON)*8) + 5;
extern volatile __bit CM1IE @ (((unsigned) &PIE2)*8) + 5;
extern volatile __bit CM1IF @ (((unsigned) &PIR2)*8) + 5;
extern volatile __bit CM1IP @ (((unsigned) &IPR2)*8) + 5;
extern volatile __bit CM2IE @ (((unsigned) &PIE2)*8) + 6;
extern volatile __bit CM2IF @ (((unsigned) &PIR2)*8) + 6;
extern volatile __bit CM2IP @ (((unsigned) &IPR2)*8) + 6;
extern volatile __bit CM3IE @ (((unsigned) &PIE5)*8) + 5;
extern volatile __bit CM3IF @ (((unsigned) &PIR5)*8) + 5;
extern volatile __bit CM3IP @ (((unsigned) &IPR5)*8) + 5;
extern volatile __bit CMIE @ (((unsigned) &PIE2)*8) + 6;
extern volatile __bit CMIF @ (((unsigned) &PIR2)*8) + 6;
extern volatile __bit CMIP @ (((unsigned) &IPR2)*8) + 6;
extern volatile __bit CMP1MD @ (((unsigned) &PMDIS2)*8) + 0;
extern volatile __bit CMP2MD @ (((unsigned) &PMDIS2)*8) + 1;
extern volatile __bit CMP3MD @ (((unsigned) &PMDIS2)*8) + 2;
extern volatile __bit CMPL02 @ (((unsigned) &PSTR2CON)*8) + 6;
extern volatile __bit CMPL03 @ (((unsigned) &PSTR3CON)*8) + 6;
extern volatile __bit CMPL12 @ (((unsigned) &PSTR2CON)*8) + 7;
extern volatile __bit CMPL13 @ (((unsigned) &PSTR3CON)*8) + 7;
extern volatile __bit COE1 @ (((unsigned) &CM1CON)*8) + 6;
extern volatile __bit COE2 @ (((unsigned) &CM2CON)*8) + 6;
extern volatile __bit COE3 @ (((unsigned) &CM3CON)*8) + 6;
extern volatile __bit CON1 @ (((unsigned) &CM1CON)*8) + 7;
extern volatile __bit CON2 @ (((unsigned) &CM2CON)*8) + 7;
extern volatile __bit CON3 @ (((unsigned) &CM3CON)*8) + 7;
extern volatile __bit COUT1 @ (((unsigned) &CMSTAT)*8) + 0;
extern volatile __bit COUT2 @ (((unsigned) &CMSTAT)*8) + 1;
extern volatile __bit COUT3 @ (((unsigned) &CMSTAT)*8) + 2;
extern volatile __bit CPOL1 @ (((unsigned) &CM1CON)*8) + 5;
extern volatile __bit CPOL2 @ (((unsigned) &CM2CON)*8) + 5;
extern volatile __bit CPOL3 @ (((unsigned) &CM3CON)*8) + 5;
extern volatile __bit CREF1 @ (((unsigned) &CM1CON)*8) + 2;
extern volatile __bit CREF2 @ (((unsigned) &CM2CON)*8) + 2;
extern volatile __bit CREF3 @ (((unsigned) &CM3CON)*8) + 2;
extern volatile __bit CREN1 @ (((unsigned) &RCSTA1)*8) + 4;
extern volatile __bit CREN2 @ (((unsigned) &RCSTA2)*8) + 4;
extern volatile __bit CSRC1 @ (((unsigned) &TXSTA1)*8) + 7;
extern volatile __bit CSRC2 @ (((unsigned) &TXSTA2)*8) + 7;
extern volatile __bit CTED1 @ (((unsigned) &PORTB)*8) + 2;
extern volatile __bit CTED2 @ (((unsigned) &PORTB)*8) + 3;
extern volatile __bit CTMUDS @ (((unsigned) &ODCON3)*8) + 7;
extern volatile __bit CTMUEN @ (((unsigned) &CTMUCONH)*8) + 7;
extern volatile __bit CTMUIE @ (((unsigned) &PIE3)*8) + 2;
extern volatile __bit CTMUIF @ (((unsigned) &PIR3)*8) + 2;
extern volatile __bit CTMUIP @ (((unsigned) &IPR3)*8) + 2;
extern volatile __bit CTMUMD @ (((unsigned) &PMDIS1)*8) + 6;
extern volatile __bit CTMUSIDL @ (((unsigned) &CTMUCONH)*8) + 5;
extern volatile __bit CTPLS @ (((unsigned) &PORTC)*8) + 2;
extern volatile __bit CTTRIG @ (((unsigned) &CTMUCONH)*8) + 0;
extern volatile __bit CVR0 @ (((unsigned) &CVRCON)*8) + 0;
extern volatile __bit CVR1 @ (((unsigned) &CVRCON)*8) + 1;
extern volatile __bit CVR2 @ (((unsigned) &CVRCON)*8) + 2;
extern volatile __bit CVR3 @ (((unsigned) &CVRCON)*8) + 3;
extern volatile __bit CVREF @ (((unsigned) &PORTA)*8) + 2;
extern volatile __bit CVREN @ (((unsigned) &CVRCON)*8) + 7;
extern volatile __bit CVROE @ (((unsigned) &CVRCON)*8) + 6;
extern volatile __bit CVROEN @ (((unsigned) &CVRCON)*8) + 6;
extern volatile __bit CVRR @ (((unsigned) &CVRCON)*8) + 5;
extern volatile __bit CVRSS @ (((unsigned) &CVRCON)*8) + 4;
extern volatile __bit DA @ (((unsigned) &SSP1STAT)*8) + 5;
extern volatile __bit DA1 @ (((unsigned) &SSP1STAT)*8) + 5;
extern volatile __bit DA2 @ (((unsigned) &SSP2STAT)*8) + 5;
extern volatile __bit DATA_ADDRESS @ (((unsigned) &SSP1STAT)*8) + 5;
extern volatile __bit DATA_ADDRESS2 @ (((unsigned) &SSP2STAT)*8) + 5;
extern volatile __bit DC @ (((unsigned) &STATUS)*8) + 1;
extern volatile __bit DC10B0 @ (((unsigned) &CCP10CON)*8) + 4;
extern volatile __bit DC10B1 @ (((unsigned) &CCP10CON)*8) + 5;
extern volatile __bit DC1B0 @ (((unsigned) &CCP1CON)*8) + 4;
extern volatile __bit DC1B1 @ (((unsigned) &CCP1CON)*8) + 5;
extern volatile __bit DC2B0 @ (((unsigned) &CCP2CON)*8) + 4;
extern volatile __bit DC2B1 @ (((unsigned) &CCP2CON)*8) + 5;
extern volatile __bit DC3B0 @ (((unsigned) &CCP3CON)*8) + 4;
extern volatile __bit DC3B1 @ (((unsigned) &CCP3CON)*8) + 5;
extern volatile __bit DC4B0 @ (((unsigned) &CCP4CON)*8) + 4;
extern volatile __bit DC4B1 @ (((unsigned) &CCP4CON)*8) + 5;
extern volatile __bit DC5B0 @ (((unsigned) &CCP5CON)*8) + 4;
extern volatile __bit DC5B1 @ (((unsigned) &CCP5CON)*8) + 5;
extern volatile __bit DC6B0 @ (((unsigned) &CCP6CON)*8) + 4;
extern volatile __bit DC6B1 @ (((unsigned) &CCP6CON)*8) + 5;
extern volatile __bit DC7B0 @ (((unsigned) &CCP7CON)*8) + 4;
extern volatile __bit DC7B1 @ (((unsigned) &CCP7CON)*8) + 5;
extern volatile __bit DC8B0 @ (((unsigned) &CCP8CON)*8) + 4;
extern volatile __bit DC8B1 @ (((unsigned) &CCP8CON)*8) + 5;
extern volatile __bit DC9B0 @ (((unsigned) &CCP9CON)*8) + 4;
extern volatile __bit DC9B1 @ (((unsigned) &CCP9CON)*8) + 5;
extern volatile __bit DLYCYC0 @ (((unsigned) &DMACON2)*8) + 4;
extern volatile __bit DLYCYC1 @ (((unsigned) &DMACON2)*8) + 5;
extern volatile __bit DLYCYC2 @ (((unsigned) &DMACON2)*8) + 6;
extern volatile __bit DLYCYC3 @ (((unsigned) &DMACON2)*8) + 7;
extern volatile __bit DLYINTEN @ (((unsigned) &DMACON1)*8) + 1;
extern volatile __bit DMAEN @ (((unsigned) &DMACON1)*8) + 0;
extern volatile __bit DONE @ (((unsigned) &ADCON0)*8) + 1;
extern volatile __bit DS @ (((unsigned) &WDTCON)*8) + 3;
extern volatile __bit DSBOR @ (((unsigned) &DSCONL)*8) + 1;
extern volatile __bit DSEN @ (((unsigned) &DSCONH)*8) + 7;
extern volatile __bit DSFLT @ (((unsigned) &DSWAKEL)*8) + 7;
extern volatile __bit DSINT0 @ (((unsigned) &DSWAKEH)*8) + 0;
extern volatile __bit DSMCLR @ (((unsigned) &DSWAKEL)*8) + 2;
extern volatile __bit DSPOR @ (((unsigned) &DSWAKEL)*8) + 0;
extern volatile __bit DSRTC @ (((unsigned) &DSWAKEL)*8) + 3;
extern volatile __bit DSULP @ (((unsigned) &DSWAKEL)*8) + 5;
extern volatile __bit DSULPEN @ (((unsigned) &DSCONH)*8) + 1;
extern volatile __bit DSWDT @ (((unsigned) &DSWAKEL)*8) + 4;
extern volatile __bit DT1 @ (((unsigned) &PORTC)*8) + 7;
extern volatile __bit DTRXP @ (((unsigned) &BAUDCON1)*8) + 5;
extern volatile __bit DTRXP1 @ (((unsigned) &BAUDCON1)*8) + 5;
extern volatile __bit DTRXP2 @ (((unsigned) &BAUDCON2)*8) + 5;
extern volatile __bit DUPLEX0 @ (((unsigned) &DMACON1)*8) + 2;
extern volatile __bit DUPLEX1 @ (((unsigned) &DMACON1)*8) + 3;
extern volatile __bit D_A @ (((unsigned) &SSP1STAT)*8) + 5;
extern volatile __bit D_A2 @ (((unsigned) &SSP2STAT)*8) + 5;
extern volatile __bit D_nA2 @ (((unsigned) &SSP2STAT)*8) + 5;
extern volatile __bit ECCP1AS0 @ (((unsigned) &ECCP1AS)*8) + 4;
extern volatile __bit ECCP1AS1 @ (((unsigned) &ECCP1AS)*8) + 5;
extern volatile __bit ECCP1AS2 @ (((unsigned) &ECCP1AS)*8) + 6;
extern volatile __bit ECCP1ASE @ (((unsigned) &ECCP1AS)*8) + 7;
extern volatile __bit ECCP1MD @ (((unsigned) &PMDIS0)*8) + 5;
extern volatile __bit ECCP1OD @ (((unsigned) &ODCON1)*8) + 0;
extern volatile __bit ECCP2AS0 @ (((unsigned) &ECCP2AS)*8) + 4;
extern volatile __bit ECCP2AS1 @ (((unsigned) &ECCP2AS)*8) + 5;
extern volatile __bit ECCP2AS2 @ (((unsigned) &ECCP2AS)*8) + 6;
extern volatile __bit ECCP2ASE @ (((unsigned) &ECCP2AS)*8) + 7;
extern volatile __bit ECCP2MD @ (((unsigned) &PMDIS0)*8) + 6;
extern volatile __bit ECCP2OD @ (((unsigned) &ODCON1)*8) + 1;
extern volatile __bit ECCP3AS0 @ (((unsigned) &ECCP3AS)*8) + 4;
extern volatile __bit ECCP3AS1 @ (((unsigned) &ECCP3AS)*8) + 5;
extern volatile __bit ECCP3AS2 @ (((unsigned) &ECCP3AS)*8) + 6;
extern volatile __bit ECCP3ASE @ (((unsigned) &ECCP3AS)*8) + 7;
extern volatile __bit ECCP3MD @ (((unsigned) &PMDIS0)*8) + 7;
extern volatile __bit ECCP3OD @ (((unsigned) &ODCON1)*8) + 2;
extern volatile __bit EDG1POL @ (((unsigned) &CTMUCONL)*8) + 4;
extern volatile __bit EDG1SEL0 @ (((unsigned) &CTMUCONL)*8) + 2;
extern volatile __bit EDG1SEL1 @ (((unsigned) &CTMUCONL)*8) + 3;
extern volatile __bit EDG1STAT @ (((unsigned) &CTMUCONL)*8) + 0;
extern volatile __bit EDG2POL @ (((unsigned) &CTMUCONL)*8) + 7;
extern volatile __bit EDG2SEL0 @ (((unsigned) &CTMUCONL)*8) + 5;
extern volatile __bit EDG2SEL1 @ (((unsigned) &CTMUCONL)*8) + 6;
extern volatile __bit EDG2STAT @ (((unsigned) &CTMUCONL)*8) + 1;
extern volatile __bit EDGEN @ (((unsigned) &CTMUCONH)*8) + 3;
extern volatile __bit EDGSEQEN @ (((unsigned) &CTMUCONH)*8) + 2;
extern volatile __bit EVPOL01 @ (((unsigned) &CM1CON)*8) + 3;
extern volatile __bit EVPOL02 @ (((unsigned) &CM2CON)*8) + 3;
extern volatile __bit EVPOL03 @ (((unsigned) &CM3CON)*8) + 3;
extern volatile __bit EVPOL05 @ (((unsigned) &IPR5)*8) + 3;
extern volatile __bit EVPOL11 @ (((unsigned) &CM1CON)*8) + 4;
extern volatile __bit EVPOL12 @ (((unsigned) &CM2CON)*8) + 4;
extern volatile __bit EVPOL13 @ (((unsigned) &CM3CON)*8) + 4;
extern volatile __bit EVPOL15 @ (((unsigned) &IPR5)*8) + 4;
extern volatile __bit FERR1 @ (((unsigned) &RCSTA1)*8) + 2;
extern volatile __bit FERR2 @ (((unsigned) &RCSTA2)*8) + 2;
extern volatile __bit FREE @ (((unsigned) &EECON1)*8) + 4;
extern volatile __bit GCEN1 @ (((unsigned) &SSP1CON2)*8) + 7;
extern volatile __bit GCEN2 @ (((unsigned) &SSP2CON2)*8) + 7;
extern volatile __bit GIE @ (((unsigned) &INTCON)*8) + 7;
extern volatile __bit GIEH @ (((unsigned) &INTCON)*8) + 7;
extern volatile __bit GIEL @ (((unsigned) &INTCON)*8) + 6;
extern volatile __bit GIE_GIEH @ (((unsigned) &INTCON)*8) + 7;
extern volatile __bit GO @ (((unsigned) &ADCON0)*8) + 1;
extern volatile __bit GODONE @ (((unsigned) &ADCON0)*8) + 1;
extern volatile __bit GO_DONE @ (((unsigned) &ADCON0)*8) + 1;
extern volatile __bit GO_NOT_DONE @ (((unsigned) &ADCON0)*8) + 1;
extern volatile __bit GO_nDONE @ (((unsigned) &ADCON0)*8) + 1;
extern volatile __bit HALFSEC @ (((unsigned) &RTCCFG)*8) + 3;
extern volatile __bit HLVDEN @ (((unsigned) &HLVDCON)*8) + 4;
extern volatile __bit HLVDIE @ (((unsigned) &PIE2)*8) + 2;
extern volatile __bit HLVDIF @ (((unsigned) &PIR2)*8) + 2;
extern volatile __bit HLVDIN @ (((unsigned) &PORTA)*8) + 5;
extern volatile __bit HLVDIP @ (((unsigned) &IPR2)*8) + 2;
extern volatile __bit HLVDL0 @ (((unsigned) &HLVDCON)*8) + 0;
extern volatile __bit HLVDL1 @ (((unsigned) &HLVDCON)*8) + 1;
extern volatile __bit HLVDL2 @ (((unsigned) &HLVDCON)*8) + 2;
extern volatile __bit HLVDL3 @ (((unsigned) &HLVDCON)*8) + 3;
extern volatile __bit I2C_DAT @ (((unsigned) &SSP1STAT)*8) + 5;
extern volatile __bit I2C_DAT2 @ (((unsigned) &SSP2STAT)*8) + 5;
extern volatile __bit I2C_READ @ (((unsigned) &SSP1STAT)*8) + 2;
extern volatile __bit I2C_READ2 @ (((unsigned) &SSP2STAT)*8) + 2;
extern volatile __bit I2C_START @ (((unsigned) &SSP1STAT)*8) + 3;
extern volatile __bit I2C_START2 @ (((unsigned) &SSP2STAT)*8) + 3;
extern volatile __bit I2C_STOP @ (((unsigned) &SSP1STAT)*8) + 4;
extern volatile __bit I2C_STOP2 @ (((unsigned) &SSP2STAT)*8) + 4;
extern volatile __bit IDISSEN @ (((unsigned) &CTMUCONH)*8) + 1;
extern volatile __bit IDLEN @ (((unsigned) &OSCCON)*8) + 7;
extern volatile __bit INT0 @ (((unsigned) &PORTB)*8) + 0;
extern volatile __bit INT0E @ (((unsigned) &INTCON)*8) + 4;
extern volatile __bit INT0F @ (((unsigned) &INTCON)*8) + 1;
extern volatile __bit INT0IE @ (((unsigned) &INTCON)*8) + 4;
extern volatile __bit INT0IF @ (((unsigned) &INTCON)*8) + 1;
extern volatile __bit INT1E @ (((unsigned) &INTCON3)*8) + 3;
extern volatile __bit INT1F @ (((unsigned) &INTCON3)*8) + 0;
extern volatile __bit INT1IE @ (((unsigned) &INTCON3)*8) + 3;
extern volatile __bit INT1IF @ (((unsigned) &INTCON3)*8) + 0;
extern volatile __bit INT1IP @ (((unsigned) &INTCON3)*8) + 6;
extern volatile __bit INT1P @ (((unsigned) &INTCON3)*8) + 6;
extern volatile __bit INT2E @ (((unsigned) &INTCON3)*8) + 4;
extern volatile __bit INT2F @ (((unsigned) &INTCON3)*8) + 1;
extern volatile __bit INT2IE @ (((unsigned) &INTCON3)*8) + 4;
extern volatile __bit INT2IF @ (((unsigned) &INTCON3)*8) + 1;
extern volatile __bit INT2IP @ (((unsigned) &INTCON3)*8) + 7;
extern volatile __bit INT2P @ (((unsigned) &INTCON3)*8) + 7;
extern volatile __bit INT3E @ (((unsigned) &INTCON3)*8) + 5;
extern volatile __bit INT3F @ (((unsigned) &INTCON3)*8) + 2;
extern volatile __bit INT3IE @ (((unsigned) &INTCON3)*8) + 5;
extern volatile __bit INT3IF @ (((unsigned) &INTCON3)*8) + 2;
extern volatile __bit INT3IP @ (((unsigned) &INTCON2)*8) + 1;
extern volatile __bit INT3P @ (((unsigned) &INTCON2)*8) + 1;
extern volatile __bit INTEDG0 @ (((unsigned) &INTCON2)*8) + 6;
extern volatile __bit INTEDG1 @ (((unsigned) &INTCON2)*8) + 5;
extern volatile __bit INTEDG2 @ (((unsigned) &INTCON2)*8) + 4;
extern volatile __bit INTEDG3 @ (((unsigned) &INTCON2)*8) + 3;
extern volatile __bit INTLVL0 @ (((unsigned) &DMACON2)*8) + 0;
extern volatile __bit INTLVL1 @ (((unsigned) &DMACON2)*8) + 1;
extern volatile __bit INTLVL2 @ (((unsigned) &DMACON2)*8) + 2;
extern volatile __bit INTLVL3 @ (((unsigned) &DMACON2)*8) + 3;
extern volatile __bit INTSRC @ (((unsigned) &OSCTUNE)*8) + 7;
extern volatile __bit IOLOCK @ (((unsigned) &PPSCON)*8) + 0;
extern volatile __bit IPEN @ (((unsigned) &RCON)*8) + 7;
extern volatile __bit IRCF0 @ (((unsigned) &OSCCON)*8) + 4;
extern volatile __bit IRCF1 @ (((unsigned) &OSCCON)*8) + 5;
extern volatile __bit IRCF2 @ (((unsigned) &OSCCON)*8) + 6;
extern volatile __bit IRNG0 @ (((unsigned) &CTMUICON)*8) + 0;
extern volatile __bit IRNG1 @ (((unsigned) &CTMUICON)*8) + 1;
extern volatile __bit IRVST @ (((unsigned) &HLVDCON)*8) + 5;
extern volatile __bit ITRIM0 @ (((unsigned) &CTMUICON)*8) + 2;
extern volatile __bit ITRIM1 @ (((unsigned) &CTMUICON)*8) + 3;
extern volatile __bit ITRIM2 @ (((unsigned) &CTMUICON)*8) + 4;
extern volatile __bit ITRIM3 @ (((unsigned) &CTMUICON)*8) + 5;
extern volatile __bit ITRIM4 @ (((unsigned) &CTMUICON)*8) + 6;
extern volatile __bit ITRIM5 @ (((unsigned) &CTMUICON)*8) + 7;
extern volatile __bit KBI0 @ (((unsigned) &PORTB)*8) + 4;
extern volatile __bit KBI1 @ (((unsigned) &PORTB)*8) + 5;
extern volatile __bit KBI2 @ (((unsigned) &PORTB)*8) + 6;
extern volatile __bit KBI3 @ (((unsigned) &PORTB)*8) + 7;
extern volatile __bit LA0 @ (((unsigned) &LATA)*8) + 0;
extern volatile __bit LA1 @ (((unsigned) &LATA)*8) + 1;
extern volatile __bit LA2 @ (((unsigned) &LATA)*8) + 2;
extern volatile __bit LA3 @ (((unsigned) &LATA)*8) + 3;
extern volatile __bit LA4 @ (((unsigned) &LATA)*8) + 4;
extern volatile __bit LA5 @ (((unsigned) &LATA)*8) + 5;
extern volatile __bit LA6 @ (((unsigned) &LATA)*8) + 6;
extern volatile __bit LA7 @ (((unsigned) &LATA)*8) + 7;
extern volatile __bit LATA0 @ (((unsigned) &LATA)*8) + 0;
extern volatile __bit LATA1 @ (((unsigned) &LATA)*8) + 1;
extern volatile __bit LATA2 @ (((unsigned) &LATA)*8) + 2;
extern volatile __bit LATA3 @ (((unsigned) &LATA)*8) + 3;
extern volatile __bit LATA5 @ (((unsigned) &LATA)*8) + 5;
extern volatile __bit LATA6 @ (((unsigned) &LATA)*8) + 6;
extern volatile __bit LATA7 @ (((unsigned) &LATA)*8) + 7;
extern volatile __bit LATB0 @ (((unsigned) &LATB)*8) + 0;
extern volatile __bit LATB1 @ (((unsigned) &LATB)*8) + 1;
extern volatile __bit LATB2 @ (((unsigned) &LATB)*8) + 2;
extern volatile __bit LATB3 @ (((unsigned) &LATB)*8) + 3;
extern volatile __bit LATB4 @ (((unsigned) &LATB)*8) + 4;
extern volatile __bit LATB5 @ (((unsigned) &LATB)*8) + 5;
extern volatile __bit LATB6 @ (((unsigned) &LATB)*8) + 6;
extern volatile __bit LATB7 @ (((unsigned) &LATB)*8) + 7;
extern volatile __bit LATC0 @ (((unsigned) &LATC)*8) + 0;
extern volatile __bit LATC1 @ (((unsigned) &LATC)*8) + 1;
extern volatile __bit LATC2 @ (((unsigned) &LATC)*8) + 2;
extern volatile __bit LATC3 @ (((unsigned) &LATC)*8) + 3;
extern volatile __bit LATC4 @ (((unsigned) &LATC)*8) + 4;
extern volatile __bit LATC5 @ (((unsigned) &LATC)*8) + 5;
extern volatile __bit LATC6 @ (((unsigned) &LATC)*8) + 6;
extern volatile __bit LATC7 @ (((unsigned) &LATC)*8) + 7;
extern volatile __bit LB0 @ (((unsigned) &LATB)*8) + 0;
extern volatile __bit LB1 @ (((unsigned) &LATB)*8) + 1;
extern volatile __bit LB2 @ (((unsigned) &LATB)*8) + 2;
extern volatile __bit LB3 @ (((unsigned) &LATB)*8) + 3;
extern volatile __bit LB4 @ (((unsigned) &LATB)*8) + 4;
extern volatile __bit LB5 @ (((unsigned) &LATB)*8) + 5;
extern volatile __bit LB6 @ (((unsigned) &LATB)*8) + 6;
extern volatile __bit LB7 @ (((unsigned) &LATB)*8) + 7;
extern volatile __bit LC0 @ (((unsigned) &LATC)*8) + 0;
extern volatile __bit LC1 @ (((unsigned) &LATC)*8) + 1;
extern volatile __bit LC2 @ (((unsigned) &LATC)*8) + 2;
extern volatile __bit LC3 @ (((unsigned) &LATC)*8) + 3;
extern volatile __bit LC4 @ (((unsigned) &LATC)*8) + 4;
extern volatile __bit LC5 @ (((unsigned) &LATC)*8) + 5;
extern volatile __bit LC6 @ (((unsigned) &LATC)*8) + 6;
extern volatile __bit LC7 @ (((unsigned) &LATC)*8) + 7;
extern volatile __bit LVDIE @ (((unsigned) &PIE2)*8) + 2;
extern volatile __bit LVDIF @ (((unsigned) &PIR2)*8) + 2;
extern volatile __bit LVDIN @ (((unsigned) &PORTA)*8) + 5;
extern volatile __bit LVDIP @ (((unsigned) &IPR2)*8) + 2;
extern volatile __bit LVDSTAT @ (((unsigned) &WDTCON)*8) + 6;
extern volatile __bit MSK01 @ (((unsigned) &SSP1ADD)*8) + 0;
extern volatile __bit MSK02 @ (((unsigned) &SSP2ADD)*8) + 0;
extern volatile __bit MSK11 @ (((unsigned) &SSP1ADD)*8) + 1;
extern volatile __bit MSK12 @ (((unsigned) &SSP2ADD)*8) + 1;
extern volatile __bit MSK21 @ (((unsigned) &SSP1ADD)*8) + 2;
extern volatile __bit MSK22 @ (((unsigned) &SSP2ADD)*8) + 2;
extern volatile __bit MSK31 @ (((unsigned) &SSP1ADD)*8) + 3;
extern volatile __bit MSK32 @ (((unsigned) &SSP2ADD)*8) + 3;
extern volatile __bit MSK41 @ (((unsigned) &SSP1ADD)*8) + 4;
extern volatile __bit MSK42 @ (((unsigned) &SSP2ADD)*8) + 4;
extern volatile __bit MSK51 @ (((unsigned) &SSP1ADD)*8) + 5;
extern volatile __bit MSK52 @ (((unsigned) &SSP2ADD)*8) + 5;
extern volatile __bit MSK61 @ (((unsigned) &SSP1ADD)*8) + 6;
extern volatile __bit MSK62 @ (((unsigned) &SSP2ADD)*8) + 6;
extern volatile __bit MSK71 @ (((unsigned) &SSP1ADD)*8) + 7;
extern volatile __bit MSK72 @ (((unsigned) &SSP2ADD)*8) + 7;
extern volatile __bit NEGATIVE @ (((unsigned) &STATUS)*8) + 4;
extern volatile __bit NOT_A @ (((unsigned) &SSP1STAT)*8) + 5;
extern volatile __bit NOT_ADDRESS @ (((unsigned) &SSP1STAT)*8) + 5;
extern volatile __bit NOT_BOR @ (((unsigned) &RCON)*8) + 0;
extern volatile __bit NOT_CM @ (((unsigned) &RCON)*8) + 5;
extern volatile __bit NOT_DONE @ (((unsigned) &ADCON0)*8) + 1;
extern volatile __bit NOT_PD @ (((unsigned) &RCON)*8) + 2;
extern volatile __bit NOT_POR @ (((unsigned) &RCON)*8) + 1;
extern volatile __bit NOT_RBPU @ (((unsigned) &INTCON2)*8) + 7;
extern volatile __bit NOT_RC8 @ (((unsigned) &RCSTA1)*8) + 6;
extern volatile __bit NOT_RI @ (((unsigned) &RCON)*8) + 4;
extern volatile __bit NOT_SS1 @ (((unsigned) &PORTA)*8) + 5;
extern volatile __bit NOT_T1DONE @ (((unsigned) &T1GCON)*8) + 3;
extern volatile __bit NOT_T1SYNC @ (((unsigned) &T1CON)*8) + 2;
extern volatile __bit NOT_T3SYNC @ (((unsigned) &T3CON)*8) + 2;
extern volatile __bit NOT_T5DONE @ (((unsigned) &T5GCON)*8) + 3;
extern volatile __bit NOT_T5SYNC @ (((unsigned) &T5CON)*8) + 2;
extern volatile __bit NOT_TO @ (((unsigned) &RCON)*8) + 3;
extern volatile __bit NOT_TX8 @ (((unsigned) &TXSTA1)*8) + 6;
extern volatile __bit NOT_W @ (((unsigned) &SSP1STAT)*8) + 2;
extern volatile __bit NOT_WRITE @ (((unsigned) &SSP1STAT)*8) + 2;
extern volatile __bit OERR1 @ (((unsigned) &RCSTA1)*8) + 1;
extern volatile __bit OERR2 @ (((unsigned) &RCSTA2)*8) + 1;
extern volatile __bit OSC1 @ (((unsigned) &PORTA)*8) + 7;
extern volatile __bit OSC2 @ (((unsigned) &PORTA)*8) + 6;
extern volatile __bit OSCFIE @ (((unsigned) &PIE2)*8) + 7;
extern volatile __bit OSCFIF @ (((unsigned) &PIR2)*8) + 7;
extern volatile __bit OSCFIP @ (((unsigned) &IPR2)*8) + 7;
extern volatile __bit OSTS @ (((unsigned) &OSCCON)*8) + 3;
extern volatile __bit OV @ (((unsigned) &STATUS)*8) + 3;
extern volatile __bit OVERFLOW @ (((unsigned) &STATUS)*8) + 3;
extern volatile __bit P1DC0 @ (((unsigned) &ECCP1DEL)*8) + 0;
extern volatile __bit P1DC1 @ (((unsigned) &ECCP1DEL)*8) + 1;
extern volatile __bit P1DC2 @ (((unsigned) &ECCP1DEL)*8) + 2;
extern volatile __bit P1DC3 @ (((unsigned) &ECCP1DEL)*8) + 3;
extern volatile __bit P1DC4 @ (((unsigned) &ECCP1DEL)*8) + 4;
extern volatile __bit P1DC5 @ (((unsigned) &ECCP1DEL)*8) + 5;
extern volatile __bit P1DC6 @ (((unsigned) &ECCP1DEL)*8) + 6;
extern volatile __bit P1M0 @ (((unsigned) &CCP1CON)*8) + 6;
extern volatile __bit P1M1 @ (((unsigned) &CCP1CON)*8) + 7;
extern volatile __bit P1RSEN @ (((unsigned) &ECCP1DEL)*8) + 7;
extern volatile __bit P2 @ (((unsigned) &SSP2STAT)*8) + 4;
extern volatile __bit P2DC02 @ (((unsigned) &PSTR2CON)*8) + 0;
extern volatile __bit P2DC0CON @ (((unsigned) &PSTR2CON)*8) + 0;
extern volatile __bit P2DC12 @ (((unsigned) &PSTR2CON)*8) + 1;
extern volatile __bit P2DC1CON @ (((unsigned) &PSTR2CON)*8) + 1;
extern volatile __bit P2DC22 @ (((unsigned) &PSTR2CON)*8) + 2;
extern volatile __bit P2DC2CON @ (((unsigned) &PSTR2CON)*8) + 2;
extern volatile __bit P2DC32 @ (((unsigned) &PSTR2CON)*8) + 3;
extern volatile __bit P2DC3CON @ (((unsigned) &PSTR2CON)*8) + 3;
extern volatile __bit P2DC42 @ (((unsigned) &PSTR2CON)*8) + 4;
extern volatile __bit P2DC4CON @ (((unsigned) &PSTR2CON)*8) + 4;
extern volatile __bit P2DC52 @ (((unsigned) &PSTR2CON)*8) + 5;
extern volatile __bit P2DC5CON @ (((unsigned) &PSTR2CON)*8) + 5;
extern volatile __bit P2DC62 @ (((unsigned) &PSTR2CON)*8) + 6;
extern volatile __bit P2DC6CON @ (((unsigned) &PSTR2CON)*8) + 6;
extern volatile __bit P2M0 @ (((unsigned) &CCP2CON)*8) + 6;
extern volatile __bit P2M1 @ (((unsigned) &CCP2CON)*8) + 7;
extern volatile __bit P2RSEN @ (((unsigned) &ECCP2DEL)*8) + 7;
extern volatile __bit P3DC0 @ (((unsigned) &ECCP3DEL)*8) + 0;
extern volatile __bit P3DC1 @ (((unsigned) &ECCP3DEL)*8) + 1;
extern volatile __bit P3DC2 @ (((unsigned) &ECCP3DEL)*8) + 2;
extern volatile __bit P3DC3 @ (((unsigned) &ECCP3DEL)*8) + 3;
extern volatile __bit P3DC4 @ (((unsigned) &ECCP3DEL)*8) + 4;
extern volatile __bit P3DC5 @ (((unsigned) &ECCP3DEL)*8) + 5;
extern volatile __bit P3DC6 @ (((unsigned) &ECCP3DEL)*8) + 6;
extern volatile __bit P3M0 @ (((unsigned) &CCP3CON)*8) + 6;
extern volatile __bit P3M1 @ (((unsigned) &CCP3CON)*8) + 7;
extern volatile __bit P3RSEN @ (((unsigned) &ECCP3DEL)*8) + 7;
extern volatile __bit PA1 @ (((unsigned) &PORTC)*8) + 2;
extern volatile __bit PA2 @ (((unsigned) &PORTC)*8) + 1;
extern volatile __bit PCFG0 @ (((unsigned) &ANCON0)*8) + 0;
extern volatile __bit PCFG1 @ (((unsigned) &ANCON0)*8) + 1;
extern volatile __bit PCFG10 @ (((unsigned) &ANCON1)*8) + 2;
extern volatile __bit PCFG11 @ (((unsigned) &ANCON1)*8) + 3;
extern volatile __bit PCFG12 @ (((unsigned) &ANCON1)*8) + 4;
extern volatile __bit PCFG15 @ (((unsigned) &ANCON1)*8) + 7;
extern volatile __bit PCFG2 @ (((unsigned) &ANCON0)*8) + 2;
extern volatile __bit PCFG3 @ (((unsigned) &ANCON0)*8) + 3;
extern volatile __bit PCFG4 @ (((unsigned) &ANCON0)*8) + 4;
extern volatile __bit PCFG8 @ (((unsigned) &ANCON1)*8) + 0;
extern volatile __bit PCFG9 @ (((unsigned) &ANCON1)*8) + 1;
extern volatile __bit PD @ (((unsigned) &RCON)*8) + 2;
extern volatile __bit PEIE @ (((unsigned) &INTCON)*8) + 6;
extern volatile __bit PEIE_GIEL @ (((unsigned) &INTCON)*8) + 6;
extern volatile __bit PEN1 @ (((unsigned) &SSP1CON2)*8) + 2;
extern volatile __bit PEN2 @ (((unsigned) &SSP2CON2)*8) + 2;
extern volatile __bit PGC @ (((unsigned) &PORTB)*8) + 6;
extern volatile __bit PGD @ (((unsigned) &PORTB)*8) + 7;
extern volatile __bit PLLEN @ (((unsigned) &OSCTUNE)*8) + 6;
extern volatile __bit PMDADC @ (((unsigned) &PMDIS0)*8) + 0;
extern volatile __bit PMDCCP10 @ (((unsigned) &PMDIS3)*8) + 7;
extern volatile __bit PMDCCP4 @ (((unsigned) &PMDIS3)*8) + 1;
extern volatile __bit PMDCCP5 @ (((unsigned) &PMDIS3)*8) + 2;
extern volatile __bit PMDCCP6 @ (((unsigned) &PMDIS3)*8) + 3;
extern volatile __bit PMDCCP7 @ (((unsigned) &PMDIS3)*8) + 4;
extern volatile __bit PMDCCP8 @ (((unsigned) &PMDIS3)*8) + 5;
extern volatile __bit PMDCCP9 @ (((unsigned) &PMDIS3)*8) + 6;
extern volatile __bit PMDCMP1 @ (((unsigned) &PMDIS2)*8) + 0;
extern volatile __bit PMDCMP2 @ (((unsigned) &PMDIS2)*8) + 1;
extern volatile __bit PMDCMP3 @ (((unsigned) &PMDIS2)*8) + 2;
extern volatile __bit PMDCTMU @ (((unsigned) &PMDIS1)*8) + 6;
extern volatile __bit PMDECCP1 @ (((unsigned) &PMDIS0)*8) + 5;
extern volatile __bit PMDECCP2 @ (((unsigned) &PMDIS0)*8) + 6;
extern volatile __bit PMDECCP3 @ (((unsigned) &PMDIS0)*8) + 7;
extern volatile __bit PMDMSSP1 @ (((unsigned) &PMDIS0)*8) + 1;
extern volatile __bit PMDMSSP2 @ (((unsigned) &PMDIS0)*8) + 2;
extern volatile __bit PMDRTCC @ (((unsigned) &PMDIS1)*8) + 5;
extern volatile __bit PMDTMR1 @ (((unsigned) &PMDIS1)*8) + 1;
extern volatile __bit PMDTMR2 @ (((unsigned) &PMDIS1)*8) + 2;
extern volatile __bit PMDTMR3 @ (((unsigned) &PMDIS1)*8) + 3;
extern volatile __bit PMDTMR4 @ (((unsigned) &PMDIS1)*8) + 4;
extern volatile __bit PMDTMR5 @ (((unsigned) &PMDIS2)*8) + 3;
extern volatile __bit PMDTMR6 @ (((unsigned) &PMDIS2)*8) + 4;
extern volatile __bit PMDTMR8 @ (((unsigned) &PMDIS2)*8) + 6;
extern volatile __bit PMDUART1 @ (((unsigned) &PMDIS0)*8) + 3;
extern volatile __bit PMDUART2 @ (((unsigned) &PMDIS0)*8) + 4;
extern volatile __bit POR @ (((unsigned) &RCON)*8) + 1;
extern volatile __bit PRISD @ (((unsigned) &OSCCON2)*8) + 2;
extern volatile __bit PSA @ (((unsigned) &T0CON)*8) + 3;
extern volatile __bit PSS1AC0 @ (((unsigned) &ECCP1AS)*8) + 2;
extern volatile __bit PSS1AC1 @ (((unsigned) &ECCP1AS)*8) + 3;
extern volatile __bit PSS1BD0 @ (((unsigned) &ECCP1AS)*8) + 0;
extern volatile __bit PSS1BD1 @ (((unsigned) &ECCP1AS)*8) + 1;
extern volatile __bit PSS2AC0 @ (((unsigned) &ECCP2AS)*8) + 2;
extern volatile __bit PSS2AC1 @ (((unsigned) &ECCP2AS)*8) + 3;
extern volatile __bit PSS2BD0 @ (((unsigned) &ECCP2AS)*8) + 0;
extern volatile __bit PSS2BD1 @ (((unsigned) &ECCP2AS)*8) + 1;
extern volatile __bit PSS3AC0 @ (((unsigned) &ECCP3AS)*8) + 2;
extern volatile __bit PSS3AC1 @ (((unsigned) &ECCP3AS)*8) + 3;
extern volatile __bit PSS3BD0 @ (((unsigned) &ECCP3AS)*8) + 0;
extern volatile __bit PSS3BD1 @ (((unsigned) &ECCP3AS)*8) + 1;
extern volatile __bit RA0 @ (((unsigned) &PORTA)*8) + 0;
extern volatile __bit RA1 @ (((unsigned) &PORTA)*8) + 1;
extern volatile __bit RA2 @ (((unsigned) &PORTA)*8) + 2;
extern volatile __bit RA3 @ (((unsigned) &PORTA)*8) + 3;
extern volatile __bit RA4 @ (((unsigned) &PORTA)*8) + 4;
extern volatile __bit RA5 @ (((unsigned) &PORTA)*8) + 5;
extern volatile __bit RA6 @ (((unsigned) &PORTA)*8) + 6;
extern volatile __bit RA7 @ (((unsigned) &PORTA)*8) + 7;
extern volatile __bit RB0 @ (((unsigned) &PORTB)*8) + 0;
extern volatile __bit RB1 @ (((unsigned) &PORTB)*8) + 1;
extern volatile __bit RB2 @ (((unsigned) &PORTB)*8) + 2;
extern volatile __bit RB3 @ (((unsigned) &PORTB)*8) + 3;
extern volatile __bit RB4 @ (((unsigned) &PORTB)*8) + 4;
extern volatile __bit RB5 @ (((unsigned) &PORTB)*8) + 5;
extern volatile __bit RB6 @ (((unsigned) &PORTB)*8) + 6;
extern volatile __bit RB7 @ (((unsigned) &PORTB)*8) + 7;
extern volatile __bit RBIE @ (((unsigned) &INTCON)*8) + 3;
extern volatile __bit RBIF @ (((unsigned) &INTCON)*8) + 0;
extern volatile __bit RBIP @ (((unsigned) &INTCON2)*8) + 0;
extern volatile __bit RBPU @ (((unsigned) &INTCON2)*8) + 7;
extern volatile __bit RC0 @ (((unsigned) &PORTC)*8) + 0;
extern volatile __bit RC1 @ (((unsigned) &PORTC)*8) + 1;
extern volatile __bit RC1IE @ (((unsigned) &PIE1)*8) + 5;
extern volatile __bit RC1IF @ (((unsigned) &PIR1)*8) + 5;
extern volatile __bit RC1IP @ (((unsigned) &IPR1)*8) + 5;
extern volatile __bit RC2 @ (((unsigned) &PORTC)*8) + 2;
extern volatile __bit RC2IE @ (((unsigned) &PIE3)*8) + 5;
extern volatile __bit RC2IF @ (((unsigned) &PIR3)*8) + 5;
extern volatile __bit RC2IP @ (((unsigned) &IPR3)*8) + 5;
extern volatile __bit RC3 @ (((unsigned) &PORTC)*8) + 3;
extern volatile __bit RC4 @ (((unsigned) &PORTC)*8) + 4;
extern volatile __bit RC5 @ (((unsigned) &PORTC)*8) + 5;
extern volatile __bit RC6 @ (((unsigned) &PORTC)*8) + 6;
extern volatile __bit RC7 @ (((unsigned) &PORTC)*8) + 7;
extern volatile __bit RC8_9 @ (((unsigned) &RCSTA1)*8) + 6;
extern volatile __bit RC8_92 @ (((unsigned) &RCSTA2)*8) + 6;
extern volatile __bit RC9 @ (((unsigned) &RCSTA1)*8) + 6;
extern volatile __bit RC92 @ (((unsigned) &RCSTA2)*8) + 6;
extern volatile __bit RCD8 @ (((unsigned) &RCSTA1)*8) + 0;
extern volatile __bit RCD82 @ (((unsigned) &RCSTA2)*8) + 0;
extern volatile __bit RCEN1 @ (((unsigned) &SSP1CON2)*8) + 3;
extern volatile __bit RCEN2 @ (((unsigned) &SSP2CON2)*8) + 3;
extern volatile __bit RCIDL1 @ (((unsigned) &BAUDCON1)*8) + 6;
extern volatile __bit RCIDL2 @ (((unsigned) &BAUDCON2)*8) + 6;
extern volatile __bit RCIE @ (((unsigned) &PIE1)*8) + 5;
extern volatile __bit RCIF @ (((unsigned) &PIR1)*8) + 5;
extern volatile __bit RCIP @ (((unsigned) &IPR1)*8) + 5;
extern volatile __bit RCMT @ (((unsigned) &BAUDCON1)*8) + 6;
extern volatile __bit RCMT1 @ (((unsigned) &BAUDCON1)*8) + 6;
extern volatile __bit RCMT2 @ (((unsigned) &BAUDCON2)*8) + 6;
extern volatile __bit RD163 @ (((unsigned) &T3CON)*8) + 7;
extern volatile __bit RD165 @ (((unsigned) &T5CON)*8) + 1;
extern volatile __bit READ_WRITE @ (((unsigned) &SSP1STAT)*8) + 2;
extern volatile __bit READ_WRITE2 @ (((unsigned) &SSP2STAT)*8) + 2;
extern volatile __bit REFO @ (((unsigned) &PORTB)*8) + 2;
extern volatile __bit REGSLP @ (((unsigned) &WDTCON)*8) + 7;
extern volatile __bit RELEASE @ (((unsigned) &DSCONL)*8) + 0;
extern volatile __bit RI @ (((unsigned) &RCON)*8) + 4;
extern volatile __bit RJPU @ (((unsigned) &PORTA)*8) + 7;
extern volatile __bit RODIV0 @ (((unsigned) &REFOCON)*8) + 0;
extern volatile __bit RODIV1 @ (((unsigned) &REFOCON)*8) + 1;
extern volatile __bit RODIV2 @ (((unsigned) &REFOCON)*8) + 2;
extern volatile __bit RODIV3 @ (((unsigned) &REFOCON)*8) + 3;
extern volatile __bit ROON @ (((unsigned) &REFOCON)*8) + 7;
extern volatile __bit ROSEL @ (((unsigned) &REFOCON)*8) + 4;
extern volatile __bit ROSSLP @ (((unsigned) &REFOCON)*8) + 5;
extern volatile __bit RP0 @ (((unsigned) &PORTA)*8) + 0;
extern volatile __bit RP1 @ (((unsigned) &PORTA)*8) + 1;
extern volatile __bit RP10 @ (((unsigned) &PORTB)*8) + 7;
extern volatile __bit RP11 @ (((unsigned) &PORTC)*8) + 0;
extern volatile __bit RP12 @ (((unsigned) &PORTC)*8) + 1;
extern volatile __bit RP13 @ (((unsigned) &PORTC)*8) + 2;
extern volatile __bit RP14 @ (((unsigned) &PORTC)*8) + 3;
extern volatile __bit RP15 @ (((unsigned) &PORTC)*8) + 4;
extern volatile __bit RP16 @ (((unsigned) &PORTC)*8) + 5;
extern volatile __bit RP17 @ (((unsigned) &PORTC)*8) + 6;
extern volatile __bit RP18 @ (((unsigned) &PORTC)*8) + 7;
extern volatile __bit RP2 @ (((unsigned) &PORTA)*8) + 5;
extern volatile __bit RP3 @ (((unsigned) &PORTB)*8) + 0;
extern volatile __bit RP4 @ (((unsigned) &PORTB)*8) + 1;
extern volatile __bit RP5 @ (((unsigned) &PORTB)*8) + 2;
extern volatile __bit RP6 @ (((unsigned) &PORTB)*8) + 3;
extern volatile __bit RP7 @ (((unsigned) &PORTB)*8) + 4;
extern volatile __bit RP8 @ (((unsigned) &PORTB)*8) + 5;
extern volatile __bit RP9 @ (((unsigned) &PORTB)*8) + 6;
extern volatile __bit RSEN1 @ (((unsigned) &SSP1CON2)*8) + 1;
extern volatile __bit RSEN2 @ (((unsigned) &SSP2CON2)*8) + 1;
extern volatile __bit RTCC @ (((unsigned) &PORTB)*8) + 1;
extern volatile __bit RTCCIE @ (((unsigned) &PIE3)*8) + 0;
extern volatile __bit RTCCIF @ (((unsigned) &PIR3)*8) + 0;
extern volatile __bit RTCCIP @ (((unsigned) &IPR3)*8) + 0;
extern volatile __bit RTCCMD @ (((unsigned) &PMDIS1)*8) + 5;
extern volatile __bit RTCEN @ (((unsigned) &RTCCFG)*8) + 7;
extern volatile __bit RTCOE @ (((unsigned) &RTCCFG)*8) + 2;
extern volatile __bit RTCPTR0 @ (((unsigned) &RTCCFG)*8) + 0;
extern volatile __bit RTCPTR1 @ (((unsigned) &RTCCFG)*8) + 1;
extern volatile __bit RTCSYNC @ (((unsigned) &RTCCFG)*8) + 4;
extern volatile __bit RTCWDIS @ (((unsigned) &DSCONH)*8) + 0;
extern volatile __bit RTCWREN @ (((unsigned) &RTCCFG)*8) + 5;
extern volatile __bit RTSECSEL0 @ (((unsigned) &PADCFG1)*8) + 1;
extern volatile __bit RTSECSEL1 @ (((unsigned) &PADCFG1)*8) + 2;
extern volatile __bit RW @ (((unsigned) &SSP1STAT)*8) + 2;
extern volatile __bit RW1 @ (((unsigned) &SSP1STAT)*8) + 2;
extern volatile __bit RW2 @ (((unsigned) &SSP2STAT)*8) + 2;
extern volatile __bit RX1 @ (((unsigned) &PORTC)*8) + 7;
extern volatile __bit RX91 @ (((unsigned) &RCSTA1)*8) + 6;
extern volatile __bit RX92 @ (((unsigned) &RCSTA2)*8) + 6;
extern volatile __bit RX9D1 @ (((unsigned) &RCSTA1)*8) + 0;
extern volatile __bit RX9D2 @ (((unsigned) &RCSTA2)*8) + 0;
extern volatile __bit RXB0IE @ (((unsigned) &PIE3)*8) + 0;
extern volatile __bit RXB1IE @ (((unsigned) &PIE3)*8) + 1;
extern volatile __bit RXBNIE @ (((unsigned) &PIE3)*8) + 1;
extern volatile __bit RXBNIF @ (((unsigned) &PIR3)*8) + 1;
extern volatile __bit RXBNIP @ (((unsigned) &IPR3)*8) + 1;
extern volatile __bit RXCKP @ (((unsigned) &BAUDCON1)*8) + 5;
extern volatile __bit RXDTP1 @ (((unsigned) &BAUDCON1)*8) + 5;
extern volatile __bit RXDTP2 @ (((unsigned) &BAUDCON2)*8) + 5;
extern volatile __bit RXINC @ (((unsigned) &DMACON1)*8) + 4;
extern volatile __bit R_W @ (((unsigned) &SSP1STAT)*8) + 2;
extern volatile __bit R_W2 @ (((unsigned) &SSP2STAT)*8) + 2;
extern volatile __bit R_nW2 @ (((unsigned) &SSP2STAT)*8) + 2;
extern volatile __bit S2 @ (((unsigned) &SSP2STAT)*8) + 3;
extern volatile __bit SCK1 @ (((unsigned) &PORTC)*8) + 3;
extern volatile __bit SCKP @ (((unsigned) &BAUDCON1)*8) + 4;
extern volatile __bit SCKP1 @ (((unsigned) &BAUDCON1)*8) + 4;
extern volatile __bit SCKP2 @ (((unsigned) &BAUDCON2)*8) + 4;
extern volatile __bit SCL1 @ (((unsigned) &PORTC)*8) + 3;
extern volatile __bit SCL2 @ (((unsigned) &PORTB)*8) + 4;
extern volatile __bit SCS0 @ (((unsigned) &OSCCON)*8) + 0;
extern volatile __bit SCS1 @ (((unsigned) &OSCCON)*8) + 1;
extern volatile __bit SDA1 @ (((unsigned) &PORTC)*8) + 4;
extern volatile __bit SDA2 @ (((unsigned) &PORTB)*8) + 5;
extern volatile __bit SDI1 @ (((unsigned) &PORTC)*8) + 4;
extern volatile __bit SDO1 @ (((unsigned) &PORTC)*8) + 5;
extern volatile __bit SEN1 @ (((unsigned) &SSP1CON2)*8) + 0;
extern volatile __bit SEN2 @ (((unsigned) &SSP2CON2)*8) + 0;
extern volatile __bit SENDB1 @ (((unsigned) &TXSTA1)*8) + 3;
extern volatile __bit SENDB2 @ (((unsigned) &TXSTA2)*8) + 3;
extern volatile __bit SMP1 @ (((unsigned) &SSP1STAT)*8) + 7;
extern volatile __bit SMP2 @ (((unsigned) &SSP2STAT)*8) + 7;
extern volatile __bit SOSCDRV @ (((unsigned) &OSCCON2)*8) + 4;
extern volatile __bit SOSCEN @ (((unsigned) &T1CON)*8) + 3;
extern volatile __bit SOSCEN3 @ (((unsigned) &T3CON)*8) + 3;
extern volatile __bit SOSCEN5 @ (((unsigned) &T5CON)*8) + 3;
extern volatile __bit SOSCGO @ (((unsigned) &OSCCON2)*8) + 3;
extern volatile __bit SOSCRUN @ (((unsigned) &OSCCON2)*8) + 6;
extern volatile __bit SP0 @ (((unsigned) &STKPTR)*8) + 0;
extern volatile __bit SP1 @ (((unsigned) &STKPTR)*8) + 1;
extern volatile __bit SP2 @ (((unsigned) &STKPTR)*8) + 2;
extern volatile __bit SP3 @ (((unsigned) &STKPTR)*8) + 3;
extern volatile __bit SP4 @ (((unsigned) &STKPTR)*8) + 4;
extern volatile __bit SPEN1 @ (((unsigned) &RCSTA1)*8) + 7;
extern volatile __bit SPEN2 @ (((unsigned) &RCSTA2)*8) + 7;
extern volatile __bit SPI1MD @ (((unsigned) &PMDIS0)*8) + 1;
extern volatile __bit SPI1OD @ (((unsigned) &ODCON3)*8) + 0;
extern volatile __bit SPI2MD @ (((unsigned) &PMDIS0)*8) + 2;
extern volatile __bit SPI2OD @ (((unsigned) &ODCON3)*8) + 1;
extern volatile __bit SRC0 @ (((unsigned) &ADCTRIG)*8) + 0;
extern volatile __bit SRC1 @ (((unsigned) &ADCTRIG)*8) + 1;
extern volatile __bit SREN1 @ (((unsigned) &RCSTA1)*8) + 5;
extern volatile __bit SREN2 @ (((unsigned) &RCSTA2)*8) + 5;
extern volatile __bit SRENA @ (((unsigned) &RCSTA1)*8) + 5;
extern volatile __bit SSCON0 @ (((unsigned) &DMACON1)*8) + 6;
extern volatile __bit SSCON1 @ (((unsigned) &DMACON1)*8) + 7;
extern volatile __bit SSP1IE @ (((unsigned) &PIE1)*8) + 3;
extern volatile __bit SSP1IF @ (((unsigned) &PIR1)*8) + 3;
extern volatile __bit SSP1IP @ (((unsigned) &IPR1)*8) + 3;
extern volatile __bit SSP2IE @ (((unsigned) &PIE3)*8) + 7;
extern volatile __bit SSP2IF @ (((unsigned) &PIR3)*8) + 7;
extern volatile __bit SSP2IP @ (((unsigned) &IPR3)*8) + 7;
extern volatile __bit SSPEN1 @ (((unsigned) &SSP1CON1)*8) + 5;
extern volatile __bit SSPEN2 @ (((unsigned) &SSP2CON1)*8) + 5;
extern volatile __bit SSPIE @ (((unsigned) &PIE1)*8) + 3;
extern volatile __bit SSPIF @ (((unsigned) &PIR1)*8) + 3;
extern volatile __bit SSPIP @ (((unsigned) &IPR1)*8) + 3;
extern volatile __bit SSPM01 @ (((unsigned) &SSP1CON1)*8) + 0;
extern volatile __bit SSPM02 @ (((unsigned) &SSP2CON1)*8) + 0;
extern volatile __bit SSPM11 @ (((unsigned) &SSP1CON1)*8) + 1;
extern volatile __bit SSPM12 @ (((unsigned) &SSP2CON1)*8) + 1;
extern volatile __bit SSPM21 @ (((unsigned) &SSP1CON1)*8) + 2;
extern volatile __bit SSPM22 @ (((unsigned) &SSP2CON1)*8) + 2;
extern volatile __bit SSPM31 @ (((unsigned) &SSP1CON1)*8) + 3;
extern volatile __bit SSPM32 @ (((unsigned) &SSP2CON1)*8) + 3;
extern volatile __bit SSPOV1 @ (((unsigned) &SSP1CON1)*8) + 6;
extern volatile __bit SSPOV2 @ (((unsigned) &SSP2CON1)*8) + 6;
extern volatile __bit START @ (((unsigned) &SSP1STAT)*8) + 3;
extern volatile __bit START1 @ (((unsigned) &SSP1STAT)*8) + 3;
extern volatile __bit START2 @ (((unsigned) &SSP2STAT)*8) + 3;
extern volatile __bit STKFUL @ (((unsigned) &STKPTR)*8) + 7;
extern volatile __bit STKOVF @ (((unsigned) &STKPTR)*8) + 7;
extern volatile __bit STKUNF @ (((unsigned) &STKPTR)*8) + 6;
extern volatile __bit STOP @ (((unsigned) &SSP1STAT)*8) + 4;
extern volatile __bit STOP1 @ (((unsigned) &SSP1STAT)*8) + 4;
extern volatile __bit STOP2 @ (((unsigned) &SSP2STAT)*8) + 4;
extern volatile __bit STRA2 @ (((unsigned) &PSTR2CON)*8) + 0;
extern volatile __bit STRA3 @ (((unsigned) &PSTR3CON)*8) + 0;
extern volatile __bit STRB2 @ (((unsigned) &PSTR2CON)*8) + 1;
extern volatile __bit STRB3 @ (((unsigned) &PSTR3CON)*8) + 1;
extern volatile __bit STRC2 @ (((unsigned) &PSTR2CON)*8) + 2;
extern volatile __bit STRC3 @ (((unsigned) &PSTR3CON)*8) + 2;
extern volatile __bit STRD2 @ (((unsigned) &PSTR2CON)*8) + 3;
extern volatile __bit STRD3 @ (((unsigned) &PSTR3CON)*8) + 3;
extern volatile __bit STRSYNC2 @ (((unsigned) &PSTR2CON)*8) + 4;
extern volatile __bit STRSYNC3 @ (((unsigned) &PSTR3CON)*8) + 4;
extern volatile __bit SWDTE @ (((unsigned) &WDTCON)*8) + 0;
extern volatile __bit SWDTEN @ (((unsigned) &WDTCON)*8) + 0;
extern volatile __bit SYNC1 @ (((unsigned) &TXSTA1)*8) + 4;
extern volatile __bit SYNC2 @ (((unsigned) &TXSTA2)*8) + 4;
extern volatile __bit T08BIT @ (((unsigned) &T0CON)*8) + 6;
extern volatile __bit T0CS @ (((unsigned) &T0CON)*8) + 5;
extern volatile __bit T0IE @ (((unsigned) &INTCON)*8) + 5;
extern volatile __bit T0IF @ (((unsigned) &INTCON)*8) + 2;
extern volatile __bit T0IP @ (((unsigned) &INTCON2)*8) + 2;
extern volatile __bit T0PS0 @ (((unsigned) &T0CON)*8) + 0;
extern volatile __bit T0PS1 @ (((unsigned) &T0CON)*8) + 1;
extern volatile __bit T0PS2 @ (((unsigned) &T0CON)*8) + 2;
extern volatile __bit T0SE @ (((unsigned) &T0CON)*8) + 4;
extern volatile __bit T1CKI @ (((unsigned) &PORTC)*8) + 0;
extern volatile __bit T1CKPS0 @ (((unsigned) &T1CON)*8) + 4;
extern volatile __bit T1CKPS1 @ (((unsigned) &T1CON)*8) + 5;
extern volatile __bit T1DONE @ (((unsigned) &T1GCON)*8) + 3;
extern volatile __bit T1GGO @ (((unsigned) &T1GCON)*8) + 3;
extern volatile __bit T1GGO_NOT_T1DONE @ (((unsigned) &T1GCON)*8) + 3;
extern volatile __bit T1GGO_nT1DONE @ (((unsigned) &T1GCON)*8) + 3;
extern volatile __bit T1GPOL @ (((unsigned) &T1GCON)*8) + 6;
extern volatile __bit T1GSPM @ (((unsigned) &T1GCON)*8) + 4;
extern volatile __bit T1GSS0 @ (((unsigned) &T1GCON)*8) + 0;
extern volatile __bit T1GSS1 @ (((unsigned) &T1GCON)*8) + 1;
extern volatile __bit T1GTM @ (((unsigned) &T1GCON)*8) + 5;
extern volatile __bit T1GVAL @ (((unsigned) &T1GCON)*8) + 2;
extern volatile __bit T1OSCEN @ (((unsigned) &T1CON)*8) + 3;
extern volatile __bit T1OSI @ (((unsigned) &PORTC)*8) + 1;
extern volatile __bit T1OSO @ (((unsigned) &PORTC)*8) + 0;
extern volatile __bit T1RD16 @ (((unsigned) &T1CON)*8) + 7;
extern volatile __bit T2CKPS0 @ (((unsigned) &T2CON)*8) + 0;
extern volatile __bit T2CKPS1 @ (((unsigned) &T2CON)*8) + 1;
extern volatile __bit T2OUTPS0 @ (((unsigned) &T2CON)*8) + 3;
extern volatile __bit T2OUTPS1 @ (((unsigned) &T2CON)*8) + 4;
extern volatile __bit T2OUTPS2 @ (((unsigned) &T2CON)*8) + 5;
extern volatile __bit T2OUTPS3 @ (((unsigned) &T2CON)*8) + 6;
extern volatile __bit T3CKPS0 @ (((unsigned) &T3CON)*8) + 4;
extern volatile __bit T3CKPS1 @ (((unsigned) &T3CON)*8) + 5;
extern volatile __bit T3DONE @ (((unsigned) &T3GCON)*8) + 3;
extern volatile __bit T3GGO @ (((unsigned) &T3GCON)*8) + 3;
extern volatile __bit T3GGO_T3DONE @ (((unsigned) &T3GCON)*8) + 3;
extern volatile __bit T3GPOL @ (((unsigned) &T3GCON)*8) + 6;
extern volatile __bit T3GSPM @ (((unsigned) &T3GCON)*8) + 4;
extern volatile __bit T3GSS0 @ (((unsigned) &T3GCON)*8) + 0;
extern volatile __bit T3GSS1 @ (((unsigned) &T3GCON)*8) + 1;
extern volatile __bit T3GTM @ (((unsigned) &T3GCON)*8) + 5;
extern volatile __bit T3GVAL @ (((unsigned) &T3GCON)*8) + 2;
extern volatile __bit T3OSCEN @ (((unsigned) &T3CON)*8) + 3;
extern volatile __bit T3RD16 @ (((unsigned) &T3CON)*8) + 7;
extern volatile __bit T4CKPS0 @ (((unsigned) &T4CON)*8) + 0;
extern volatile __bit T4CKPS1 @ (((unsigned) &T4CON)*8) + 1;
extern volatile __bit T4OUTPS0 @ (((unsigned) &T4CON)*8) + 3;
extern volatile __bit T4OUTPS1 @ (((unsigned) &T4CON)*8) + 4;
extern volatile __bit T4OUTPS2 @ (((unsigned) &T4CON)*8) + 5;
extern volatile __bit T4OUTPS3 @ (((unsigned) &T4CON)*8) + 6;
extern volatile __bit T5CKPS0 @ (((unsigned) &T5CON)*8) + 4;
extern volatile __bit T5CKPS1 @ (((unsigned) &T5CON)*8) + 5;
extern volatile __bit T5DONE @ (((unsigned) &T5GCON)*8) + 3;
extern volatile __bit T5GGO @ (((unsigned) &T5GCON)*8) + 3;
extern volatile __bit T5GGO_NOT_T5DONE @ (((unsigned) &T5GCON)*8) + 3;
extern volatile __bit T5GGO_nT5DONE @ (((unsigned) &T5GCON)*8) + 3;
extern volatile __bit T5GPOL @ (((unsigned) &T5GCON)*8) + 6;
extern volatile __bit T5GSPM @ (((unsigned) &T5GCON)*8) + 4;
extern volatile __bit T5GSS0 @ (((unsigned) &T5GCON)*8) + 0;
extern volatile __bit T5GSS1 @ (((unsigned) &T5GCON)*8) + 1;
extern volatile __bit T5GTM @ (((unsigned) &T5GCON)*8) + 5;
extern volatile __bit T5GVAL @ (((unsigned) &T5GCON)*8) + 2;
extern volatile __bit T5OSCEN @ (((unsigned) &T5CON)*8) + 3;
extern volatile __bit T6CKPS0 @ (((unsigned) &T6CON)*8) + 0;
extern volatile __bit T6CKPS1 @ (((unsigned) &T6CON)*8) + 1;
extern volatile __bit T6OUTPS0 @ (((unsigned) &T6CON)*8) + 3;
extern volatile __bit T6OUTPS1 @ (((unsigned) &T6CON)*8) + 4;
extern volatile __bit T6OUTPS2 @ (((unsigned) &T6CON)*8) + 5;
extern volatile __bit T6OUTPS3 @ (((unsigned) &T6CON)*8) + 6;
extern volatile __bit T8CKPS0 @ (((unsigned) &T8CON)*8) + 0;
extern volatile __bit T8CKPS1 @ (((unsigned) &T8CON)*8) + 1;
extern volatile __bit T8OUTPS0 @ (((unsigned) &T8CON)*8) + 3;
extern volatile __bit T8OUTPS1 @ (((unsigned) &T8CON)*8) + 4;
extern volatile __bit T8OUTPS2 @ (((unsigned) &T8CON)*8) + 5;
extern volatile __bit T8OUTPS3 @ (((unsigned) &T8CON)*8) + 6;
extern volatile __bit TGEN @ (((unsigned) &CTMUCONH)*8) + 4;
extern volatile __bit TMR0IE @ (((unsigned) &INTCON)*8) + 5;
extern volatile __bit TMR0IF @ (((unsigned) &INTCON)*8) + 2;
extern volatile __bit TMR0IP @ (((unsigned) &INTCON2)*8) + 2;
extern volatile __bit TMR0ON @ (((unsigned) &T0CON)*8) + 7;
extern volatile __bit TMR1CS0 @ (((unsigned) &T1CON)*8) + 6;
extern volatile __bit TMR1CS1 @ (((unsigned) &T1CON)*8) + 7;
extern volatile __bit TMR1GE @ (((unsigned) &T1GCON)*8) + 7;
extern volatile __bit TMR1GIE @ (((unsigned) &PIE5)*8) + 0;
extern volatile __bit TMR1GIF @ (((unsigned) &PIR5)*8) + 0;
extern volatile __bit TMR1GIP @ (((unsigned) &IPR5)*8) + 0;
extern volatile __bit TMR1IE @ (((unsigned) &PIE1)*8) + 0;
extern volatile __bit TMR1IF @ (((unsigned) &PIR1)*8) + 0;
extern volatile __bit TMR1IP @ (((unsigned) &IPR1)*8) + 0;
extern volatile __bit TMR1MD @ (((unsigned) &PMDIS1)*8) + 1;
extern volatile __bit TMR1ON @ (((unsigned) &T1CON)*8) + 0;
extern volatile __bit TMR2IE @ (((unsigned) &PIE1)*8) + 1;
extern volatile __bit TMR2IF @ (((unsigned) &PIR1)*8) + 1;
extern volatile __bit TMR2IP @ (((unsigned) &IPR1)*8) + 1;
extern volatile __bit TMR2MD @ (((unsigned) &PMDIS1)*8) + 2;
extern volatile __bit TMR2ON @ (((unsigned) &T2CON)*8) + 2;
extern volatile __bit TMR3CS0 @ (((unsigned) &T3CON)*8) + 6;
extern volatile __bit TMR3CS1 @ (((unsigned) &T3CON)*8) + 7;
extern volatile __bit TMR3GE @ (((unsigned) &T3GCON)*8) + 7;
extern volatile __bit TMR3GIE @ (((unsigned) &PIE3)*8) + 1;
extern volatile __bit TMR3GIF @ (((unsigned) &PIR3)*8) + 1;
extern volatile __bit TMR3GIP @ (((unsigned) &IPR3)*8) + 1;
extern volatile __bit TMR3IE @ (((unsigned) &PIE2)*8) + 1;
extern volatile __bit TMR3IF @ (((unsigned) &PIR2)*8) + 1;
extern volatile __bit TMR3IP @ (((unsigned) &IPR2)*8) + 1;
extern volatile __bit TMR3MD @ (((unsigned) &PMDIS1)*8) + 3;
extern volatile __bit TMR3ON @ (((unsigned) &T3CON)*8) + 0;
extern volatile __bit TMR4IE @ (((unsigned) &PIE3)*8) + 3;
extern volatile __bit TMR4IF @ (((unsigned) &PIR3)*8) + 3;
extern volatile __bit TMR4IP @ (((unsigned) &IPR3)*8) + 3;
extern volatile __bit TMR4MD @ (((unsigned) &PMDIS1)*8) + 4;
extern volatile __bit TMR4ON @ (((unsigned) &T4CON)*8) + 2;
extern volatile __bit TMR5CS0 @ (((unsigned) &T5CON)*8) + 6;
extern volatile __bit TMR5CS1 @ (((unsigned) &T5CON)*8) + 7;
extern volatile __bit TMR5GE @ (((unsigned) &T5GCON)*8) + 7;
extern volatile __bit TMR5GIE @ (((unsigned) &PIE5)*8) + 1;
extern volatile __bit TMR5GIF @ (((unsigned) &PIR5)*8) + 1;
extern volatile __bit TMR5GIP @ (((unsigned) &IPR5)*8) + 1;
extern volatile __bit TMR5IE @ (((unsigned) &PIE5)*8) + 2;
extern volatile __bit TMR5IF @ (((unsigned) &PIR5)*8) + 2;
extern volatile __bit TMR5IP @ (((unsigned) &IPR5)*8) + 2;
extern volatile __bit TMR5MD @ (((unsigned) &PMDIS2)*8) + 3;
extern volatile __bit TMR5ON @ (((unsigned) &T5CON)*8) + 0;
extern volatile __bit TMR6IE @ (((unsigned) &PIE5)*8) + 3;
extern volatile __bit TMR6IF @ (((unsigned) &PIR5)*8) + 3;
extern volatile __bit TMR6IP @ (((unsigned) &IPR5)*8) + 3;
extern volatile __bit TMR6MD @ (((unsigned) &PMDIS2)*8) + 4;
extern volatile __bit TMR6ON @ (((unsigned) &T6CON)*8) + 2;
extern volatile __bit TMR8IE @ (((unsigned) &PIE5)*8) + 4;
extern volatile __bit TMR8IF @ (((unsigned) &PIR5)*8) + 4;
extern volatile __bit TMR8IP @ (((unsigned) &IPR5)*8) + 4;
extern volatile __bit TMR8MD @ (((unsigned) &PMDIS2)*8) + 6;
extern volatile __bit TMR8ON @ (((unsigned) &T8CON)*8) + 2;
extern volatile __bit TO @ (((unsigned) &RCON)*8) + 3;
extern volatile __bit TRIGSEL0 @ (((unsigned) &ADCTRIG)*8) + 0;
extern volatile __bit TRIGSEL1 @ (((unsigned) &ADCTRIG)*8) + 1;
extern volatile __bit TRISA0 @ (((unsigned) &TRISA)*8) + 0;
extern volatile __bit TRISA1 @ (((unsigned) &TRISA)*8) + 1;
extern volatile __bit TRISA2 @ (((unsigned) &TRISA)*8) + 2;
extern volatile __bit TRISA3 @ (((unsigned) &TRISA)*8) + 3;
extern volatile __bit TRISA5 @ (((unsigned) &TRISA)*8) + 5;
extern volatile __bit TRISA6 @ (((unsigned) &TRISA)*8) + 6;
extern volatile __bit TRISA7 @ (((unsigned) &TRISA)*8) + 7;
extern volatile __bit TRISB0 @ (((unsigned) &TRISB)*8) + 0;
extern volatile __bit TRISB1 @ (((unsigned) &TRISB)*8) + 1;
extern volatile __bit TRISB2 @ (((unsigned) &TRISB)*8) + 2;
extern volatile __bit TRISB3 @ (((unsigned) &TRISB)*8) + 3;
extern volatile __bit TRISB4 @ (((unsigned) &TRISB)*8) + 4;
extern volatile __bit TRISB5 @ (((unsigned) &TRISB)*8) + 5;
extern volatile __bit TRISB6 @ (((unsigned) &TRISB)*8) + 6;
extern volatile __bit TRISB7 @ (((unsigned) &TRISB)*8) + 7;
extern volatile __bit TRISC0 @ (((unsigned) &TRISC)*8) + 0;
extern volatile __bit TRISC1 @ (((unsigned) &TRISC)*8) + 1;
extern volatile __bit TRISC2 @ (((unsigned) &TRISC)*8) + 2;
extern volatile __bit TRISC3 @ (((unsigned) &TRISC)*8) + 3;
extern volatile __bit TRISC4 @ (((unsigned) &TRISC)*8) + 4;
extern volatile __bit TRISC5 @ (((unsigned) &TRISC)*8) + 5;
extern volatile __bit TRISC6 @ (((unsigned) &TRISC)*8) + 6;
extern volatile __bit TRISC7 @ (((unsigned) &TRISC)*8) + 7;
extern volatile __bit TRMT1 @ (((unsigned) &TXSTA1)*8) + 1;
extern volatile __bit TRMT2 @ (((unsigned) &TXSTA2)*8) + 1;
extern volatile __bit TUN0 @ (((unsigned) &OSCTUNE)*8) + 0;
extern volatile __bit TUN1 @ (((unsigned) &OSCTUNE)*8) + 1;
extern volatile __bit TUN2 @ (((unsigned) &OSCTUNE)*8) + 2;
extern volatile __bit TUN3 @ (((unsigned) &OSCTUNE)*8) + 3;
extern volatile __bit TUN4 @ (((unsigned) &OSCTUNE)*8) + 4;
extern volatile __bit TUN5 @ (((unsigned) &OSCTUNE)*8) + 5;
extern volatile __bit TX1 @ (((unsigned) &PORTC)*8) + 6;
extern volatile __bit TX1IE @ (((unsigned) &PIE1)*8) + 4;
extern volatile __bit TX1IF @ (((unsigned) &PIR1)*8) + 4;
extern volatile __bit TX1IP @ (((unsigned) &IPR1)*8) + 4;
extern volatile __bit TX2IE @ (((unsigned) &PIE3)*8) + 4;
extern volatile __bit TX2IF @ (((unsigned) &PIR3)*8) + 4;
extern volatile __bit TX2IP @ (((unsigned) &IPR3)*8) + 4;
extern volatile __bit TX8_9 @ (((unsigned) &TXSTA1)*8) + 6;
extern volatile __bit TX8_92 @ (((unsigned) &TXSTA2)*8) + 6;
extern volatile __bit TX91 @ (((unsigned) &TXSTA1)*8) + 6;
extern volatile __bit TX92 @ (((unsigned) &TXSTA2)*8) + 6;
extern volatile __bit TX9D1 @ (((unsigned) &TXSTA1)*8) + 0;
extern volatile __bit TX9D2 @ (((unsigned) &TXSTA2)*8) + 0;
extern volatile __bit TXB0IE @ (((unsigned) &PIE3)*8) + 2;
extern volatile __bit TXB1IE @ (((unsigned) &PIE3)*8) + 3;
extern volatile __bit TXB2IE @ (((unsigned) &PIE3)*8) + 4;
extern volatile __bit TXBNIE @ (((unsigned) &PIE3)*8) + 4;
extern volatile __bit TXBNIF @ (((unsigned) &PIR3)*8) + 4;
extern volatile __bit TXBNIP @ (((unsigned) &IPR3)*8) + 4;
extern volatile __bit TXCKP1 @ (((unsigned) &BAUDCON1)*8) + 4;
extern volatile __bit TXCKP2 @ (((unsigned) &BAUDCON2)*8) + 4;
extern volatile __bit TXD8 @ (((unsigned) &TXSTA1)*8) + 0;
extern volatile __bit TXD82 @ (((unsigned) &TXSTA2)*8) + 0;
extern volatile __bit TXEN1 @ (((unsigned) &TXSTA1)*8) + 5;
extern volatile __bit TXEN2 @ (((unsigned) &TXSTA2)*8) + 5;
extern volatile __bit TXIE @ (((unsigned) &PIE1)*8) + 4;
extern volatile __bit TXIF @ (((unsigned) &PIR1)*8) + 4;
extern volatile __bit TXINC @ (((unsigned) &DMACON1)*8) + 5;
extern volatile __bit TXIP @ (((unsigned) &IPR1)*8) + 4;
extern volatile __bit U1OD @ (((unsigned) &ODCON2)*8) + 0;
extern volatile __bit U2OD @ (((unsigned) &ODCON2)*8) + 1;
extern volatile __bit UA1 @ (((unsigned) &SSP1STAT)*8) + 1;
extern volatile __bit UA2 @ (((unsigned) &SSP2STAT)*8) + 1;
extern volatile __bit UART1MD @ (((unsigned) &PMDIS0)*8) + 3;
extern volatile __bit UART2MD @ (((unsigned) &PMDIS0)*8) + 4;
extern volatile __bit ULPEN @ (((unsigned) &WDTCON)*8) + 2;
extern volatile __bit ULPLVL @ (((unsigned) &WDTCON)*8) + 5;
extern volatile __bit ULPSINK @ (((unsigned) &WDTCON)*8) + 1;
extern volatile __bit ULPWDIS @ (((unsigned) &DSCONL)*8) + 2;
extern volatile __bit ULPWU @ (((unsigned) &PORTA)*8) + 0;
extern volatile __bit ULPWUIN @ (((unsigned) &PORTA)*8) + 0;
extern volatile __bit VBG @ (((unsigned) &PORTA)*8) + 1;
extern volatile __bit VBGEN @ (((unsigned) &ANCON1)*8) + 7;
extern volatile __bit VBGOE @ (((unsigned) &WDTCON)*8) + 4;
extern volatile __bit VCFG0 @ (((unsigned) &ADCON0)*8) + 6;
extern volatile __bit VCFG01 @ (((unsigned) &ADCON1)*8) + 4;
extern volatile __bit VCFG1 @ (((unsigned) &ADCON0)*8) + 7;
extern volatile __bit VCFG11 @ (((unsigned) &ADCON1)*8) + 5;
extern volatile __bit VDIRMAG @ (((unsigned) &HLVDCON)*8) + 7;
extern volatile __bit VREF_MINUS @ (((unsigned) &PORTA)*8) + 2;
extern volatile __bit VREF_PLUS @ (((unsigned) &PORTA)*8) + 3;
extern volatile __bit W4E @ (((unsigned) &BAUDCON1)*8) + 1;
extern volatile __bit WAITB0 @ (((unsigned) &RTCVALH)*8) + 6;
extern volatile __bit WAITB1 @ (((unsigned) &RTCVALH)*8) + 7;
extern volatile __bit WAITE0 @ (((unsigned) &RTCVALH)*8) + 0;
extern volatile __bit WAITE1 @ (((unsigned) &RTCVALH)*8) + 1;
extern volatile __bit WAITM0 @ (((unsigned) &RTCVALH)*8) + 2;
extern volatile __bit WAITM1 @ (((unsigned) &RTCVALH)*8) + 3;
extern volatile __bit WAITM2 @ (((unsigned) &RTCVALH)*8) + 4;
extern volatile __bit WAITM3 @ (((unsigned) &RTCVALH)*8) + 5;
extern volatile __bit WCOL1 @ (((unsigned) &SSP1CON1)*8) + 7;
extern volatile __bit WCOL2 @ (((unsigned) &SSP2CON1)*8) + 7;
extern volatile __bit WPROG @ (((unsigned) &EECON1)*8) + 5;
extern volatile __bit WR @ (((unsigned) &EECON1)*8) + 1;
extern volatile __bit WREN @ (((unsigned) &EECON1)*8) + 2;
extern volatile __bit WRERR @ (((unsigned) &EECON1)*8) + 3;
extern volatile __bit WUE1 @ (((unsigned) &BAUDCON1)*8) + 1;
extern volatile __bit WUE2 @ (((unsigned) &BAUDCON2)*8) + 1;
extern volatile __bit ZERO @ (((unsigned) &STATUS)*8) + 2;
extern volatile __bit nA @ (((unsigned) &SSP1STAT)*8) + 5;
extern volatile __bit nA2 @ (((unsigned) &SSP2STAT)*8) + 5;
extern volatile __bit nADDRESS @ (((unsigned) &SSP1STAT)*8) + 5;
extern volatile __bit nADDRESS2 @ (((unsigned) &SSP2STAT)*8) + 5;
extern volatile __bit nBOR @ (((unsigned) &RCON)*8) + 0;
extern volatile __bit nCM @ (((unsigned) &RCON)*8) + 5;
extern volatile __bit nDONE @ (((unsigned) &ADCON0)*8) + 1;
extern volatile __bit nPD @ (((unsigned) &RCON)*8) + 2;
extern volatile __bit nPOR @ (((unsigned) &RCON)*8) + 1;
extern volatile __bit nRBPU @ (((unsigned) &INTCON2)*8) + 7;
extern volatile __bit nRC8 @ (((unsigned) &RCSTA1)*8) + 6;
extern volatile __bit nRI @ (((unsigned) &RCON)*8) + 4;
extern volatile __bit nSS1 @ (((unsigned) &PORTA)*8) + 5;
extern volatile __bit nT1DONE @ (((unsigned) &T1GCON)*8) + 3;
extern volatile __bit nT1SYNC @ (((unsigned) &T1CON)*8) + 2;
extern volatile __bit nT3SYNC @ (((unsigned) &T3CON)*8) + 2;
extern volatile __bit nT5DONE @ (((unsigned) &T5GCON)*8) + 3;
extern volatile __bit nT5SYNC @ (((unsigned) &T5CON)*8) + 2;
extern volatile __bit nTO @ (((unsigned) &RCON)*8) + 3;
extern volatile __bit nTX8 @ (((unsigned) &TXSTA1)*8) + 6;
extern volatile __bit nW @ (((unsigned) &SSP1STAT)*8) + 2;
extern volatile __bit nW2 @ (((unsigned) &SSP2STAT)*8) + 2;
extern volatile __bit nWRITE @ (((unsigned) &SSP1STAT)*8) + 2;
extern volatile __bit nWRITE2 @ (((unsigned) &SSP2STAT)*8) + 2;
# 2008 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\plib\adc.h"
union ADCResult
{
int lr;
char br[2];
};
char BusyADC (void);
void ConvertADC (void);
void CloseADC(void);
# 2026
int ReadADC(void);
# 2052
void OpenADC ( unsigned char ,
unsigned char ,
unsigned char ,
unsigned int );
# 2084
void SetChanADC(unsigned char );
# 2100
void SelChanConvADC( unsigned char );
# 202 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\plib\ancomp.h"
void Close_ancomp1( void );
void Open_ancomp1(unsigned char config);
void Close_ancomp2( void );
void Open_ancomp2(unsigned char config);
void Close_ancomp3( void );
void Open_ancomp3(unsigned char config);
# 236 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\plib\spi.h"
void OpenSPI1( unsigned char sync_mode,
unsigned char bus_mode,
unsigned char smp_phase );
signed char WriteSPI1( unsigned char data_out );
void getsSPI1( unsigned char *rdptr, unsigned char length );
void putsSPI1( unsigned char *wrptr );
unsigned char ReadSPI1( void );
# 441
void OpenSPI2( unsigned char sync_mode,
unsigned char bus_mode,
unsigned char smp_phase );
signed char WriteSPI2( unsigned char data_out );
void getsSPI2( unsigned char *rdptr, unsigned char length );
void putsSPI2( unsigned char *wrptr );
unsigned char ReadSPI2( void );
# 414 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\plib\can2510.h"
void CAN2510Initialize( unsigned int configuration,
unsigned char brp,
unsigned char interruptFlags,
unsigned char SPI_syncMode,
unsigned char SPI_busMode,
unsigned char SPI_smpPhase );
signed char CAN2510Init( unsigned long BufferConfig,
unsigned long BitTimeConfig,
unsigned char interruptEnables,
unsigned char SPI_syncMode,
unsigned char SPI_busMode,
unsigned char SPI_smpPhase );
void CAN2510Enable( void );
void CAN2510Disable( void );
void CAN2510Reset( void );
void CAN2510SetMode( unsigned char mode );
unsigned char CAN2510ReadMode( void );
unsigned char CAN2510ReadStatus( void );
unsigned char CAN2510ErrorState( void );
unsigned char CAN2510InterruptStatus( void );
void CAN2510InterruptEnable( unsigned char interruptFlags );
unsigned char CAN2510ByteRead( unsigned char addr );
void CAN2510ByteWrite( unsigned char addr, unsigned char value );
void CAN2510SequentialRead( unsigned char *DataArray,
unsigned char CAN2510addr,
unsigned char numbytes );
void CAN2510SequentialWrite( unsigned char *DataArray,
unsigned char CAN2510addr,
unsigned char numbytes );
void CAN2510BitModify( unsigned char address,
unsigned char mask,
unsigned char data );
void CAN2510SetSingleMaskStd( unsigned char maskNum, unsigned int mask );
void CAN2510SetSingleMaskXtd( unsigned char maskNum, unsigned long mask );
void CAN2510SetSingleFilterStd( unsigned char filterNum, unsigned int filter );
void CAN2510SetSingleFilterXtd( unsigned char filterNum, unsigned long filter );
signed char CAN2510SetMsgFilterStd( unsigned char bufferNum,
unsigned int mask,
unsigned int *filters );
signed char CAN2510SetMsgFilterXtd( unsigned char bufferNum,
unsigned long mask,
unsigned long *filters );
signed char CAN2510WriteStd( unsigned int msgId,
unsigned char msgPriority,
unsigned char numBytes,
unsigned char *data );
signed char CAN2510WriteXtd( unsigned long msgId,
unsigned char msgPriority,
unsigned char numBytes,
unsigned char *data );
void CAN2510LoadBufferStd( unsigned char bufferNum,
unsigned int msgId,
unsigned char numBytes,
unsigned char *data );
void CAN2510LoadBufferXtd( unsigned char bufferNum,
unsigned long msgId,
unsigned char numBytes,
unsigned char *data );
void CAN2510LoadRTRStd( unsigned char bufferNum,
unsigned int msgId,
unsigned char numBytes );
void CAN2510LoadRTRXtd( unsigned char bufferNum,
unsigned long msgId,
unsigned char numBytes );
void CAN2510SetBufferPriority( unsigned char bufferNum,
unsigned char bufferPriority );
void CAN2510SendBuffer( unsigned char bufferNumber );
signed char CAN2510WriteBuffer( unsigned char bufferNum );
unsigned char CAN2510DataReady( unsigned char bufferNum );
unsigned char CAN2510DataRead( unsigned char bufferNum,
unsigned long *msgId,
unsigned char *numBytes,
unsigned char *data );
# 64 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\plib\capture.h"
union capstatus
{
# 73
struct
{
# 91
unsigned Cap4OVF:1;
unsigned Cap5OVF:1;
unsigned Cap6OVF:1;
unsigned Cap7OVF:1;
unsigned Cap8OVF:1;
# 107
unsigned ECap1OVF:1;
unsigned ECap2OVF:1;
unsigned ECap3OVF:1;
};
unsigned :8;
};
extern union capstatus CapStatus;
union CapResult
{
unsigned int lc;
char bc[2];
};
# 507
void OpenCapture4 ( unsigned char config);
unsigned int ReadCapture4 (void);
void CloseCapture4 (void);
void OpenCapture5 ( unsigned char config);
unsigned int ReadCapture5 (void);
void CloseCapture5 (void);
# 520
void OpenCapture6 ( unsigned char config);
unsigned int ReadCapture6 (void);
void CloseCapture6 (void);
void OpenCapture7 ( unsigned char config);
unsigned int ReadCapture7 (void);
void CloseCapture7 (void);
void OpenCapture8 ( unsigned char config);
unsigned int ReadCapture8 (void);
void CloseCapture8 (void);
# 568
void OpenECapture1 ( unsigned char config);
unsigned int ReadECapture1 (void);
void CloseECapture1 (void);
void OpenECapture2 ( unsigned char config);
unsigned int ReadECapture2 (void);
void CloseECapture2 (void);
void OpenECapture3 ( unsigned char config);
unsigned int ReadECapture3 (void);
void CloseECapture3 (void);
# 403 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\plib\compare.h"
void OpenCompare4(unsigned char config,unsigned int period);
void CloseCompare4(void);
void OpenCompare5(unsigned char config,unsigned int period);
void CloseCompare5(void);
void OpenCompare6(unsigned char config,unsigned int period);
void CloseCompare6(void);
void OpenCompare7(unsigned char config,unsigned int period);
void CloseCompare7(void);
void OpenCompare8(unsigned char config,unsigned int period);
void CloseCompare8(void);
# 433
void OpenECompare1(unsigned char config,unsigned int period);
void CloseECompare1(void);
# 439
void OpenECompare2(unsigned char config,unsigned int period);
void CloseECompare2(void);
void OpenECompare3(unsigned char config,unsigned int period);
void CloseECompare3(void);
# 374 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\plib\ctmu.h"
void OpenCTMU(unsigned char config1,unsigned char config2,unsigned char config3);
# 379
void CurrentControlCTMU(unsigned char config);
void CloseCTMU(void);
# 49 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\plib\dpslp.h"
typedef union
{
struct
{
unsigned char DS_POR:1;
unsigned char DS_MCLR:1;
unsigned char DS_RTC:1;
unsigned char DS_WDT:1;
unsigned char DS_FLT:1;
unsigned char DS_INT0:1;
unsigned char DS_BOR:1;
unsigned char DS_ULP:1;
}WK_SRC;
unsigned char WKSRC;
}SRC;
typedef struct
{
unsigned char Reg0;
unsigned char Reg1;
}CONTEXT;
# 164
extern void DeepSleepWakeUpSource(SRC* ptr);
extern void GotoDeepSleep( unsigned int config);
extern signed char IsResetFromDeepSleep( void );
extern void ReadDSGPR( CONTEXT* ptr );
extern void ULPWakeUpEnable( void );
# 2 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\stddef.h"
typedef int ptrdiff_t;
typedef unsigned size_t;
typedef unsigned short wchar_t;
# 13
extern int errno;
# 65 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\GenericTypeDefs.h"
typedef enum _BOOL { FALSE = 0, TRUE } BOOL;
typedef enum _BIT { CLEAR = 0, SET } BIT;
# 75
typedef signed int INT;
typedef signed char INT8;
typedef signed short int INT16;
typedef signed long int INT32;
typedef signed long long INT64;
typedef unsigned int UINT;
typedef unsigned char UINT8;
typedef unsigned short int UINT16;
# 93
typedef unsigned long int UINT32;
typedef unsigned long long UINT64;
typedef union
{
UINT8 Val;
struct
{
UINT8 b0:1;
UINT8 b1:1;
UINT8 b2:1;
UINT8 b3:1;
UINT8 b4:1;
UINT8 b5:1;
UINT8 b6:1;
UINT8 b7:1;
} bits;
} UINT8_VAL, UINT8_BITS;
typedef union
{
UINT16 Val;
UINT8 v[2] ;
struct
{
UINT8 LB;
UINT8 HB;
} byte;
struct
{
UINT8 b0:1;
UINT8 b1:1;
UINT8 b2:1;
UINT8 b3:1;
UINT8 b4:1;
UINT8 b5:1;
UINT8 b6:1;
UINT8 b7:1;
UINT8 b8:1;
UINT8 b9:1;
UINT8 b10:1;
UINT8 b11:1;
UINT8 b12:1;
UINT8 b13:1;
UINT8 b14:1;
UINT8 b15:1;
} bits;
} UINT16_VAL, UINT16_BITS;
# 187
typedef union
{
UINT32 Val;
UINT16 w[2] ;
UINT8 v[4] ;
struct
{
UINT16 LW;
UINT16 HW;
} word;
struct
{
UINT8 LB;
UINT8 HB;
UINT8 UB;
UINT8 MB;
} byte;
struct
{
UINT16_VAL low;
UINT16_VAL high;
}wordUnion;
struct
{
UINT8 b0:1;
UINT8 b1:1;
UINT8 b2:1;
UINT8 b3:1;
UINT8 b4:1;
UINT8 b5:1;
UINT8 b6:1;
UINT8 b7:1;
UINT8 b8:1;
UINT8 b9:1;
UINT8 b10:1;
UINT8 b11:1;
UINT8 b12:1;
UINT8 b13:1;
UINT8 b14:1;
UINT8 b15:1;
UINT8 b16:1;
UINT8 b17:1;
UINT8 b18:1;
UINT8 b19:1;
UINT8 b20:1;
UINT8 b21:1;
UINT8 b22:1;
UINT8 b23:1;
UINT8 b24:1;
UINT8 b25:1;
UINT8 b26:1;
UINT8 b27:1;
UINT8 b28:1;
UINT8 b29:1;
UINT8 b30:1;
UINT8 b31:1;
} bits;
} UINT32_VAL;
typedef union
{
UINT64 Val;
UINT32 d[2] ;
UINT16 w[4] ;
UINT8 v[8] ;
struct
{
UINT32 LD;
UINT32 HD;
} dword;
struct
{
UINT16 LW;
UINT16 HW;
UINT16 UW;
UINT16 MW;
} word;
struct
{
UINT8 b0:1;
UINT8 b1:1;
UINT8 b2:1;
UINT8 b3:1;
UINT8 b4:1;
UINT8 b5:1;
UINT8 b6:1;
UINT8 b7:1;
UINT8 b8:1;
UINT8 b9:1;
UINT8 b10:1;
UINT8 b11:1;
UINT8 b12:1;
UINT8 b13:1;
UINT8 b14:1;
UINT8 b15:1;
UINT8 b16:1;
UINT8 b17:1;
UINT8 b18:1;
UINT8 b19:1;
UINT8 b20:1;
UINT8 b21:1;
UINT8 b22:1;
UINT8 b23:1;
UINT8 b24:1;
UINT8 b25:1;
UINT8 b26:1;
UINT8 b27:1;
UINT8 b28:1;
UINT8 b29:1;
UINT8 b30:1;
UINT8 b31:1;
UINT8 b32:1;
UINT8 b33:1;
UINT8 b34:1;
UINT8 b35:1;
UINT8 b36:1;
UINT8 b37:1;
UINT8 b38:1;
UINT8 b39:1;
UINT8 b40:1;
UINT8 b41:1;
UINT8 b42:1;
UINT8 b43:1;
UINT8 b44:1;
UINT8 b45:1;
UINT8 b46:1;
UINT8 b47:1;
UINT8 b48:1;
UINT8 b49:1;
UINT8 b50:1;
UINT8 b51:1;
UINT8 b52:1;
UINT8 b53:1;
UINT8 b54:1;
UINT8 b55:1;
UINT8 b56:1;
UINT8 b57:1;
UINT8 b58:1;
UINT8 b59:1;
UINT8 b60:1;
UINT8 b61:1;
UINT8 b62:1;
UINT8 b63:1;
} bits;
} UINT64_VAL;
# 339
typedef void VOID;
typedef char CHAR8;
typedef unsigned char UCHAR8;
typedef unsigned char BYTE;
typedef unsigned short int WORD;
typedef unsigned long DWORD;
typedef unsigned long long QWORD;
typedef signed char CHAR;
typedef signed short int SHORT;
typedef signed long LONG;
typedef signed long long LONGLONG;
typedef union
{
BYTE Val;
struct
{
BYTE b0:1;
BYTE b1:1;
BYTE b2:1;
BYTE b3:1;
BYTE b4:1;
BYTE b5:1;
BYTE b6:1;
BYTE b7:1;
} bits;
} BYTE_VAL, BYTE_BITS;
typedef union
{
WORD Val;
BYTE v[2] ;
struct
{
BYTE LB;
BYTE HB;
} byte;
struct
{
BYTE b0:1;
BYTE b1:1;
BYTE b2:1;
BYTE b3:1;
BYTE b4:1;
BYTE b5:1;
BYTE b6:1;
BYTE b7:1;
BYTE b8:1;
BYTE b9:1;
BYTE b10:1;
BYTE b11:1;
BYTE b12:1;
BYTE b13:1;
BYTE b14:1;
BYTE b15:1;
} bits;
} WORD_VAL, WORD_BITS;
typedef union
{
DWORD Val;
WORD w[2] ;
BYTE v[4] ;
struct
{
WORD LW;
WORD HW;
} word;
struct
{
BYTE LB;
BYTE HB;
BYTE UB;
BYTE MB;
} byte;
struct
{
WORD_VAL low;
WORD_VAL high;
}wordUnion;
struct
{
BYTE b0:1;
BYTE b1:1;
BYTE b2:1;
BYTE b3:1;
BYTE b4:1;
BYTE b5:1;
BYTE b6:1;
BYTE b7:1;
BYTE b8:1;
BYTE b9:1;
BYTE b10:1;
BYTE b11:1;
BYTE b12:1;
BYTE b13:1;
BYTE b14:1;
BYTE b15:1;
BYTE b16:1;
BYTE b17:1;
BYTE b18:1;
BYTE b19:1;
BYTE b20:1;
BYTE b21:1;
BYTE b22:1;
BYTE b23:1;
BYTE b24:1;
BYTE b25:1;
BYTE b26:1;
BYTE b27:1;
BYTE b28:1;
BYTE b29:1;
BYTE b30:1;
BYTE b31:1;
} bits;
} DWORD_VAL;
typedef union
{
QWORD Val;
DWORD d[2] ;
WORD w[4] ;
BYTE v[8] ;
struct
{
DWORD LD;
DWORD HD;
} dword;
struct
{
WORD LW;
WORD HW;
WORD UW;
WORD MW;
} word;
struct
{
BYTE b0:1;
BYTE b1:1;
BYTE b2:1;
BYTE b3:1;
BYTE b4:1;
BYTE b5:1;
BYTE b6:1;
BYTE b7:1;
BYTE b8:1;
BYTE b9:1;
BYTE b10:1;
BYTE b11:1;
BYTE b12:1;
BYTE b13:1;
BYTE b14:1;
BYTE b15:1;
BYTE b16:1;
BYTE b17:1;
BYTE b18:1;
BYTE b19:1;
BYTE b20:1;
BYTE b21:1;
BYTE b22:1;
BYTE b23:1;
BYTE b24:1;
BYTE b25:1;
BYTE b26:1;
BYTE b27:1;
BYTE b28:1;
BYTE b29:1;
BYTE b30:1;
BYTE b31:1;
BYTE b32:1;
BYTE b33:1;
BYTE b34:1;
BYTE b35:1;
BYTE b36:1;
BYTE b37:1;
BYTE b38:1;
BYTE b39:1;
BYTE b40:1;
BYTE b41:1;
BYTE b42:1;
BYTE b43:1;
BYTE b44:1;
BYTE b45:1;
BYTE b46:1;
BYTE b47:1;
BYTE b48:1;
BYTE b49:1;
BYTE b50:1;
BYTE b51:1;
BYTE b52:1;
BYTE b53:1;
BYTE b54:1;
BYTE b55:1;
BYTE b56:1;
BYTE b57:1;
BYTE b58:1;
BYTE b59:1;
BYTE b60:1;
BYTE b61:1;
BYTE b62:1;
BYTE b63:1;
} bits;
} QWORD_VAL;
# 113 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\plib\flash.h"
extern void ReadFlash(unsigned long startaddr, unsigned int num_bytes, unsigned char *flash_array);
# 120
extern void EraseFlash(unsigned long startaddr, unsigned long endaddr);
extern void WriteBlockFlash(unsigned long startaddr, unsigned char num_blocks, unsigned char *flash_array);
extern void WriteBytesFlash(unsigned long startaddr, unsigned int num_bytes, unsigned char *flash_array);
extern void WriteWordFlash(unsigned long startaddr, unsigned int data);
# 244 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\plib\i2c.h"
void OpenI2C1( unsigned char sync_mode, unsigned char slew );
# 264
unsigned char ReadI2C1( void );
# 279
signed char WriteI2C1( unsigned char data_out );
# 294
signed char getsI2C1( unsigned char *rdptr, unsigned char length );
signed char putsI2C1( unsigned char *wrptr );
# 305
signed char EEAckPolling1( unsigned char control );
signed char EEByteWrite1( unsigned char control,
unsigned char address,
unsigned char data );
signed int EECurrentAddRead1( unsigned char control );
signed char EEPageWrite1( unsigned char control,
unsigned char address,
unsigned char *wrptr );
signed int EERandomRead1( unsigned char control, unsigned char address );
signed char EESequentialRead1( unsigned char control,
unsigned char address,
unsigned char *rdptr,
unsigned char length );
# 200 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\plib\mwire.h"
void OpenMwire1( unsigned char sync_mode );
unsigned char ReadMwire1( unsigned char high_byte,
unsigned char low_byte );
# 219
signed char WriteMwire1( unsigned char data_out );
# 234
void getsMwire1( unsigned char *rdptr, unsigned char length );
# 126 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\plib\portb.h"
void OpenPORTB( unsigned char config);
# 176
void OpenRB0INT( unsigned char config);
# 194
void OpenRB1INT( unsigned char config);
# 211
void OpenRB2INT( unsigned char config);
# 230
void OpenRB3INT( unsigned char config);
# 85 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\plib\pwm.h"
union PWMDC
{
unsigned int lpwm;
char bpwm[2];
};
# 467
void OpenPWM1 ( char period);
void SetDCPWM1 ( unsigned int duty_cycle);
# 477
void ClosePWM1 (void);
# 538
void OpenPWM4 ( unsigned char period, unsigned char timer_source );
void SetDCPWM4 ( unsigned int duty_cycle);
void ClosePWM4 (void);
void OpenPWM5 ( unsigned char period, unsigned char timer_source );
void SetDCPWM5 ( unsigned int duty_cycle);
void ClosePWM5 (void);
void OpenPWM6 ( unsigned char period, unsigned char timer_source );
void SetDCPWM6 ( unsigned int duty_cycle);
void ClosePWM6 (void);
void OpenPWM7 ( unsigned char period, unsigned char timer_source );
void SetDCPWM7 ( unsigned int duty_cycle);
void ClosePWM7 (void);
void OpenPWM8 ( unsigned char period, unsigned char timer_source );
void SetDCPWM8 ( unsigned int duty_cycle);
void ClosePWM8 (void);
# 586
void OpenEPWM1( unsigned char period, unsigned char timer_source );
void SetDCEPWM1 ( unsigned int duty_cycle);
void SetOutputEPWM1 ( unsigned char output_config,
unsigned char pwm_mode);
void CloseEPWM1 (void);
# 594
void OpenEPWM2( unsigned char period, unsigned char timer_source );
void SetDCEPWM2 ( unsigned int duty_cycle);
void SetOutputEPWM2 ( unsigned char output_config,
unsigned char pwm_mode);
void CloseEPWM2 (void);
void OpenEPWM3( unsigned char period, unsigned char timer_source );
void SetDCEPWM3 ( unsigned int duty_cycle);
void SetOutputEPWM3 ( unsigned char output_config,
unsigned char pwm_mode);
void CloseEPWM3 (void);
# 16 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\plib\reset.h"
char isMCLR(void);
void StatusReset(void);
char isPOR(void);
char isWU(void);
char isBOR(void);
char isWDTTO(void);
char isWDTWU(void);
char isLVD(void);
# 43 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\plib\rtcc.h"
typedef union _WORD_VAL
{
unsigned int Val;
unsigned char v[2];
struct
{
unsigned char LB;
unsigned char HB;
} byte;
struct
{
unsigned char b0:1;
unsigned char b1:1;
unsigned char b2:1;
unsigned char b3:1;
unsigned char b4:1;
unsigned char b5:1;
unsigned char b6:1;
unsigned char b7:1;
unsigned char b8:1;
unsigned char b9:1;
unsigned char b10:1;
unsigned char b11:1;
unsigned char b12:1;
unsigned char b13:1;
unsigned char b14:1;
unsigned char b15:1;
} bits;
} WORD_VAL, WORD_BITS;
typedef enum
{
RTCCFG_MASK_RTCEN = 0x80,
RTCCFG_MASK_FRZ = 0x40,
RTCCFG_MASK_RTCWREN = 0x20,
RTCCFG_MASK_RTCSYNC = 0x10,
RTCCFG_MASK_HALFSEC = 0x08,
RTCCFG_MASK_RTCOE = 0x04,
RTCCFG_MASK_RTCPTR = 0x03
}RTCCFG_MASK;
typedef enum
{
ALRMCFG_MASK_ALRMEN = 0x80,
ALRMCFG_MASK_CHIME = 0x40,
ALRMCFG_MASK_AMASK = 0x3c,
ALRMCFG_MASK_ALRMPTR = 0x03
}ALRMCFG_MASK;
typedef enum
{
RTCCPTR_MASK_SECMIN = 0x00,
RTCCPTR_MASK_HRSWEEK = 0x01,
RTCCPTR_MASK_DAYMON = 0x02,
RTCCPTR_MASK_YEAR = 0x03
}RTCCPTR_MASK;
typedef union
{
struct
{
unsigned char rsvd;
unsigned char sec;
unsigned char min;
unsigned char hour;
}f;
unsigned char b[4];
unsigned int w[2];
unsigned long l;
}rtccTime;
typedef union
{
struct
{
unsigned char wday;
unsigned char mday;
unsigned char mon;
unsigned char year;
}f;
unsigned char b[4];
unsigned int w[2];
unsigned long l;
}rtccDate;
typedef union
{
struct
{
unsigned char year;
unsigned char rsvd;
unsigned char mday;
unsigned char mon;
unsigned char hour;
unsigned char wday;
unsigned char sec;
unsigned char min;
}f;
unsigned char b[8];
unsigned int w[4];
unsigned long l[2];
}rtccTimeDate;
typedef enum
{
RTCC_RPT_HALF_SEC,
RTCC_RPT_SEC,
RTCC_RPT_TEN_SEC,
RTCC_RPT_MIN,
RTCC_RPT_TEN_MIN,
RTCC_RPT_HOUR,
RTCC_RPT_DAY,
RTCC_RPT_WEEK,
RTCC_RPT_MON,
RTCC_RPT_YEAR
}rtccRepeat;
# 646
extern void RtccInitClock(void) ;
extern void RtccReadAlrmDate(rtccDate* pDt) ;
extern void RtccReadAlrmTime(rtccTime* pTm);
extern void RtccReadAlrmTimeDate(rtccTimeDate* pTD) ;
extern void RtccReadDate(rtccDate* pDt) ;
extern void RtccReadTime(rtccTime* pTm) ;
extern void RtccReadTimeDate(rtccTimeDate* pTD) ;
extern void RtccSetAlarmRpt(rtccRepeat rpt, BOOL dsblAlrm) ;
extern void RtccSetAlarmRptCount(unsigned char rptCnt, BOOL dsblAlrm) ;
extern void RtccSetCalibration(int drift) ;
extern void RtccSetChimeEnable(BOOL enable, BOOL dsblAlrm) ;
extern BOOL RtccWriteAlrmDate(const rtccDate* pDt) ;
extern BOOL RtccWriteAlrmTime(const rtccTime* pTm) ;
extern BOOL RtccWriteAlrmTimeDate(const rtccTimeDate* pTD) ;
extern BOOL RtccWriteDate(const rtccDate* pDt , BOOL di);
extern BOOL RtccWriteTime(const rtccTime* pTm , BOOL di) ;
extern BOOL RtccWriteTimeDate(const rtccTimeDate* pTD , BOOL di) ;
extern void RtccWrOn(void);
# 687
void Open_RTCC(void);
void Close_RTCC(void);
unsigned char update_RTCC(void);
# 97 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\plib\sw_i2c.h"
void SWStopI2C ( void );
void SWStartI2C ( void );
void SWRestartI2C ( void );
void SWStopI2C ( void );
signed char SWAckI2C( void );
signed char Clock_test( void );
signed int SWReadI2C( void );
signed char SWWriteI2C( unsigned char data_out );
signed char SWGetsI2C( unsigned char *rdptr, unsigned char length );
signed char SWPutsI2C( unsigned char *wrptr );
# 84 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\plib\sw_spi.h"
void OpenSWSPI(void);
char WriteSWSPI( char output);
void SetCSSWSPI(void);
void ClearCSSWSPI(void);
# 47 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\plib\sw_uart.h"
void OpenUART(void);
unsigned char ReadUART(void);
void WriteUART( unsigned char);
void getsUART( char *, unsigned char);
void putsUART( char *);
# 79
extern void DelayRXBitUART (void);
extern void DelayRXHalfBitUART(void);
extern void DelayTXBitUART (void);
# 36 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\plib\timers.h"
union Timers
{
unsigned int lt;
char bt[2];
};
# 118
void OpenTimer0 ( unsigned char config);
void CloseTimer0 (void);
unsigned int ReadTimer0 (void);
void WriteTimer0 ( unsigned int timer0);
# 185
void OpenTimer1 ( unsigned char config, unsigned char config1);
void CloseTimer1 (void);
unsigned int ReadTimer1 (void);
void WriteTimer1 ( unsigned int timer1);
# 325
void OpenTimer2 ( unsigned char config);
void CloseTimer2 (void);
# 452
void OpenTimer3 ( unsigned char config, unsigned char config1);
void CloseTimer3 (void);
unsigned int ReadTimer3 (void);
void WriteTimer3 ( unsigned int timer3);
# 541
void OpenTimer4 ( unsigned char config);
void CloseTimer4 (void);
# 657
void OpenTimer5 ( unsigned char config, unsigned char config1);
void CloseTimer5 (void);
unsigned int ReadTimer5 (void);
void WriteTimer5 ( unsigned int Timer5);
# 746
void OpenTimer6 ( unsigned char config);
void CloseTimer6 (void);
# 892
void OpenTimer8 ( unsigned char config);
void CloseTimer8 (void);
# 200 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\plib\usart.h"
union USART1
{
unsigned char val;
struct
{
unsigned RX_NINE:1;
unsigned TX_NINE:1;
unsigned FRAME_ERROR:1;
unsigned OVERRUN_ERROR:1;
unsigned fill:4;
};
};
extern union USART1 USART1_Status;
void Open1USART ( unsigned char config, unsigned int spbrg);
# 244
char Read1USART (void);
void Write1USART ( char data);
void gets1USART ( char *buffer, unsigned char len);
void puts1USART ( char *data);
void putrs1USART ( const char *data);
# 305
union USART2
{
unsigned char val;
struct
{
unsigned RX_NINE:1;
unsigned TX_NINE:1;
unsigned FRAME_ERROR:1;
unsigned OVERRUN_ERROR:1;
unsigned fill:4;
};
};
extern union USART2 USART2_Status;
void Open2USART ( unsigned char config, unsigned int spbrg);
# 333
char Read2USART (void);
void Write2USART ( char data);
void gets2USART ( char *buffer, unsigned char len);
void puts2USART ( char *data);
void putrs2USART ( const char *data);
# 660
void baud1USART ( unsigned char baudconfig);
# 665
void baud2USART ( unsigned char baudconfig);
# 87 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\plib\xlcd.h"
void OpenXLCD( unsigned char);
# 92
void SetCGRamAddr( unsigned char);
# 97
void SetDDRamAddr( unsigned char);
# 102
unsigned char BusyXLCD(void);
# 107
unsigned char ReadAddrXLCD(void);
# 112
char ReadDataXLCD(void);
# 117
void WriteCmdXLCD( unsigned char);
# 122
void WriteDataXLCD( char);
# 132
void putsXLCD( char *);
# 137
void putrsXLCD(const char *);
extern void DelayFor18TCY(void);
extern void DelayPORXLCD(void);
extern void DelayXLCD(void);
# 18 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18.h"
__attribute__((__unsupported__("The flash_write routine is no longer supported. Please use the peripheral library functions: WriteBytesFlash, WriteBlockFlash or WriteWordFlash"))) void flash_write(const unsigned char *, unsigned int, __far unsigned char *);
# 143
#pragma intrinsic(_delay)
extern void _delay(unsigned long);
#pragma intrinsic(_delaywdt)
extern void _delaywdt(unsigned long);
#pragma intrinsic(_delay3)
extern void _delay3(unsigned char);
# 22 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\string.h"
extern void * memcpy(void *, const void *, size_t);
extern void * memmove(void *, const void *, size_t);
extern void * memset(void *, int, size_t);
# 35
extern char * strcat(char *, const char *);
extern char * strcpy(char *, const char *);
extern char * strncat(char *, const char *, size_t);
extern char * strncpy(char *, const char *, size_t);
extern char * strdup(const char *);
extern char * strtok(char *, const char *);
extern int memcmp(const void *, const void *, size_t);
extern int strcmp(const char *, const char *);
extern int stricmp(const char *, const char *);
extern int strncmp(const char *, const char *, size_t);
extern int strnicmp(const char *, const char *, size_t);
extern void * memchr(const void *, int, size_t);
extern size_t strcspn(const char *, const char *);
extern char * strpbrk(const char *, const char *);
extern size_t strspn(const char *, const char *);
extern char * strstr(const char *, const char *);
extern char * stristr(const char *, const char *);
extern char * strerror(int);
extern size_t strlen(const char *);
extern char * strchr(const char *, int);
extern char * strichr(const char *, int);
extern char * strrchr(const char *, int);
extern char * strrichr(const char *, int);
# 7 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\stdarg.h"
typedef void * va_list[1];
#pragma intrinsic(__va_start)
extern void * __va_start(void);
#pragma intrinsic(__va_arg)
extern void * __va_arg(void *, ...);
# 23 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\stdio.h"
extern int errno;
# 54
struct __prbuf
{
char * ptr;
void (* func)(char);
};
# 17 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\conio.h"
extern int errno;
extern void init_uart(void);
extern char getch(void);
extern char getche(void);
extern void putch(char);
extern void ungetch(char);
extern __bit kbhit(void);
# 31
extern char * cgets(char *);
extern void cputs(const char *);
# 99 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\stdio.h"
extern int cprintf(char *, ...);
#pragma printf_check(cprintf)
extern int _doprnt(struct __prbuf *, const register char *, register va_list);
# 191
#pragma printf_check(vprintf) const
#pragma printf_check(vsprintf) const
extern char * gets(char *);
extern int puts(const char *);
extern int scanf(const char *, ...);
extern int sscanf(const char *, const char *, ...);
extern int vprintf(const char *, va_list);
extern int vsprintf(char *, const char *, va_list) __attribute__((unsupported("vsprintf() is not supported by this compiler")));
extern int vscanf(const char *, va_list ap);
extern int vsscanf(const char *, const char *, va_list);
#pragma printf_check(printf) const
#pragma printf_check(sprintf) const
extern int sprintf(char *, const char *, ...);
extern int printf(const char *, ...);
# 11 "uart.h"
typedef struct __UART_DATA {
unsigned char buffer_in[125];
unsigned char buffer_in_read_ind;
unsigned char buffer_in_write_ind;
unsigned char buffer_in_len;
unsigned char buffer_in_len_tmp;
unsigned char buffer_out[125];
unsigned char buffer_out_ind;
unsigned char buffer_out_len;
} UART_DATA;
void UART1_Init(void);
void UART1_Recv_Interrupt_Handler(void);
void UART1_Send_Interrupt_Handler(void);
void UART1_WriteS(const char *fmt, ...);
void UART1_WriteB(const char *msg, unsigned char length);
void UART1_WriteC(const unsigned char c);
unsigned char UART1_Buffer_Len(void);
unsigned char UART1_Read_Buffer(unsigned char *buffer);
# 7 "uart.c"
static UART_DATA uart_1_data;
static UART_DATA *uart_1_data_p = &uart_1_data;
void UART1_Init() {
TRISCbits.TRISC6 = 0;
TRISCbits.TRISC7 = 1;
BAUDCON1bits.BRG16 = 0;
SPBRG1 = 25;
TXSTA1bits.BRGH = 1;
TXSTA1bits.SYNC = 0;
RCSTA1bits.SPEN = 1;
TXSTA1bits.TX9 = 0;
RCSTA1bits.RX9 = 0;
RCSTA1bits.CREN = 1;
TXSTA1bits.TXEN = 1;
PIE1bits.TX1IE = 0;
# 35
PIE1bits.RC1IE = 1;
uart_1_data_p->buffer_in_read_ind = 0;
uart_1_data_p->buffer_in_write_ind = 0;
uart_1_data_p->buffer_in_len = 0;
uart_1_data_p->buffer_in_len_tmp = 0;
}
void UART1_Recv_Interrupt_Handler() {
unsigned char c;
if (PIR1bits.RC1IF) {
c = RCREG1;
uart_1_data_p->buffer_in[uart_1_data_p->buffer_in_write_ind] = c;
if (uart_1_data_p->buffer_in_write_ind == 125 - 1) {
uart_1_data_p->buffer_in_write_ind = 0;
} else {
uart_1_data_p->buffer_in_write_ind++;
}
if (uart_1_data_p->buffer_in_len_tmp < 125) {
uart_1_data_p->buffer_in_len_tmp++;
} else {
if (uart_1_data_p->buffer_in_read_ind == 125 - 1) {
uart_1_data_p->buffer_in_read_ind = 0;
} else {
uart_1_data_p->buffer_in_read_ind++;
}
}
if (c == 0x0D) {
uart_1_data_p->buffer_in_len = uart_1_data_p->buffer_in_len_tmp;
uart_1_data_p->buffer_in_len_tmp = 0;
}
# 77
}
if (RCSTA1bits.OERR == 1) {
RCSTA1bits.CREN = 0;
RCSTA1bits.CREN = 1;
UART1_WriteS("UART1: (ERROR) overrun\r\n");
TXSTA1bits.TXEN = 0;
}
}
void UART1_Send_Interrupt_Handler() {
if (uart_1_data_p->buffer_out_ind != uart_1_data_p->buffer_out_len) {
TXREG1 = uart_1_data_p->buffer_out[uart_1_data_p->buffer_out_ind];
uart_1_data_p->buffer_out_ind++;
} else {
while (!TXSTA1bits.TRMT);
TXSTA1bits.TXEN = 0;
uart_1_data_p->buffer_out_ind = 0;
uart_1_data_p->buffer_out_len = 0;
}
}
void UART1_WriteS(const char *fmt, ...) {
unsigned char i;
va_list args;
*args = __va_start();
vprintf(fmt, args);
;
uart_1_data_p->buffer_out_len = strlen((char *) uart_1_data_p->buffer_out);
uart_1_data_p->buffer_out_ind = 1;
for (i = 0; i < uart_1_data_p->buffer_out_len; i++) {
TXREG1 = uart_1_data_p->buffer_out[i];
asm(" nop");
while (!PIR1bits.TX1IF);
}
# 127
}
void UART1_WriteB(const char *msg, unsigned char length) {
unsigned char i;
for (i = 0; i < length; i++) {
TXREG1 = msg[i];
asm(" nop");
while (!PIR1bits.TX1IF);
}
# 147
}
void UART1_WriteC(const unsigned char c) {
TXREG1 = c;
asm(" nop");
while (!PIR1bits.TX1IF);
# 162
}
unsigned char UART1_Buffer_Len() {
return uart_1_data_p->buffer_in_len;
}
unsigned char UART1_Read_Buffer(unsigned char *buffer) {
unsigned char i = 0;
while (uart_1_data_p->buffer_in_len != 0) {
buffer[i] = uart_1_data_p->buffer_in[uart_1_data_p->buffer_in_read_ind];
i++;
if (uart_1_data_p->buffer_in_read_ind == 125 - 1) {
uart_1_data_p->buffer_in_read_ind = 0;
} else {
uart_1_data_p->buffer_in_read_ind++;
}
uart_1_data_p->buffer_in_len--;
}
return i;
}

/PIC Stuff/PICX_27J13/defines.h
0,0 → 1,108
#ifndef DEFINES_H
#define DEFINES_H
#define UART1_RX_TO_BUFFER
//#define UART1_RX_TO_XBEE
#define _DEBUG
//#define _TEST_UART
//#define _TEST_I2C_MASTER
//#define _TEST_I2C_SLAVE
//#define _TEST_SPI
//#define _TEST_NFC
//#define _TEST_LED_BACKPACK
//#define _TEST_SSD1306_OLED
//#define _TEST_SSD1331_OLED
//#define _TEST_ADC
//#define _TEST_XBEE
// Enable or disable debug prints depending on project preprocessor (_DEBUG)
#ifdef _DEBUG
#define DBG_PRINT_MAIN UART1_WriteS
#define DBG_PRINT_UART(x) UART1_WriteS(x)
#define DBG_PRINT_I2C(x) UART1_WriteS(x)
#define DBG_PRINT_SPI(x) UART1_WriteS(x)
#define DBG_PRINT_XBEE(x) UART1_WriteS(x)
#define DBG_PRINT_PORTB_INT(x)
#define DBG_PRINT_INT(x)
#define DBG_PRINT_BUFFER(x)
#else
#define DBG_PRINT_MAIN(x)
#define DBG_PRINT_UART(x)
#define DBG_PRINT_I2C(x)
#define DBG_PRINT_SPI(x)
#define DBG_PRINT_XBEE(x)
#define DBG_PRINT_PORTB_INT(x)
#define DBG_PRINT_INT(x)
#define DBG_PRINT_BUFFER(x)
#endif
// Pin allocations
#define UART1_RX_TRIS TRISCbits.TRISC7
#define UART1_TX_TRIS TRISCbits.TRISC6
#define I2C_CLK_TRIS TRISCbits.TRISC3
#define I2C_DAT_TRIS TRISCbits.TRISC4
#define LED_BLUE_TRIS TRISCbits.TRISC5
#define LED_BLUE_LAT LATCbits.LATC5
#define LED_RED_TRIS TRISCbits.TRISC2
#define LED_RED_LAT LATCbits.LATC2
#define ADC_AN0_TRIS TRISAbits.TRISA0
#define ADC_AN1_TRIS TRISAbits.TRISA1
#define ADC_AN2_TRIS TRISAbits.TRISA2
#define XBEE_CTS_TRIS TRISBbits.TRISB0
#define XBEE_CTS_LAT LATBbits.LATB0
#define XBEE_CTS_PORT PORTBbits.RB0
#define XBEE_RTS_TRIS TRISBbits.TRISB1
#define XBEE_RTS_LAT LATBbits.LATB1
#define SPI_MOSI_TRIS TRISBbits.TRISB0
#ifndef SPI2_WRITE_ONLY
#define SPI_MISO_TRIS TRISBbits.TRISB0
#endif
#define SPI_CLK_TRIS TRISAbits.TRISA0
#define SPI_DC_SELECT_TRIS TRISAbits.TRISA1
#define SPI_DC_SELECT_LAT LATAbits.LATA1
#define SPI_RESET_TRIS TRISAbits.TRISA2
#define SPI_RESET_LAT LATAbits.LATA2
#define SPI_SLAVE_SELECT_TRIS TRISAbits.TRISA3
#define SPI_SLAVE_SELECT_LAT LATAbits.LATA3
#define PARALLEL_RS_TRIS TRISBbits.TRISB7
#define PARALLEL_RS_LAT LATBbits.LATB7
#define PARALLEL_RW_TRIS TRISBbits.TRISB6
#define PARALLEL_RW_LAT LATBbits.LATB6
#define PARALLEL_EN_TRIS TRISBbits.TRISB5
#define PARALLEL_EN_LAT LATBbits.LATB5
#define PARALLEL_D4_TRIS TRISBbits.TRISB4
#define PARALLEL_D4_LAT LATBbits.LATB4
#define PARALLEL_D5_TRIS TRISBbits.TRISB3
#define PARALLEL_D5_LAT LATBbits.LATB3
#define PARALLEL_D6_TRIS TRISBbits.TRISB2
#define PARALLEL_D6_LAT LATBbits.LATB2
#define PARALLEL_D7_TRIS TRISBbits.TRISB1
#define PARALLEL_D7_LAT LATBbits.LATB1
#define PARALLEL_BUSY_TRIS TRISBbits.TRISB1
#define PARALLEL_BUSY_PORT PORTBbits.RB1
#define NFC_IRQ_TRIS TRISAbits.TRISA5
#define NFC_IRQ_PORT PORTAbits.RA5
//#define NFC_RESET_TRIS TRISCbits.TRISC2
//#define NFC_RESET_LAT LATCbits.LATC2
// PPS bindings (RP Pins)
#define PPS_SPI2_CLK_IN 0 // A0
#define PPS_SPI2_CLK_OUT RPOR0 // A0
#define PPS_SPI2_MOSI RPOR3 // B0
#ifndef SPI2_WRITE_ONLY
#define PPS_SPI2_MISO 3 // NA
#endif
//#define PPS_UART2_RX 5
//#define PPS_UART2_TX RPOR6
#endif /* DEFINES_H */

/PIC Stuff/PICX_27J13/dist/default/production/PICX_27J13.X.production.cof
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream

/PIC Stuff/PICX_27J13/dist/default/production/PICX_27J13.X.production.cof
Property changes:
Added: svn:mime-type
+application/octet-stream
\ No newline at end of property

/PIC Stuff/PICX_27J13/dist/default/production/PICX_27J13.X.production.hex
0,0 → 1,23
:04000000FDEF07F019
:100F000055415254313A20284552524F5229206FB0
:100F100076657272756E0D0A0000016E010E010198
:100F20000101006F0150016E010E02010201006F0C
:100F30000150016E010E03010301006F0150016EAB
:100F4000010E04010401006F0150016E010E050144
:100F50000501006F0150016E010E06010601006FD0
:100F60000150016E010E07010701006F0150016E73
:100F7000010E08010801006F0150016E010E090108
:100F80000901006F0150016E010E0A010A01006F94
:100F90000150016E010E0B010B01006F0150016E3B
:100FA000010E0C010C01006F0150016E010E0001D9
:100FB0000001606F0150016E010E0D010D01006F07
:100FC0000150016E010E026E0150016E010E000112
:100FD0000001C46F0150016E010E0D010D01646F1F
:100FE0000150016E010E346E0150016E010E0D01B3
:100FF0000D01966F015000EF00F00DEEAAF011EE1A
:1010000000F0EE6AE550E150FCE1E250FAE12C0E0E
:10101000F66E100EF76E000EF86E0900F5CF5CF05C
:0E1020000900F5CF5DF000018DEF07F0AA0D7D
:020000040001F9
:08FFF8008AF48DF0A7F87FF3F5
:00000001FF

/PIC Stuff/PICX_27J13/dist/default/production/PICX_27J13.X.production.hxl
0,0 → 1,30
### HEXMate logfile and output summary ###
### Memory Usage ###
Unused memory ranges:
4h - EFFh
102Eh - 1FFF7h
dist/default/production\PICX_27J13.X.production.hex ranges:
0h - 3h
F00h - 102Dh
1FFF8h - 1FFFFh
### Hex Memory Map ###
Legend:
- = Unused memory
F = Filled ROM
S = Stored serial code
A = Stored ASCII string
R = Reserved for checksum
C = Stored checksum result
T = Trailing code
& = Find & replace opcode
X = Find & delete opcode
1 = dist/default/production\PICX_27J13.X.production.hex
00000000: 1111------------------------------------------------------------
00000F00: 1111111111111111111111111111111111111111111111111111111111111111
00000F40: 1111111111111111111111111111111111111111111111111111111111111111
00000F80: 1111111111111111111111111111111111111111111111111111111111111111
00000FC0: 1111111111111111111111111111111111111111111111111111111111111111
00001000: 1111111111111111111111111111111111111111111111------------------
0001FFC0: --------------------------------------------------------11111111

/PIC Stuff/PICX_27J13/dist/default/production/PICX_27J13.X.production.lst
0,0 → 1,2244
Microchip Technology PIC18 LITE Macro Assembler V1.12 build 49521
Sat Dec 22 19:09:30 2012
HI-TECH Software Omniscient Code Generator (Lite mode) build 49521
1 0000 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
2 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
3
4 opt pagewidth 120
5
6 opt lm
7
8 0000 porta equ 0F80h
9 0000 portb equ 0F81h
10 0000 portc equ 0F82h
11 0000 portd equ 0F83h
12 0000 porte equ 0F84h
13 0000 lata equ 0F89h
14 0000 latb equ 0F8Ah
15 0000 latc equ 0F8Bh
16 0000 latd equ 0F8Ch
17 0000 late equ 0F8Dh
18 0000 trisa equ 0F92h
19 0000 trisb equ 0F93h
20 0000 trisc equ 0F94h
21 0000 trisd equ 0F95h
22 0000 trise equ 0F96h
23 0000 pie1 equ 0F9Dh
24 0000 pir1 equ 0F9Eh
25 0000 ipr1 equ 0F9Fh
26 0000 pie2 equ 0FA0h
27 0000 pir2 equ 0FA1h
28 0000 ipr2 equ 0FA2h
29 0000 t3con equ 0FB1h
30 0000 tmr3l equ 0FB2h
31 0000 tmr3h equ 0FB3h
32 0000 ccp1con equ 0FBDh
33 0000 ccpr1l equ 0FBEh
34 0000 ccpr1h equ 0FBFh
35 0000 adcon1 equ 0FC1h
36 0000 adcon0 equ 0FC2h
37 0000 adresl equ 0FC3h
38 0000 adresh equ 0FC4h
39 0000 sspcon2 equ 0FC5h
40 0000 sspcon1 equ 0FC6h
41 0000 sspstat equ 0FC7h
42 0000 sspadd equ 0FC8h
43 0000 sspbuf equ 0FC9h
44 0000 t2con equ 0FCAh
45 0000 pr2 equ 0FCBh
46 0000 tmr2 equ 0FCCh
47 0000 t1con equ 0FCDh
48 0000 tmr1l equ 0FCEh
49 0000 tmr1h equ 0FCFh
50 0000 rcon equ 0FD0h
51 0000 wdtcon equ 0FD1h
52 0000 lvdcon equ 0FD2h
53 0000 osccon equ 0FD3h
54 0000 t0con equ 0FD5h
55 0000 tmr0l equ 0FD6h
56 0000 tmr0h equ 0FD7h
57 0000 status equ 0FD8h
58 0000 fsr2 equ 0FD9h
59 0000 fsr2l equ 0FD9h
60 0000 fsr2h equ 0FDAh
61 0000 plusw2 equ 0FDBh
62 0000 preinc2 equ 0FDCh
63 0000 postdec2 equ 0FDDh
64 0000 postinc2 equ 0FDEh
65 0000 indf2 equ 0FDFh
66 0000 bsr equ 0FE0h
67 0000 fsr1 equ 0FE1h
68 0000 fsr1l equ 0FE1h
69 0000 fsr1h equ 0FE2h
70 0000 plusw1 equ 0FE3h
71 0000 preinc1 equ 0FE4h
72 0000 postdec1 equ 0FE5h
73 0000 postinc1 equ 0FE6h
74 0000 indf1 equ 0FE7h
75 0000 wreg equ 0FE8h
76 0000 fsr0 equ 0FE9h
77 0000 fsr0l equ 0FE9h
78 0000 fsr0h equ 0FEAh
79 0000 plusw0 equ 0FEBh
80 0000 preinc0 equ 0FECh
81 0000 postdec0 equ 0FEDh
82 0000 postinc0 equ 0FEEh
83 0000 indf0 equ 0FEFh
84 0000 intcon3 equ 0FF0h
85 0000 intcon2 equ 0FF1h
86 0000 intcon equ 0FF2h
87 0000 prod equ 0FF3h
88 0000 prodl equ 0FF3h
89 0000 prodh equ 0FF4h
90 0000 tablat equ 0FF5h
91 0000 tblptr equ 0FF6h
92 0000 tblptrl equ 0FF6h
93 0000 tblptrh equ 0FF7h
94 0000 tblptru equ 0FF8h
95 0000 pcl equ 0FF9h
96 0000 pclat equ 0FFAh
97 0000 pclath equ 0FFAh
98 0000 pclatu equ 0FFBh
99 0000 stkptr equ 0FFCh
100 0000 tosl equ 0FFDh
101 0000 tosh equ 0FFEh
102 0000 tosu equ 0FFFh
103 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
104
105 0000 endm
106 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
107
108 opt pagewidth 120
109 0000 ADCTRIG equ 0EB8h ;#
110 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
111 0000 PMDIS0 equ 0EB9h ;#
112 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
113 0000 PD0 equ 0EB9h ;#
114 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
115 0000 PMDIS1 equ 0EBAh ;#
116 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
117 0000 PD1 equ 0EBAh ;#
118 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
119 0000 PMDIS2 equ 0EBBh ;#
120 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
121 0000 PD2 equ 0EBBh ;#
122 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
123 0000 PMDIS3 equ 0EBCh ;#
124 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
125 0000 PD3 equ 0EBCh ;#
126 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
127 0000 PPSCON equ 0EBFh ;#
128 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
129 0000 RPOR0 equ 0EC0h ;#
130 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
131 0000 RPOR1 equ 0EC1h ;#
132 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
133 0000 RPOR2 equ 0EC2h ;#
134 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
135 0000 RPOR3 equ 0EC3h ;#
136 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
137 0000 RPOR4 equ 0EC4h ;#
138 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
139 0000 RPOR5 equ 0EC5h ;#
140 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
141 0000 RPOR6 equ 0EC6h ;#
142 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
143 0000 RPOR7 equ 0EC7h ;#
144 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
145 0000 RPOR8 equ 0EC8h ;#
146 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
147 0000 RPOR9 equ 0EC9h ;#
148 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
149 0000 RPOR10 equ 0ECAh ;#
150 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
151 0000 RPOR11 equ 0ECBh ;#
152 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
153 0000 RPOR12 equ 0ECCh ;#
154 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
155 0000 RPOR13 equ 0ECDh ;#
156 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
157 0000 RPOR14 equ 0ECEh ;#
158 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
159 0000 RPOR15 equ 0ECFh ;#
160 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
161 0000 RPOR16 equ 0ED0h ;#
162 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
163 0000 RPOR17 equ 0ED1h ;#
164 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
165 0000 RPOR18 equ 0ED2h ;#
166 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
167 0000 RPINR1 equ 0EE1h ;#
168 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
169 0000 RPINR2 equ 0EE2h ;#
170 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
171 0000 RPINR3 equ 0EE3h ;#
172 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
173 0000 RPINR4 equ 0EE4h ;#
174 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
175 0000 RPINR6 equ 0EE6h ;#
176 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
177 0000 RPINR15 equ 0EE7h ;#
178 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
179 0000 RPINR7 equ 0EE8h ;#
180 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
181 0000 RPINR8 equ 0EE9h ;#
182 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
183 0000 RPINR9 equ 0EEAh ;#
184 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
185 0000 RPINR12 equ 0EF2h ;#
186 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
187 0000 RPINR13 equ 0EF3h ;#
188 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
189 0000 RPINR14 equ 0EF4h ;#
190 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
191 0000 RPINR16 equ 0EF7h ;#
192 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
193 0000 RPINR17 equ 0EF8h ;#
194 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
195 0000 RPINR21 equ 0EFCh ;#
196 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
197 0000 RPINR22 equ 0EFDh ;#
198 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
199 0000 RPINR23 equ 0EFEh ;#
200 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
201 0000 RPINR24 equ 0EFFh ;#
202 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
203 0000 CCP10CON equ 0F00h ;#
204 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
205 0000 CCPR10L equ 0F01h ;#
206 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
207 0000 CCPR10H equ 0F02h ;#
208 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
209 0000 CCP9CON equ 0F03h ;#
210 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
211 0000 CCPR9L equ 0F04h ;#
212 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
213 0000 CCPR9H equ 0F05h ;#
214 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
215 0000 CCP8CON equ 0F06h ;#
216 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
217 0000 CCPR8L equ 0F07h ;#
218 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
219 0000 CCPR8H equ 0F08h ;#
220 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
221 0000 CCP7CON equ 0F09h ;#
222 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
223 0000 CCPR7L equ 0F0Ah ;#
224 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
225 0000 CCPR7H equ 0F0Bh ;#
226 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
227 0000 CCP6CON equ 0F0Ch ;#
228 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
229 0000 CCPR6L equ 0F0Dh ;#
230 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
231 0000 CCPR6H equ 0F0Eh ;#
232 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
233 0000 CCP5CON equ 0F0Fh ;#
234 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
235 0000 CCPR5L equ 0F10h ;#
236 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
237 0000 CCPR5H equ 0F11h ;#
238 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
239 0000 CCP4CON equ 0F12h ;#
240 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
241 0000 CCPR4L equ 0F13h ;#
242 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
243 0000 CCPR4H equ 0F14h ;#
244 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
245 0000 CCP3CON equ 0F15h ;#
246 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
247 0000 CCPR3L equ 0F16h ;#
248 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
249 0000 CCPR3H equ 0F17h ;#
250 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
251 0000 ECCP3DEL equ 0F18h ;#
252 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
253 0000 ECCP3AS equ 0F19h ;#
254 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
255 0000 PSTR3CON equ 0F1Ah ;#
256 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
257 0000 T8CON equ 0F1Bh ;#
258 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
259 0000 PR8 equ 0F1Ch ;#
260 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
261 0000 TMR8 equ 0F1Dh ;#
262 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
263 0000 T6CON equ 0F1Eh ;#
264 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
265 0000 PR6 equ 0F1Fh ;#
266 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
267 0000 TMR6 equ 0F20h ;#
268 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
269 0000 T5GCON equ 0F21h ;#
270 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
271 0000 T5CON equ 0F22h ;#
272 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
273 0000 TMR5L equ 0F23h ;#
274 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
275 0000 TMR5H equ 0F24h ;#
276 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
277 0000 CM3CON equ 0F25h ;#
278 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
279 0000 RTCVALL equ 0F3Ah ;#
280 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
281 0000 RTCVALH equ 0F3Bh ;#
282 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
283 0000 PADCFG1 equ 0F3Ch ;#
284 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
285 0000 REFOCON equ 0F3Dh ;#
286 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
287 0000 RTCCAL equ 0F3Eh ;#
288 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
289 0000 RTCCFG equ 0F3Fh ;#
290 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
291 0000 ODCON3 equ 0F40h ;#
292 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
293 0000 ODCON2 equ 0F41h ;#
294 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
295 0000 ODCON1 equ 0F42h ;#
296 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
297 0000 ALRMVALL equ 0F44h ;#
298 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
299 0000 ALRMVALH equ 0F45h ;#
300 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
301 0000 ALRMRPT equ 0F46h ;#
302 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
303 0000 ALRMCFG equ 0F47h ;#
304 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
305 0000 ANCON0 equ 0F48h ;#
306 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
307 0000 ANCON1 equ 0F49h ;#
308 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
309 0000 DSWAKEL equ 0F4Ah ;#
310 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
311 0000 DSWAKEH equ 0F4Bh ;#
312 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
313 0000 DSCONL equ 0F4Ch ;#
314 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
315 0000 DSCONH equ 0F4Dh ;#
316 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
317 0000 DSGPR0 equ 0F4Eh ;#
318 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
319 0000 DSGPR1 equ 0F4Fh ;#
320 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
321 0000 CCPTMRS2 equ 0F50h ;#
322 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
323 0000 CCPTMRS1 equ 0F51h ;#
324 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
325 0000 CCPTMRS0 equ 0F52h ;#
326 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
327 0000 CVRCON equ 0F53h ;#
328 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
329 0000 DMABCH equ 0F66h ;#
330 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
331 0000 DMABCL equ 0F67h ;#
332 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
333 0000 RXADDRH equ 0F68h ;#
334 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
335 0000 RXADDRL equ 0F69h ;#
336 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
337 0000 TXADDRH equ 0F6Ah ;#
338 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
339 0000 TXADDRL equ 0F6Bh ;#
340 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
341 0000 CMSTAT equ 0F70h ;#
342 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
343 0000 CMSTATUS equ 0F70h ;#
344 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
345 0000 SSP2CON2 equ 0F71h ;#
346 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
347 0000 SSP2CON1 equ 0F72h ;#
348 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
349 0000 SSP2STAT equ 0F73h ;#
350 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
351 0000 SSP2ADD equ 0F74h ;#
352 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
353 0000 SSP2MSK equ 0F74h ;#
354 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
355 0000 SSP2BUF equ 0F75h ;#
356 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
357 0000 T4CON equ 0F76h ;#
358 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
359 0000 PR4 equ 0F77h ;#
360 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
361 0000 TMR4 equ 0F78h ;#
362 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
363 0000 T3CON equ 0F79h ;#
364 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
365 0000 TMR3 equ 0F7Ah ;#
366 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
367 0000 TMR3L equ 0F7Ah ;#
368 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
369 0000 TMR3H equ 0F7Bh ;#
370 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
371 0000 BAUDCON2 equ 0F7Ch ;#
372 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
373 0000 SPBRGH2 equ 0F7Dh ;#
374 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
375 0000 BAUDCON1 equ 0F7Eh ;#
376 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
377 0000 BAUDCON equ 0F7Eh ;#
378 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
379 0000 BAUDCTL equ 0F7Eh ;#
380 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
381 0000 SPBRGH1 equ 0F7Fh ;#
382 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
383 0000 SPBRGH equ 0F7Fh ;#
384 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
385 0000 PORTA equ 0F80h ;#
386 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
387 0000 PORTB equ 0F81h ;#
388 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
389 0000 PORTC equ 0F82h ;#
390 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
391 0000 HLVDCON equ 0F85h ;#
392 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
393 0000 DMACON2 equ 0F86h ;#
394 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
395 0000 OSCCON2 equ 0F87h ;#
396 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
397 0000 DMACON1 equ 0F88h ;#
398 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
399 0000 LATA equ 0F89h ;#
400 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
401 0000 LATB equ 0F8Ah ;#
402 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
403 0000 LATC equ 0F8Bh ;#
404 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
405 0000 PIE4 equ 0F8Eh ;#
406 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
407 0000 PIR4 equ 0F8Fh ;#
408 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
409 0000 IPR4 equ 0F90h ;#
410 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
411 0000 PIE5 equ 0F91h ;#
412 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
413 0000 TRISA equ 0F92h ;#
414 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
415 0000 TRISB equ 0F93h ;#
416 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
417 0000 TRISC equ 0F94h ;#
418 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
419 0000 T3GCON equ 0F97h ;#
420 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
421 0000 PIR5 equ 0F98h ;#
422 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
423 0000 IPR5 equ 0F99h ;#
424 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
425 0000 T1GCON equ 0F9Ah ;#
426 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
427 0000 OSCTUNE equ 0F9Bh ;#
428 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
429 0000 RCSTA2 equ 0F9Ch ;#
430 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
431 0000 PIE1 equ 0F9Dh ;#
432 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
433 0000 PIR1 equ 0F9Eh ;#
434 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
435 0000 IPR1 equ 0F9Fh ;#
436 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
437 0000 PIE2 equ 0FA0h ;#
438 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
439 0000 PIR2 equ 0FA1h ;#
440 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
441 0000 IPR2 equ 0FA2h ;#
442 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
443 0000 PIE3 equ 0FA3h ;#
444 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
445 0000 PIR3 equ 0FA4h ;#
446 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
447 0000 IPR3 equ 0FA5h ;#
448 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
449 0000 EECON1 equ 0FA6h ;#
450 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
451 0000 EECON2 equ 0FA7h ;#
452 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
453 0000 TXSTA2 equ 0FA8h ;#
454 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
455 0000 TXREG2 equ 0FA9h ;#
456 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
457 0000 RCREG2 equ 0FAAh ;#
458 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
459 0000 SPBRG2 equ 0FABh ;#
460 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
461 0000 RCSTA1 equ 0FACh ;#
462 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
463 0000 RCSTA equ 0FACh ;#
464 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
465 0000 TXSTA1 equ 0FADh ;#
466 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
467 0000 TXSTA equ 0FADh ;#
468 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
469 0000 TXREG1 equ 0FAEh ;#
470 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
471 0000 TXREG equ 0FAEh ;#
472 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
473 0000 RCREG1 equ 0FAFh ;#
474 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
475 0000 RCREG equ 0FAFh ;#
476 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
477 0000 SPBRG1 equ 0FB0h ;#
478 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
479 0000 SPBRG equ 0FB0h ;#
480 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
481 0000 CTMUICON equ 0FB1h ;#
482 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
483 0000 CTMUCONL equ 0FB2h ;#
484 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
485 0000 CTMUCONH equ 0FB3h ;#
486 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
487 0000 CCP2CON equ 0FB4h ;#
488 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
489 0000 ECCP2CON equ 0FB4h ;#
490 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
491 0000 CCPR2 equ 0FB5h ;#
492 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
493 0000 CCPR2L equ 0FB5h ;#
494 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
495 0000 CCPR2H equ 0FB6h ;#
496 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
497 0000 ECCP2DEL equ 0FB7h ;#
498 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
499 0000 PWM2CON equ 0FB7h ;#
500 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
501 0000 ECCP2AS equ 0FB8h ;#
502 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
503 0000 PSTR2CON equ 0FB9h ;#
504 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
505 0000 CCP1CON equ 0FBAh ;#
506 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
507 0000 ECCP1CON equ 0FBAh ;#
508 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
509 0000 CCPR1 equ 0FBBh ;#
510 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
511 0000 CCPR1L equ 0FBBh ;#
512 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
513 0000 CCPR1H equ 0FBCh ;#
514 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
515 0000 ECCP1DEL equ 0FBDh ;#
516 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
517 0000 PWM1CON equ 0FBDh ;#
518 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
519 0000 ECCP1AS equ 0FBEh ;#
520 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
521 0000 PSTR1CON equ 0FBFh ;#
522 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
523 0000 WDTCON equ 0FC0h ;#
524 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
525 0000 ADCON1 equ 0FC1h ;#
526 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
527 0000 ADCON0 equ 0FC2h ;#
528 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
529 0000 ADRES equ 0FC3h ;#
530 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
531 0000 ADRESL equ 0FC3h ;#
532 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
533 0000 ADRESH equ 0FC4h ;#
534 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
535 0000 SSP1CON2 equ 0FC5h ;#
536 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
537 0000 SSPCON2 equ 0FC5h ;#
538 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
539 0000 SSP1CON1 equ 0FC6h ;#
540 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
541 0000 SSPCON1 equ 0FC6h ;#
542 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
543 0000 SSP1STAT equ 0FC7h ;#
544 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
545 0000 SSPSTAT equ 0FC7h ;#
546 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
547 0000 SSP1ADD equ 0FC8h ;#
548 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
549 0000 SSPADD equ 0FC8h ;#
550 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
551 0000 SSP1MSK equ 0FC8h ;#
552 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
553 0000 SSP1BUF equ 0FC9h ;#
554 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
555 0000 SSPBUF equ 0FC9h ;#
556 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
557 0000 T2CON equ 0FCAh ;#
558 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
559 0000 PR2 equ 0FCBh ;#
560 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
561 0000 MEMCON equ 0FCBh ;#
562 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
563 0000 TMR2 equ 0FCCh ;#
564 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
565 0000 T1CON equ 0FCDh ;#
566 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
567 0000 TMR1 equ 0FCEh ;#
568 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
569 0000 TMR1L equ 0FCEh ;#
570 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
571 0000 TMR1H equ 0FCFh ;#
572 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
573 0000 RCON equ 0FD0h ;#
574 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
575 0000 CM2CON equ 0FD1h ;#
576 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
577 0000 CM2CON1 equ 0FD1h ;#
578 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
579 0000 CM1CON equ 0FD2h ;#
580 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
581 0000 CM1CON1 equ 0FD2h ;#
582 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
583 0000 OSCCON equ 0FD3h ;#
584 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
585 0000 T0CON equ 0FD5h ;#
586 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
587 0000 TMR0 equ 0FD6h ;#
588 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
589 0000 TMR0L equ 0FD6h ;#
590 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
591 0000 TMR0H equ 0FD7h ;#
592 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
593 0000 STATUS equ 0FD8h ;#
594 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
595 0000 FSR2 equ 0FD9h ;#
596 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
597 0000 FSR2L equ 0FD9h ;#
598 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
599 0000 FSR2H equ 0FDAh ;#
600 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
601 0000 PLUSW2 equ 0FDBh ;#
602 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
603 0000 PREINC2 equ 0FDCh ;#
604 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
605 0000 POSTDEC2 equ 0FDDh ;#
606 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
607 0000 POSTINC2 equ 0FDEh ;#
608 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
609 0000 INDF2 equ 0FDFh ;#
610 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
611 0000 BSR equ 0FE0h ;#
612 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
613 0000 FSR1 equ 0FE1h ;#
614 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
615 0000 FSR1L equ 0FE1h ;#
616 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
617 0000 FSR1H equ 0FE2h ;#
618 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
619 0000 PLUSW1 equ 0FE3h ;#
620 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
621 0000 PREINC1 equ 0FE4h ;#
622 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
623 0000 POSTDEC1 equ 0FE5h ;#
624 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
625 0000 POSTINC1 equ 0FE6h ;#
626 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
627 0000 INDF1 equ 0FE7h ;#
628 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
629 0000 WREG equ 0FE8h ;#
630 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
631 0000 FSR0 equ 0FE9h ;#
632 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
633 0000 FSR0L equ 0FE9h ;#
634 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
635 0000 FSR0H equ 0FEAh ;#
636 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
637 0000 PLUSW0 equ 0FEBh ;#
638 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
639 0000 PREINC0 equ 0FECh ;#
640 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
641 0000 POSTDEC0 equ 0FEDh ;#
642 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
643 0000 POSTINC0 equ 0FEEh ;#
644 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
645 0000 INDF0 equ 0FEFh ;#
646 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
647 0000 INTCON3 equ 0FF0h ;#
648 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
649 0000 INTCON2 equ 0FF1h ;#
650 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
651 0000 INTCON equ 0FF2h ;#
652 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
653 0000 PROD equ 0FF3h ;#
654 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
655 0000 PRODL equ 0FF3h ;#
656 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
657 0000 PRODH equ 0FF4h ;#
658 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
659 0000 TABLAT equ 0FF5h ;#
660 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
661 0000 TBLPTR equ 0FF6h ;#
662 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
663 0000 TBLPTRL equ 0FF6h ;#
664 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
665 0000 TBLPTRH equ 0FF7h ;#
666 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
667 0000 TBLPTRU equ 0FF8h ;#
668 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
669 0000 PCLAT equ 0FF9h ;#
670 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
671 0000 PC equ 0FF9h ;#
672 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
673 0000 PCL equ 0FF9h ;#
674 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
675 0000 PCLATH equ 0FFAh ;#
676 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
677 0000 PCLATU equ 0FFBh ;#
678 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
679 0000 STKPTR equ 0FFCh ;#
680 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
681 0000 TOS equ 0FFDh ;#
682 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
683 0000 TOSL equ 0FFDh ;#
684 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
685 0000 TOSH equ 0FFEh ;#
686 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
687 0000 TOSU equ 0FFFh ;#
688 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
689 0000 ADCTRIG equ 0EB8h ;#
690 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
691 0000 PMDIS0 equ 0EB9h ;#
692 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
693 0000 PD0 equ 0EB9h ;#
694 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
695 0000 PMDIS1 equ 0EBAh ;#
696 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
697 0000 PD1 equ 0EBAh ;#
698 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
699 0000 PMDIS2 equ 0EBBh ;#
700 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
701 0000 PD2 equ 0EBBh ;#
702 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
703 0000 PMDIS3 equ 0EBCh ;#
704 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
705 0000 PD3 equ 0EBCh ;#
706 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
707 0000 PPSCON equ 0EBFh ;#
708 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
709 0000 RPOR0 equ 0EC0h ;#
710 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
711 0000 RPOR1 equ 0EC1h ;#
712 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
713 0000 RPOR2 equ 0EC2h ;#
714 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
715 0000 RPOR3 equ 0EC3h ;#
716 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
717 0000 RPOR4 equ 0EC4h ;#
718 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
719 0000 RPOR5 equ 0EC5h ;#
720 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
721 0000 RPOR6 equ 0EC6h ;#
722 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
723 0000 RPOR7 equ 0EC7h ;#
724 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
725 0000 RPOR8 equ 0EC8h ;#
726 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
727 0000 RPOR9 equ 0EC9h ;#
728 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
729 0000 RPOR10 equ 0ECAh ;#
730 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
731 0000 RPOR11 equ 0ECBh ;#
732 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
733 0000 RPOR12 equ 0ECCh ;#
734 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
735 0000 RPOR13 equ 0ECDh ;#
736 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
737 0000 RPOR14 equ 0ECEh ;#
738 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
739 0000 RPOR15 equ 0ECFh ;#
740 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
741 0000 RPOR16 equ 0ED0h ;#
742 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
743 0000 RPOR17 equ 0ED1h ;#
744 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
745 0000 RPOR18 equ 0ED2h ;#
746 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
747 0000 RPINR1 equ 0EE1h ;#
748 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
749 0000 RPINR2 equ 0EE2h ;#
750 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
751 0000 RPINR3 equ 0EE3h ;#
752 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
753 0000 RPINR4 equ 0EE4h ;#
754 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
755 0000 RPINR6 equ 0EE6h ;#
756 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
757 0000 RPINR15 equ 0EE7h ;#
758 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
759 0000 RPINR7 equ 0EE8h ;#
760 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
761 0000 RPINR8 equ 0EE9h ;#
762 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
763 0000 RPINR9 equ 0EEAh ;#
764 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
765 0000 RPINR12 equ 0EF2h ;#
766 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
767 0000 RPINR13 equ 0EF3h ;#
768 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
769 0000 RPINR14 equ 0EF4h ;#
770 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
771 0000 RPINR16 equ 0EF7h ;#
772 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
773 0000 RPINR17 equ 0EF8h ;#
774 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
775 0000 RPINR21 equ 0EFCh ;#
776 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
777 0000 RPINR22 equ 0EFDh ;#
778 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
779 0000 RPINR23 equ 0EFEh ;#
780 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
781 0000 RPINR24 equ 0EFFh ;#
782 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
783 0000 CCP10CON equ 0F00h ;#
784 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
785 0000 CCPR10L equ 0F01h ;#
786 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
787 0000 CCPR10H equ 0F02h ;#
788 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
789 0000 CCP9CON equ 0F03h ;#
790 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
791 0000 CCPR9L equ 0F04h ;#
792 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
793 0000 CCPR9H equ 0F05h ;#
794 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
795 0000 CCP8CON equ 0F06h ;#
796 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
797 0000 CCPR8L equ 0F07h ;#
798 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
799 0000 CCPR8H equ 0F08h ;#
800 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
801 0000 CCP7CON equ 0F09h ;#
802 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
803 0000 CCPR7L equ 0F0Ah ;#
804 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
805 0000 CCPR7H equ 0F0Bh ;#
806 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
807 0000 CCP6CON equ 0F0Ch ;#
808 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
809 0000 CCPR6L equ 0F0Dh ;#
810 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
811 0000 CCPR6H equ 0F0Eh ;#
812 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
813 0000 CCP5CON equ 0F0Fh ;#
814 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
815 0000 CCPR5L equ 0F10h ;#
816 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
817 0000 CCPR5H equ 0F11h ;#
818 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
819 0000 CCP4CON equ 0F12h ;#
820 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
821 0000 CCPR4L equ 0F13h ;#
822 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
823 0000 CCPR4H equ 0F14h ;#
824 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
825 0000 CCP3CON equ 0F15h ;#
826 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
827 0000 CCPR3L equ 0F16h ;#
828 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
829 0000 CCPR3H equ 0F17h ;#
830 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
831 0000 ECCP3DEL equ 0F18h ;#
832 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
833 0000 ECCP3AS equ 0F19h ;#
834 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
835 0000 PSTR3CON equ 0F1Ah ;#
836 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
837 0000 T8CON equ 0F1Bh ;#
838 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
839 0000 PR8 equ 0F1Ch ;#
840 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
841 0000 TMR8 equ 0F1Dh ;#
842 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
843 0000 T6CON equ 0F1Eh ;#
844 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
845 0000 PR6 equ 0F1Fh ;#
846 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
847 0000 TMR6 equ 0F20h ;#
848 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
849 0000 T5GCON equ 0F21h ;#
850 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
851 0000 T5CON equ 0F22h ;#
852 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
853 0000 TMR5L equ 0F23h ;#
854 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
855 0000 TMR5H equ 0F24h ;#
856 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
857 0000 CM3CON equ 0F25h ;#
858 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
859 0000 RTCVALL equ 0F3Ah ;#
860 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
861 0000 RTCVALH equ 0F3Bh ;#
862 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
863 0000 PADCFG1 equ 0F3Ch ;#
864 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
865 0000 REFOCON equ 0F3Dh ;#
866 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
867 0000 RTCCAL equ 0F3Eh ;#
868 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
869 0000 RTCCFG equ 0F3Fh ;#
870 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
871 0000 ODCON3 equ 0F40h ;#
872 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
873 0000 ODCON2 equ 0F41h ;#
874 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
875 0000 ODCON1 equ 0F42h ;#
876 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
877 0000 ALRMVALL equ 0F44h ;#
878 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
879 0000 ALRMVALH equ 0F45h ;#
880 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
881 0000 ALRMRPT equ 0F46h ;#
882 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
883 0000 ALRMCFG equ 0F47h ;#
884 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
885 0000 ANCON0 equ 0F48h ;#
886 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
887 0000 ANCON1 equ 0F49h ;#
888 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
889 0000 DSWAKEL equ 0F4Ah ;#
890 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
891 0000 DSWAKEH equ 0F4Bh ;#
892 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
893 0000 DSCONL equ 0F4Ch ;#
894 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
895 0000 DSCONH equ 0F4Dh ;#
896 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
897 0000 DSGPR0 equ 0F4Eh ;#
898 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
899 0000 DSGPR1 equ 0F4Fh ;#
900 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
901 0000 CCPTMRS2 equ 0F50h ;#
902 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
903 0000 CCPTMRS1 equ 0F51h ;#
904 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
905 0000 CCPTMRS0 equ 0F52h ;#
906 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
907 0000 CVRCON equ 0F53h ;#
908 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
909 0000 DMABCH equ 0F66h ;#
910 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
911 0000 DMABCL equ 0F67h ;#
912 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
913 0000 RXADDRH equ 0F68h ;#
914 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
915 0000 RXADDRL equ 0F69h ;#
916 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
917 0000 TXADDRH equ 0F6Ah ;#
918 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
919 0000 TXADDRL equ 0F6Bh ;#
920 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
921 0000 CMSTAT equ 0F70h ;#
922 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
923 0000 CMSTATUS equ 0F70h ;#
924 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
925 0000 SSP2CON2 equ 0F71h ;#
926 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
927 0000 SSP2CON1 equ 0F72h ;#
928 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
929 0000 SSP2STAT equ 0F73h ;#
930 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
931 0000 SSP2ADD equ 0F74h ;#
932 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
933 0000 SSP2MSK equ 0F74h ;#
934 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
935 0000 SSP2BUF equ 0F75h ;#
936 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
937 0000 T4CON equ 0F76h ;#
938 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
939 0000 PR4 equ 0F77h ;#
940 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
941 0000 TMR4 equ 0F78h ;#
942 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
943 0000 T3CON equ 0F79h ;#
944 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
945 0000 TMR3 equ 0F7Ah ;#
946 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
947 0000 TMR3L equ 0F7Ah ;#
948 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
949 0000 TMR3H equ 0F7Bh ;#
950 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
951 0000 BAUDCON2 equ 0F7Ch ;#
952 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
953 0000 SPBRGH2 equ 0F7Dh ;#
954 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
955 0000 BAUDCON1 equ 0F7Eh ;#
956 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
957 0000 BAUDCON equ 0F7Eh ;#
958 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
959 0000 BAUDCTL equ 0F7Eh ;#
960 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
961 0000 SPBRGH1 equ 0F7Fh ;#
962 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
963 0000 SPBRGH equ 0F7Fh ;#
964 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
965 0000 PORTA equ 0F80h ;#
966 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
967 0000 PORTB equ 0F81h ;#
968 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
969 0000 PORTC equ 0F82h ;#
970 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
971 0000 HLVDCON equ 0F85h ;#
972 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
973 0000 DMACON2 equ 0F86h ;#
974 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
975 0000 OSCCON2 equ 0F87h ;#
976 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
977 0000 DMACON1 equ 0F88h ;#
978 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
979 0000 LATA equ 0F89h ;#
980 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
981 0000 LATB equ 0F8Ah ;#
982 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
983 0000 LATC equ 0F8Bh ;#
984 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
985 0000 PIE4 equ 0F8Eh ;#
986 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
987 0000 PIR4 equ 0F8Fh ;#
988 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
989 0000 IPR4 equ 0F90h ;#
990 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
991 0000 PIE5 equ 0F91h ;#
992 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
993 0000 TRISA equ 0F92h ;#
994 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
995 0000 TRISB equ 0F93h ;#
996 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
997 0000 TRISC equ 0F94h ;#
998 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
999 0000 T3GCON equ 0F97h ;#
1000 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1001 0000 PIR5 equ 0F98h ;#
1002 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1003 0000 IPR5 equ 0F99h ;#
1004 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1005 0000 T1GCON equ 0F9Ah ;#
1006 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1007 0000 OSCTUNE equ 0F9Bh ;#
1008 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1009 0000 RCSTA2 equ 0F9Ch ;#
1010 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1011 0000 PIE1 equ 0F9Dh ;#
1012 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1013 0000 PIR1 equ 0F9Eh ;#
1014 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1015 0000 IPR1 equ 0F9Fh ;#
1016 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1017 0000 PIE2 equ 0FA0h ;#
1018 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1019 0000 PIR2 equ 0FA1h ;#
1020 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1021 0000 IPR2 equ 0FA2h ;#
1022 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1023 0000 PIE3 equ 0FA3h ;#
1024 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1025 0000 PIR3 equ 0FA4h ;#
1026 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1027 0000 IPR3 equ 0FA5h ;#
1028 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1029 0000 EECON1 equ 0FA6h ;#
1030 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1031 0000 EECON2 equ 0FA7h ;#
1032 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1033 0000 TXSTA2 equ 0FA8h ;#
1034 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1035 0000 TXREG2 equ 0FA9h ;#
1036 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1037 0000 RCREG2 equ 0FAAh ;#
1038 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1039 0000 SPBRG2 equ 0FABh ;#
1040 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1041 0000 RCSTA1 equ 0FACh ;#
1042 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1043 0000 RCSTA equ 0FACh ;#
1044 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1045 0000 TXSTA1 equ 0FADh ;#
1046 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1047 0000 TXSTA equ 0FADh ;#
1048 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1049 0000 TXREG1 equ 0FAEh ;#
1050 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1051 0000 TXREG equ 0FAEh ;#
1052 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1053 0000 RCREG1 equ 0FAFh ;#
1054 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1055 0000 RCREG equ 0FAFh ;#
1056 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1057 0000 SPBRG1 equ 0FB0h ;#
1058 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1059 0000 SPBRG equ 0FB0h ;#
1060 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1061 0000 CTMUICON equ 0FB1h ;#
1062 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1063 0000 CTMUCONL equ 0FB2h ;#
1064 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1065 0000 CTMUCONH equ 0FB3h ;#
1066 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1067 0000 CCP2CON equ 0FB4h ;#
1068 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1069 0000 ECCP2CON equ 0FB4h ;#
1070 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1071 0000 CCPR2 equ 0FB5h ;#
1072 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1073 0000 CCPR2L equ 0FB5h ;#
1074 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1075 0000 CCPR2H equ 0FB6h ;#
1076 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1077 0000 ECCP2DEL equ 0FB7h ;#
1078 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1079 0000 PWM2CON equ 0FB7h ;#
1080 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1081 0000 ECCP2AS equ 0FB8h ;#
1082 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1083 0000 PSTR2CON equ 0FB9h ;#
1084 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1085 0000 CCP1CON equ 0FBAh ;#
1086 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1087 0000 ECCP1CON equ 0FBAh ;#
1088 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1089 0000 CCPR1 equ 0FBBh ;#
1090 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1091 0000 CCPR1L equ 0FBBh ;#
1092 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1093 0000 CCPR1H equ 0FBCh ;#
1094 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1095 0000 ECCP1DEL equ 0FBDh ;#
1096 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1097 0000 PWM1CON equ 0FBDh ;#
1098 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1099 0000 ECCP1AS equ 0FBEh ;#
1100 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1101 0000 PSTR1CON equ 0FBFh ;#
1102 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1103 0000 WDTCON equ 0FC0h ;#
1104 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1105 0000 ADCON1 equ 0FC1h ;#
1106 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1107 0000 ADCON0 equ 0FC2h ;#
1108 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1109 0000 ADRES equ 0FC3h ;#
1110 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1111 0000 ADRESL equ 0FC3h ;#
1112 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1113 0000 ADRESH equ 0FC4h ;#
1114 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1115 0000 SSP1CON2 equ 0FC5h ;#
1116 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1117 0000 SSPCON2 equ 0FC5h ;#
1118 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1119 0000 SSP1CON1 equ 0FC6h ;#
1120 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1121 0000 SSPCON1 equ 0FC6h ;#
1122 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1123 0000 SSP1STAT equ 0FC7h ;#
1124 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1125 0000 SSPSTAT equ 0FC7h ;#
1126 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1127 0000 SSP1ADD equ 0FC8h ;#
1128 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1129 0000 SSPADD equ 0FC8h ;#
1130 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1131 0000 SSP1MSK equ 0FC8h ;#
1132 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1133 0000 SSP1BUF equ 0FC9h ;#
1134 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1135 0000 SSPBUF equ 0FC9h ;#
1136 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1137 0000 T2CON equ 0FCAh ;#
1138 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1139 0000 PR2 equ 0FCBh ;#
1140 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1141 0000 MEMCON equ 0FCBh ;#
1142 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1143 0000 TMR2 equ 0FCCh ;#
1144 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1145 0000 T1CON equ 0FCDh ;#
1146 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1147 0000 TMR1 equ 0FCEh ;#
1148 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1149 0000 TMR1L equ 0FCEh ;#
1150 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1151 0000 TMR1H equ 0FCFh ;#
1152 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1153 0000 RCON equ 0FD0h ;#
1154 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1155 0000 CM2CON equ 0FD1h ;#
1156 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1157 0000 CM2CON1 equ 0FD1h ;#
1158 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1159 0000 CM1CON equ 0FD2h ;#
1160 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1161 0000 CM1CON1 equ 0FD2h ;#
1162 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1163 0000 OSCCON equ 0FD3h ;#
1164 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1165 0000 T0CON equ 0FD5h ;#
1166 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1167 0000 TMR0 equ 0FD6h ;#
1168 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1169 0000 TMR0L equ 0FD6h ;#
1170 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1171 0000 TMR0H equ 0FD7h ;#
1172 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1173 0000 STATUS equ 0FD8h ;#
1174 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1175 0000 FSR2 equ 0FD9h ;#
1176 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1177 0000 FSR2L equ 0FD9h ;#
1178 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1179 0000 FSR2H equ 0FDAh ;#
1180 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1181 0000 PLUSW2 equ 0FDBh ;#
1182 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1183 0000 PREINC2 equ 0FDCh ;#
1184 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1185 0000 POSTDEC2 equ 0FDDh ;#
1186 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1187 0000 POSTINC2 equ 0FDEh ;#
1188 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1189 0000 INDF2 equ 0FDFh ;#
1190 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1191 0000 BSR equ 0FE0h ;#
1192 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1193 0000 FSR1 equ 0FE1h ;#
1194 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1195 0000 FSR1L equ 0FE1h ;#
1196 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1197 0000 FSR1H equ 0FE2h ;#
1198 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1199 0000 PLUSW1 equ 0FE3h ;#
1200 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1201 0000 PREINC1 equ 0FE4h ;#
1202 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1203 0000 POSTDEC1 equ 0FE5h ;#
1204 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1205 0000 POSTINC1 equ 0FE6h ;#
1206 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1207 0000 INDF1 equ 0FE7h ;#
1208 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1209 0000 WREG equ 0FE8h ;#
1210 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1211 0000 FSR0 equ 0FE9h ;#
1212 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1213 0000 FSR0L equ 0FE9h ;#
1214 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1215 0000 FSR0H equ 0FEAh ;#
1216 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1217 0000 PLUSW0 equ 0FEBh ;#
1218 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1219 0000 PREINC0 equ 0FECh ;#
1220 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1221 0000 POSTDEC0 equ 0FEDh ;#
1222 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1223 0000 POSTINC0 equ 0FEEh ;#
1224 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1225 0000 INDF0 equ 0FEFh ;#
1226 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1227 0000 INTCON3 equ 0FF0h ;#
1228 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1229 0000 INTCON2 equ 0FF1h ;#
1230 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1231 0000 INTCON equ 0FF2h ;#
1232 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1233 0000 PROD equ 0FF3h ;#
1234 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1235 0000 PRODL equ 0FF3h ;#
1236 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1237 0000 PRODH equ 0FF4h ;#
1238 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1239 0000 TABLAT equ 0FF5h ;#
1240 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1241 0000 TBLPTR equ 0FF6h ;#
1242 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1243 0000 TBLPTRL equ 0FF6h ;#
1244 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1245 0000 TBLPTRH equ 0FF7h ;#
1246 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1247 0000 TBLPTRU equ 0FF8h ;#
1248 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1249 0000 PCLAT equ 0FF9h ;#
1250 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1251 0000 PC equ 0FF9h ;#
1252 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1253 0000 PCL equ 0FF9h ;#
1254 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1255 0000 PCLATH equ 0FFAh ;#
1256 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1257 0000 PCLATU equ 0FFBh ;#
1258 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1259 0000 STKPTR equ 0FFCh ;#
1260 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1261 0000 TOS equ 0FFDh ;#
1262 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1263 0000 TOSL equ 0FFDh ;#
1264 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1265 0000 TOSH equ 0FFEh ;#
1266 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1267 0000 TOSU equ 0FFFh ;#
1268 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1269
1270 0000 _putch equ 0
1271 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1272
1273 opt pagewidth 120
1274
1275 00102C __pidataCOMRAM:
1276 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1277
1278 opt pagewidth 120
1279
1280 00102C 0DAA dw (_uart_1_data)&0ffffh
1281 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1282
1283 0000 _BAUDCON1bits set 0xF7E
1284 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1285 0000 _PIE1bits set 0xF9D
1286 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1287 0000 _PIR1bits set 0xF9E
1288 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1289 0000 _RCREG1 set 0xFAF
1290 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1291 0000 _RCSTA1bits set 0xFAC
1292 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1293 0000 _SPBRG1 set 0xFB0
1294 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1295 0000 _TRISCbits set 0xF94
1296 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1297 0000 _TXREG set 0xFAE
1298 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1299 0000 _TXREG1 set 0xFAE
1300 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1301 0000 _TXSTA1bits set 0xFAD
1302 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1303 0000 _TXIF set 0x7CF4
1304 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1305
1306 000F00 __psmallconst:
1307 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1308 000F00 __stringdata:
1309 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1310 000F00 STR_1:; BSR set to: 13
1311 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1312 000F00 55 db 85 ;'U'
1313 000F01 41 db 65 ;'A'
1314 000F02 52 db 82 ;'R'
1315 000F03 54 db 84 ;'T'
1316 000F04 31 db 49 ;'1'
1317 000F05 3A db 58 ;':'
1318 000F06 20 db 32
1319 000F07 28 db 40
1320 000F08 45 db 69 ;'E'
1321 000F09 52 db 82 ;'R'
1322 000F0A 52 db 82 ;'R'
1323 000F0B 4F db 79 ;'O'
1324 000F0C 52 db 82 ;'R'
1325 000F0D 29 db 41
1326 000F0E 20 db 32
1327 000F0F 6F db 111 ;'o'
1328 000F10 76 db 118 ;'v'
1329 000F11 65 db 101 ;'e'
1330 000F12 72 db 114 ;'r'
1331 000F13 72 db 114 ;'r'
1332 000F14 75 db 117 ;'u'
1333 000F15 6E db 110 ;'n'
1334 000F16 0D db 13
1335 000F17 0A db 10
1336 000F18 00 db 0
1337 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1338 000F19 __end_of__stringdata:
1339 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1340
1341 0000 __CFG_CFGPLLEN$ON equ 0x0
1342 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1343 0000 __CFG_PLLDIV$3 equ 0x0
1344 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1345 0000 __CFG_WDTEN$OFF equ 0x0
1346 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1347 0000 __CFG_STVREN$OFF equ 0x0
1348 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1349 0000 __CFG_XINST$OFF equ 0x0
1350 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1351 0000 __CFG_CP0$OFF equ 0x0
1352 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1353 0000 __CFG_CLKOEC$OFF equ 0x0
1354 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1355 0000 __CFG_SOSCSEL$LOW equ 0x0
1356 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1357 0000 __CFG_IESO$ON equ 0x0
1358 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1359 0000 __CFG_OSC$HSPLL equ 0x0
1360 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1361 0000 __CFG_FCMEN$OFF equ 0x0
1362 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1363 0000 __CFG_WDTPS$1 equ 0x0
1364 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1365 0000 __CFG_RTCOSC$T1OSCREF equ 0x0
1366 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1367 0000 __CFG_DSBOREN$ON equ 0x0
1368 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1369 0000 __CFG_DSWDTPS$M2 equ 0x0
1370 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1371 0000 __CFG_DSWDTEN$OFF equ 0x0
1372 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1373 0000 __CFG_DSWDTOSC$INTOSCREF equ 0x0
1374 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1375 0000 __CFG_PLLSEL$PLL96 equ 0x0
1376 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1377 0000 __CFG_ADCSEL$BIT12 equ 0x0
1378 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1379 0000 __CFG_MSSP7B_EN$MSK7 equ 0x0
1380 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1381 0000 __CFG_IOL1WAY$OFF equ 0x0
1382 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1383 0000 __CFG_WPCFG$ON equ 0x0
1384 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1385 0000 __CFG_WPEND$PAGE_WPFP equ 0x0
1386 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1387 0000 __CFG_WPDIS$OFF equ 0x0
1388 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1389
1390 opt pagewidth 120
1391
1392 000FFA __pcinit:
1393 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1394 000FFA start_initialization:
1395 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1396
1397 000FFA __initialization:
1398 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1399
1400 00005C __pdataCOMRAM:
1401 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1402 00005C _uart_1_data_p:
1403 00005C ds 2
1404 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1405
1406 000DAA __pbssBIGRAM:
1407 000DAA _uart_1_data:
1408 000DAA ds 256
1409 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1410
1411 opt pagewidth 120
1412 000FFA EE0D F0AA lfsr 0,__pbssBIGRAM
1413 000FFE EE11 F000 lfsr 1,256
1414 001002 clear_0:
1415 001002 6AEE clrf postinc0,c
1416 001004 50E5 movf postdec1,w
1417 001006 50E1 movf fsr1l,w
1418 001008 E1FC bnz clear_0
1419 00100A 50E2 movf fsr1h,w
1420 00100C E1FA bnz clear_0
1421 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1422
1423 opt pagewidth 120
1424 00100E 0E2C movlw low (__pidataCOMRAM)
1425 001010 6EF6 movwf tblptrl
1426 001012 0E10 movlw high(__pidataCOMRAM)
1427 001014 6EF7 movwf tblptrh
1428 001016 0E00 movlw low highword(__pidataCOMRAM)
1429 001018 6EF8 movwf tblptru
1430 00101A 0009 tblrd*+ ;fetch initializer
1431 00101C CFF5 F05C movff tablat, __pdataCOMRAM+0
1432 001020 0009 tblrd*+ ;fetch initializer
1433 001022 CFF5 F05D movff tablat, __pdataCOMRAM+1
1434 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1435
1436 opt pagewidth 120
1437
1438 opt lm
1439 001026 end_of_initialization:
1440 001026 __end_of__initialization:movlb 0
1441 001028 EF8D F007 goto _main ;jump to C main() function
1442 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1443
1444 000D00 __pcstackBANK13:
1445 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1446 000D00 main@buffer13: ; 100 bytes @ 0x0
1447 000D00 ds 100
1448 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1449 000D64 main@buffer16: ; 50 bytes @ 0x64
1450 000D64 ds 50
1451 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1452 000D96 main@buffer18: ; 20 bytes @ 0x96
1453 000D96 ds 20
1454 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1455
1456 000C00 __pcstackBANK12:
1457 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1458 000C00 main@buffer11: ; 255 bytes @ 0x0
1459 000C00 ds 255
1460 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1461
1462 000B00 __pcstackBANK11:
1463 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1464 000B00 main@buffer10: ; 255 bytes @ 0x0
1465 000B00 ds 255
1466 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1467
1468 000A00 __pcstackBANK10:
1469 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1470 000A00 main@buffer9: ; 255 bytes @ 0x0
1471 000A00 ds 255
1472 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1473
1474 000900 __pcstackBANK9:
1475 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1476 000900 main@buffer8: ; 255 bytes @ 0x0
1477 000900 ds 255
1478 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1479
1480 000800 __pcstackBANK8:
1481 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1482 000800 main@buffer7: ; 255 bytes @ 0x0
1483 000800 ds 255
1484 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1485
1486 000700 __pcstackBANK7:
1487 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1488 000700 main@buffer6: ; 255 bytes @ 0x0
1489 000700 ds 255
1490 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1491
1492 000600 __pcstackBANK6:
1493 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1494 000600 main@buffer5: ; 255 bytes @ 0x0
1495 000600 ds 255
1496 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1497
1498 000500 __pcstackBANK5:
1499 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1500 000500 main@buffer4: ; 255 bytes @ 0x0
1501 000500 ds 255
1502 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1503
1504 000400 __pcstackBANK4:
1505 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1506 000400 main@buffer3: ; 255 bytes @ 0x0
1507 000400 ds 255
1508 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1509
1510 000300 __pcstackBANK3:
1511 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1512 000300 main@buffer2: ; 255 bytes @ 0x0
1513 000300 ds 255
1514 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1515
1516 000200 __pcstackBANK2:
1517 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1518 000200 main@buffer1: ; 255 bytes @ 0x0
1519 000200 ds 255
1520 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1521
1522 000100 __pcstackBANK1:
1523 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1524 000100 main@buffer: ; 255 bytes @ 0x0
1525 000100 ds 255
1526 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1527
1528 000060 __pcstackBANK0:
1529 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1530 000060 main@buffer12: ; 100 bytes @ 0x0
1531 000060 ds 100
1532 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1533 0000C4 main@buffer15: ; 50 bytes @ 0x64
1534 0000C4 ds 50
1535 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1536
1537 000001 __pcstackCOMRAM:
1538 000001 ??_main: ; 0 bytes @ 0x0
1539 000001 ?_main: ; 2 bytes @ 0x0
1540 000001 ds 1
1541 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1542 000002 main@buffer14: ; 50 bytes @ 0x1
1543 000002 ds 50
1544 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1545 000034 main@buffer17: ; 40 bytes @ 0x33
1546 000034 ds 40
1547 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1548
1549 opt pagewidth 120
1550
1551 opt lm
1552
1553 processor 18F27J13
1554 porta equ 0F80h
1555 portb equ 0F81h
1556 portc equ 0F82h
1557 portd equ 0F83h
1558 porte equ 0F84h
1559 lata equ 0F89h
1560 latb equ 0F8Ah
1561 latc equ 0F8Bh
1562 latd equ 0F8Ch
1563 late equ 0F8Dh
1564 trisa equ 0F92h
1565 trisb equ 0F93h
1566 trisc equ 0F94h
1567 trisd equ 0F95h
1568 trise equ 0F96h
1569 pie1 equ 0F9Dh
1570 pir1 equ 0F9Eh
1571 ipr1 equ 0F9Fh
1572 pie2 equ 0FA0h
1573 pir2 equ 0FA1h
1574 ipr2 equ 0FA2h
1575 t3con equ 0FB1h
1576 tmr3l equ 0FB2h
1577 tmr3h equ 0FB3h
1578 ccp1con equ 0FBDh
1579 ccpr1l equ 0FBEh
1580 ccpr1h equ 0FBFh
1581 adcon1 equ 0FC1h
1582 adcon0 equ 0FC2h
1583 adresl equ 0FC3h
1584 adresh equ 0FC4h
1585 sspcon2 equ 0FC5h
1586 sspcon1 equ 0FC6h
1587 sspstat equ 0FC7h
1588 sspadd equ 0FC8h
1589 sspbuf equ 0FC9h
1590 t2con equ 0FCAh
1591 pr2 equ 0FCBh
1592 tmr2 equ 0FCCh
1593 t1con equ 0FCDh
1594 tmr1l equ 0FCEh
1595 tmr1h equ 0FCFh
1596 rcon equ 0FD0h
1597 wdtcon equ 0FD1h
1598 lvdcon equ 0FD2h
1599 osccon equ 0FD3h
1600 t0con equ 0FD5h
1601 tmr0l equ 0FD6h
1602 tmr0h equ 0FD7h
1603 status equ 0FD8h
1604 fsr2 equ 0FD9h
1605 fsr2l equ 0FD9h
1606 fsr2h equ 0FDAh
1607 plusw2 equ 0FDBh
1608 preinc2 equ 0FDCh
1609 postdec2 equ 0FDDh
1610 postinc2 equ 0FDEh
1611 indf2 equ 0FDFh
1612 bsr equ 0FE0h
1613 fsr1 equ 0FE1h
1614 fsr1l equ 0FE1h
1615 fsr1h equ 0FE2h
1616 plusw1 equ 0FE3h
1617 preinc1 equ 0FE4h
1618 postdec1 equ 0FE5h
1619 postinc1 equ 0FE6h
1620 indf1 equ 0FE7h
1621 wreg equ 0FE8h
1622 fsr0 equ 0FE9h
1623 fsr0l equ 0FE9h
1624 fsr0h equ 0FEAh
1625 plusw0 equ 0FEBh
1626 preinc0 equ 0FECh
1627 postdec0 equ 0FEDh
1628 postinc0 equ 0FEEh
1629 indf0 equ 0FEFh
1630 intcon3 equ 0FF0h
1631 intcon2 equ 0FF1h
1632 intcon equ 0FF2h
1633 prod equ 0FF3h
1634 prodl equ 0FF3h
1635 prodh equ 0FF4h
1636 tablat equ 0FF5h
1637 tblptr equ 0FF6h
1638 tblptrl equ 0FF6h
1639 tblptrh equ 0FF7h
1640 tblptru equ 0FF8h
1641 pcl equ 0FF9h
1642 pclat equ 0FFAh
1643 pclath equ 0FFAh
1644 pclatu equ 0FFBh
1645 stkptr equ 0FFCh
1646 tosl equ 0FFDh
1647 tosh equ 0FFEh
1648 tosu equ 0FFFh
1649 skipnz macro
1650 btfsc status,2
1651 endm
1652 global __ramtop
1653 global __accesstop
1654 # 46 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1655 ADCTRIG equ 0EB8h ;#
1656 # 101 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1657 PMDIS0 equ 0EB9h ;#
1658 # 106 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1659 PD0 equ 0EB9h ;#
1660 # 406 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1661 PMDIS1 equ 0EBAh ;#
1662 # 411 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1663 PD1 equ 0EBAh ;#
1664 # 619 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1665 PMDIS2 equ 0EBBh ;#
1666 # 624 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1667 PD2 equ 0EBBh ;#
1668 # 828 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1669 PMDIS3 equ 0EBCh ;#
1670 # 833 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1671 PD3 equ 0EBCh ;#
1672 # 1065 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1673 PPSCON equ 0EBFh ;#
1674 # 1084 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1675 RPOR0 equ 0EC0h ;#
1676 # 1090 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1677 RPOR1 equ 0EC1h ;#
1678 # 1096 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1679 RPOR2 equ 0EC2h ;#
1680 # 1102 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1681 RPOR3 equ 0EC3h ;#
1682 # 1108 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1683 RPOR4 equ 0EC4h ;#
1684 # 1114 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1685 RPOR5 equ 0EC5h ;#
1686 # 1120 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1687 RPOR6 equ 0EC6h ;#
1688 # 1126 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1689 RPOR7 equ 0EC7h ;#
1690 # 1132 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1691 RPOR8 equ 0EC8h ;#
1692 # 1138 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1693 RPOR9 equ 0EC9h ;#
1694 # 1144 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1695 RPOR10 equ 0ECAh ;#
1696 # 1150 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1697 RPOR11 equ 0ECBh ;#
1698 # 1156 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1699 RPOR12 equ 0ECCh ;#
1700 # 1162 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1701 RPOR13 equ 0ECDh ;#
1702 # 1168 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1703 RPOR14 equ 0ECEh ;#
1704 # 1174 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1705 RPOR15 equ 0ECFh ;#
1706 # 1180 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1707 RPOR16 equ 0ED0h ;#
1708 # 1186 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1709 RPOR17 equ 0ED1h ;#
1710 # 1192 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1711 RPOR18 equ 0ED2h ;#
1712 # 1198 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1713 RPINR1 equ 0EE1h ;#
1714 # 1204 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1715 RPINR2 equ 0EE2h ;#
1716 # 1210 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1717 RPINR3 equ 0EE3h ;#
1718 # 1216 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1719 RPINR4 equ 0EE4h ;#
1720 # 1222 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1721 RPINR6 equ 0EE6h ;#
1722 # 1228 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1723 RPINR15 equ 0EE7h ;#
1724 # 1234 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1725 RPINR7 equ 0EE8h ;#
1726 # 1240 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1727 RPINR8 equ 0EE9h ;#
1728 # 1246 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1729 RPINR9 equ 0EEAh ;#
1730 # 1252 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1731 RPINR12 equ 0EF2h ;#
1732 # 1258 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1733 RPINR13 equ 0EF3h ;#
1734 # 1264 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1735 RPINR14 equ 0EF4h ;#
1736 # 1270 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1737 RPINR16 equ 0EF7h ;#
1738 # 1276 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1739 RPINR17 equ 0EF8h ;#
1740 # 1282 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1741 RPINR21 equ 0EFCh ;#
1742 # 1288 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1743 RPINR22 equ 0EFDh ;#
1744 # 1294 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1745 RPINR23 equ 0EFEh ;#
1746 # 1300 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1747 RPINR24 equ 0EFFh ;#
1748 # 1306 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1749 CCP10CON equ 0F00h ;#
1750 # 1369 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1751 CCPR10L equ 0F01h ;#
1752 # 1388 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1753 CCPR10H equ 0F02h ;#
1754 # 1407 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1755 CCP9CON equ 0F03h ;#
1756 # 1470 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1757 CCPR9L equ 0F04h ;#
1758 # 1489 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1759 CCPR9H equ 0F05h ;#
1760 # 1508 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1761 CCP8CON equ 0F06h ;#
1762 # 1571 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1763 CCPR8L equ 0F07h ;#
1764 # 1590 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1765 CCPR8H equ 0F08h ;#
1766 # 1609 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1767 CCP7CON equ 0F09h ;#
1768 # 1672 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1769 CCPR7L equ 0F0Ah ;#
1770 # 1691 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1771 CCPR7H equ 0F0Bh ;#
1772 # 1710 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1773 CCP6CON equ 0F0Ch ;#
1774 # 1773 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1775 CCPR6L equ 0F0Dh ;#
1776 # 1792 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1777 CCPR6H equ 0F0Eh ;#
1778 # 1811 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1779 CCP5CON equ 0F0Fh ;#
1780 # 1874 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1781 CCPR5L equ 0F10h ;#
1782 # 1893 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1783 CCPR5H equ 0F11h ;#
1784 # 1912 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1785 CCP4CON equ 0F12h ;#
1786 # 1975 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1787 CCPR4L equ 0F13h ;#
1788 # 1994 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1789 CCPR4H equ 0F14h ;#
1790 # 2013 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1791 CCP3CON equ 0F15h ;#
1792 # 2094 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1793 CCPR3L equ 0F16h ;#
1794 # 2113 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1795 CCPR3H equ 0F17h ;#
1796 # 2132 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1797 ECCP3DEL equ 0F18h ;#
1798 # 2201 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1799 ECCP3AS equ 0F19h ;#
1800 # 2282 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h"
1801 PSTR3CON equ 0F1Ah ;#
1802 000F1A __ptext0:
1803 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1804
1805 opt pagewidth 120
1806
1807 0000 __size_of_main equ __end_of_main-_main
1808 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1809 000F1A _main:; BSR set to: 13
1810 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1811
1812 opt pagewidth 120
1813
1814 000F1A l823:
1815 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1816
1817 opt pagewidth 120
1818
1819 opt lm
1820
1821 processor 18F27J13
1822 porta equ 0F80h
1823 portb equ 0F81h
1824 portc equ 0F82h
1825 portd equ 0F83h
1826 porte equ 0F84h
1827 lata equ 0F89h
1828 latb equ 0F8Ah
1829 latc equ 0F8Bh
1830 latd equ 0F8Ch
1831 000F1A 6E01 movwf (??_main+0+0)&0ffh,c
1832 000F1C 0E01 movlw low(01h)
1833 000F1E 0101 movlb 1 ; () banked
1834 000F20 0101 movlb 1 ; () banked
1835 000F22 6F00 movwf ((main@buffer))&0ffh
1836 000F24 5001 movf (??_main+0+0)&0ffh,c,w
1837 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1838
1839 000F26 6E01 movwf (??_main+0+0)&0ffh,c
1840 000F28 0E01 movlw low(01h)
1841 000F2A 0102 movlb 2 ; () banked
1842 000F2C 0102 movlb 2 ; () banked
1843 000F2E 6F00 movwf ((main@buffer1))&0ffh
1844 000F30 5001 movf (??_main+0+0)&0ffh,c,w
1845 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1846
1847 000F32 6E01 movwf (??_main+0+0)&0ffh,c
1848 000F34 0E01 movlw low(01h)
1849 000F36 0103 movlb 3 ; () banked
1850 000F38 0103 movlb 3 ; () banked
1851 000F3A 6F00 movwf ((main@buffer2))&0ffh
1852 000F3C 5001 movf (??_main+0+0)&0ffh,c,w
1853 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1854
1855 000F3E 6E01 movwf (??_main+0+0)&0ffh,c
1856 000F40 0E01 movlw low(01h)
1857 000F42 0104 movlb 4 ; () banked
1858 000F44 0104 movlb 4 ; () banked
1859 000F46 6F00 movwf ((main@buffer3))&0ffh
1860 000F48 5001 movf (??_main+0+0)&0ffh,c,w
1861 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1862
1863 000F4A 6E01 movwf (??_main+0+0)&0ffh,c
1864 000F4C 0E01 movlw low(01h)
1865 000F4E 0105 movlb 5 ; () banked
1866 000F50 0105 movlb 5 ; () banked
1867 000F52 6F00 movwf ((main@buffer4))&0ffh
1868 000F54 5001 movf (??_main+0+0)&0ffh,c,w
1869 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1870
1871 000F56 6E01 movwf (??_main+0+0)&0ffh,c
1872 000F58 0E01 movlw low(01h)
1873 000F5A 0106 movlb 6 ; () banked
1874 000F5C 0106 movlb 6 ; () banked
1875 000F5E 6F00 movwf ((main@buffer5))&0ffh
1876 000F60 5001 movf (??_main+0+0)&0ffh,c,w
1877 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1878
1879 000F62 6E01 movwf (??_main+0+0)&0ffh,c
1880 000F64 0E01 movlw low(01h)
1881 000F66 0107 movlb 7 ; () banked
1882 000F68 0107 movlb 7 ; () banked
1883 000F6A 6F00 movwf ((main@buffer6))&0ffh
1884 000F6C 5001 movf (??_main+0+0)&0ffh,c,w
1885 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1886
1887 000F6E 6E01 movwf (??_main+0+0)&0ffh,c
1888 000F70 0E01 movlw low(01h)
1889 000F72 0108 movlb 8 ; () banked
1890 000F74 0108 movlb 8 ; () banked
1891 000F76 6F00 movwf ((main@buffer7))&0ffh
1892 000F78 5001 movf (??_main+0+0)&0ffh,c,w
1893 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1894
1895 000F7A 6E01 movwf (??_main+0+0)&0ffh,c
1896 000F7C 0E01 movlw low(01h)
1897 000F7E 0109 movlb 9 ; () banked
1898 000F80 0109 movlb 9 ; () banked
1899 000F82 6F00 movwf ((main@buffer8))&0ffh
1900 000F84 5001 movf (??_main+0+0)&0ffh,c,w
1901 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1902
1903 000F86 6E01 movwf (??_main+0+0)&0ffh,c
1904 000F88 0E01 movlw low(01h)
1905 000F8A 010A movlb 10 ; () banked
1906 000F8C 010A movlb 10 ; () banked
1907 000F8E 6F00 movwf ((main@buffer9))&0ffh
1908 000F90 5001 movf (??_main+0+0)&0ffh,c,w
1909 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1910
1911 000F92 6E01 movwf (??_main+0+0)&0ffh,c
1912 000F94 0E01 movlw low(01h)
1913 000F96 010B movlb 11 ; () banked
1914 000F98 010B movlb 11 ; () banked
1915 000F9A 6F00 movwf ((main@buffer10))&0ffh
1916 000F9C 5001 movf (??_main+0+0)&0ffh,c,w
1917 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1918
1919 000F9E 6E01 movwf (??_main+0+0)&0ffh,c
1920 000FA0 0E01 movlw low(01h)
1921 000FA2 010C movlb 12 ; () banked
1922 000FA4 010C movlb 12 ; () banked
1923 000FA6 6F00 movwf ((main@buffer11))&0ffh
1924 000FA8 5001 movf (??_main+0+0)&0ffh,c,w
1925 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1926
1927 000FAA 6E01 movwf (??_main+0+0)&0ffh,c
1928 000FAC 0E01 movlw low(01h)
1929 000FAE 0100 movlb 0 ; () banked
1930 000FB0 0100 movlb 0 ; () banked
1931 000FB2 6F60 movwf ((main@buffer12))&0ffh
1932 000FB4 5001 movf (??_main+0+0)&0ffh,c,w
1933 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1934
1935 000FB6 6E01 movwf (??_main+0+0)&0ffh,c
1936 000FB8 0E01 movlw low(01h)
1937 000FBA 010D movlb 13 ; () banked
1938 000FBC 010D movlb 13 ; () banked
1939 000FBE 6F00 movwf ((main@buffer13))&0ffh
1940 000FC0 5001 movf (??_main+0+0)&0ffh,c,w
1941 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1942
1943 000FC2 6E01 movwf (??_main+0+0)&0ffh,c
1944 000FC4 0E01 movlw low(01h)
1945 000FC6 6E02 movwf ((c:main@buffer14)),c
1946 000FC8 5001 movf (??_main+0+0)&0ffh,c,w
1947 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1948
1949 000FCA 6E01 movwf (??_main+0+0)&0ffh,c
1950 000FCC 0E01 movlw low(01h)
1951 000FCE 0100 movlb 0 ; () banked
1952 000FD0 0100 movlb 0 ; () banked
1953 000FD2 6FC4 movwf ((main@buffer15))&0ffh
1954 000FD4 5001 movf (??_main+0+0)&0ffh,c,w
1955 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1956
1957 000FD6 6E01 movwf (??_main+0+0)&0ffh,c
1958 000FD8 0E01 movlw low(01h)
1959 000FDA 010D movlb 13 ; () banked
1960 000FDC 010D movlb 13 ; () banked
1961 000FDE 6F64 movwf ((main@buffer16))&0ffh
1962 000FE0 5001 movf (??_main+0+0)&0ffh,c,w
1963 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1964
1965 000FE2 6E01 movwf (??_main+0+0)&0ffh,c
1966 000FE4 0E01 movlw low(01h)
1967 000FE6 6E34 movwf ((c:main@buffer17)),c
1968 000FE8 5001 movf (??_main+0+0)&0ffh,c,w
1969 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1970
1971 000FEA 6E01 movwf (??_main+0+0)&0ffh,c
1972 000FEC 0E01 movlw low(01h)
1973 000FEE 010D movlb 13 ; () banked
1974 000FF0 010D movlb 13 ; () banked
1975 000FF2 6F96 movwf ((main@buffer18))&0ffh
1976 000FF4 5001 movf (??_main+0+0)&0ffh,c,w
1977 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1978
1979 000FF6 l7:; BSR set to: 13
1980 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1981
1982 000FF6 EF00 F000 goto start
1983 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1984
1985 000FFA __end_of_main:
1986 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1987
1988 000F19 00 db 0 ; dummy byte at the end
1989 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1990
1991 opt pagewidth 120
1992 0000 __activetblptr EQU 3
1993 opt subtitle "HI-TECH Software Omniscient Code Generator (Lite mode) build 49521"
1994
1995 opt pagewidth 120
1996
1997 opt lm
1998
1999 0000 __Lparam EQU __Lrparam
2000 0000 __Hparam EQU __Hrparam
Data Sizes:
Strings 25
Constant 0
Data 2
BSS 256
Persistent 0
Stack 0
Auto Spaces:
Space Size Autos Used
COMRAM 95 91 93
BANK0 160 150 150
BANK1 256 255 255
BANK2 256 255 255
BANK3 256 255 255
BANK4 256 255 255
BANK5 256 255 255
BANK6 256 255 255
BANK7 256 255 255
BANK8 256 255 255
BANK9 256 255 255
BANK10 256 255 255
BANK11 256 255 255
BANK12 256 255 255
BANK13 256 170 170
BANK14 176 0 0
Pointer List with Targets:
pb.func PTR FTN(unsigned char ,)void size(3) Largest target is 0
-> putch(),
pb.ptr PTR unsigned char size(2) Largest target is 0
-> NULL(NULL[0]),
S517__prbuf$func PTR FTN(unsigned char ,)void size(3) Largest target is 0
-> putch(),
_doprnt@pb.func PTR FTN(unsigned char ,)void size(3) Largest target is 0
-> putch(),
S517__prbuf$ptr PTR unsigned char size(2) Largest target is 0
-> NULL(NULL[0]),
_doprnt@pb.ptr PTR unsigned char size(2) Largest target is 0
-> NULL(NULL[0]),
S531$_cp PTR const unsigned char size(2) Largest target is 0
_val._str._cp PTR const unsigned char size(2) Largest target is 0
uart_1_data_p PTR struct __UART_DATA size(2) Largest target is 256
-> uart_1_data(BIGRAM[256]),
Critical Paths under _main in COMRAM
None.
Critical Paths under _main in BANK0
None.
Critical Paths under _main in BANK1
None.
Critical Paths under _main in BANK2
None.
Critical Paths under _main in BANK3
None.
Critical Paths under _main in BANK4
None.
Critical Paths under _main in BANK5
None.
Critical Paths under _main in BANK6
None.
Critical Paths under _main in BANK7
None.
Critical Paths under _main in BANK8
None.
Critical Paths under _main in BANK9
None.
Critical Paths under _main in BANK10
None.
Critical Paths under _main in BANK11
None.
Critical Paths under _main in BANK12
None.
Critical Paths under _main in BANK13
None.
Critical Paths under _main in BANK14
None.
Call Graph Tables:
---------------------------------------------------------------------------------
(Depth) Function Calls Base Space Used Autos Params Refs
---------------------------------------------------------------------------------
(0) _main 3471 3471 0 19
0 COMRAM 91 91 0
0 BANK0 150 150 0
0 BANK1 255 255 0
0 BANK2 255 255 0
0 BANK3 255 255 0
0 BANK4 255 255 0
0 BANK5 255 255 0
0 BANK6 255 255 0
0 BANK7 255 255 0
0 BANK8 255 255 0
0 BANK9 255 255 0
0 BANK10 255 255 0
0 BANK11 255 255 0
0 BANK12 255 255 0
0 BANK13 170 170 0
---------------------------------------------------------------------------------
Estimated maximum stack depth 0
---------------------------------------------------------------------------------
Call Graph Graphs:
_main (ROOT)
Address spaces:
Name Size Autos Total Cost Usage
BIGRAM EAF 0 100 35 6.8%
BITBANK13 100 0 0 31 0.0%
BANK13 100 AA AA 32 66.4%
BITBANK12 100 0 0 29 0.0%
BANK12 100 FF FF 30 99.6%
BITBANK11 100 0 0 27 0.0%
BANK11 100 FF FF 28 99.6%
BITBANK10 100 0 0 25 0.0%
BANK10 100 FF FF 26 99.6%
BITBANK9 100 0 0 23 0.0%
BANK9 100 FF FF 24 99.6%
BITBANK8 100 0 0 21 0.0%
BANK8 100 FF FF 22 99.6%
BITBANK7 100 0 0 19 0.0%
BANK7 100 FF FF 20 99.6%
BITBANK6 100 0 0 17 0.0%
BANK6 100 FF FF 18 99.6%
BITBANK5 100 0 0 15 0.0%
BANK5 100 FF FF 16 99.6%
BITBANK4 100 0 0 13 0.0%
BANK4 100 FF FF 14 99.6%
BITBANK3 100 0 0 11 0.0%
BANK3 100 FF FF 12 99.6%
BITBANK2 100 0 0 9 0.0%
BANK2 100 FF FF 10 99.6%
BITBANK1 100 0 0 7 0.0%
BANK1 100 FF FF 8 99.6%
BITBANK14 B0 0 0 33 0.0%
BANK14 B0 0 0 34 0.0%
BITBANK0 A0 0 0 4 0.0%
BANK0 A0 96 96 5 93.8%
BITCOMRAM 5F 0 0 0 0.0%
COMRAM 5F 5B 5D 1 97.9%
BITSFR_2 0 0 0 40 0.0%
SFR_2 0 0 0 40 0.0%
BITSFR_1 0 0 0 40 0.0%
SFR_1 0 0 0 40 0.0%
BITSFR 0 0 0 40 0.0%
SFR 0 0 0 40 0.0%
STACK 0 0 0 2 0.0%
NULL 0 0 0 0 0.0%
ABS 0 0 D91 6 0.0%
DATA 0 0 E91 3 0.0%
CODE 0 0 0 0 0.0%
Microchip Technology PIC18 Macro Assembler V1.12 build 49521
Symbol Table Sat Dec 22 19:09:30 2012
l7 0FF6 __CFG_CP0$OFF 000000 l823 0F1A
_TXSTA1bits 000FAD __CFG_IESO$ON 000000 main@buffer1 0200
main@buffer2 0300 main@buffer3 0400 main@buffer4 0500
main@buffer5 0600 main@buffer6 0700 main@buffer7 0800
main@buffer8 0900 main@buffer9 0A00 STR_1 0F00
__CFG_WDTPS$1 000000 _TXIF 007CF4 _main 0F1A
fsr1h 000FE2 fsr1l 000FE1 start 0000
__CFG_PLLDIV$3 000000 main@buffer10 0B00 main@buffer11 0C00
main@buffer12 0060 main@buffer13 0D00 main@buffer14 0002
main@buffer15 00C4 main@buffer16 0D64 main@buffer17 0034
main@buffer18 0D96 _BAUDCON1bits 000F7E ?_main 0001
__CFG_WPCFG$ON 000000 _TXREG 000FAE __CFG_FCMEN$OFF 000000
_putch 000000 tablat 000FF5 __CFG_DSWDTOSC$INTOSCREF 000000
__initialization 0FFA __end_of_main 0FFA __CFG_OSC$HSPLL 000000
??_main 0001 __activetblptr 000003 __CFG_WDTEN$OFF 000000
_RCREG1 000FAF _SPBRG1 000FB0 _TXREG1 000FAE
__CFG_WPDIS$OFF 000000 __CFG_XINST$OFF 000000 clear_0 1002
__CFG_CLKOEC$OFF 000000 __pdataCOMRAM 005C __mediumconst 0000
tblptrh 000FF7 tblptrl 000FF6 tblptru 000FF8
__CFG_DSBOREN$ON 000000 __accesstop 0060 __end_of__initialization 1026
__pcstackBANK10 0A00 __pcstackBANK11 0B00 __pcstackBANK12 0C00
__pcstackBANK13 0D00 __CFG_WPEND$PAGE_WPFP 000000 __pcstackCOMRAM 0001
__CFG_DSWDTPS$M2 000000 __CFG_PLLSEL$PLL96 000000 __CFG_CFGPLLEN$ON 000000
__Hparam 0000 __Lparam 0000 __psmallconst 0F00
__CFG_STVREN$OFF 000000 __pcinit 0FFA __ramtop 0F00
__ptext0 0F1A end_of_initialization 1026 postdec1 000FE5
postinc0 000FEE _TRISCbits 000F94 main@buffer 0100
__CFG_IOL1WAY$OFF 000000 __CFG_MSSP7B_EN$MSK7 000000 __pidataCOMRAM 102C
__CFG_DSWDTEN$OFF 000000 start_initialization 0FFA __CFG_ADCSEL$BIT12 000000
__pbssBIGRAM 0DAA __pcstackBANK0 0060 __pcstackBANK1 0100
__pcstackBANK2 0200 __pcstackBANK3 0300 __pcstackBANK4 0400
__pcstackBANK5 0500 __pcstackBANK6 0600 __pcstackBANK7 0700
__pcstackBANK8 0800 __pcstackBANK9 0900 __end_of__stringdata 0F19
__smallconst 0F00 _uart_1_data_p 005C __CFG_RTCOSC$T1OSCREF 000000
_PIE1bits 000F9D _PIR1bits 000F9E __stringdata 0F00
__CFG_SOSCSEL$LOW 000000 __Hrparam 0000 __Lrparam 0000
__size_of_main 00E0 _uart_1_data 0DAA _RCSTA1bits 000FAC

/PIC Stuff/PICX_27J13/dist/default/production/PICX_27J13.X.production.map
0,0 → 1,549
Microchip MPLAB XC8 Compiler V1.12 ()
Linker command line:
--edf=C:\Program Files (x86)\Microchip\xc8\v1.12\dat\en_msgs.txt -cs \
-h+dist/default/production\PICX_27J13.X.production.sym -z -Q18F27J13 \
-ol.obj -Mdist/default/production/PICX_27J13.X.production.map -E1 \
-ver=XC8 -ACODE=00h-01FFF7h -ACONST=00h-01FFF7h \
-ASMALLCONST=0F00h-0FFFhx496,01FF00h-01FFF7h \
-AMEDIUMCONST=0F00h-0FFFFh,010F00h-01FFF7h -ACOMRAM=01h-05Fh \
-AABS1=00h-0EAFh -ABIGRAM=01h-0EAFh \
-ARAM=060h-0FFh,0100h-01FFhx13,0E00h-0EAFh -ABANK0=060h-0FFh \
-ABANK1=0100h-01FFh -ABANK2=0200h-02FFh -ABANK3=0300h-03FFh \
-ABANK4=0400h-04FFh -ABANK5=0500h-05FFh -ABANK6=0600h-06FFh \
-ABANK7=0700h-07FFh -ABANK8=0800h-08FFh -ABANK9=0900h-09FFh \
-ABANK10=0A00h-0AFFh -ABANK11=0B00h-0BFFh -ABANK12=0C00h-0CFFh \
-ABANK13=0D00h-0DFFh -ABANK14=0E00h-0EAFh \
-ASFR=0EB0h-0EFFh,0F00h-0F5Fh,0F60h-0FFFh \
-preset_vec=00h,intcode,intcodelo,powerup,init,end_init -pramtop=0F00h \
-psmallconst=SMALLCONST -pmediumconst=MEDIUMCONST -pconst=CONST \
-AFARRAM=00h-00h -ACONFIG=01FFF8h-01FFFFh -pconfig=CONFIG \
-pjflash_buffer=01F800h \
-prdata=COMRAM,nvrram=COMRAM,nvbit=COMRAM,rbss=COMRAM,rbit=COMRAM \
-pfarbss=FARRAM,fardata=FARRAM \
-pintsave_regs=BIGRAM,bigbss=BIGRAM,bigdata=BIGRAM -pbss=RAM \
-pidata=CODE,irdata=CODE,ibigdata=CODE,ifardata=CODE \
C:\Users\Kevin\AppData\Local\Temp\s4fo.obj \
dist/default/production\PICX_27J13.X.production.obj
Object code version is 3.10
Machine type is 18F27J13
Call graph: (short form)
Name Link Load Length Selector Space Scale
C:\Users\Kevin\AppData\Local\Temp\s4fo.obj
end_init 0 0 4 0 0
config 1FFF8 1FFF8 8 1FFF8 0
dist/default/production\PICX_27J13.X.production.obj
smallconst F00 F00 1A 780 0
text0 F1A F1A E0 78D 0
cstackCOMRAM 1 1 5B 1 1
cstackBANK0 60 60 96 60 1
cstackBANK1 100 100 FF 100 1
cstackBANK2 200 200 FF 200 1
cstackBANK3 300 300 FF 300 1
cstackBANK4 400 400 FF 400 1
cstackBANK5 500 500 FF 500 1
cstackBANK6 600 600 FF 600 1
cstackBANK7 700 700 FF 700 1
cstackBANK8 800 800 FF 800 1
cstackBANK9 900 900 FF 900 1
cstackBANK10 A00 A00 FF A00 1
cstackBANK11 B00 B00 FF B00 1
cstackBANK12 C00 C00 FF C00 1
cstackBANK13 D00 D00 AA D00 1
bssBIGRAM DAA DAA 100 DAA 1
dataCOMRAM 5C 5C 2 1 1
cinit FFA FFA 32 78D 0
idataCOMRAM 102C 102C 2 78D 0
TOTAL Name Link Load Length Space
CLASS CODE
end_init 0 0 4 0
text0 F1A F1A E0 0
cinit FFA FFA 32 0
idataCOMRAM 102C 102C 2 0
CLASS CONST
CLASS SMALLCONST
smallconst F00 F00 1A 0
CLASS MEDIUMCONST
CLASS COMRAM
cstackCOMRAM 1 1 5B 1
dataCOMRAM 5C 5C 2 1
CLASS ABS1
CLASS BIGRAM
bssBIGRAM DAA DAA 100 1
CLASS RAM
CLASS BANK0
cstackBANK0 60 60 96 1
CLASS BANK1
cstackBANK1 100 100 FF 1
CLASS BANK2
cstackBANK2 200 200 FF 1
CLASS BANK3
cstackBANK3 300 300 FF 1
CLASS BANK4
cstackBANK4 400 400 FF 1
CLASS BANK5
cstackBANK5 500 500 FF 1
CLASS BANK6
cstackBANK6 600 600 FF 1
CLASS BANK7
cstackBANK7 700 700 FF 1
CLASS BANK8
cstackBANK8 800 800 FF 1
CLASS BANK9
cstackBANK9 900 900 FF 1
CLASS BANK10
cstackBANK10 A00 A00 FF 1
CLASS BANK11
cstackBANK11 B00 B00 FF 1
CLASS BANK12
cstackBANK12 C00 C00 FF 1
CLASS BANK13
cstackBANK13 D00 D00 AA 1
CLASS BANK14
CLASS SFR
CLASS FARRAM
CLASS CONFIG
config 1FFF8 1FFF8 8 0
CLASS IDLOC
SEGMENTS Name Load Length Top Selector Space Class
reset_vec 000000 000004 000004 0 0 CODE
cstackCOMRAM 000001 00005D 00005E 1 1 COMRAM
cstackBANK0 000060 000096 0000F6 60 1 BANK0
cstackBANK1 000100 0000FF 0001FF 100 1 BANK1
cstackBANK2 000200 0000FF 0002FF 200 1 BANK2
cstackBANK3 000300 0000FF 0003FF 300 1 BANK3
cstackBANK4 000400 0000FF 0004FF 400 1 BANK4
cstackBANK5 000500 0000FF 0005FF 500 1 BANK5
cstackBANK6 000600 0000FF 0006FF 600 1 BANK6
cstackBANK7 000700 0000FF 0007FF 700 1 BANK7
cstackBANK8 000800 0000FF 0008FF 800 1 BANK8
cstackBANK9 000900 0000FF 0009FF 900 1 BANK9
cstackBANK10 000A00 0000FF 000AFF A00 1 BANK10
cstackBANK11 000B00 0000FF 000BFF B00 1 BANK11
cstackBANK12 000C00 0000FF 000CFF C00 1 BANK12
cstackBANK13 000D00 0000AA 000DAA D00 1 BANK13
bssBIGRAM 000DAA 000100 000EAA DAA 1 BIGRAM
smallconst 000F00 00001A 000F1A 780 0 SMALLCON
text0 000F1A 000114 00102E 78D 0 CODE
config 01FFF8 000008 020000 1FFF8 0 CONFIG
UNUSED ADDRESS RANGES
Name Unused Largest block Delta
BANK0 000F6-000FF A
BANK1 001FF-001FF 1
BANK10 00AFF-00AFF 1
BANK11 00BFF-00BFF 1
BANK12 00CFF-00CFF 1
BANK14 00EAA-00EAF 6
BANK2 002FF-002FF 1
BANK3 003FF-003FF 1
BANK4 004FF-004FF 1
BANK5 005FF-005FF 1
BANK6 006FF-006FF 1
BANK7 007FF-007FF 1
BANK8 008FF-008FF 1
BANK9 009FF-009FF 1
BIGRAM 0005E-0005F 2
000F6-000FF A
001FF-001FF 1
002FF-002FF 1
003FF-003FF 1
004FF-004FF 1
005FF-005FF 1
006FF-006FF 1
007FF-007FF 1
008FF-008FF 1
009FF-009FF 1
00AFF-00AFF 1
00BFF-00BFF 1
00CFF-00CFF 1
00EAA-00EAF 6
CODE 00004-00EFF EFC
0102E-1FFF7 1EFCA
COMRAM 0005E-0005F 2
CONST 00004-00EFF EFC
0102E-1FFF7 1EFCA
MEDIUMCONST 0102E-0FFFF EFD2
10F00-1FFF7 F0F8
RAM 000F6-000FF A
001FF-001FF 1
002FF-002FF 1
003FF-003FF 1
004FF-004FF 1
005FF-005FF 1
006FF-006FF 1
007FF-007FF 1
008FF-008FF 1
009FF-009FF 1
00AFF-00AFF 1
00BFF-00BFF 1
00CFF-00CFF 1
00EAA-00EAF 6
SFR 00EB0-00FFF 60
SMALLCONST 0102E-1FFF7 100
Symbol Table
_BAUDCON1bits (abs) 00F7E
_PIE1bits (abs) 00F9D
_PIR1bits (abs) 00F9E
_RCREG1 (abs) 00FAF
_RCSTA1bits (abs) 00FAC
_SPBRG1 (abs) 00FB0
_TRISCbits (abs) 00F94
_TXIF (abs) 07CF4
_TXREG (abs) 00FAE
_TXREG1 (abs) 00FAE
_TXSTA1bits (abs) 00FAD
__CFG_ADCSEL$BIT12 (abs) 00000
__CFG_CFGPLLEN$ON (abs) 00000
__CFG_CLKOEC$OFF (abs) 00000
__CFG_CP0$OFF (abs) 00000
__CFG_DSBOREN$ON (abs) 00000
__CFG_DSWDTEN$OFF (abs) 00000
__CFG_DSWDTOSC$INTOSCREF (abs) 00000
__CFG_DSWDTPS$M2 (abs) 00000
__CFG_FCMEN$OFF (abs) 00000
__CFG_IESO$ON (abs) 00000
__CFG_IOL1WAY$OFF (abs) 00000
__CFG_MSSP7B_EN$MSK7 (abs) 00000
__CFG_OSC$HSPLL (abs) 00000
__CFG_PLLDIV$3 (abs) 00000
__CFG_PLLSEL$PLL96 (abs) 00000
__CFG_RTCOSC$T1OSCREF (abs) 00000
__CFG_SOSCSEL$LOW (abs) 00000
__CFG_STVREN$OFF (abs) 00000
__CFG_WDTEN$OFF (abs) 00000
__CFG_WDTPS$1 (abs) 00000
__CFG_WPCFG$ON (abs) 00000
__CFG_WPDIS$OFF (abs) 00000
__CFG_WPEND$PAGE_WPFP (abs) 00000
__CFG_XINST$OFF (abs) 00000
__HRAM (abs) 00000
__Habs1 abs1 00000
__Hbank0 bank0 00000
__Hbank1 bank1 00000
__Hbank10 bank10 00000
__Hbank11 bank11 00000
__Hbank12 bank12 00000
__Hbank13 bank13 00000
__Hbank14 bank14 00000
__Hbank2 bank2 00000
__Hbank3 bank3 00000
__Hbank4 bank4 00000
__Hbank5 bank5 00000
__Hbank6 bank6 00000
__Hbank7 bank7 00000
__Hbank8 bank8 00000
__Hbank9 bank9 00000
__Hbigbss bigbss 00000
__Hbigdata bigdata 00000
__Hbigram bigram 00000
__Hbss bss 00000
__HbssBIGRAM bssBIGRAM 00000
__Hcinit cinit 00000
__Hclrtext clrtext 00000
__Hcomram comram 00000
__Hconfig config 20000
__Hconst const 00000
__HcstackBANK0 cstackBANK0 00000
__HcstackBANK1 cstackBANK1 00000
__HcstackBANK10 cstackBANK10 00000
__HcstackBANK11 cstackBANK11 00000
__HcstackBANK12 cstackBANK12 00000
__HcstackBANK13 cstackBANK13 00000
__HcstackBANK2 cstackBANK2 00000
__HcstackBANK3 cstackBANK3 00000
__HcstackBANK4 cstackBANK4 00000
__HcstackBANK5 cstackBANK5 00000
__HcstackBANK6 cstackBANK6 00000
__HcstackBANK7 cstackBANK7 00000
__HcstackBANK8 cstackBANK8 00000
__HcstackBANK9 cstackBANK9 00000
__HcstackCOMRAM cstackCOMRAM 00000
__Hdata data 00000
__HdataCOMRAM dataCOMRAM 00000
__Hend_init end_init 00004
__Hfarbss farbss 00000
__Hfardata fardata 00000
__Hibigdata ibigdata 00000
__Hidata idata 00000
__HidataCOMRAM idataCOMRAM 00000
__Hidloc idloc 00000
__Hifardata ifardata 00000
__Hinit init 00000
__Hintcode intcode 00000
__Hintcode_body intcode_body 00000
__Hintcodelo intcodelo 00000
__Hintentry intentry 00000
__Hintret intret 00000
__Hintsave_regs intsave_regs 00000
__Hirdata irdata 00000
__Hjflash_buffer jflash_buffer 1F800
__Hmediumconst mediumconst 00000
__Hnvbit nvbit 00000
__Hnvrram nvrram 00000
__Hparam rparam 00000
__Hpowerup powerup 00000
__Hram ram 00000
__Hramtop ramtop 00F00
__Hrbit rbit 00000
__Hrbss rbss 00000
__Hrdata rdata 00000
__Hreset_vec reset_vec 00000
__Hrparam rparam 00000
__Hsfr sfr 00000
__Hsmallconst smallconst 00F1A
__Hstruct struct 00000
__Htemp temp 00000
__Htext text 00000
__Htext0 text0 00000
__LRAM (abs) 00001
__Labs1 abs1 00000
__Lbank0 bank0 00000
__Lbank1 bank1 00000
__Lbank10 bank10 00000
__Lbank11 bank11 00000
__Lbank12 bank12 00000
__Lbank13 bank13 00000
__Lbank14 bank14 00000
__Lbank2 bank2 00000
__Lbank3 bank3 00000
__Lbank4 bank4 00000
__Lbank5 bank5 00000
__Lbank6 bank6 00000
__Lbank7 bank7 00000
__Lbank8 bank8 00000
__Lbank9 bank9 00000
__Lbigbss bigbss 00000
__Lbigdata bigdata 00000
__Lbigram bigram 00000
__Lbss bss 00000
__LbssBIGRAM bssBIGRAM 00000
__Lcinit cinit 00000
__Lclrtext clrtext 00000
__Lcomram comram 00000
__Lconfig config 1FFF8
__Lconst const 00000
__LcstackBANK0 cstackBANK0 00000
__LcstackBANK1 cstackBANK1 00000
__LcstackBANK10 cstackBANK10 00000
__LcstackBANK11 cstackBANK11 00000
__LcstackBANK12 cstackBANK12 00000
__LcstackBANK13 cstackBANK13 00000
__LcstackBANK2 cstackBANK2 00000
__LcstackBANK3 cstackBANK3 00000
__LcstackBANK4 cstackBANK4 00000
__LcstackBANK5 cstackBANK5 00000
__LcstackBANK6 cstackBANK6 00000
__LcstackBANK7 cstackBANK7 00000
__LcstackBANK8 cstackBANK8 00000
__LcstackBANK9 cstackBANK9 00000
__LcstackCOMRAM cstackCOMRAM 00000
__Ldata data 00000
__LdataCOMRAM dataCOMRAM 00000
__Lend_init end_init 00000
__Lfarbss farbss 00000
__Lfardata fardata 00000
__Libigdata ibigdata 00000
__Lidata idata 00000
__LidataCOMRAM idataCOMRAM 00000
__Lidloc idloc 00000
__Lifardata ifardata 00000
__Linit init 00000
__Lintcode intcode 00000
__Lintcode_body intcode_body 00000
__Lintcodelo intcodelo 00000
__Lintentry intentry 00000
__Lintret intret 00000
__Lintsave_regs intsave_regs 00000
__Lirdata irdata 00000
__Ljflash_buffer jflash_buffer 1F800
__Lmediumconst mediumconst 00000
__Lnvbit nvbit 00000
__Lnvrram nvrram 00000
__Lparam rparam 00000
__Lpowerup powerup 00000
__Lram ram 00000
__Lramtop ramtop 00F00
__Lrbit rbit 00000
__Lrbss rbss 00000
__Lrdata rdata 00000
__Lreset_vec reset_vec 00000
__Lrparam rparam 00000
__Lsfr sfr 00000
__Lsmallconst smallconst 00F00
__Lstruct struct 00000
__Ltemp temp 00000
__Ltext text 00000
__Ltext0 text0 00000
__S0 (abs) 20000
__S1 (abs) 00EAA
__accesstop (abs) 00060
__activetblptr (abs) 00003
__end_of__initialization cinit 01026
__end_of__stringdata smallconst 00F19
__end_of_main text0 00FFA
__initialization cinit 00FFA
__mediumconst mediumconst 00000
__pbssBIGRAM bssBIGRAM 00DAA
__pcinit cinit 00FFA
__pcstackBANK0 cstackBANK0 00060
__pcstackBANK1 cstackBANK1 00100
__pcstackBANK10 cstackBANK10 00A00
__pcstackBANK11 cstackBANK11 00B00
__pcstackBANK12 cstackBANK12 00C00
__pcstackBANK13 cstackBANK13 00D00
__pcstackBANK2 cstackBANK2 00200
__pcstackBANK3 cstackBANK3 00300
__pcstackBANK4 cstackBANK4 00400
__pcstackBANK5 cstackBANK5 00500
__pcstackBANK6 cstackBANK6 00600
__pcstackBANK7 cstackBANK7 00700
__pcstackBANK8 cstackBANK8 00800
__pcstackBANK9 cstackBANK9 00900
__pcstackCOMRAM cstackCOMRAM 00001
__pdataCOMRAM dataCOMRAM 0005C
__pidataCOMRAM idataCOMRAM 0102C
__psmallconst smallconst 00F00
__ptext0 text0 00F1A
__ramtop ramtop 00F00
__size_of_main (abs) 00000
__smallconst smallconst 00F00
__stringdata smallconst 00F00
_main text0 00F1A
_putch (abs) 00000
_uart_1_data bssBIGRAM 00DAA
_uart_1_data_p dataCOMRAM 0005C
end_of_initialization cinit 01026
intlevel0 text 00000
intlevel1 text 00000
intlevel2 text 00000
intlevel3 text 00000
main@buffer cstackBANK1 00100
main@buffer1 cstackBANK2 00200
main@buffer10 cstackBANK11 00B00
main@buffer11 cstackBANK12 00C00
main@buffer12 cstackBANK0 00060
main@buffer13 cstackBANK13 00D00
main@buffer14 cstackCOMRAM 00002
main@buffer15 cstackBANK0 000C4
main@buffer16 cstackBANK13 00D64
main@buffer17 cstackCOMRAM 00034
main@buffer18 cstackBANK13 00D96
main@buffer2 cstackBANK3 00300
main@buffer3 cstackBANK4 00400
main@buffer4 cstackBANK5 00500
main@buffer5 cstackBANK6 00600
main@buffer6 cstackBANK7 00700
main@buffer7 cstackBANK8 00800
main@buffer8 cstackBANK9 00900
main@buffer9 cstackBANK10 00A00
start init 00000
start_initialization cinit 00FFA
FUNCTION INFORMATION:
*************** function _main *****************
Defined at:
line 95 in file "main.c"
Parameters: Size Location Type
None
Auto vars: Size Location Type
buffer11 255 0[BANK12] unsigned char [255]
buffer10 255 0[BANK11] unsigned char [255]
buffer9 255 0[BANK10] unsigned char [255]
buffer8 255 0[BANK9 ] unsigned char [255]
buffer7 255 0[BANK8 ] unsigned char [255]
buffer6 255 0[BANK7 ] unsigned char [255]
buffer5 255 0[BANK6 ] unsigned char [255]
buffer4 255 0[BANK5 ] unsigned char [255]
buffer3 255 0[BANK4 ] unsigned char [255]
buffer2 255 0[BANK3 ] unsigned char [255]
buffer1 255 0[BANK2 ] unsigned char [255]
buffer 255 0[BANK1 ] unsigned char [255]
buffer13 100 0[BANK13] unsigned char [100]
buffer12 100 0[BANK0 ] unsigned char [100]
buffer16 50 100[BANK13] unsigned char [50]
buffer15 50 100[BANK0 ] unsigned char [50]
buffer14 50 1[COMRAM] unsigned char [50]
buffer17 40 51[COMRAM] unsigned char [40]
buffer18 20 150[BANK13] unsigned char [20]
Return value: Size Location Type
2 6[COMRAM] int
Registers used:
status,2
Tracked objects:
On entry :
On exit :
Unchanged:
Data sizes: COMRAM BANK0 BANK1 BANK2 BANK3 BANK4 BANK5 BANK6 BANK7 BANK8 BANK9 BANK10 BANK11 BANK12 BANK13 BANK14
Params: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Locals: 90 150 255 255 255 255 255 255 255 255 255 255 255 255 170 0
Temps: 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Totals: 91 150 255 255 255 255 255 255 255 255 255 255 255 255 170 0
Total ram usage: 3471 bytes
This function calls:
Nothing
This function is called by:
Startup code after reset
This function uses a non-reentrant model
MODULE INFORMATION
Module Function Class Link Load Size
shared
__stringdata SMALLCONST 0F00 0000 25
__initializatio CODE 0FFA 0000 44
shared estimated size: 69
main.c
_main CODE 0F1A 0000 224
main.c estimated size: 224

/PIC Stuff/PICX_27J13/dist/default/production/PICX_27J13.X.production.obj
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream

/PIC Stuff/PICX_27J13/dist/default/production/PICX_27J13.X.production.obj
Property changes:
Added: svn:mime-type
+application/octet-stream
\ No newline at end of property

/PIC Stuff/PICX_27J13/dist/default/production/PICX_27J13.X.production.rlf
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream

/PIC Stuff/PICX_27J13/dist/default/production/PICX_27J13.X.production.rlf
Property changes:
Added: svn:mime-type
+application/octet-stream
\ No newline at end of property

/PIC Stuff/PICX_27J13/dist/default/production/PICX_27J13.X.production.sdb
0,0 → 1,546
[p LITE_MODE AUTOSTATIC IEEE_DBL LFSROK EMI_WORD IEEE_FLT ]
[d version 1.1 ]
[d edition pro ]
[d chip 18F27J13 ]
"141 main.c
[s S45 __UART_DATA 256 `[125]uc 1 buffer_in 125 0 `uc 1 buffer_in_read_ind 1 125 `uc 1 buffer_in_write_ind 1 126 `uc 1 buffer_in_len 1 127 `uc 1 buffer_in_len_tmp 1 128 `[125]uc 1 buffer_out 125 129 `uc 1 buffer_out_ind 1 254 `uc 1 buffer_out_len 1 255 ]
[s S54 . 1 `uc 1 TRISC0 1 0 :1:0
`uc 1 TRISC1 1 0 :1:1
`uc 1 TRISC2 1 0 :1:2
`uc 1 TRISC3 1 0 :1:3
`uc 1 TRISC4 1 0 :1:4
`uc 1 TRISC5 1 0 :1:5
`uc 1 TRISC6 1 0 :1:6
`uc 1 TRISC7 1 0 :1:7
]
[u S63 . 1 `S54 1 . 1 0 ]
"8078 C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h
[s S75 . 1 `uc 1 ABDEN 1 0 :1:0
`uc 1 WUE 1 0 :1:1
`uc 1 . 1 0 :1:2
`uc 1 BRG16 1 0 :1:3
`uc 1 TXCKP 1 0 :1:4
`uc 1 RXDTP 1 0 :1:5
`uc 1 RCIDL 1 0 :1:6
`uc 1 ABDOVF 1 0 :1:7
]
[s S84 . 1 `uc 1 ABDEN1 1 0 :1:0
]
[s S86 . 1 `uc 1 . 1 0 :7:0
`uc 1 ABDOVF1 1 0 :1:7
]
[s S89 . 1 `uc 1 . 1 0 :3:0
`uc 1 BRG161 1 0 :1:3
]
[s S92 . 1 `uc 1 . 1 0 :4:0
`uc 1 CKTXP 1 0 :1:4
]
[s S95 . 1 `uc 1 . 1 0 :5:0
`uc 1 DTRXP 1 0 :1:5
]
[s S98 . 1 `uc 1 . 1 0 :5:0
`uc 1 DTRXP1 1 0 :1:5
]
[s S101 . 1 `uc 1 . 1 0 :6:0
`uc 1 RCIDL1 1 0 :1:6
]
[s S104 . 1 `uc 1 . 1 0 :6:0
`uc 1 RCMT 1 0 :1:6
]
[s S107 . 1 `uc 1 . 1 0 :6:0
`uc 1 RCMT1 1 0 :1:6
]
[s S110 . 1 `uc 1 . 1 0 :5:0
`uc 1 RXDTP1 1 0 :1:5
]
[s S113 . 1 `uc 1 . 1 0 :4:0
`uc 1 SCKP 1 0 :1:4
]
[s S116 . 1 `uc 1 . 1 0 :4:0
`uc 1 SCKP1 1 0 :1:4
]
[s S119 . 1 `uc 1 . 1 0 :4:0
`uc 1 TXCKP1 1 0 :1:4
]
[s S122 . 1 `uc 1 . 1 0 :1:0
`uc 1 WUE1 1 0 :1:1
]
[s S125 . 1 `uc 1 . 1 0 :5:0
`uc 1 RXCKP 1 0 :1:5
]
[s S128 . 1 `uc 1 . 1 0 :1:0
`uc 1 W4E 1 0 :1:1
]
[u S131 . 1 `S75 1 . 1 0 `S84 1 . 1 0 `S86 1 . 1 0 `S89 1 . 1 0 `S92 1 . 1 0 `S95 1 . 1 0 `S98 1 . 1 0 `S101 1 . 1 0 `S104 1 . 1 0 `S107 1 . 1 0 `S110 1 . 1 0 `S113 1 . 1 0 `S116 1 . 1 0 `S119 1 . 1 0 `S122 1 . 1 0 `S125 1 . 1 0 `S128 1 . 1 0 ]
"10341
[s S207 . 1 `uc 1 TX9D 1 0 :1:0
`uc 1 TRMT 1 0 :1:1
`uc 1 BRGH 1 0 :1:2
`uc 1 SENDB 1 0 :1:3
`uc 1 SYNC 1 0 :1:4
`uc 1 TXEN 1 0 :1:5
`uc 1 TX9 1 0 :1:6
`uc 1 CSRC 1 0 :1:7
]
[s S216 . 1 `uc 1 TXD8 1 0 :1:0
`uc 1 . 1 0 :5:1
`uc 1 TX8_9 1 0 :1:6
]
[s S220 . 1 `uc 1 . 1 0 :6:0
`uc 1 NOT_TX8 1 0 :1:6
]
[s S223 . 1 `uc 1 . 1 0 :6:0
`uc 1 nTX8 1 0 :1:6
]
[s S226 . 1 `uc 1 TX9D1 1 0 :1:0
`uc 1 TRMT1 1 0 :1:1
`uc 1 BRGH1 1 0 :1:2
`uc 1 SENDB1 1 0 :1:3
`uc 1 SYNC1 1 0 :1:4
`uc 1 TXEN1 1 0 :1:5
`uc 1 TX91 1 0 :1:6
`uc 1 CSRC1 1 0 :1:7
]
[u S235 . 1 `S207 1 . 1 0 `S216 1 . 1 0 `S220 1 . 1 0 `S223 1 . 1 0 `S226 1 . 1 0 ]
"10025
[s S270 . 1 `uc 1 RX9D 1 0 :1:0
`uc 1 OERR 1 0 :1:1
`uc 1 FERR 1 0 :1:2
`uc 1 ADDEN 1 0 :1:3
`uc 1 CREN 1 0 :1:4
`uc 1 SREN 1 0 :1:5
`uc 1 RX9 1 0 :1:6
`uc 1 SPEN 1 0 :1:7
]
[s S279 . 1 `uc 1 RCD8 1 0 :1:0
`uc 1 . 1 0 :2:1
`uc 1 ADEN 1 0 :1:3
`uc 1 . 1 0 :2:4
`uc 1 RC9 1 0 :1:6
]
[s S285 . 1 `uc 1 . 1 0 :6:0
`uc 1 NOT_RC8 1 0 :1:6
]
[s S288 . 1 `uc 1 . 1 0 :6:0
`uc 1 nRC8 1 0 :1:6
]
[s S291 . 1 `uc 1 . 1 0 :6:0
`uc 1 RC8_9 1 0 :1:6
]
[s S294 . 1 `uc 1 RX9D1 1 0 :1:0
`uc 1 OERR1 1 0 :1:1
`uc 1 FERR1 1 0 :1:2
`uc 1 ADDEN1 1 0 :1:3
`uc 1 CREN1 1 0 :1:4
`uc 1 SREN1 1 0 :1:5
`uc 1 RX91 1 0 :1:6
`uc 1 SPEN1 1 0 :1:7
]
[s S303 . 1 `uc 1 . 1 0 :5:0
`uc 1 SRENA 1 0 :1:5
]
[u S306 . 1 `S270 1 . 1 0 `S279 1 . 1 0 `S285 1 . 1 0 `S288 1 . 1 0 `S291 1 . 1 0 `S294 1 . 1 0 `S303 1 . 1 0 ]
"9698
[s S351 . 1 `uc 1 TMR1IE 1 0 :1:0
`uc 1 TMR2IE 1 0 :1:1
`uc 1 CCP1IE 1 0 :1:2
`uc 1 SSP1IE 1 0 :1:3
`uc 1 TX1IE 1 0 :1:4
`uc 1 RC1IE 1 0 :1:5
`uc 1 ADIE 1 0 :1:6
]
[s S359 . 1 `uc 1 . 1 0 :3:0
`uc 1 SSPIE 1 0 :1:3
`uc 1 TXIE 1 0 :1:4
`uc 1 RCIE 1 0 :1:5
]
[u S364 . 1 `S351 1 . 1 0 `S359 1 . 1 0 ]
"8668
[s S381 . 1 `uc 1 TMR1IF 1 0 :1:0
`uc 1 TMR2IF 1 0 :1:1
`uc 1 CCP1IF 1 0 :1:2
`uc 1 SSP1IF 1 0 :1:3
`uc 1 TX1IF 1 0 :1:4
`uc 1 RC1IF 1 0 :1:5
`uc 1 ADIF 1 0 :1:6
]
[s S389 . 1 `uc 1 . 1 0 :3:0
`uc 1 SSPIF 1 0 :1:3
`uc 1 TXIF 1 0 :1:4
`uc 1 RCIF 1 0 :1:5
]
[u S394 . 1 `S381 1 . 1 0 `S389 1 . 1 0 ]
"57 C:\Program Files (x86)\Microchip\xc8\v1.12\include\stdio.h
[v F13 `(v 1 t 0 ]
[s S517 __prbuf 6 `*.Muc 1 ptr 3 0 `*.M(v 1 func 3 3 ]
"533 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\doprnt.c
[s S531 . 5 `*.MCuc 1 _cp 3 0 `ui 1 _len 2 3 ]
[u S534 . 5 `ui 1 _val 2 0 `S531 1 _str 5 0 ]
"57 /Volumes/build/bamboo/xml-data/build-dir/XC8-RELEASE-JOB1/nz/build/dist/osx/include/stdio.h
[v stdio@F13 `(v 1 t 0 ]
[s S800 __prbuf 6 `*.Muc 1 ptr 3 0 `*.M(v 1 func 3 3 ]
"5 ../common/asfladd.c
[v ___asfladd `(d 1 e 4 0 ]
"5 ../common/asfldiv.c
[v ___asfldiv `(d 1 e 4 0 ]
"5 ../common/asflmul.c
[v ___asflmul `(d 1 e 4 0 ]
"5 ../common/asflsub.c
[v ___asflsub `(d 1 e 4 0 ]
"5 ../common/asftadd.c
[v ___asftadd `(f 1 e 4 0 ]
"5 ../common/asftdiv.c
[v ___asftdiv `(f 1 e 4 0 ]
"5 ../common/asftmul.c
[v ___asftmul `(f 1 e 4 0 ]
"5 ../common/asftsub.c
[v ___asftsub `(f 1 e 4 0 ]
"5 ../common/aslmul.c
[v ___aslmul `(ul 1 e 4 0 ]
"5 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\abdiv.c
[v ___abdiv `(c 1 e 1 0 ]
"5 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\abmod.c
[v ___abmod `(c 1 e 1 0 ]
"32 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\abtofl.c
[v ___abtofl `(d 1 e 4 0 ]
"34 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\abtoft.c
[v ___abtoft `(f 1 e 4 0 ]
"10 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\aldiv.c
[v ___aldiv `(l 1 e 4 0 ]
"10 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\almod.c
[v ___almod `(l 1 e 4 0 ]
"37 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\altofl.c
[v ___altofl `(d 1 e 4 0 ]
"43 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\altoft.c
[v ___altoft `(f 1 e 4 0 ]
"10 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\atdiv.c
[v ___atdiv `(m 1 e 3 0 ]
"10 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\atmod.c
[v ___atmod `(m 1 e 3 0 ]
"38 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\attofl.c
[v ___attofl `(d 1 e 4 0 ]
"38 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\attoft.c
[v ___attoft `(f 1 e 4 0 ]
"10 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\awdiv.c
[v ___awdiv `(i 1 e 2 0 ]
"10 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\awmod.c
[v ___awmod `(i 1 e 2 0 ]
"32 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\awtofl.c
[v ___awtofl `(d 1 e 4 0 ]
"33 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\awtoft.c
[v ___awtoft `(f 1 e 4 0 ]
"3 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\bmul.c
[v ___bmul `(uc 1 e 1 0 ]
"459 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\doprnt.c
[v __doprnt `(i 1 e 2 0 ]
"64 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\double.c
[v ___flpack `(d 1 e 4 0 ]
"89 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\fladd.c
[v ___fladd `(d 1 e 4 0 ]
"50 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\fldiv.c
[v ___fldiv `(d 1 e 4 0 ]
"5 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\flge.c
[v ___flge `(b 1 e 0 0 ]
"51 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\flmul.c
[v ___flmul `(d 1 e 4 0 ]
"16 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\flneg.c
[v ___flneg `(d 1 e 4 0 ]
"63 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\float.c
[v ___ftpack `(f 1 e 4 0 ]
"22 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\flsub.c
[v ___flsub `(d 1 e 4 0 ]
"44 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\fltol.c
[v ___fltol `(l 1 e 4 0 ]
"87 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\ftadd.c
[v ___ftadd `(f 1 e 4 0 ]
"50 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\ftdiv.c
[v ___ftdiv `(f 1 e 4 0 ]
"5 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\ftge.c
[v ___ftge `(b 1 e 0 0 ]
"52 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\ftmul.c
[v ___ftmul `(f 1 e 4 0 ]
"16 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\ftneg.c
[v ___ftneg `(f 1 e 4 0 ]
"22 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\ftsub.c
[v ___ftsub `(f 1 e 4 0 ]
"45 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\fttol.c
[v ___fttol `(l 1 e 4 0 ]
"5 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\lbdiv.c
[v ___lbdiv `(uc 1 e 1 0 ]
"5 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\lbmod.c
[v ___lbmod `(uc 1 e 1 0 ]
"28 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\lbtofl.c
[v ___lbtofl `(d 1 e 4 0 ]
"28 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\lbtoft.c
[v ___lbtoft `(f 1 e 4 0 ]
"10 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\lldiv.c
[v ___lldiv `(ul 1 e 4 0 ]
"10 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\llmod.c
[v ___llmod `(ul 1 e 4 0 ]
"31 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\lltofl.c
[v ___lltofl `(d 1 e 4 0 ]
"36 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\lltoft.c
[v ___lltoft `(f 1 e 4 0 ]
"3 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\lmul.c
[v ___lmul `(ul 1 e 4 0 ]
"10 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\ltdiv.c
[v ___ltdiv `(um 1 e 3 0 ]
"10 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\ltmod.c
[v ___ltmod `(um 1 e 3 0 ]
"31 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\lttofl.c
[v ___lttofl `(d 1 e 4 0 ]
"31 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\lttoft.c
[v ___lttoft `(f 1 e 4 0 ]
"10 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\lwdiv.c
[v ___lwdiv `(ui 1 e 2 0 ]
"10 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\lwmod.c
[v ___lwmod `(ui 1 e 2 0 ]
"29 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\lwtofl.c
[v ___lwtofl `(d 1 e 4 0 ]
"29 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\lwtoft.c
[v ___lwtoft `(f 1 e 4 0 ]
"5 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\strlen.c
[v _strlen `(ui 1 e 2 0 ]
"3 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\tmul.c
[v ___tmul `(um 1 e 3 0 ]
"5 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\vprintf.c
[v _vprintf `(i 1 e 2 0 ]
"3 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\wmul.c
[v ___wmul `(ui 1 e 2 0 ]
"95 main.c
[v _main `(i 1 e 2 0 ]
"137
[v _putch `(v 1 e 0 0 ]
"10 uart.c
[v _UART1_Init `(v 1 e 0 0 ]
"44
[v _UART1_Recv_Interrupt_Handler `(v 1 e 0 0 ]
"88
[v _UART1_Send_Interrupt_Handler `(v 1 e 0 0 ]
"101
[v _UART1_WriteS `(v 1 e 0 0 ]
"129
[v _UART1_WriteB `(v 1 e 0 0 ]
"149
[v _UART1_WriteC `(v 1 e 0 0 ]
"164
[v _UART1_Buffer_Len `(uc 1 e 1 0 ]
"169
[v _UART1_Read_Buffer `(uc 1 e 1 0 ]
[s S75 . 1 `uc 1 ABDEN 1 0 :1:0
`uc 1 WUE 1 0 :1:1
`uc 1 . 1 0 :1:2
`uc 1 BRG16 1 0 :1:3
`uc 1 TXCKP 1 0 :1:4
`uc 1 RXDTP 1 0 :1:5
`uc 1 RCIDL 1 0 :1:6
`uc 1 ABDOVF 1 0 :1:7
]
"5709 C:\Program Files (x86)\Microchip\xc8\v1.12\include\pic18f27j13.h
[s S84 . 1 `uc 1 ABDEN1 1 0 :1:0
]
[s S86 . 1 `uc 1 . 1 0 :7:0
`uc 1 ABDOVF1 1 0 :1:7
]
[s S89 . 1 `uc 1 . 1 0 :3:0
`uc 1 BRG161 1 0 :1:3
]
[s S92 . 1 `uc 1 . 1 0 :4:0
`uc 1 CKTXP 1 0 :1:4
]
[s S95 . 1 `uc 1 . 1 0 :5:0
`uc 1 DTRXP 1 0 :1:5
]
[s S98 . 1 `uc 1 . 1 0 :5:0
`uc 1 DTRXP1 1 0 :1:5
]
[s S101 . 1 `uc 1 . 1 0 :6:0
`uc 1 RCIDL1 1 0 :1:6
]
[s S104 . 1 `uc 1 . 1 0 :6:0
`uc 1 RCMT 1 0 :1:6
]
[s S107 . 1 `uc 1 . 1 0 :6:0
`uc 1 RCMT1 1 0 :1:6
]
[s S110 . 1 `uc 1 . 1 0 :5:0
`uc 1 RXDTP1 1 0 :1:5
]
[s S113 . 1 `uc 1 . 1 0 :4:0
`uc 1 SCKP 1 0 :1:4
]
[s S116 . 1 `uc 1 . 1 0 :4:0
`uc 1 SCKP1 1 0 :1:4
]
[s S119 . 1 `uc 1 . 1 0 :4:0
`uc 1 TXCKP1 1 0 :1:4
]
[s S122 . 1 `uc 1 . 1 0 :1:0
`uc 1 WUE1 1 0 :1:1
]
[s S125 . 1 `uc 1 . 1 0 :5:0
`uc 1 RXCKP 1 0 :1:5
]
[s S128 . 1 `uc 1 . 1 0 :1:0
`uc 1 W4E 1 0 :1:1
]
[u S131 . 1 `S75 1 . 1 0 `S84 1 . 1 0 `S86 1 . 1 0 `S89 1 . 1 0 `S92 1 . 1 0 `S95 1 . 1 0 `S98 1 . 1 0 `S101 1 . 1 0 `S104 1 . 1 0 `S107 1 . 1 0 `S110 1 . 1 0 `S113 1 . 1 0 `S116 1 . 1 0 `S119 1 . 1 0 `S122 1 . 1 0 `S125 1 . 1 0 `S128 1 . 1 0 ]
[v _BAUDCON1bits `VES131 1 e 1 @3966 ]
[s S54 . 1 `uc 1 TRISC0 1 0 :1:0
`uc 1 TRISC1 1 0 :1:1
`uc 1 TRISC2 1 0 :1:2
`uc 1 TRISC3 1 0 :1:3
`uc 1 TRISC4 1 0 :1:4
`uc 1 TRISC5 1 0 :1:5
`uc 1 TRISC6 1 0 :1:6
`uc 1 TRISC7 1 0 :1:7
]
"8078
[u S63 . 1 `S54 1 . 1 0 ]
[v _TRISCbits `VES63 1 e 1 @3988 ]
[s S351 . 1 `uc 1 TMR1IE 1 0 :1:0
`uc 1 TMR2IE 1 0 :1:1
`uc 1 CCP1IE 1 0 :1:2
`uc 1 SSP1IE 1 0 :1:3
`uc 1 TX1IE 1 0 :1:4
`uc 1 RC1IE 1 0 :1:5
`uc 1 ADIE 1 0 :1:6
]
"8668
[s S359 . 1 `uc 1 . 1 0 :3:0
`uc 1 SSPIE 1 0 :1:3
`uc 1 TXIE 1 0 :1:4
`uc 1 RCIE 1 0 :1:5
]
[u S364 . 1 `S351 1 . 1 0 `S359 1 . 1 0 ]
[v _PIE1bits `VES364 1 e 1 @3997 ]
"8744
[v _PIR1bits `VES364 1 e 1 @3998 ]
[s S270 . 1 `uc 1 RX9D 1 0 :1:0
`uc 1 OERR 1 0 :1:1
`uc 1 FERR 1 0 :1:2
`uc 1 ADDEN 1 0 :1:3
`uc 1 CREN 1 0 :1:4
`uc 1 SREN 1 0 :1:5
`uc 1 RX9 1 0 :1:6
`uc 1 SPEN 1 0 :1:7
]
"9698
[s S279 . 1 `uc 1 RCD8 1 0 :1:0
`uc 1 . 1 0 :2:1
`uc 1 ADEN 1 0 :1:3
`uc 1 . 1 0 :2:4
`uc 1 RC9 1 0 :1:6
]
[s S285 . 1 `uc 1 . 1 0 :6:0
`uc 1 NOT_RC8 1 0 :1:6
]
[s S288 . 1 `uc 1 . 1 0 :6:0
`uc 1 nRC8 1 0 :1:6
]
[s S291 . 1 `uc 1 . 1 0 :6:0
`uc 1 RC8_9 1 0 :1:6
]
[s S294 . 1 `uc 1 RX9D1 1 0 :1:0
`uc 1 OERR1 1 0 :1:1
`uc 1 FERR1 1 0 :1:2
`uc 1 ADDEN1 1 0 :1:3
`uc 1 CREN1 1 0 :1:4
`uc 1 SREN1 1 0 :1:5
`uc 1 RX91 1 0 :1:6
`uc 1 SPEN1 1 0 :1:7
]
[s S303 . 1 `uc 1 . 1 0 :5:0
`uc 1 SRENA 1 0 :1:5
]
[u S306 . 1 `S270 1 . 1 0 `S279 1 . 1 0 `S285 1 . 1 0 `S288 1 . 1 0 `S291 1 . 1 0 `S294 1 . 1 0 `S303 1 . 1 0 ]
[v _RCSTA1bits `VES306 1 e 1 @4012 ]
[s S207 . 1 `uc 1 TX9D 1 0 :1:0
`uc 1 TRMT 1 0 :1:1
`uc 1 BRGH 1 0 :1:2
`uc 1 SENDB 1 0 :1:3
`uc 1 SYNC 1 0 :1:4
`uc 1 TXEN 1 0 :1:5
`uc 1 TX9 1 0 :1:6
`uc 1 CSRC 1 0 :1:7
]
"10025
[s S216 . 1 `uc 1 TXD8 1 0 :1:0
`uc 1 . 1 0 :5:1
`uc 1 TX8_9 1 0 :1:6
]
[s S220 . 1 `uc 1 . 1 0 :6:0
`uc 1 NOT_TX8 1 0 :1:6
]
[s S223 . 1 `uc 1 . 1 0 :6:0
`uc 1 nTX8 1 0 :1:6
]
[s S226 . 1 `uc 1 TX9D1 1 0 :1:0
`uc 1 TRMT1 1 0 :1:1
`uc 1 BRGH1 1 0 :1:2
`uc 1 SENDB1 1 0 :1:3
`uc 1 SYNC1 1 0 :1:4
`uc 1 TXEN1 1 0 :1:5
`uc 1 TX91 1 0 :1:6
`uc 1 CSRC1 1 0 :1:7
]
[u S235 . 1 `S207 1 . 1 0 `S216 1 . 1 0 `S220 1 . 1 0 `S223 1 . 1 0 `S226 1 . 1 0 ]
[v _TXSTA1bits `VES235 1 e 1 @4013 ]
"10267
[v _TXREG1 `VEuc 1 e 1 @4014 ]
"10272
[v _TXREG `VEuc 1 e 1 @4014 ]
"10304
[v _RCREG1 `VEuc 1 e 1 @4015 ]
"10341
[v _SPBRG1 `VEuc 1 e 1 @4016 ]
"18442
[v _TXIF `VEb 1 e 0 @31988 ]
[s S45 __UART_DATA 256 `[125]uc 1 buffer_in 125 0 `uc 1 buffer_in_read_ind 1 125 `uc 1 buffer_in_write_ind 1 126 `uc 1 buffer_in_len 1 127 `uc 1 buffer_in_len_tmp 1 128 `[125]uc 1 buffer_out 125 129 `uc 1 buffer_out_ind 1 254 `uc 1 buffer_out_len 1 255 ]
"7 uart.c
[v _uart_1_data `S45 1 s 256 uart_1_data ]
"8
[v _uart_1_data_p `*.bS45 1 s 2 uart_1_data_p ]
"95 main.c
[v _main `(i 1 e 2 0 ]
{
"107
[v main@buffer11 `[255]uc 1 a 255 0 ]
"106
[v main@buffer10 `[255]uc 1 a 255 0 ]
"105
[v main@buffer9 `[255]uc 1 a 255 0 ]
"104
[v main@buffer8 `[255]uc 1 a 255 0 ]
"103
[v main@buffer7 `[255]uc 1 a 255 0 ]
"102
[v main@buffer6 `[255]uc 1 a 255 0 ]
"101
[v main@buffer5 `[255]uc 1 a 255 0 ]
"100
[v main@buffer4 `[255]uc 1 a 255 0 ]
"99
[v main@buffer3 `[255]uc 1 a 255 0 ]
"98
[v main@buffer2 `[255]uc 1 a 255 0 ]
"97
[v main@buffer1 `[255]uc 1 a 255 0 ]
"96
[v main@buffer `[255]uc 1 a 255 0 ]
"109
[v main@buffer13 `[100]uc 1 a 100 0 ]
"108
[v main@buffer12 `[100]uc 1 a 100 0 ]
"112
[v main@buffer16 `[50]uc 1 a 50 100 ]
"111
[v main@buffer15 `[50]uc 1 a 50 100 ]
"110
[v main@buffer14 `[50]uc 1 a 50 1 ]
"113
[v main@buffer17 `[40]uc 1 a 40 51 ]
"114
[v main@buffer18 `[20]uc 1 a 20 150 ]
"134
} 0

/PIC Stuff/PICX_27J13/dist/default/production/PICX_27J13.X.production.sym
0,0 → 1,329
main@buffer7 800 0 BANK8 1
__pcstackBANK13 D00 0 BANK13 1
__CFG_XINST$OFF 0 0 ABS 0
__S0 20000 0 ABS 0
__S1 EAA 0 ABS 0
__Hintentry 0 0 ABS 0
__Lintentry 0 0 ABS 0
main@buffer12 60 0 BANK0 1
main@buffer8 900 0 BANK9 1
_TXIF 7CF4 0 ABS 0
_main F1A 0 CODE 0
start 0 0 CODE 0
__CFG_DSWDTPS$M2 0 0 ABS 0
main@buffer9 A00 0 BANK10 1
__CFG_DSBOREN$ON 0 0 ABS 0
_TXREG FAE 0 ABS 0
__Hirdata 0 0 CODE 0
__Lirdata 0 0 CODE 0
__HRAM 0 0 ABS 0
__LRAM 1 0 ABS 0
__Hconfig 20000 0 CONFIG 0
__Lconfig 1FFF8 0 CONFIG 0
__CFG_RTCOSC$T1OSCREF 0 0 ABS 0
main@buffer13 D00 0 BANK13 1
__Hbigram 0 0 ABS 0
__Lbigram 0 0 ABS 0
__Hrparam 0 0 ABS 0
__Lrparam 0 0 ABS 0
_uart_1_data_p 5C 0 COMRAM 1
__Hram 0 0 ABS 0
__Lram 0 0 ABS 0
__Hcomram 0 0 ABS 0
_putch 0 0 ABS 0
__Lcomram 0 0 ABS 0
__Hsfr 0 0 ABS 0
__Lsfr 0 0 ABS 0
__end_of__stringdata F19 0 SMALLCONST 0
__HcstackBANK5 0 0 ABS 0
__LcstackBANK5 0 0 ABS 0
__Hbss 0 0 RAM 1
__Lbss 0 0 RAM 1
__Hnvrram 0 0 COMRAM 1
__pcstackBANK5 500 0 BANK5 1
__Lnvrram 0 0 COMRAM 1
_RCREG1 FAF 0 ABS 0
_TXREG1 FAE 0 ABS 0
_SPBRG1 FB0 0 ABS 0
_PIE1bits F9D 0 ABS 0
_PIR1bits F9E 0 ABS 0
__Hintsave_regs 0 0 BIGRAM 1
__Lintsave_regs 0 0 BIGRAM 1
__Hbigbss 0 0 BIGRAM 1
__Lbigbss 0 0 BIGRAM 1
__Hintret 0 0 ABS 0
__Lintret 0 0 ABS 0
__Hramtop F00 0 RAM 0
__Lramtop F00 0 RAM 0
__Hstruct 0 0 COMRAM 1
__Lstruct 0 0 COMRAM 1
__Hbigdata 0 0 BIGRAM 1
__Lbigdata 0 0 BIGRAM 1
__Hmediumconst 0 0 MEDIUMCONST 0
__Lmediumconst 0 0 MEDIUMCONST 0
__Hfarbss 0 0 FARRAM 0
__Lfarbss 0 0 FARRAM 0
__Hintcode 0 0 CODE 0
__Lintcode 0 0 CODE 0
__Hfardata 0 0 FARRAM 0
__Lfardata 0 0 FARRAM 0
__CFG_IOL1WAY$OFF 0 0 ABS 0
__Habs1 0 0 ABS 0
__Labs1 0 0 ABS 0
main@buffer14 2 0 COMRAM 1
__CFG_WDTPS$1 0 0 ABS 0
__Hdata 0 0 ABS 0
__Ldata 0 0 ABS 0
__HcstackBANK0 0 0 ABS 0
__LcstackBANK0 0 0 ABS 0
__pcstackBANK0 60 0 BANK0 1
__Htemp 0 0 COMRAM 1
__Ltemp 0 0 COMRAM 1
__Hrbit 0 0 COMRAM 1
__Lrbit 0 0 COMRAM 1
__Hinit 0 0 CODE 0
__Linit 0 0 CODE 0
__Hintcodelo 0 0 CODE 0
__Lintcodelo 0 0 CODE 0
__Hrbss 0 0 COMRAM 1
__end_of_main FFA 0 CODE 0
__Lrbss 0 0 COMRAM 1
__Htext 0 0 ABS 0
main@buffer15 C4 0 BANK0 1
__Ltext 0 0 ABS 0
__HcstackBANK11 0 0 ABS 0
__LcstackBANK11 0 0 ABS 0
__pcstackBANK11 B00 0 BANK11 1
__HcstackBANK6 0 0 ABS 0
__LcstackBANK6 0 0 ABS 0
end_of_initialization 1026 0 CODE 0
__pcstackBANK6 600 0 BANK6 1
_TRISCbits F94 0 ABS 0
main@buffer16 D64 0 BANK13 1
__Hibigdata 0 0 CODE 0
__Libigdata 0 0 CODE 0
__CFG_OSC$HSPLL 0 0 ABS 0
__HbssBIGRAM 0 0 ABS 0
__LbssBIGRAM 0 0 ABS 0
__pbssBIGRAM DAA 0 BIGRAM 1
__Hifardata 0 0 CODE 0
__Lifardata 0 0 CODE 0
__Hbank0 0 0 ABS 0
__Lbank0 0 0 ABS 0
__Hbank1 0 0 ABS 0
__Lbank1 0 0 ABS 0
__Hbank2 0 0 ABS 0
__Lbank2 0 0 ABS 0
__Hbank3 0 0 ABS 0
__Lbank3 0 0 ABS 0
__Hbank4 0 0 ABS 0
__Lbank4 0 0 ABS 0
__CFG_MSSP7B_EN$MSK7 0 0 ABS 0
__Hbank5 0 0 ABS 0
__Lbank5 0 0 ABS 0
__Hpowerup 0 0 CODE 0
__Lpowerup 0 0 CODE 0
__Hbank6 0 0 ABS 0
__Lbank6 0 0 ABS 0
__Hbank7 0 0 ABS 0
__Lbank7 0 0 ABS 0
__Hbank8 0 0 ABS 0
__Lbank8 0 0 ABS 0
__Htext0 0 0 ABS 0
__Ltext0 0 0 ABS 0
__Hbank9 0 0 ABS 0
__Lbank9 0 0 ABS 0
__ptext0 F1A 0 CODE 0
__HcstackBANK1 0 0 ABS 0
__LcstackBANK1 0 0 ABS 0
__pcstackBANK1 100 0 BANK1 1
__Hclrtext 0 0 ABS 0
__Lclrtext 0 0 ABS 0
main@buffer17 34 0 COMRAM 1
__CFG_DSWDTOSC$INTOSCREF 0 0 ABS 0
__HcstackBANK7 0 0 ABS 0
__LcstackBANK7 0 0 ABS 0
__pcstackBANK7 700 0 BANK7 1
__end_of__initialization 1026 0 CODE 0
__Hidata 0 0 CODE 0
__Lidata 0 0 CODE 0
__Hrdata 0 0 COMRAM 1
__Lrdata 0 0 COMRAM 1
__Hidloc 0 0 IDLOC 0
__Lidloc 0 0 IDLOC 0
__CFG_STVREN$OFF 0 0 ABS 0
main@buffer18 D96 0 BANK13 1
__Hparam 0 0 ABS 0
__Lparam 0 0 ABS 0
__HcstackCOMRAM 0 0 ABS 0
__LcstackCOMRAM 0 0 ABS 0
__CFG_IESO$ON 0 0 ABS 0
__pcstackCOMRAM 1 0 COMRAM 1
__CFG_SOSCSEL$LOW 0 0 ABS 0
__Hsmallconst F1A 0 SMALLCONST 0
__Lsmallconst F00 0 SMALLCONST 0
__psmallconst F00 0 SMALLCONST 0
__Hnvbit 0 0 COMRAM 1
__Lnvbit 0 0 COMRAM 1
__Hcinit 0 0 ABS 0
__Lcinit 0 0 ABS 0
__pcinit FFA 0 CODE 0
__ramtop F00 0 RAM 0
__mediumconst 0 0 MEDIUMCONST 0
__size_of_main 0 0 ABS 0
__Hconst 0 0 CODE 0
__Lconst 0 0 CODE 0
__CFG_CFGPLLEN$ON 0 0 ABS 0
__HcstackBANK2 0 0 ABS 0
__LcstackBANK2 0 0 ABS 0
__pcstackBANK2 200 0 BANK2 1
__CFG_DSWDTEN$OFF 0 0 ABS 0
main@buffer 100 0 BANK1 1
__HcstackBANK12 0 0 ABS 0
__LcstackBANK12 0 0 ABS 0
__pcstackBANK12 C00 0 BANK12 1
__HcstackBANK8 0 0 ABS 0
__LcstackBANK8 0 0 ABS 0
__pcstackBANK8 800 0 BANK8 1
__CFG_WPEND$PAGE_WPFP 0 0 ABS 0
__Hbank10 0 0 ABS 0
__Lbank10 0 0 ABS 0
__Hbank11 0 0 ABS 0
__Lbank11 0 0 ABS 0
__CFG_FCMEN$OFF 0 0 ABS 0
__Hbank12 0 0 ABS 0
__Lbank12 0 0 ABS 0
__Hbank13 0 0 ABS 0
__Lbank13 0 0 ABS 0
__Hbank14 0 0 ABS 0
__Lbank14 0 0 ABS 0
__CFG_PLLDIV$3 0 0 ABS 0
_uart_1_data DAA 0 BIGRAM 1
_RCSTA1bits FAC 0 ABS 0
_TXSTA1bits FAD 0 ABS 0
__CFG_ADCSEL$BIT12 0 0 ABS 0
__CFG_WDTEN$OFF 0 0 ABS 0
main@buffer1 200 0 BANK2 1
__Hend_init 4 0 CODE 0
__Lend_init 0 0 CODE 0
__CFG_PLLSEL$PLL96 0 0 ABS 0
__HidataCOMRAM 0 0 ABS 0
__LidataCOMRAM 0 0 ABS 0
__pidataCOMRAM 102C 0 CODE 0
__Hjflash_buffer 1F800 0 CODE 0
__Ljflash_buffer 1F800 0 CODE 0
main@buffer2 300 0 BANK3 1
__CFG_CP0$OFF 0 0 ABS 0
__smallconst F00 0 SMALLCONST 0
__Hreset_vec 0 0 CODE 0
__Lreset_vec 0 0 CODE 0
__HcstackBANK3 0 0 ABS 0
__LcstackBANK3 0 0 ABS 0
__pcstackBANK3 300 0 BANK3 1
__stringdata F00 0 SMALLCONST 0
__accesstop 60 0 ABS 0
__Hintcode_body 0 0 ABS 0
__Lintcode_body 0 0 ABS 0
main@buffer3 400 0 BANK4 1
__HcstackBANK9 0 0 ABS 0
__LcstackBANK9 0 0 ABS 0
intlevel0 0 0 CODE 0
__pcstackBANK9 900 0 BANK9 1
intlevel1 0 0 CODE 0
__CFG_WPDIS$OFF 0 0 ABS 0
__CFG_WPCFG$ON 0 0 ABS 0
intlevel2 0 0 CODE 0
intlevel3 0 0 CODE 0
_BAUDCON1bits F7E 0 ABS 0
main@buffer10 B00 0 BANK11 1
main@buffer4 500 0 BANK5 1
__HdataCOMRAM 0 0 ABS 0
__LdataCOMRAM 0 0 ABS 0
__pdataCOMRAM 5C 0 COMRAM 1
start_initialization FFA 0 CODE 0
main@buffer5 600 0 BANK6 1
__CFG_CLKOEC$OFF 0 0 ABS 0
__initialization FFA 0 CODE 0
main@buffer11 C00 0 BANK12 1
main@buffer6 700 0 BANK7 1
__HcstackBANK10 0 0 ABS 0
__LcstackBANK10 0 0 ABS 0
__activetblptr 3 0 ABS 0
__pcstackBANK10 A00 0 BANK10 1
__HcstackBANK4 0 0 ABS 0
__LcstackBANK4 0 0 ABS 0
__pcstackBANK4 400 0 BANK4 1
__HcstackBANK13 0 0 ABS 0
__LcstackBANK13 0 0 ABS 0
%segments
reset_vec 0 3 CODE 0 0
smallconst F00 F19 SMALLCONST F00 0
config 1FFF8 1FFFF CONFIG 1FFF8 0
cstackCOMRAM 1 5D COMRAM 1 1
cstackBANK0 60 F5 BANK0 60 1
cstackBANK12 C00 CFE BANK12 C00 1
cstackBANK11 B00 BFE BANK11 B00 1
cstackBANK10 A00 AFE BANK10 A00 1
cstackBANK9 900 9FE BANK9 900 1
cstackBANK8 800 8FE BANK8 800 1
cstackBANK7 700 7FE BANK7 700 1
cstackBANK6 600 6FE BANK6 600 1
cstackBANK5 500 5FE BANK5 500 1
cstackBANK4 400 4FE BANK4 400 1
cstackBANK3 300 3FE BANK3 300 1
cstackBANK2 200 2FE BANK2 200 1
cstackBANK1 100 1FE BANK1 100 1
cstackBANK13 D00 DA9 BANK13 D00 1
bssBIGRAM DAA EA9 BIGRAM DAA 1
text0 F1A 102D CODE F1A 0
%locals
dist/default/production\PICX_27J13.X.production.obj
C:\Users\Kevin\AppData\Local\Temp\s4fo.
uart.c
8 102C 0 CODE 0
uart.c
8 F00 0 SMALLCONST 0
main.c
134 F19 0 SMALLCONST 0
uart.c
1412 FFA 0 CODE 0
1413 FFE 0 CODE 0
1415 1002 0 CODE 0
1416 1004 0 CODE 0
1417 1006 0 CODE 0
1418 1008 0 CODE 0
1419 100A 0 CODE 0
1420 100C 0 CODE 0
1424 100E 0 CODE 0
1425 1010 0 CODE 0
1426 1012 0 CODE 0
1427 1014 0 CODE 0
1428 1016 0 CODE 0
1429 1018 0 CODE 0
1430 101A 0 CODE 0
1431 101C 0 CODE 0
1432 1020 0 CODE 0
1433 1022 0 CODE 0
1440 1026 0 CODE 0
1441 1028 0 CODE 0
main.c
115 F1A 0 CODE 0
116 F26 0 CODE 0
117 F32 0 CODE 0
118 F3E 0 CODE 0
119 F4A 0 CODE 0
120 F56 0 CODE 0
121 F62 0 CODE 0
122 F6E 0 CODE 0
123 F7A 0 CODE 0
124 F86 0 CODE 0
125 F92 0 CODE 0
126 F9E 0 CODE 0
127 FAA 0 CODE 0
128 FB6 0 CODE 0
129 FC2 0 CODE 0
130 FCA 0 CODE 0
131 FD6 0 CODE 0
132 FE2 0 CODE 0
133 FEA 0 CODE 0
134 FF6 0 CODE 0

/PIC Stuff/PICX_27J13/dist/default/production/doprnt.d
0,0 → 1,0
dist/default/production/doprnt.d dist/default/production/doprnt.p1: C:/Program\ Files\ (x86)/Microchip/xc8/v1.12/sources/doprnt.c

/PIC Stuff/PICX_27J13/dist/default/production/doprnt.p1
0,0 → 1,270
Version 3.2 HI-TECH Software Intermediate Code
"57 C:\Program Files (x86)\Microchip\xc8\v1.12\include\stdio.h
[v F13 `(v ~T0 @X0 0 tf1`uc ]
[s S1 `*uc 1 `*F13 1 ]
[n S1 __prbuf ptr func ]
[; ;stdio.h: 8: typedef int ptrdiff_t;
[; ;stdio.h: 9: typedef unsigned size_t;
[; ;stdio.h: 10: typedef unsigned short wchar_t;
[; ;stdarg.h: 7: typedef void * va_list[1];
[; ;stdarg.h: 10: extern void * __va_start(void);
[; ;stdarg.h: 13: extern void * __va_arg(void *, ...);
[; ;stdio.h: 23: extern int errno;
[; ;stdio.h: 54: struct __prbuf
[; ;stdio.h: 55: {
[; ;stdio.h: 56: char * ptr;
[; ;stdio.h: 57: void (* func)(char);
[; ;stdio.h: 58: };
[; ;conio.h: 17: extern int errno;
[; ;conio.h: 20: extern void init_uart(void);
[; ;conio.h: 22: extern char getch(void);
[; ;conio.h: 23: extern char getche(void);
[; ;conio.h: 24: extern void putch(char);
[; ;conio.h: 25: extern void ungetch(char);
[; ;conio.h: 27: extern __bit kbhit(void);
[; ;conio.h: 31: extern char * cgets(char *);
[; ;conio.h: 32: extern void cputs(const char *);
[; ;stdio.h: 99: extern int cprintf(char *, ...);
[; ;stdio.h: 104: extern int _doprnt(struct __prbuf *, const register char *, register va_list);
[; ;stdio.h: 194: extern char * gets(char *);
[; ;stdio.h: 195: extern int puts(const char *);
[; ;stdio.h: 196: extern int scanf(const char *, ...);
[; ;stdio.h: 197: extern int sscanf(const char *, const char *, ...);
[; ;stdio.h: 198: extern int vprintf(const char *, va_list);
[; ;stdio.h: 199: extern int vsprintf(char *, const char *, va_list) __attribute__((unsupported("vsprintf() is not supported by this compiler")));
[; ;stdio.h: 200: extern int vscanf(const char *, va_list ap);
[; ;stdio.h: 201: extern int vsscanf(const char *, const char *, va_list);
[; ;stdio.h: 205: extern int sprintf(char *, const char *, ...);
[; ;stdio.h: 206: extern int printf(const char *, ...);
[; ;ctype.h: 4: extern __bit isalpha(char);
[; ;ctype.h: 5: extern __bit isupper(char);
[; ;ctype.h: 6: extern __bit islower(char);
[; ;ctype.h: 7: extern __bit isdigit(char);
[; ;ctype.h: 8: extern __bit isxdigit(char);
[; ;ctype.h: 9: extern __bit isspace(char);
[; ;ctype.h: 10: extern __bit ispunct(char);
[; ;ctype.h: 11: extern __bit isalnum(char);
[; ;ctype.h: 12: extern __bit isprint(char);
[; ;ctype.h: 13: extern __bit isgraph(char);
[; ;ctype.h: 14: extern __bit iscntrl(char);
[; ;ctype.h: 17: extern char toupper(char);
[; ;ctype.h: 18: extern char tolower(char);
[; ;stdlib.h: 27: typedef struct {
[; ;stdlib.h: 28: int rem;
[; ;stdlib.h: 29: int quot;
[; ;stdlib.h: 30: } div_t;
[; ;stdlib.h: 31: typedef struct {
[; ;stdlib.h: 32: unsigned rem;
[; ;stdlib.h: 33: unsigned quot;
[; ;stdlib.h: 34: } udiv_t;
[; ;stdlib.h: 35: typedef struct {
[; ;stdlib.h: 36: long quot;
[; ;stdlib.h: 37: long rem;
[; ;stdlib.h: 38: } ldiv_t;
[; ;stdlib.h: 39: typedef struct {
[; ;stdlib.h: 40: unsigned long quot;
[; ;stdlib.h: 41: unsigned long rem;
[; ;stdlib.h: 42: } uldiv_t;
[; ;stdlib.h: 65: extern double atof(const char *);
[; ;stdlib.h: 66: extern double strtod(const char *, const char **);
[; ;stdlib.h: 67: extern int atoi(const char *);
[; ;stdlib.h: 68: extern unsigned xtoi(const char *);
[; ;stdlib.h: 69: extern long atol(const char *);
[; ;stdlib.h: 70: extern long strtol(const char *, char **, int);
[; ;stdlib.h: 72: extern int rand(void);
[; ;stdlib.h: 73: extern void srand(unsigned int);
[; ;stdlib.h: 74: extern void * calloc(size_t, size_t);
[; ;stdlib.h: 75: extern div_t div(int numer, int denom);
[; ;stdlib.h: 76: extern udiv_t udiv(unsigned numer, unsigned denom);
[; ;stdlib.h: 77: extern ldiv_t ldiv(long numer, long denom);
[; ;stdlib.h: 78: extern uldiv_t uldiv(unsigned long numer,unsigned long denom);
[; ;stdlib.h: 79: extern unsigned long _lrotl(unsigned long value, unsigned int shift);
[; ;stdlib.h: 80: extern unsigned long _lrotr(unsigned long value, unsigned int shift);
[; ;stdlib.h: 81: extern unsigned int _rotl(unsigned int value, unsigned int shift);
[; ;stdlib.h: 82: extern unsigned int _rotr(unsigned int value, unsigned int shift);
[; ;stdlib.h: 87: extern void * malloc(size_t);
[; ;stdlib.h: 88: extern void free(void *);
[; ;stdlib.h: 89: extern void * realloc(void *, size_t);
[; ;stdlib.h: 91: extern void abort(void);
[; ;stdlib.h: 92: extern void exit(int);
[; ;stdlib.h: 93: extern int atexit(void (*)(void));
[; ;stdlib.h: 94: extern char * getenv(const char *);
[; ;stdlib.h: 95: extern char ** environ;
[; ;stdlib.h: 96: extern int system(char *);
[; ;stdlib.h: 97: extern void qsort(void *, size_t, size_t, int (*)(const void *, const void *));
[; ;stdlib.h: 98: extern void * bsearch(const void *, void *, size_t, size_t, int(*)(const void *, const void *));
[; ;stdlib.h: 99: extern int abs(int);
[; ;stdlib.h: 100: extern long labs(long);
[; ;stdlib.h: 103: extern char * itoa(char * buf, int val, int base);
[; ;stdlib.h: 104: extern char * utoa(char * buf, unsigned val, int base);
[; ;stdlib.h: 109: extern char * ltoa(char * buf, long val, int base);
[; ;stdlib.h: 110: extern char * ultoa(char * buf, unsigned long val, int base);
[; ;stdlib.h: 112: extern char * ftoa(float f, int * status);
[; ;string.h: 22: extern void * memcpy(void *, const void *, size_t);
[; ;string.h: 23: extern void * memmove(void *, const void *, size_t);
[; ;string.h: 24: extern void * memset(void *, int, size_t);
[; ;string.h: 35: extern char * strcat(char *, const char *);
[; ;string.h: 36: extern char * strcpy(char *, const char *);
[; ;string.h: 37: extern char * strncat(char *, const char *, size_t);
[; ;string.h: 38: extern char * strncpy(char *, const char *, size_t);
[; ;string.h: 39: extern char * strdup(const char *);
[; ;string.h: 40: extern char * strtok(char *, const char *);
[; ;string.h: 43: extern int memcmp(const void *, const void *, size_t);
[; ;string.h: 44: extern int strcmp(const char *, const char *);
[; ;string.h: 45: extern int stricmp(const char *, const char *);
[; ;string.h: 46: extern int strncmp(const char *, const char *, size_t);
[; ;string.h: 47: extern int strnicmp(const char *, const char *, size_t);
[; ;string.h: 48: extern void * memchr(const void *, int, size_t);
[; ;string.h: 49: extern size_t strcspn(const char *, const char *);
[; ;string.h: 50: extern char * strpbrk(const char *, const char *);
[; ;string.h: 51: extern size_t strspn(const char *, const char *);
[; ;string.h: 52: extern char * strstr(const char *, const char *);
[; ;string.h: 53: extern char * stristr(const char *, const char *);
[; ;string.h: 54: extern char * strerror(int);
[; ;string.h: 55: extern size_t strlen(const char *);
[; ;string.h: 56: extern char * strchr(const char *, int);
[; ;string.h: 57: extern char * strichr(const char *, int);
[; ;string.h: 58: extern char * strrchr(const char *, int);
[; ;string.h: 59: extern char * strrichr(const char *, int);
[; ;conio.h: 17: extern int errno;
[; ;conio.h: 20: extern void init_uart(void);
[; ;conio.h: 22: extern char getch(void);
[; ;conio.h: 23: extern char getche(void);
[; ;conio.h: 24: extern void putch(char);
[; ;conio.h: 25: extern void ungetch(char);
[; ;conio.h: 27: extern __bit kbhit(void);
[; ;conio.h: 31: extern char * cgets(char *);
[; ;conio.h: 32: extern void cputs(const char *);
[; ;sys.h: 17: extern int errno;
[; ;sys.h: 30: extern int execl(char *, char *, ...);
[; ;sys.h: 31: extern int execv(char *, char **);
[; ;sys.h: 32: extern int execve(char *, char **, char **);
[; ;sys.h: 33: extern int execle(char *, char *, ...);
[; ;sys.h: 34: extern int execvp(char *, char **);
[; ;sys.h: 35: extern int execlp(char *, char *, ...);
[; ;sys.h: 36: extern int getpid(void);
[; ;sys.h: 37: extern char * mktemp(char *);
[; ;sys.h: 51: extern int spawnl(char *, char *, ...);
[; ;sys.h: 52: extern int spawnv(char *, char **);
[; ;sys.h: 53: extern int spawnle(char *, char *, ...);
[; ;sys.h: 54: extern int spawnve(char *, char **, char **);
[; ;sys.h: 55: extern int spawnlp(char *, char *, ...);
[; ;sys.h: 56: extern int spawnvp(char *, char **);
[; ;sys.h: 58: extern int chdir(char *);
[; ;sys.h: 59: extern int chdrv(char *);
[; ;sys.h: 60: extern int mkdir(char *);
[; ;sys.h: 61: extern int rmdir(char *);
[; ;sys.h: 62: extern char * getcwd(char *);
[; ;sys.h: 63: extern void persist_validate(void);
[; ;sys.h: 64: extern int persist_check(int);
[; ;sys.h: 65: extern char * getdrv(void);
[; ;sys.h: 66: extern char ** _getargs(char *, char *);
[; ;sys.h: 67: extern int _argc_;
[; ;sys.h: 78: extern void * sbrk(size_t);
[; ;sys.h: 79: extern void brk(void *);
[; ;sys.h: 85: extern int _pnum(unsigned long, signed char, signed char, unsigned char, unsigned char, struct __prbuf *, unsigned char);
[; ;sys.h: 86: extern int _fnum(double, short, short, short, struct __prbuf *, short);
[; ;math.h: 3: extern double fabs(double);
[; ;math.h: 4: extern double floor(double);
[; ;math.h: 5: extern double ceil(double);
[; ;math.h: 6: extern double modf(double, double *);
[; ;math.h: 7: extern double sqrt(double);
[; ;math.h: 8: extern double atof(const char *);
[; ;math.h: 9: extern double sin(double);
[; ;math.h: 10: extern double cos(double);
[; ;math.h: 11: extern double tan(double);
[; ;math.h: 12: extern double asin(double);
[; ;math.h: 13: extern double acos(double);
[; ;math.h: 14: extern double atan(double);
[; ;math.h: 15: extern double atan2(double, double);
[; ;math.h: 16: extern double log(double);
[; ;math.h: 17: extern double log10(double);
[; ;math.h: 18: extern double pow(double, double);
[; ;math.h: 19: extern double exp(double);
[; ;math.h: 20: extern double sinh(double);
[; ;math.h: 21: extern double cosh(double);
[; ;math.h: 22: extern double tanh(double);
[; ;math.h: 23: extern double eval_poly(double, const double *, int);
[; ;math.h: 24: extern double frexp(double, int *);
[; ;math.h: 25: extern double ldexp(double, int);
[; ;math.h: 26: extern double fmod(double, double);
[; ;math.h: 27: extern double trunc(double);
[; ;math.h: 28: extern double round(double);
"13 C:\Program Files (x86)\Microchip\xc8\v1.12\sources\doprnt.c
[p n 350 ]
"459
[v __doprnt `(i ~T0 @X0 1 ef3`*S1`*Cuc`**v ]
{
[; ;doprnt.c: 455: int
[; ;doprnt.c: 458: _doprnt(struct __prbuf * pb, register const char * f, register va_list ap)
[; ;doprnt.c: 459: {
[e :U __doprnt ]
[v _pb `*S1 ~T0 @X0 1 r1 ]
[v _f `*Cuc ~T0 @X0 1 R2 ]
[v _ap `**v ~T0 @X0 1 R3 ]
[f ]
"499
[v _c `c ~T0 @X0 1 a ]
"506
[v _prec `c ~T0 @X0 1 a ]
"508
[v _flag `uc ~T0 @X0 1 a ]
"533
[s S7 `*Cuc 1 `ui 1 ]
[n S7 . _cp _len ]
[u S6 `ui 1 `S7 1 ]
[n S6 . _val _str ]
[v __val `S6 ~T0 @X0 1 a ]
[; ;doprnt.c: 499: signed char c;
[; ;doprnt.c: 506: signed char prec;
[; ;doprnt.c: 508: unsigned char flag;
[; ;doprnt.c: 527: union {
[; ;doprnt.c: 528: unsigned int _val;
[; ;doprnt.c: 529: struct {
[; ;doprnt.c: 530: const char * _cp;
[; ;doprnt.c: 531: unsigned _len;
[; ;doprnt.c: 532: } _str;
[; ;doprnt.c: 533: } _val;
[; ;doprnt.c: 545: while(c = *f++) {
"545
[e $U 9 ]
[e :U 10 ]
{
[; ;doprnt.c: 549: {
"549
{
[; ;doprnt.c: 550: if(pb->func) (pb->func(c)); else ((*pb->ptr++ = c));
"550
[e $ ! != . *U _pb 1 -> -> 0 `i `*F13 12 ]
[e ( *U . *U _pb 1 (1 -> _c `uc ]
[e $U 13 ]
[e :U 12 ]
[e = *U ++ . *U _pb 0 * -> -> 1 `i `x -> -> # *U . *U _pb 0 `i `x -> _c `uc ]
[e :U 13 ]
[; ;doprnt.c: 551: continue;
"551
[e $U 9 ]
"552
}
[; ;doprnt.c: 552: }
[; ;doprnt.c: 1429: {
"1429
{
"1476
}
"1540
}
[e :U 9 ]
"545
[e $ != -> = _c -> *U ++ _f * -> -> 1 `i `x -> -> # *U _f `i `x `c `i -> -> -> 0 `i `c `i 10 ]
[e :U 11 ]
[; ;doprnt.c: 1476: }
[; ;doprnt.c: 1540: }
[; ;doprnt.c: 1547: return 0;
"1547
[e ) -> 0 `i ]
[e $UE 8 ]
[; ;doprnt.c: 1548: }
"1548
[e :UE 8 ]
}

/PIC Stuff/PICX_27J13/dist/default/production/doprnt.pre
0,0 → 1,323
# 1 "C:\Program Files (x86)\Microchip\xc8\v1.12\sources\doprnt.c"
# 8 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\stdio.h"
typedef int ptrdiff_t;
typedef unsigned size_t;
typedef unsigned short wchar_t;
# 7 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\stdarg.h"
typedef void * va_list[1];
#pragma intrinsic(__va_start)
extern void * __va_start(void);
#pragma intrinsic(__va_arg)
extern void * __va_arg(void *, ...);
# 23 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\stdio.h"
extern int errno;
# 54
struct __prbuf
{
char * ptr;
void (* func)(char);
};
# 17 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\conio.h"
extern int errno;
extern void init_uart(void);
extern char getch(void);
extern char getche(void);
extern void putch(char);
extern void ungetch(char);
extern __bit kbhit(void);
# 31
extern char * cgets(char *);
extern void cputs(const char *);
# 99 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\stdio.h"
extern int cprintf(char *, ...);
#pragma printf_check(cprintf)
extern int _doprnt(struct __prbuf *, const register char *, register va_list);
# 191
#pragma printf_check(vprintf) const
#pragma printf_check(vsprintf) const
extern char * gets(char *);
extern int puts(const char *);
extern int scanf(const char *, ...);
extern int sscanf(const char *, const char *, ...);
extern int vprintf(const char *, va_list);
extern int vsprintf(char *, const char *, va_list) __attribute__((unsupported("vsprintf() is not supported by this compiler")));
extern int vscanf(const char *, va_list ap);
extern int vsscanf(const char *, const char *, va_list);
#pragma printf_check(printf) const
#pragma printf_check(sprintf) const
extern int sprintf(char *, const char *, ...);
extern int printf(const char *, ...);
# 4 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\ctype.h"
extern __bit isalpha(char);
extern __bit isupper(char);
extern __bit islower(char);
extern __bit isdigit(char);
extern __bit isxdigit(char);
extern __bit isspace(char);
extern __bit ispunct(char);
extern __bit isalnum(char);
extern __bit isprint(char);
extern __bit isgraph(char);
extern __bit iscntrl(char);
extern char toupper(char);
extern char tolower(char);
# 27 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\stdlib.h"
typedef struct {
int rem;
int quot;
} div_t;
typedef struct {
unsigned rem;
unsigned quot;
} udiv_t;
typedef struct {
long quot;
long rem;
} ldiv_t;
typedef struct {
unsigned long quot;
unsigned long rem;
} uldiv_t;
# 65
extern double atof(const char *);
extern double strtod(const char *, const char **);
extern int atoi(const char *);
extern unsigned xtoi(const char *);
extern long atol(const char *);
extern long strtol(const char *, char **, int);
extern int rand(void);
extern void srand(unsigned int);
extern void * calloc(size_t, size_t);
extern div_t div(int numer, int denom);
extern udiv_t udiv(unsigned numer, unsigned denom);
extern ldiv_t ldiv(long numer, long denom);
extern uldiv_t uldiv(unsigned long numer,unsigned long denom);
extern unsigned long _lrotl(unsigned long value, unsigned int shift);
extern unsigned long _lrotr(unsigned long value, unsigned int shift);
extern unsigned int _rotl(unsigned int value, unsigned int shift);
extern unsigned int _rotr(unsigned int value, unsigned int shift);
extern void * malloc(size_t);
extern void free(void *);
extern void * realloc(void *, size_t);
extern void abort(void);
extern void exit(int);
extern int atexit(void (*)(void));
extern char * getenv(const char *);
extern char ** environ;
extern int system(char *);
extern void qsort(void *, size_t, size_t, int (*)(const void *, const void *));
extern void * bsearch(const void *, void *, size_t, size_t, int(*)(const void *, const void *));
extern int abs(int);
extern long labs(long);
extern char * itoa(char * buf, int val, int base);
extern char * utoa(char * buf, unsigned val, int base);
extern char * ltoa(char * buf, long val, int base);
extern char * ultoa(char * buf, unsigned long val, int base);
extern char * ftoa(float f, int * status);
# 22 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\string.h"
extern void * memcpy(void *, const void *, size_t);
extern void * memmove(void *, const void *, size_t);
extern void * memset(void *, int, size_t);
# 35
extern char * strcat(char *, const char *);
extern char * strcpy(char *, const char *);
extern char * strncat(char *, const char *, size_t);
extern char * strncpy(char *, const char *, size_t);
extern char * strdup(const char *);
extern char * strtok(char *, const char *);
extern int memcmp(const void *, const void *, size_t);
extern int strcmp(const char *, const char *);
extern int stricmp(const char *, const char *);
extern int strncmp(const char *, const char *, size_t);
extern int strnicmp(const char *, const char *, size_t);
extern void * memchr(const void *, int, size_t);
extern size_t strcspn(const char *, const char *);
extern char * strpbrk(const char *, const char *);
extern size_t strspn(const char *, const char *);
extern char * strstr(const char *, const char *);
extern char * stristr(const char *, const char *);
extern char * strerror(int);
extern size_t strlen(const char *);
extern char * strchr(const char *, int);
extern char * strichr(const char *, int);
extern char * strrchr(const char *, int);
extern char * strrichr(const char *, int);
# 17 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\conio.h"
extern int errno;
extern void init_uart(void);
extern char getch(void);
extern char getche(void);
extern void putch(char);
extern void ungetch(char);
extern __bit kbhit(void);
# 31
extern char * cgets(char *);
extern void cputs(const char *);
# 17 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\sys.h"
extern int errno;
# 30
extern int execl(char *, char *, ...);
extern int execv(char *, char **);
extern int execve(char *, char **, char **);
extern int execle(char *, char *, ...);
extern int execvp(char *, char **);
extern int execlp(char *, char *, ...);
extern int getpid(void);
extern char * mktemp(char *);
# 51
extern int spawnl(char *, char *, ...);
extern int spawnv(char *, char **);
extern int spawnle(char *, char *, ...);
extern int spawnve(char *, char **, char **);
extern int spawnlp(char *, char *, ...);
extern int spawnvp(char *, char **);
extern int chdir(char *);
extern int chdrv(char *);
extern int mkdir(char *);
extern int rmdir(char *);
extern char * getcwd(char *);
extern void persist_validate(void);
extern int persist_check(int);
extern char * getdrv(void);
extern char ** _getargs(char *, char *);
extern int _argc_;
# 78
extern void * sbrk(size_t);
extern void brk(void *);
# 85
extern int _pnum(unsigned long, signed char, signed char, unsigned char, unsigned char, struct __prbuf *, unsigned char);
extern int _fnum(double, short, short, short, struct __prbuf *, short);
# 3 "C:\Program Files (x86)\Microchip\xc8\v1.12\include\math.h"
extern double fabs(double);
extern double floor(double);
extern double ceil(double);
extern double modf(double, double *);
extern double sqrt(double);
extern double atof(const char *);
extern double sin(double);
extern double cos(double);
extern double tan(double);
extern double asin(double);
extern double acos(double);
extern double atan(double);
extern double atan2(double, double);
extern double log(double);
extern double log10(double);
extern double pow(double, double);
extern double exp(double);
extern double sinh(double);
extern double cosh(double);
extern double tanh(double);
extern double eval_poly(double, const double *, int);
extern double frexp(double, int *);
extern double ldexp(double, int);
extern double fmod(double, double);
extern double trunc(double);
extern double round(double);
# 13 "C:\Program Files (x86)\Microchip\xc8\v1.12\sources\doprnt.c"
#pragma warning disable 350
# 455
int
_doprnt(struct __prbuf * pb, register const char * f, register va_list ap)
{
# 499
signed char c;
# 506
signed char prec;
unsigned char flag;
# 527
union {
unsigned int _val;
struct {
const char * _cp;
unsigned _len;
} _str;
} _val;
# 545
while(c = *f++) {
# 549
{
if(pb->func) (pb->func(c)); else ((*pb->ptr++ = c));
continue;
}
# 1429
{
# 1476
}
# 1540
}
# 1547
return 0;
}

/PIC Stuff/PICX_27J13/funclist
0,0 → 1,4
__stringdata: SMALLCONST, 3840 0 25
_main: CODE, 3866 0 224
__initialization: CODE, 4090 0 44
Total: 293

/PIC Stuff/PICX_27J13/main.c
0,0 → 1,141
#include <xc.h>
#include <delays.h>
#include <stdio.h>
#include "defines.h"
#include "uart.h"
// <editor-fold defaultstate="collapsed" desc="Configuration Bits">
/* --------------------------- Configuration Bits --------------------------- */
/* CONFIG1L @ 0x1FFF8 */
#pragma config CFGPLLEN = ON // Enable PLL on startup
#pragma config PLLDIV = 3 // Set PPL prescaler to 3 (to get 4MHz)
#pragma config WDTEN = OFF // Turn off watchdog timer
#pragma config STVREN = OFF // Stack overflow/underflow reset disabled
#pragma config XINST = OFF // Turn off extended instruction set
/* CONFIG1H @ 0x1FFF9 */
#pragma config CP0 = OFF // Program memory is not code-protected
/* CONFIG2L @ 0x1FFFA */
#pragma config CLKOEC = OFF // CLKO output disabled on RA6 pin
#pragma config SOSCSEL = LOW // Low Power T1OSC/SOSC circuit selected
#pragma config IESO = ON // Internal external oscillator switch over disabled
#pragma config OSC = HSPLL // Use external oscillator (101)
#pragma config FCMEN = OFF // Fail-safe clock monitor disabled
/* CONFIG2H @ 0x1FFFB */
#pragma config WDTPS = 1 // Watchdog postscaler of 1:1
/* CONFIG3L @ 0x1FFFC */
#pragma config RTCOSC = T1OSCREF // RTCC uses T1OSC/T1CKI
#pragma config DSBOREN = ON // Deep sleep BOR enabled
#pragma config DSWDTPS = M2 // Deep sleep watchdog postscaler of 1:2 (36m)
#pragma config DSWDTEN = OFF // Deep sleep watchdog timer disabled
#pragma config DSWDTOSC = INTOSCREF // DSWDT clock select uses INTRC
/* CONFIG3H @ 0x1FFFD */
#pragma config PLLSEL = PLL96 // Use 96MHz PLL 4MHz -> 96MHz / 2 = 48MHz
#pragma config ADCSEL = BIT12 // 12-bit ADC
#pragma config MSSP7B_EN = MSK7 // 7-bit address masking mode
#pragma config IOL1WAY = OFF // IOLOCK bit can be set and cleared as needed
/* CONFIG4L @ 0x1FFFE */
#pragma config WPCFG = ON // Configuration words page protected
/* CONFIG4H @ 0x1FFFF */
#pragma config WPEND = PAGE_WPFP // Pages WPFP<6:0> through Configuration Words erase/write protected
#pragma config WPDIS = OFF // WPFP<6:0>/WPEND region ignored
/* -------------------------------------------------------------------------- */
// </editor-fold>
#if defined(_TEST_UART)
int main() {
char buffer[100];
buffer[0] = 1;
unsigned char length = 12345;
unsigned char buffer[100];
float f = 3.1415;
/* --------------------- Oscillator Configuration --------------------- */
// OSCTUNEbits.PLLEN = 1; // Enable 4x PLL
OSCCONbits.IRCF = 0b111; // Set INTOSC postscaler to 8MHz
OSCCONbits.SCS = 0b00; // Use 96MHz PLL as primary clock source
/* -------------------------------------------------------------------- */
// Set all ports as digial I/O
ANCON0 = 0xFF;
ANCON1 = 0x1F;
UART1_Init(); // Initialize the UART handler code
// interrupt_enable(); // Enable high-priority interrupts and low-priority interrupts
// interrupt_init(); // Initialize the interrupt priorities
// DBG_PRINT_MAIN("\r\nBegin Program\r\n");
// DBG_PRINT_MAIN("%d\r\n", length);
// printf("asf\r\n");
while (1) {
// length = UART1_Read_Buffer((unsigned char *) buffer);
// if (length != 0) {
// UART1_WriteB((char *) buffer, length);
// }
//
// Delay10KTCYx(255);
// Delay10KTCYx(255);
}
}
#elif defined(_TEST_I2C_MASTER)
int main() {
char buffer[100];
buffer[0] = 1;
}
#else
int main() {
char buffer[255];
char buffer1[255];
char buffer2[255];
char buffer3[255];
char buffer4[255];
char buffer5[255];
char buffer6[255];
char buffer7[255];
char buffer8[255];
char buffer9[255];
char buffer10[255];
char buffer11[255];
char buffer12[100];
char buffer13[100];
char buffer14[50];
char buffer15[50];
char buffer16[50];
char buffer17[40];
char buffer18[20];
buffer[0] = 1;
buffer1[0] = 1;
buffer2[0] = 1;
buffer3[0] = 1;
buffer4[0] = 1;
buffer5[0] = 1;
buffer6[0] = 1;
buffer7[0] = 1;
buffer8[0] = 1;
buffer9[0] = 1;
buffer10[0] = 1;
buffer11[0] = 1;
buffer12[0] = 1;
buffer13[0] = 1;
buffer14[0] = 1;
buffer15[0] = 1;
buffer16[0] = 1;
buffer17[0] = 1;
buffer18[0] = 1;
}
#endif
void putch(char data) {
while (!TXIF)
continue;
TXREG = data;
}

/PIC Stuff/PICX_27J13/nbproject/Makefile-default.mk
0,0 → 1,146
#
# Generated Makefile - do not edit!
#
# Edit the Makefile in the project folder instead (../Makefile). Each target
# has a -pre and a -post target defined where you can add customized code.
#
# This makefile implements configuration specific macros and targets.
# Include project Makefile
ifeq "${IGNORE_LOCAL}" "TRUE"
# do not include local makefile. User is passing all local related variables already
else
include Makefile
# Include makefile containing local settings
ifeq "$(wildcard nbproject/Makefile-local-default.mk)" "nbproject/Makefile-local-default.mk"
include nbproject/Makefile-local-default.mk
endif
endif
# Environment
MKDIR=gnumkdir -p
RM=rm -f
MV=mv
CP=cp
# Macros
CND_CONF=default
ifeq ($(TYPE_IMAGE), DEBUG_RUN)
IMAGE_TYPE=debug
OUTPUT_SUFFIX=cof
DEBUGGABLE_SUFFIX=cof
FINAL_IMAGE=dist/${CND_CONF}/${IMAGE_TYPE}/PICX_27J13.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
else
IMAGE_TYPE=production
OUTPUT_SUFFIX=hex
DEBUGGABLE_SUFFIX=cof
FINAL_IMAGE=dist/${CND_CONF}/${IMAGE_TYPE}/PICX_27J13.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
endif
# Object Directory
OBJECTDIR=build/${CND_CONF}/${IMAGE_TYPE}
# Distribution Directory
DISTDIR=dist/${CND_CONF}/${IMAGE_TYPE}
# Object Files Quoted if spaced
OBJECTFILES_QUOTED_IF_SPACED=${OBJECTDIR}/main.p1 ${OBJECTDIR}/uart.p1
POSSIBLE_DEPFILES=${OBJECTDIR}/main.p1.d ${OBJECTDIR}/uart.p1.d
# Object Files
OBJECTFILES=${OBJECTDIR}/main.p1 ${OBJECTDIR}/uart.p1
CFLAGS=
ASFLAGS=
LDLIBSOPTIONS=
############# Tool locations ##########################################
# If you copy a project from one host to another, the path where the #
# compiler is installed may be different. #
# If you open this project with MPLAB X in the new host, this #
# makefile will be regenerated and the paths will be corrected. #
#######################################################################
# fixDeps replaces a bunch of sed/cat/printf statements that slow down the build
FIXDEPS=fixDeps
.build-conf: ${BUILD_SUBPROJECTS}
${MAKE} ${MAKE_OPTIONS} -f nbproject/Makefile-default.mk dist/${CND_CONF}/${IMAGE_TYPE}/PICX_27J13.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
MP_PROCESSOR_OPTION=18F27J13
# ------------------------------------------------------------------------------------
# Rules for buildStep: compile
ifeq ($(TYPE_IMAGE), DEBUG_RUN)
${OBJECTDIR}/main.p1: main.c nbproject/Makefile-${CND_CONF}.mk
@${MKDIR} ${OBJECTDIR}
@${RM} ${OBJECTDIR}/main.p1.d
${MP_CC} --pass1 $(MP_EXTRA_CC_PRE) --chip=$(MP_PROCESSOR_OPTION) -Q -G --asmlist -D__DEBUG=1 --debugger=pickit3 --double=32 --float=32 --emi=wordwrite --opt=default,+asm,-asmfile,+speed,-space,-debug,9 --addrqual=ignore --mode=free -P -N255 --warn=0 --summary=default,-psect,-class,+mem,-hex,-file --runtime=default,+clear,+init,-keep,-no_startup,-download,+config,+clib,+plib "--errformat=%%f:%%l: error: %%s" "--warnformat=%%f:%%l: warning: %%s" "--msgformat=%%f:%%l: advisory: %%s" -o${OBJECTDIR}/main.p1 main.c
@-${MV} ${OBJECTDIR}/main.d ${OBJECTDIR}/main.p1.d
@${FIXDEPS} ${OBJECTDIR}/main.p1.d $(SILENT) -rsi ${MP_CC_DIR}../
${OBJECTDIR}/uart.p1: uart.c nbproject/Makefile-${CND_CONF}.mk
@${MKDIR} ${OBJECTDIR}
@${RM} ${OBJECTDIR}/uart.p1.d
${MP_CC} --pass1 $(MP_EXTRA_CC_PRE) --chip=$(MP_PROCESSOR_OPTION) -Q -G --asmlist -D__DEBUG=1 --debugger=pickit3 --double=32 --float=32 --emi=wordwrite --opt=default,+asm,-asmfile,+speed,-space,-debug,9 --addrqual=ignore --mode=free -P -N255 --warn=0 --summary=default,-psect,-class,+mem,-hex,-file --runtime=default,+clear,+init,-keep,-no_startup,-download,+config,+clib,+plib "--errformat=%%f:%%l: error: %%s" "--warnformat=%%f:%%l: warning: %%s" "--msgformat=%%f:%%l: advisory: %%s" -o${OBJECTDIR}/uart.p1 uart.c
@-${MV} ${OBJECTDIR}/uart.d ${OBJECTDIR}/uart.p1.d
@${FIXDEPS} ${OBJECTDIR}/uart.p1.d $(SILENT) -rsi ${MP_CC_DIR}../
else
${OBJECTDIR}/main.p1: main.c nbproject/Makefile-${CND_CONF}.mk
@${MKDIR} ${OBJECTDIR}
@${RM} ${OBJECTDIR}/main.p1.d
${MP_CC} --pass1 $(MP_EXTRA_CC_PRE) --chip=$(MP_PROCESSOR_OPTION) -Q -G --asmlist --double=32 --float=32 --emi=wordwrite --opt=default,+asm,-asmfile,+speed,-space,-debug,9 --addrqual=ignore --mode=free -P -N255 --warn=0 --summary=default,-psect,-class,+mem,-hex,-file --runtime=default,+clear,+init,-keep,-no_startup,-download,+config,+clib,+plib "--errformat=%%f:%%l: error: %%s" "--warnformat=%%f:%%l: warning: %%s" "--msgformat=%%f:%%l: advisory: %%s" -o${OBJECTDIR}/main.p1 main.c
@-${MV} ${OBJECTDIR}/main.d ${OBJECTDIR}/main.p1.d
@${FIXDEPS} ${OBJECTDIR}/main.p1.d $(SILENT) -rsi ${MP_CC_DIR}../
${OBJECTDIR}/uart.p1: uart.c nbproject/Makefile-${CND_CONF}.mk
@${MKDIR} ${OBJECTDIR}
@${RM} ${OBJECTDIR}/uart.p1.d
${MP_CC} --pass1 $(MP_EXTRA_CC_PRE) --chip=$(MP_PROCESSOR_OPTION) -Q -G --asmlist --double=32 --float=32 --emi=wordwrite --opt=default,+asm,-asmfile,+speed,-space,-debug,9 --addrqual=ignore --mode=free -P -N255 --warn=0 --summary=default,-psect,-class,+mem,-hex,-file --runtime=default,+clear,+init,-keep,-no_startup,-download,+config,+clib,+plib "--errformat=%%f:%%l: error: %%s" "--warnformat=%%f:%%l: warning: %%s" "--msgformat=%%f:%%l: advisory: %%s" -o${OBJECTDIR}/uart.p1 uart.c
@-${MV} ${OBJECTDIR}/uart.d ${OBJECTDIR}/uart.p1.d
@${FIXDEPS} ${OBJECTDIR}/uart.p1.d $(SILENT) -rsi ${MP_CC_DIR}../
endif
# ------------------------------------------------------------------------------------
# Rules for buildStep: assemble
ifeq ($(TYPE_IMAGE), DEBUG_RUN)
else
endif
# ------------------------------------------------------------------------------------
# Rules for buildStep: link
ifeq ($(TYPE_IMAGE), DEBUG_RUN)
dist/${CND_CONF}/${IMAGE_TYPE}/PICX_27J13.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}: ${OBJECTFILES} nbproject/Makefile-${CND_CONF}.mk
@${MKDIR} dist/${CND_CONF}/${IMAGE_TYPE}
${MP_CC} $(MP_EXTRA_LD_PRE) --chip=$(MP_PROCESSOR_OPTION) -G --asmlist -mdist/${CND_CONF}/${IMAGE_TYPE}/PICX_27J13.X.${IMAGE_TYPE}.map -D__DEBUG=1 --debugger=pickit3 --double=32 --float=32 --emi=wordwrite --opt=default,+asm,-asmfile,+speed,-space,-debug,9 --addrqual=ignore --mode=free -P -N255 --warn=0 --summary=default,-psect,-class,+mem,-hex,-file --runtime=default,+clear,+init,-keep,-no_startup,-download,+config,+clib,+plib "--errformat=%%f:%%l: error: %%s" "--warnformat=%%f:%%l: warning: %%s" "--msgformat=%%f:%%l: advisory: %%s" -odist/${CND_CONF}/${IMAGE_TYPE}/PICX_27J13.X.${IMAGE_TYPE}.${DEBUGGABLE_SUFFIX} ${OBJECTFILES_QUOTED_IF_SPACED}
@${RM} dist/${CND_CONF}/${IMAGE_TYPE}/PICX_27J13.X.${IMAGE_TYPE}.hex
else
dist/${CND_CONF}/${IMAGE_TYPE}/PICX_27J13.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}: ${OBJECTFILES} nbproject/Makefile-${CND_CONF}.mk
@${MKDIR} dist/${CND_CONF}/${IMAGE_TYPE}
${MP_CC} $(MP_EXTRA_LD_PRE) --chip=$(MP_PROCESSOR_OPTION) -G --asmlist -mdist/${CND_CONF}/${IMAGE_TYPE}/PICX_27J13.X.${IMAGE_TYPE}.map --double=32 --float=32 --emi=wordwrite --opt=default,+asm,-asmfile,+speed,-space,-debug,9 --addrqual=ignore --mode=free -P -N255 --warn=0 --summary=default,-psect,-class,+mem,-hex,-file --runtime=default,+clear,+init,-keep,-no_startup,-download,+config,+clib,+plib "--errformat=%%f:%%l: error: %%s" "--warnformat=%%f:%%l: warning: %%s" "--msgformat=%%f:%%l: advisory: %%s" -odist/${CND_CONF}/${IMAGE_TYPE}/PICX_27J13.X.${IMAGE_TYPE}.${DEBUGGABLE_SUFFIX} ${OBJECTFILES_QUOTED_IF_SPACED}
endif
# Subprojects
.build-subprojects:
# Subprojects
.clean-subprojects:
# Clean Targets
.clean-conf: ${CLEAN_SUBPROJECTS}
${RM} -r build/default
${RM} -r dist/default
# Enable dependency checking
.dep.inc: .depcheck-impl
DEPFILES=$(shell mplabwildcard ${POSSIBLE_DEPFILES})
ifneq (${DEPFILES},)
include ${DEPFILES}
endif

/PIC Stuff/PICX_27J13/nbproject/Makefile-genesis.properties
0,0 → 1,8
#
#Sat Dec 22 14:37:03 EST 2012
default.languagetoolchain.dir=C\:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\bin
com-microchip-mplab-nbide-embedded-makeproject-MakeProject.md5=d94e033fce233e60ccb9abf3a212a9b7
default.languagetoolchain.version=1.12
host.platform=windows
conf.ids=default
default.com-microchip-mplab-nbide-toolchainXC8-XC8LanguageToolchain.md5=8fc157cf2b8157578b9f80e4bbee68f8

/PIC Stuff/PICX_27J13/nbproject/Makefile-impl.mk
0,0 → 1,69
#
# Generated Makefile - do not edit!
#
# Edit the Makefile in the project folder instead (../Makefile). Each target
# has a pre- and a post- target defined where you can add customization code.
#
# This makefile implements macros and targets common to all configurations.
#
# NOCDDL
# Building and Cleaning subprojects are done by default, but can be controlled with the SUB
# macro. If SUB=no, subprojects will not be built or cleaned. The following macro
# statements set BUILD_SUB-CONF and CLEAN_SUB-CONF to .build-reqprojects-conf
# and .clean-reqprojects-conf unless SUB has the value 'no'
SUB_no=NO
SUBPROJECTS=${SUB_${SUB}}
BUILD_SUBPROJECTS_=.build-subprojects
BUILD_SUBPROJECTS_NO=
BUILD_SUBPROJECTS=${BUILD_SUBPROJECTS_${SUBPROJECTS}}
CLEAN_SUBPROJECTS_=.clean-subprojects
CLEAN_SUBPROJECTS_NO=
CLEAN_SUBPROJECTS=${CLEAN_SUBPROJECTS_${SUBPROJECTS}}
# Project Name
PROJECTNAME=PICX_27J13.X
# Active Configuration
DEFAULTCONF=default
CONF=${DEFAULTCONF}
# All Configurations
ALLCONFS=default
# build
.build-impl: .build-pre
${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .build-conf
# clean
.clean-impl: .clean-pre
${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .clean-conf
# clobber
.clobber-impl: .clobber-pre .depcheck-impl
${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default clean
# all
.all-impl: .all-pre .depcheck-impl
${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default build
# dependency checking support
.depcheck-impl:
# @echo "# This code depends on make tool being used" >.dep.inc
# @if [ -n "${MAKE_VERSION}" ]; then \
# echo "DEPFILES=\$$(wildcard \$$(addsuffix .d, \$${OBJECTFILES}))" >>.dep.inc; \
# echo "ifneq (\$${DEPFILES},)" >>.dep.inc; \
# echo "include \$${DEPFILES}" >>.dep.inc; \
# echo "endif" >>.dep.inc; \
# else \
# echo ".KEEP_STATE:" >>.dep.inc; \
# echo ".KEEP_STATE_FILE:.make.state.\$${CONF}" >>.dep.inc; \
# fi

/PIC Stuff/PICX_27J13/nbproject/Makefile-local-default.mk
0,0 → 1,37
#
# Generated Makefile - do not edit!
#
#
# This file contains information about the location of compilers and other tools.
# If you commmit this file into your revision control server, you will be able to
# to checkout the project and build it from the command line with make. However,
# if more than one person works on the same project, then this file might show
# conflicts since different users are bound to have compilers in different places.
# In that case you might choose to not commit this file and let MPLAB X recreate this file
# for each user. The disadvantage of not commiting this file is that you must run MPLAB X at
# least once so the file gets created and the project can be built. Finally, you can also
# avoid using this file at all if you are only building from the command line with make.
# You can invoke make with the values of the macros:
# $ makeMP_CC="/opt/microchip/mplabc30/v3.30c/bin/pic30-gcc" ...
#
SHELL=cmd.exe
PATH_TO_IDE_BIN=C:/Program Files (x86)/Microchip/MPLABX/mplab_ide/mplab_ide/modules/../../bin/
# Adding MPLAB X bin directory to path.
PATH:=C:/Program Files (x86)/Microchip/MPLABX/mplab_ide/mplab_ide/modules/../../bin/:$(PATH)
# Path to java used to run MPLAB X when this makefile was created
MP_JAVA_PATH="C:\Program Files (x86)\Microchip\MPLABX\sys\java\jre1.6.0_32-windows-x64\java-windows/bin/"
OS_CURRENT="$(shell uname -s)"
MP_CC="C:\Program Files (x86)\Microchip\xc8\v1.12\bin\xc8.exe"
# MP_CPPC is not defined
# MP_BC is not defined
# MP_AS is not defined
# MP_LD is not defined
# MP_AR is not defined
DEP_GEN=${MP_JAVA_PATH}java -jar "C:/Program Files (x86)/Microchip/MPLABX/mplab_ide/mplab_ide/modules/../../bin/extractobjectdependencies.jar"
MP_CC_DIR="C:\Program Files (x86)\Microchip\xc8\v1.12\bin"
# MP_CPPC_DIR is not defined
# MP_BC_DIR is not defined
# MP_AS_DIR is not defined
# MP_LD_DIR is not defined
# MP_AR_DIR is not defined
# MP_BC_DIR is not defined

/PIC Stuff/PICX_27J13/nbproject/Makefile-variables.mk
0,0 → 1,13
#
# Generated - do not edit!
#
# NOCDDL
#
CND_BASEDIR=`pwd`
# default configuration
CND_ARTIFACT_DIR_default=dist/default/production
CND_ARTIFACT_NAME_default=PICX_27J13.X.production.hex
CND_ARTIFACT_PATH_default=dist/default/production/PICX_27J13.X.production.hex
CND_PACKAGE_DIR_default=${CND_DISTDIR}/default/package
CND_PACKAGE_NAME_default=picx27j13.x.tar
CND_PACKAGE_PATH_default=${CND_DISTDIR}/default/package/picx27j13.x.tar

/PIC Stuff/PICX_27J13/nbproject/Package-default.bash
0,0 → 1,73
#!/bin/bash -x
#
# Generated - do not edit!
#
# Macros
TOP=`pwd`
CND_CONF=default
CND_DISTDIR=dist
TMPDIR=build/${CND_CONF}/${IMAGE_TYPE}/tmp-packaging
TMPDIRNAME=tmp-packaging
OUTPUT_PATH=dist/${CND_CONF}/${IMAGE_TYPE}/PICX_27J13.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
OUTPUT_BASENAME=PICX_27J13.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
PACKAGE_TOP_DIR=picx27j13.x/
# Functions
function checkReturnCode
{
rc=$?
if [ $rc != 0 ]
then
exit $rc
fi
}
function makeDirectory
# $1 directory path
# $2 permission (optional)
{
mkdir -p "$1"
checkReturnCode
if [ "$2" != "" ]
then
chmod $2 "$1"
checkReturnCode
fi
}
function copyFileToTmpDir
# $1 from-file path
# $2 to-file path
# $3 permission
{
cp "$1" "$2"
checkReturnCode
if [ "$3" != "" ]
then
chmod $3 "$2"
checkReturnCode
fi
}
# Setup
cd "${TOP}"
mkdir -p ${CND_DISTDIR}/${CND_CONF}/package
rm -rf ${TMPDIR}
mkdir -p ${TMPDIR}
# Copy files and create directories and links
cd "${TOP}"
makeDirectory ${TMPDIR}/picx27j13.x/bin
copyFileToTmpDir "${OUTPUT_PATH}" "${TMPDIR}/${PACKAGE_TOP_DIR}bin/${OUTPUT_BASENAME}" 0755
# Generate tar file
cd "${TOP}"
rm -f ${CND_DISTDIR}/${CND_CONF}/package/picx27j13.x.tar
cd ${TMPDIR}
tar -vcf ../../../../${CND_DISTDIR}/${CND_CONF}/package/picx27j13.x.tar *
checkReturnCode
# Cleanup
cd "${TOP}"
rm -rf ${TMPDIR}

/PIC Stuff/PICX_27J13/nbproject/configurations.xml
0,0 → 1,122
<?xml version="1.0" encoding="UTF-8"?>
<configurationDescriptor version="62">
<logicalFolder name="root" displayName="root" projectFiles="true">
<logicalFolder name="HeaderFiles"
displayName="Header Files"
projectFiles="true">
<itemPath>defines.h</itemPath>
<itemPath>uart.h</itemPath>
</logicalFolder>
<logicalFolder name="LinkerScript"
displayName="Linker Files"
projectFiles="true">
</logicalFolder>
<logicalFolder name="SourceFiles"
displayName="Source Files"
projectFiles="true">
<itemPath>main.c</itemPath>
<itemPath>uart.c</itemPath>
</logicalFolder>
<logicalFolder name="ExternalFiles"
displayName="Important Files"
projectFiles="false">
<itemPath>Makefile</itemPath>
</logicalFolder>
</logicalFolder>
<projectmakefile>Makefile</projectmakefile>
<confs>
<conf name="default" type="2">
<toolsSet>
<developmentServer>localhost</developmentServer>
<targetDevice>PIC18F27J13</targetDevice>
<targetHeader></targetHeader>
<targetPluginBoard></targetPluginBoard>
<platformTool>PICkit3PlatformTool</platformTool>
<languageToolchain>XC8</languageToolchain>
<languageToolchainVersion>1.12</languageToolchainVersion>
<platform>3</platform>
</toolsSet>
<compileType>
<linkerTool>
<linkerLibItems>
</linkerLibItems>
</linkerTool>
<loading>
<useAlternateLoadableFile>false</useAlternateLoadableFile>
<alternateLoadableFile></alternateLoadableFile>
</loading>
</compileType>
<makeCustomizationType>
<makeCustomizationPreStepEnabled>false</makeCustomizationPreStepEnabled>
<makeCustomizationPreStep></makeCustomizationPreStep>
<makeCustomizationPostStepEnabled>false</makeCustomizationPostStepEnabled>
<makeCustomizationPostStep></makeCustomizationPostStep>
<makeCustomizationPutChecksumInUserID>false</makeCustomizationPutChecksumInUserID>
<makeCustomizationEnableLongLines>false</makeCustomizationEnableLongLines>
<makeCustomizationNormalizeHexFile>false</makeCustomizationNormalizeHexFile>
</makeCustomizationType>
<HI-TECH-COMP>
<property key="define-macros" value=""/>
<property key="extra-include-directories" value=""/>
<property key="identifier-length" value="255"/>
<property key="operation-mode" value="free"/>
<property key="opt-xc8-compiler-strict_ansi" value="false"/>
<property key="optimization-assembler" value="true"/>
<property key="optimization-assembler-files" value="false"/>
<property key="optimization-debug" value="false"/>
<property key="optimization-global" value="true"/>
<property key="optimization-level" value="9"/>
<property key="optimization-set" value="default"/>
<property key="optimization-speed" value="true"/>
<property key="preprocess-assembler" value="true"/>
<property key="undefine-macros" value=""/>
<property key="use-cci" value="false"/>
<property key="verbose" value="false"/>
<property key="warning-level" value="0"/>
<property key="what-to-do" value="ignore"/>
</HI-TECH-COMP>
<HI-TECH-LINK>
<property key="additional-options-checksum" value=""/>
<property key="additional-options-code-offset" value=""/>
<property key="additional-options-errata" value=""/>
<property key="additional-options-extend-address" value="false"/>
<property key="additional-options-trace-type" value=""/>
<property key="backup-reset-condition-flags" value="false"/>
<property key="calibrate-oscillator" value="true"/>
<property key="calibrate-oscillator-value" value=""/>
<property key="clear-bss" value="true"/>
<property key="code-model-external" value="wordwrite"/>
<property key="code-model-rom" value=""/>
<property key="create-html-files" value="false"/>
<property key="data-model-ram" value=""/>
<property key="data-model-size-of-double" value="32"/>
<property key="data-model-size-of-float" value="32"/>
<property key="display-class-usage" value="false"/>
<property key="display-hex-usage" value="false"/>
<property key="display-overall-usage" value="true"/>
<property key="display-psect-usage" value="false"/>
<property key="fill-flash-options-addr" value=""/>
<property key="fill-flash-options-const" value=""/>
<property key="fill-flash-options-how" value="0"/>
<property key="fill-flash-options-inc-const" value="1"/>
<property key="fill-flash-options-increment" value=""/>
<property key="fill-flash-options-seq" value=""/>
<property key="fill-flash-options-what" value="0"/>
<property key="format-hex-file-for-download" value="false"/>
<property key="initialize-data" value="true"/>
<property key="keep-generated-startup.as" value="false"/>
<property key="link-in-c-library" value="true"/>
<property key="link-in-peripheral-library" value="true"/>
<property key="managed-stack" value="false"/>
<property key="opt-xc8-linker-file" value="false"/>
<property key="opt-xc8-linker-link_startup" value="false"/>
<property key="opt-xc8-linker-serial" value=""/>
<property key="program-the-device-with-default-config-words" value="true"/>
</HI-TECH-LINK>
<PICkit3PlatformTool>
</PICkit3PlatformTool>
<XC8-config-global>
</XC8-config-global>
</conf>
</confs>
</configurationDescriptor>

/PIC Stuff/PICX_27J13/nbproject/private/configurations.xml
0,0 → 1,25
<?xml version="1.0" encoding="UTF-8"?>
<configurationDescriptor version="62">
<projectmakefile>Makefile</projectmakefile>
<defaultConf>0</defaultConf>
<confs>
<conf name="default" type="2">
<platformToolSN>:=MPLABCommUSB:=04D8:=900A:=0002:=Microchip Technology Inc.:=PICkit 3:=BUR114189291:=x:=en</platformToolSN>
<languageToolchainDir>C:\Program Files (x86)\Microchip\xc8\v1.12\bin</languageToolchainDir>
<mdbdebugger version="1">
<placeholder1>place holder 1</placeholder1>
<placeholder2>place holder 2</placeholder2>
</mdbdebugger>
<runprofile version="6">
<args></args>
<rundir></rundir>
<buildfirst>true</buildfirst>
<console-type>0</console-type>
<terminal-type>0</terminal-type>
<remove-instrumentation>0</remove-instrumentation>
<environment>
</environment>
</runprofile>
</conf>
</confs>
</configurationDescriptor>

/PIC Stuff/PICX_27J13/nbproject/private/private.properties
--- PIC Stuff/PICX_27J13/nbproject/private/private.xml (nonexistent)
+++ PIC Stuff/PICX_27J13/nbproject/private/private.xml (revision 152)
@@ -0,0 +1,10 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project-private xmlns="http://www.netbeans.org/ns/project-private/1">
+ <editor-bookmarks xmlns="http://www.netbeans.org/ns/editor-bookmarks/1"/>
+ <open-files xmlns="http://www.netbeans.org/ns/projectui-open-files/1">
+ <file>file:/C:/Users/Kevin/Documents/Code/PICX_27J13.X/defines.h</file>
+ <file>file:/C:/Users/Kevin/Documents/Code/PICX_27J13.X/uart.h</file>
+ <file>file:/C:/Users/Kevin/Documents/Code/PICX_27J13.X/main.c</file>
+ <file>file:/C:/Users/Kevin/Documents/Code/PICX_27J13.X/uart.c</file>
+ </open-files>
+</project-private>

/PIC Stuff/PICX_27J13/nbproject/project.properties
--- PIC Stuff/PICX_27J13/nbproject/project.xml (nonexistent)
+++ PIC Stuff/PICX_27J13/nbproject/project.xml (revision 152)
@@ -0,0 +1,16 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project xmlns="http://www.netbeans.org/ns/project/1">
+ <type>com.microchip.mplab.nbide.embedded.makeproject</type>
+ <configuration>
+ <data xmlns="http://www.netbeans.org/ns/make-project/1">
+ <name>PICX_27J13</name>
+ <creation-uuid>18902124-e972-4028-9598-101aba5c4b06</creation-uuid>
+ <make-project-type>0</make-project-type>
+ <c-extensions>c</c-extensions>
+ <cpp-extensions/>
+ <header-extensions>h</header-extensions>
+ <sourceEncoding>ISO-8859-1</sourceEncoding>
+ <make-dep-projects/>
+ </data>
+ </configuration>
+</project>

/PIC Stuff/PICX_27J13/uart.c
0,0 → 1,182
#include <xc.h>
#include <string.h>
#include <stdio.h>
#include "defines.h"
#include "uart.h"
static UART_DATA uart_1_data;
static UART_DATA *uart_1_data_p = &uart_1_data;
void UART1_Init() {
// Configure the hardware USART device
// UART1 TX RC6
// UART1 RX RC7
UART1_TX_TRIS = 0; // Tx pin set to output
UART1_RX_TRIS = 1; // Rx pin set to input
BAUDCON1bits.BRG16 = 0; // 8-bit baud rate generator
SPBRG1 = 25; // Set UART speed to 115200 baud
TXSTA1bits.BRGH = 1; // High speed mode
TXSTA1bits.SYNC = 0; // Async mode
RCSTA1bits.SPEN = 1; // Serial port enable
TXSTA1bits.TX9 = 0; // 8 bit transmission
RCSTA1bits.RX9 = 0; // 8 bit reception
RCSTA1bits.CREN = 1; // Continuous receive mode
#ifdef _DEBUG // In debug mode we want to have TXEN constantly enabled
TXSTA1bits.TXEN = 1; // TX is always enabled
PIE1bits.TX1IE = 0; // Disable TX interrupt
#else
TXSTA1bits.TXEN = 0; // Enable transmission
PIE1bits.TX1IE = 1; // Enable TX interrupt
#endif
PIE1bits.RC1IE = 1; // Enable RX interrupt
// Initialize the buffer that holds UART messages
uart_1_data_p->buffer_in_read_ind = 0;
uart_1_data_p->buffer_in_write_ind = 0;
uart_1_data_p->buffer_in_len = 0;
uart_1_data_p->buffer_in_len_tmp = 0;
}
void UART1_Recv_Interrupt_Handler() {
unsigned char c;
if (PIR1bits.RC1IF) { // Check if data receive flag is set
c = RCREG1;
#ifdef UART1_RX_TO_BUFFER
// Save received data into buffer
uart_1_data_p->buffer_in[uart_1_data_p->buffer_in_write_ind] = c;
if (uart_1_data_p->buffer_in_write_ind == MAXUARTBUF - 1) {
uart_1_data_p->buffer_in_write_ind = 0;
} else {
uart_1_data_p->buffer_in_write_ind++;
}
// Store the last MAXUARTBUF values entered
if (uart_1_data_p->buffer_in_len_tmp < MAXUARTBUF) {
uart_1_data_p->buffer_in_len_tmp++;
} else {
if (uart_1_data_p->buffer_in_read_ind == MAXUARTBUF - 1) {
uart_1_data_p->buffer_in_read_ind = 0;
} else {
uart_1_data_p->buffer_in_read_ind++;
}
}
// Update buffer size upon receiving newline (0x0D)
if (c == UART1_BREAK_CHAR) {
uart_1_data_p->buffer_in_len = uart_1_data_p->buffer_in_len_tmp;
uart_1_data_p->buffer_in_len_tmp = 0;
}
#endif
#ifdef UART1_RX_TO_XBEE
XBee_Serial_In(c);
#endif
}
if (RCSTA1bits.OERR == 1) {
// We've overrun the USART and must reset
RCSTA1bits.CREN = 0; // Reset UART1
RCSTA1bits.CREN = 1;
DBG_PRINT_UART("UART1: (ERROR) overrun\r\n");
TXSTA1bits.TXEN = 0; // Kill anything currently sending
}
}
void UART1_Send_Interrupt_Handler() {
// Put remaining data in TSR for transmit
if (uart_1_data_p->buffer_out_ind != uart_1_data_p->buffer_out_len) {
TXREG1 = uart_1_data_p->buffer_out[uart_1_data_p->buffer_out_ind];
uart_1_data_p->buffer_out_ind++;
} else {
while (!TXSTA1bits.TRMT); // Wait for last byte to finish sending
TXSTA1bits.TXEN = 0; // End transmission and disable TX interrupt
uart_1_data_p->buffer_out_ind = 0;
uart_1_data_p->buffer_out_len = 0;
}
}
void UART1_WriteS(const char *fmt, ...) {
#ifdef _DEBUG
unsigned char i;
va_list args;
va_start(args, fmt);
// vsprintf((char *) uart_1_data_p->buffer_out, fmt, args);
vprintf(fmt, args);
va_end(args);
uart_1_data_p->buffer_out_len = strlen((char *) uart_1_data_p->buffer_out);
uart_1_data_p->buffer_out_ind = 1;
for (i = 0; i < uart_1_data_p->buffer_out_len; i++) {
TXREG1 = uart_1_data_p->buffer_out[i];
Nop();
while (!PIR1bits.TX1IF); // Wait for byte to be transmitted
}
#else
va_list args;
while (TXSTA1bits.TXEN); // Wait for previous message to finish sending
va_start(args, fmt);
vsprintf((char *) uart_1_data_p->buffer_out, fmt, args);
va_end(args);
uart_1_data_p->buffer_out_len = strlen((char *) uart_1_data_p->buffer_out);
uart_1_data_p->buffer_out_ind = 1;
TXREG1 = uart_1_data_p->buffer_out[0]; // Put first byte in TSR
TXSTA1bits.TXEN = 1; // Begin transmission
#endif
}
void UART1_WriteB(const char *msg, unsigned char length) {
unsigned char i;
#ifdef _DEBUG
for (i = 0; i < length; i++) {
TXREG1 = msg[i];
Nop();
while (!PIR1bits.TX1IF); // Wait for byte to be transmitted
}
#else
while (TXSTA1bits.TXEN); // Wait for previous message to finish sending
uart_1_data_p->buffer_out_len = length;
uart_1_data_p->buffer_out_ind = 1;
for (i = 0; i < length; i++) {
uart_1_data_p->buffer_out[i] = msg[i];
}
TXREG1 = uart_1_data_p->buffer_out[0]; // Put first byte in TSR
TXSTA1bits.TXEN = 1; // Begin transmission
#endif
}
void UART1_WriteC(const unsigned char c) {
#ifdef _DEBUG
TXREG1 = c;
Nop();
while (!PIR1bits.TX1IF);
#else
while (TXSTA1bits.TXEN);
uart_1_data_p->buffer_out_len = 1;
uart_1_data_p->buffer_out_ind = 1;
TXREG1 = c;
TXSTA1bits.TXEN = 1;
#endif
}
unsigned char UART1_Buffer_Len() {
return uart_1_data_p->buffer_in_len;
}
/* Reader interface to the UART buffer, returns the number of bytes read */
unsigned char UART1_Read_Buffer(unsigned char *buffer) {
unsigned char i = 0;
while (uart_1_data_p->buffer_in_len != 0) {
buffer[i] = uart_1_data_p->buffer_in[uart_1_data_p->buffer_in_read_ind];
i++;
if (uart_1_data_p->buffer_in_read_ind == MAXUARTBUF - 1) {
uart_1_data_p->buffer_in_read_ind = 0;
} else {
uart_1_data_p->buffer_in_read_ind++;
}
uart_1_data_p->buffer_in_len--;
}
return i;
}

/PIC Stuff/PICX_27J13/uart.h
0,0 → 1,31
#ifndef __uart_h
#define __uart_h
#define MAXUARTBUF 125
#define UART1_BREAK_CHAR 0x0D //(CR)
#define UART1_RECV_BUFFER
//#define UART1_RECV_XBEE
typedef struct __UART_DATA {
unsigned char buffer_in[MAXUARTBUF];
unsigned char buffer_in_read_ind;
unsigned char buffer_in_write_ind;
unsigned char buffer_in_len;
unsigned char buffer_in_len_tmp;
unsigned char buffer_out[MAXUARTBUF];
unsigned char buffer_out_ind;
unsigned char buffer_out_len;
} UART_DATA;
void UART1_Init(void);
void UART1_Recv_Interrupt_Handler(void);
void UART1_Send_Interrupt_Handler(void);
void UART1_WriteS(const char *fmt, ...);
void UART1_WriteB(const char *msg, unsigned char length);
void UART1_WriteC(const unsigned char c);
unsigned char UART1_Buffer_Len(void);
unsigned char UART1_Read_Buffer(unsigned char *buffer);
#endif