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Kevin |
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#include "defines.h"
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#include "I2C1.h"
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static I2C1_DATA *i2c_data_p;
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// Initialize the data structures, should be called once before any I2C routines are called
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void I2C1_Init(I2C1_DATA *data, uint8_t speed, uint8_t address) {
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i2c_data_p = data;
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i2c_data_p->buffer_in_len = 0;
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i2c_data_p->buffer_in_read_ind = 0;
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i2c_data_p->buffer_in_write_ind = 0;
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i2c_data_p->buffer_out_ind = 0;
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i2c_data_p->buffer_out_len = 0;
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i2c_data_p->operating_state = I2C1_IDLE;
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i2c_data_p->return_status = 0;
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i2c_data_p->slave_in_last_byte = 0;
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i2c_data_p->slave_sending_data = 0;
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i2c_data_p->master_dest_addr = 0;
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i2c_data_p->master_status = I2C1_MASTER_IDLE;
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INTDisableInterrupts();
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// Enable the I2C module and set the clock stretch enable bit
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// Note: Automatically overrides any other pin settings
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I2C1CONSET = 0x00008040;
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I2C1ADD = address;
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Kevin |
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if (speed == 0x01) {
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I2C1BRG = 0x0BE; // Operate at 200kHZ (80MHz)
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I2C1CONbits.DISSLW = 0; // Slew rate control enabled
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} else if (speed == 0x02) {
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I2C1BRG = 0x05A; // Operate at 400kHZ (80MHz)
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I2C1CONbits.DISSLW = 1; // Slew rate control disabled
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} else if (speed == 0x03) {
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I2C1BRG = 0x020; // Operate at 1MHz (80MHz)
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I2C1CONbits.DISSLW = 1; // Slew rate control disabled
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} else {
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I2C1BRG = 0x186; // Operate at 100kHZ (80MHz)
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I2C1CONbits.DISSLW = 0; // Slew rate control enabled
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}
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Kevin |
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IFS0CLR = 0xE0000000; // Clear any existing events
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IPC6CLR = 0x00001F00; // Reset priority levels
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Kevin |
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IPC6SET = 0x00001600; // Set IPL=6, Subpriority 2
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Kevin |
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IEC0SET = 0xE0000000; // Enable I2C1 interrupts
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INTEnableInterrupts();
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}
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// Sends length number of bytes in msg to specified address (no R/W bit)
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Kevin |
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// Will return status I2C1_SEND_OK or I2C1_SEND_FAIL
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Kevin |
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void I2C1_Master_Send(uint8_t address, uint8_t *msg, uint32_t length) {
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uint32_t i;
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if (length == 0)
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return;
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// Copy message to send into buffer and save length/address
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for (i = 0; i < length; i++) {
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i2c_data_p->buffer_in[i] = msg[i];
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}
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i2c_data_p->buffer_in_len = length;
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i2c_data_p->master_dest_addr = address;
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i2c_data_p->buffer_in_read_ind = 0;
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i2c_data_p->buffer_in_write_ind = 0;
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// Change status to 'next' operation
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i2c_data_p->operating_state = I2C1_SEND_ADDR;
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i2c_data_p->master_status = I2C1_MASTER_SEND;
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// Generate start condition
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I2C1CONbits.SEN = 1;
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}
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// Reads length number of bytes from address (no R/W bit)
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Kevin |
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// Will return status I2C1_RECV_OK or I2C1_RECV_FAIL
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Kevin |
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void I2C1_Master_Recv(uint8_t address, uint32_t length) {
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if (length == 0)
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return;
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// Save length and address to get data from
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i2c_data_p->buffer_in_len = length;
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i2c_data_p->master_dest_addr = address;
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i2c_data_p->buffer_in_read_ind = 0;
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i2c_data_p->buffer_in_write_ind = 0;
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// Change status to 'next' operation
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i2c_data_p->operating_state = I2C1_SEND_ADDR;
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i2c_data_p->master_status = I2C1_MASTER_RECV;
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// Generate start condition
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I2C1CONbits.SEN = 1;
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}
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// Writes msg to address then reads length number of bytes from address
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Kevin |
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// Will return status I2C1_SEND_FAIL or I2C1_RECV_FAIL or I2C1_RECV_OK
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Kevin |
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void I2C1_Master_Restart(uint8_t address, uint8_t msg, uint32_t length) {
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uint8_t c;
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if (length == 0) {
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c = msg;
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I2C1_Master_Send(address, &c, 1);
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return;
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}
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// Save length and address to get data from
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i2c_data_p->buffer_in[0] = msg;
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i2c_data_p->buffer_in_len = length;
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i2c_data_p->master_dest_addr = address;
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i2c_data_p->buffer_in_read_ind = 0;
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i2c_data_p->buffer_in_write_ind = 0;
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// Change status to 'next' operation
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i2c_data_p->operating_state = I2C1_SEND_ADDR;
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i2c_data_p->master_status = I2C1_MASTER_RESTART;
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// Generate start condition
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I2C1CONbits.SEN = 1;
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}
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void __ISR(_I2C_1_VECTOR, ipl5) __I2C_1_Interrupt_Handler(void) {
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// Bus collision event
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if (IFS0bits.I2C1BIF) {
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Kevin |
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// TODO: Handle bus collision events here
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Kevin |
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IFS0CLR = 0x20000000;
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}
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// Slave event
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if (IFS0bits.I2C1SIF) {
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I2C1_Interrupt_Slave();
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IFS0CLR = 0x40000000;
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}
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// Master event
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if (IFS0bits.I2C1MIF) {
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I2C1_Interrupt_Master();
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IFS0CLR = 0x80000000;
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}
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}
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// An internal subroutine used in the master version of the i2c_interrupt_handler
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void I2C1_Interrupt_Master() {
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/* The PIC32 family has different master interrupts than the PIC8 family
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* Master mode operations that generate a slave interrupt are:
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* 1. Start condition
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* 2. Repeated start sequence
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* 3. Stop condition
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* 4. Data transfer byte received
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* 5. During a send ACK or NACK sequence to slave
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* 6. Data transfer byte transmitted
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* 7. During a slave-detected stop
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*/
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Kevin |
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if (I2C1STATbits.IWCOL == 1) {
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// TODO: Handle write collisions
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I2C1STATbits.IWCOL = 0;
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}
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Kevin |
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// If we are in the middle of sending data
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if (i2c_data_p->master_status == I2C1_MASTER_SEND) {
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switch (i2c_data_p->operating_state) {
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case I2C1_IDLE:
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break;
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case I2C1_SEND_ADDR:
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// Send the address with read bit set
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i2c_data_p->operating_state = I2C1_CHECK_ACK_SEND;
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I2C1TRN = (i2c_data_p->master_dest_addr << 1) | 0x0;
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break;
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case I2C1_CHECK_ACK_SEND:
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// Check if ACK is received or not
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if (!I2C1STATbits.ACKSTAT) {
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// If an ACK is received, send next byte of data
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if (i2c_data_p->buffer_in_read_ind < i2c_data_p->buffer_in_len) {
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I2C1TRN = i2c_data_p->buffer_in[i2c_data_p->buffer_in_read_ind];
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i2c_data_p->buffer_in_read_ind++;
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} else {
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// If no more data is to be sent, send stop bit
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i2c_data_p->operating_state = I2C1_STOPPED;
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Kevin |
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I2C1CONbits.PEN = 1;
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i2c_data_p->return_status = I2C1_SEND_OK;
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}
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} else {
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// If a NACK is received, stop transmission and send error
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Kevin |
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i2c_data_p->operating_state = I2C1_STOPPED;
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Kevin |
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I2C1CONbits.PEN = 1;
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i2c_data_p->return_status = I2C1_SEND_FAIL;
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}
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break;
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Kevin |
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case I2C1_STOPPED:
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i2c_data_p->operating_state = I2C1_IDLE;
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i2c_data_p->master_status = I2C1_MASTER_IDLE;
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break;
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Kevin |
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}
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// If we are in the middle of receiving data
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} else if (i2c_data_p->master_status == I2C1_MASTER_RECV) {
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switch (i2c_data_p->operating_state) {
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case I2C1_IDLE:
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break;
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case I2C1_SEND_ADDR:
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// Send address with write bit set
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i2c_data_p->operating_state = I2C1_CHECK_ACK_RECV;
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I2C1TRN = (i2c_data_p->master_dest_addr << 1) | 0x1;
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break;
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case I2C1_CHECK_ACK_RECV:
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// Check if ACK is received
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if (!I2C1STATbits.ACKSTAT) {
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// If an ACK is received, set module to receive 1 byte of data
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i2c_data_p->operating_state = I2C1_RCV_DATA;
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I2C1CONbits.RCEN = 1;
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} else {
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// If a NACK is received, stop transmission and send error
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Kevin |
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i2c_data_p->operating_state = I2C1_STOPPED;
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Kevin |
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I2C1CONbits.PEN = 1;
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i2c_data_p->return_status = I2C1_RECV_FAIL;
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}
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break;
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case I2C1_RCV_DATA:
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// On receive, save byte into buffer
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Kevin |
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// TODO: Handle possible I2C buffer overflow
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Kevin |
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i2c_data_p->buffer_in[i2c_data_p->buffer_in_write_ind] = I2C1RCV;
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i2c_data_p->buffer_in_write_ind++;
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if (i2c_data_p->buffer_in_write_ind < i2c_data_p->buffer_in_len) {
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// If we still need to read, send an ACK to the slave
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i2c_data_p->operating_state = I2C1_REQ_DATA;
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I2C1CONbits.ACKDT = 0; // ACK
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I2C1CONbits.ACKEN = 1;
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} else {
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// If we are done reading, send an NACK to the slave
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i2c_data_p->operating_state = I2C1_SEND_STOP;
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I2C1CONbits.ACKDT = 1; // NACK
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I2C1CONbits.ACKEN = 1;
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}
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break;
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case I2C1_REQ_DATA:
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// Set module to receive one byte of data
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i2c_data_p->operating_state = I2C1_RCV_DATA;
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I2C1CONbits.RCEN = 1;
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break;
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case I2C1_SEND_STOP:
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Kevin |
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// Send the stop bit
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i2c_data_p->operating_state = I2C1_STOPPED;
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Kevin |
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I2C1CONbits.PEN = 1;
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i2c_data_p->return_status = I2C1_RECV_OK;
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break;
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Kevin |
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case I2C1_STOPPED:
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i2c_data_p->operating_state = I2C1_IDLE;
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i2c_data_p->master_status = I2C1_MASTER_IDLE;
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break;
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Kevin |
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}
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} else if (i2c_data_p->master_status == I2C1_MASTER_RESTART) {
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switch (i2c_data_p->operating_state) {
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case I2C1_IDLE:
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break;
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case I2C1_SEND_ADDR:
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// Send the address with read bit set
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i2c_data_p->operating_state = I2C1_CHECK_ACK_SEND;
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I2C1TRN = (i2c_data_p->master_dest_addr << 1) | 0x0;
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break;
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case I2C1_CHECK_ACK_SEND:
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// Check if ACK is received or not
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if (!I2C1STATbits.ACKSTAT) {
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// If an ACK is received, send first byte of data
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Kevin |
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uint8_t to_send = i2c_data_p->buffer_in[0];
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I2C1TRN = to_send;
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Kevin |
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i2c_data_p->operating_state = I2C1_CHECK_ACK_RESTART;
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} else {
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// If a NACK is received, stop transmission and send error
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Kevin |
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i2c_data_p->operating_state = I2C1_STOPPED;
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Kevin |
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I2C1CONbits.PEN = 1;
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i2c_data_p->return_status = I2C1_SEND_FAIL;
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}
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break;
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case I2C1_CHECK_ACK_RESTART:
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if (!I2C1STATbits.ACKSTAT) {
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I2C1CONbits.RSEN = 1;
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i2c_data_p->operating_state = I2C1_SEND_ADDR_2;
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} else {
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// If a NACK is received, stop transmission and send error
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Kevin |
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i2c_data_p->operating_state = I2C1_STOPPED;
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Kevin |
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I2C1CONbits.PEN = 1;
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i2c_data_p->return_status = I2C1_SEND_FAIL;
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}
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break;
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case I2C1_SEND_ADDR_2:
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// Send the address with read bit set
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i2c_data_p->operating_state = I2C1_CHECK_ACK_RECV;
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I2C1TRN = (i2c_data_p->master_dest_addr << 1) | 0x1;
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break;
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case I2C1_CHECK_ACK_RECV:
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// Check if ACK is received
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if (!I2C1STATbits.ACKSTAT) {
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// If an ACK is received, set module to receive 1 byte of data
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i2c_data_p->operating_state = I2C1_RCV_DATA;
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I2C1CONbits.RCEN = 1;
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} else {
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// If a NACK is received, stop transmission and send error
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Kevin |
297 |
i2c_data_p->operating_state = I2C1_STOPPED;
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Kevin |
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I2C1CONbits.PEN = 1;
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i2c_data_p->return_status = I2C1_RECV_FAIL;
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}
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break;
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case I2C1_RCV_DATA:
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303 |
// On receive, save byte into buffer
|
| 235 |
Kevin |
304 |
// TODO: Handle possible I2C buffer overflow
|
| 234 |
Kevin |
305 |
i2c_data_p->buffer_in[i2c_data_p->buffer_in_write_ind] = I2C1RCV;
|
|
|
306 |
i2c_data_p->buffer_in_write_ind++;
|
|
|
307 |
if (i2c_data_p->buffer_in_write_ind < i2c_data_p->buffer_in_len) {
|
|
|
308 |
// If we still need to read, send an ACK to the slave
|
|
|
309 |
i2c_data_p->operating_state = I2C1_REQ_DATA;
|
|
|
310 |
I2C1CONbits.ACKDT = 0; // ACK
|
|
|
311 |
I2C1CONbits.ACKEN = 1;
|
|
|
312 |
} else {
|
|
|
313 |
// If we are done reading, send an NACK to the slave
|
|
|
314 |
i2c_data_p->operating_state = I2C1_SEND_STOP;
|
|
|
315 |
I2C1CONbits.ACKDT = 1; // NACK
|
|
|
316 |
I2C1CONbits.ACKEN = 1;
|
|
|
317 |
}
|
|
|
318 |
break;
|
|
|
319 |
case I2C1_REQ_DATA:
|
|
|
320 |
// Set module to receive one byte of data
|
|
|
321 |
i2c_data_p->operating_state = I2C1_RCV_DATA;
|
|
|
322 |
I2C1CONbits.RCEN = 1;
|
|
|
323 |
break;
|
|
|
324 |
case I2C1_SEND_STOP:
|
| 235 |
Kevin |
325 |
// Send the stop bit
|
|
|
326 |
i2c_data_p->operating_state = I2C1_STOPPED;
|
| 234 |
Kevin |
327 |
I2C1CONbits.PEN = 1;
|
|
|
328 |
i2c_data_p->return_status = I2C1_RECV_OK;
|
|
|
329 |
break;
|
| 235 |
Kevin |
330 |
case I2C1_STOPPED:
|
|
|
331 |
i2c_data_p->operating_state = I2C1_IDLE;
|
|
|
332 |
i2c_data_p->master_status = I2C1_MASTER_IDLE;
|
|
|
333 |
break;
|
| 234 |
Kevin |
334 |
}
|
|
|
335 |
}
|
|
|
336 |
}
|
|
|
337 |
|
|
|
338 |
void I2C1_Interrupt_Slave() {
|
|
|
339 |
// !!WARNING!! THIS CODE DOES -NOT- HAVE ANY ERROR HANDLING !!
|
|
|
340 |
// TODO: Add error handling to this interrupt function
|
|
|
341 |
|
|
|
342 |
/* The PIC32 family has different slave interrupts than the PIC8 family
|
|
|
343 |
* Slave mode operations that generate a slave interrupt are:
|
|
|
344 |
* 1. Detection of a valid device address (including general call)
|
|
|
345 |
* 2. Reception of data
|
|
|
346 |
* 3. Request to transmit data
|
|
|
347 |
*/
|
|
|
348 |
|
|
|
349 |
uint8_t received_data;
|
|
|
350 |
uint8_t data_read_from_buffer = 0;
|
|
|
351 |
uint8_t data_written_to_buffer = 0;
|
|
|
352 |
uint8_t overrun_error = 0;
|
|
|
353 |
|
|
|
354 |
// Clear SSPOV (overflow bit)
|
|
|
355 |
if (I2C1STATbits.I2COV == 1) {
|
|
|
356 |
I2C1STATbits.I2COV = 0;
|
|
|
357 |
overrun_error = 1;
|
|
|
358 |
i2c_data_p->return_status = I2C1_ERR_OVERRUN;
|
|
|
359 |
}
|
|
|
360 |
|
|
|
361 |
// Read SPPxBUF if it is full
|
|
|
362 |
if (I2C1STATbits.RBF == 1) {
|
|
|
363 |
received_data = I2C1RCV;
|
|
|
364 |
data_read_from_buffer = 1;
|
|
|
365 |
}
|
|
|
366 |
|
|
|
367 |
if (!overrun_error) {
|
|
|
368 |
if (I2C1STATbits.R_W == 0) {
|
|
|
369 |
// Slave is receiving data
|
|
|
370 |
i2c_data_p->buffer_in[i2c_data_p->buffer_in_write_ind] = received_data;
|
|
|
371 |
if (i2c_data_p->buffer_in_write_ind == MAXI2C1BUF - 1) {
|
|
|
372 |
i2c_data_p->buffer_in_write_ind = 0;
|
|
|
373 |
} else {
|
|
|
374 |
i2c_data_p->buffer_in_write_ind++;
|
|
|
375 |
}
|
|
|
376 |
if (i2c_data_p->buffer_in_len < MAXI2C1BUF - 1) {
|
|
|
377 |
i2c_data_p->buffer_in_len++;
|
|
|
378 |
}
|
|
|
379 |
i2c_data_p->slave_in_last_byte = received_data;
|
|
|
380 |
i2c_data_p->return_status = I2C1_RECV_OK;
|
|
|
381 |
} else {
|
|
|
382 |
// Slave is returning data
|
|
|
383 |
if (!i2c_data_p->slave_sending_data) {
|
|
|
384 |
// If we are not currently sending data, figure out what to reply with
|
|
|
385 |
if (I2C1_Process_Request(i2c_data_p->slave_in_last_byte)) {
|
|
|
386 |
// Data exists to be returned, send first byte
|
|
|
387 |
I2C1TRN = i2c_data_p->buffer_out[0];
|
|
|
388 |
data_written_to_buffer = 1;
|
|
|
389 |
i2c_data_p->buffer_out_ind = 1;
|
|
|
390 |
i2c_data_p->slave_sending_data = 1;
|
|
|
391 |
} else {
|
|
|
392 |
// Unknown request, fill rest of request with 0s
|
|
|
393 |
I2C1TRN = 0x0;
|
|
|
394 |
data_written_to_buffer = 1;
|
|
|
395 |
i2c_data_p->slave_sending_data = 0;
|
|
|
396 |
i2c_data_p->return_status = I2C1_SEND_FAIL;
|
|
|
397 |
}
|
|
|
398 |
} else {
|
|
|
399 |
// Sending remaining data back to master
|
|
|
400 |
if (i2c_data_p->buffer_out_ind < i2c_data_p->buffer_out_len) {
|
|
|
401 |
I2C1TRN = i2c_data_p->buffer_out[i2c_data_p->buffer_out_ind];
|
|
|
402 |
data_written_to_buffer = 1;
|
|
|
403 |
i2c_data_p->buffer_out_ind++;
|
|
|
404 |
} else {
|
|
|
405 |
// Nothing left to send, fill rest of request with 0s
|
|
|
406 |
I2C1TRN = 0x0;
|
|
|
407 |
data_written_to_buffer = 1;
|
|
|
408 |
i2c_data_p->slave_sending_data = 0;
|
|
|
409 |
i2c_data_p->return_status = I2C1_SEND_OK;
|
|
|
410 |
}
|
|
|
411 |
}
|
|
|
412 |
}
|
|
|
413 |
}
|
|
|
414 |
|
|
|
415 |
// Release the clock stretching bit (if we should)
|
|
|
416 |
if (data_read_from_buffer || data_written_to_buffer) {
|
|
|
417 |
// Release the clock
|
|
|
418 |
if (I2C1CONbits.SCLREL == 0) {
|
|
|
419 |
I2C1CONbits.SCLREL = 1;
|
|
|
420 |
}
|
|
|
421 |
}
|
|
|
422 |
}
|
|
|
423 |
|
|
|
424 |
/* Returns 0 if I2C module is currently busy, otherwise returns status code */
|
|
|
425 |
uint8_t I2C1_Get_Status() {
|
| 235 |
Kevin |
426 |
if (i2c_data_p->master_status == I2C1_MASTER_IDLE &&
|
|
|
427 |
i2c_data_p->operating_state == I2C1_IDLE &&
|
|
|
428 |
I2C1STATbits.TBF == 0) {
|
|
|
429 |
return i2c_data_p->return_status;
|
|
|
430 |
} else {
|
| 234 |
Kevin |
431 |
return 0;
|
|
|
432 |
}
|
|
|
433 |
}
|
|
|
434 |
|
|
|
435 |
uint8_t I2C1_Buffer_Len() {
|
|
|
436 |
return i2c_data_p->buffer_in_len;
|
|
|
437 |
}
|
|
|
438 |
|
|
|
439 |
/* Returns 0 if I2C module is currently busy, otherwise returns buffer length */
|
|
|
440 |
uint8_t I2C1_Read_Buffer(uint8_t *buffer) {
|
|
|
441 |
uint32_t i = 0;
|
|
|
442 |
while (i2c_data_p->buffer_in_len != 0) {
|
|
|
443 |
buffer[i] = i2c_data_p->buffer_in[i2c_data_p->buffer_in_read_ind];
|
|
|
444 |
i++;
|
|
|
445 |
if (i2c_data_p->buffer_in_read_ind == MAXI2C1BUF-1) {
|
|
|
446 |
i2c_data_p->buffer_in_read_ind = 0;
|
|
|
447 |
} else {
|
|
|
448 |
i2c_data_p->buffer_in_read_ind++;
|
|
|
449 |
}
|
|
|
450 |
i2c_data_p->buffer_in_len--;
|
|
|
451 |
}
|
|
|
452 |
return i;
|
|
|
453 |
}
|
|
|
454 |
|
|
|
455 |
/* Put data to be returned here */
|
|
|
456 |
uint8_t I2C1_Process_Request(uint8_t c) {
|
|
|
457 |
uint8_t ret = 0;
|
|
|
458 |
switch (c) {
|
|
|
459 |
case 0x01:
|
|
|
460 |
i2c_data_p->buffer_out[0] = 0x12;
|
|
|
461 |
i2c_data_p->buffer_out_len = 1;
|
|
|
462 |
ret = 1;
|
|
|
463 |
break;
|
|
|
464 |
case 0x02:
|
|
|
465 |
i2c_data_p->buffer_out[0] = 0x34;
|
|
|
466 |
i2c_data_p->buffer_out[1] = 0x56;
|
|
|
467 |
i2c_data_p->buffer_out_len = 2;
|
|
|
468 |
ret = 1;
|
|
|
469 |
break;
|
|
|
470 |
}
|
|
|
471 |
return ret;
|
|
|
472 |
}
|