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#include <xc.h>
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#include <plib.h>
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#include "defines.h"
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#include "SPI1.h"
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static SPI1_DATA *data_ptr;
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static void (*callback_function)(void);
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void SPI1_Init(SPI1_DATA *data) {
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data_ptr = data;
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data_ptr->outBufferInd = 0;
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data_ptr->outBufferLen = 0;
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#ifndef SPI1_WRITE_ONLY
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data_ptr->inBufferInd = 0;
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data_ptr->inBufferLen = 0;
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#endif
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INTDisableInterrupts();
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// Note: FIFO enhanced buffer depth is 4/8/16 for 32/16/8 bit widths
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// Alternative Configuration:
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// The third value is the SPI bitrate which is 1/2 the frequency of the
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// desired clock frequency. Thus 40Mhz / (20Mhz / 2) = 4.
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// Note: SPI_OPEN_TBE_NOT_FULL should only be used at >10Mhz speeds
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// SpiChnOpen(SPI_CHANNEL1, SPI_OPEN_MSTEN | SPI_OPEN_ENHBUF | SPI_OPEN_TBE_NOT_FULL | SPI_OPEN_RBF_NOT_EMPTY, 4);
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// INTSetVectorPriority(INT_SPI_1_VECTOR, INT_PRIORITY_LEVEL_6);
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// INTSetVectorSubPriority(INT_SPI_1_VECTOR, INT_SUB_PRIORITY_LEVEL_1);
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// INTClearFlag(INT_SPI1E);
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// INTClearFlag(INT_SPI1TX);
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// INTClearFlag(INT_SPI1RX);
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// FSCK = FPB / (2 * (SPIxBRG + 1))
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IEC0CLR = 0x03800000; // Disable all SPI interrupts
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SPI1CON = 0; // Stops and resets the SPI1.
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int tmp = SPI1BUF; // Clears the receive buffer
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IFS0CLR = 0x03800000; // Clear any existing event
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IPC5CLR = 0x1F000000; // Clear the priority
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IPC5SET = 0x19000000; // Set IPL=6, Subpriority 1
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SPI1BRG = 0x1; // Use FPB/4 clock frequency
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SPI1STATCLR = 0x40; // Clear the Overflow
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#ifndef SPI1_WRITE_ONLY
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IEC0SET = 0x01800000; // Enable RX and Error interrupts
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#endif
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// Enhanced buffer, SPI on, 8 bits transfer, SMP=1, Master mode
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// SPIxTXIF set on buffer empty, SPIxRXIF set on buffer not empty
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SPI1CON = 0x18225;
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INTEnableInterrupts();
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}
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#ifndef SPI1_WRITE_ONLY
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int SPI1_Read_Buffer(unsigned char *array, unsigned int count) {
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if (count > SPI1_BUFFER_SIZE)
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return 0;
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if (data_ptr->inBufferLen == 0)
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return 0;
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// Save previous interrupt state
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int prev = IEC0 & 0x03800000;
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// Temporarily disable interrupts
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IEC0CLR = 0x03800000;
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int ret = data_ptr->inBufferLen;
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int i;
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for (i = 0; i < count; i++) {
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array[i] = data_ptr->inBuffer[i];
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}
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// Reset buffer pointers
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data_ptr->inBufferInd = 0;
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data_ptr->inBufferLen = 0;
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// Restore saved interrupt state
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IEC0SET = prev;
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// Return the number of valid bytes in the buffer
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return ret;
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}
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#endif
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int SPI1_Write(unsigned char *array, unsigned int count, void (*callback)(void)) {
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callback_function = callback;
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if (count > SPI1_BUFFER_SIZE)
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return 0;
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if (data_ptr->outBufferLen != 0)
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return 0;
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data_ptr->outBufferLen = count;
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data_ptr->outBufferInd = count-1;
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int i;
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for (i = 0; i < count; i++) {
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data_ptr->outBuffer[i] = array[i];
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}
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IEC0SET = 0x02000000; // Enable TX interrupt
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return 1;
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}
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void __ISR(_SPI_1_VECTOR, ipl6) __SPI_1_Interrupt_Handler(void) {
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#ifndef SPI1_WRITE_ONLY
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// Process SPI1 error flag
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if (IFS0bits.SPI1EIF) {
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// Clear the receive overflow bit if it is set
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if (SPI1STATbits.SPIROV) {
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SPI1STATbits.SPIROV = 0;
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}
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IFS0CLR = 0x00800000; // Clear the error flag
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}
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// Process SPI1 receive flag
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if (IFS0bits.SPI1RXIF) {
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int i;
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// Read the data received from the last transfer
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int rxBufferCount = SPI1STATbits.RXBUFELM;
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if (data_ptr->inBufferLen + rxBufferCount < SPI1_BUFFER_SIZE) {
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for (i = 0; i < rxBufferCount; i++) {
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data_ptr->inBuffer[data_ptr->inBufferInd] = SPI1BUF;
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data_ptr->inBufferInd++;
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data_ptr->inBufferLen++;
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}
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} else {
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// If buffer is full, discard data in enhanced buffer
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for (i = 0; i < rxBufferCount; i++) {
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int tmp = SPI1BUF;
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}
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}
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IFS0CLR = 0x01000000; // Clear the RX flag
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}
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#endif
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// Process SPI1 transmit flag
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if (IFS0bits.SPI1TXIF) {
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int i;
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// Disable the transmit interrupt if all data has been sent
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if (data_ptr->outBufferLen == 0) {
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IEC0CLR=0x02000000;
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if (callback_function != NULL)
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(*callback_function)();
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} else {
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// Start transmitting the data in the buffer
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int txBufferFree = 16 - SPI1STATbits.TXBUFELM;
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if (data_ptr->outBufferLen > txBufferFree) {
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for (i = 0; i < txBufferFree; i++) {
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SPI1BUF = data_ptr->outBuffer[data_ptr->outBufferInd];
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data_ptr->outBufferInd--;
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}
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data_ptr->outBufferLen -= txBufferFree;
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} else {
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for (i = 0; i < data_ptr->outBufferLen; i++) {
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SPI1BUF = data_ptr->outBuffer[data_ptr->outBufferInd];
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data_ptr->outBufferInd--;
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}
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data_ptr->outBufferLen = 0;
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}
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}
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IFS0CLR = 0x02000000; // Clear the TX flag
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}
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}
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